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From: "David Roman" <davidroman96@gmail.com>
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Message-ID: <1722344234.fc244b14e8e705be0651b6a0b902e41948aff580.davidroman@gentoo>
Subject: [gentoo-commits] repo/proj/guru:master commit in: dev-embedded/esp-idf/files/, dev-embedded/esp-idf/
X-VCS-Repository: repo/proj/guru
X-VCS-Files: dev-embedded/esp-idf/esp-idf-5.3-r1.ebuild dev-embedded/esp-idf/files/esp-idf-5.3-fix-cpp-build-eth.patch
X-VCS-Directories: dev-embedded/esp-idf/files/ dev-embedded/esp-idf/
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X-VCS-Committer-Name: David Roman
X-VCS-Revision: fc244b14e8e705be0651b6a0b902e41948aff580
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Date: Tue, 30 Jul 2024 16:54:31 +0000 (UTC)
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commit: fc244b14e8e705be0651b6a0b902e41948aff580
Author: David Roman <davidroman96 <AT> gmail <DOT> com>
AuthorDate: Tue Jul 30 12:57:14 2024 +0000
Commit: David Roman <davidroman96 <AT> gmail <DOT> com>
CommitDate: Tue Jul 30 12:57:14 2024 +0000
URL: https://gitweb.gentoo.org/repo/proj/guru.git/commit/?id=fc244b14
dev-embedded/esp-idf: add patch for invalid type conversion error
Signed-off-by: David Roman <davidroman96 <AT> gmail.com>
dev-embedded/esp-idf/esp-idf-5.3-r1.ebuild | 159 +++++++++++++++++++++
.../files/esp-idf-5.3-fix-cpp-build-eth.patch | 125 ++++++++++++++++
2 files changed, 284 insertions(+)
diff --git a/dev-embedded/esp-idf/esp-idf-5.3-r1.ebuild b/dev-embedded/esp-idf/esp-idf-5.3-r1.ebuild
new file mode 100644
index 000000000..7a658ac3c
--- /dev/null
+++ b/dev-embedded/esp-idf/esp-idf-5.3-r1.ebuild
@@ -0,0 +1,159 @@
+# Copyright 1999-2024 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+PYTHON_COMPAT=( python3_{11,12} )
+
+VER="13.2.0_20240530"
+GDB_VER="14.2_20240403"
+
+CROSSTOOL_URL="https://github.com/espressif/crosstool-NG/releases/download/esp-${VER}"
+
+inherit estack python-r1
+
+DESCRIPTION="Espressif IoT Development Framework"
+HOMEPAGE="https://www.espressif.com/"
+
+# See https://dl.espressif.com/dl/esp-idf/espidf.constraints.v5.3.txt for information about version dependencies
+
+SRC_URI="https://dl.espressif.com/github_assets/espressif/${PN}/releases/download/v${PV}/${PN}-v${PV}.zip -> ${P}.zip
+ https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20240318/openocd-esp32-linux-amd64-0.12.0-esp32-20240318.tar.gz
+ https://github.com/espressif/binutils-gdb/releases/download/esp-gdb-v${GDB_VER}/xtensa-esp-elf-gdb-${GDB_VER}-x86_64-linux-gnu.tar.gz"
+SRC_URI+=" ${CROSSTOOL_URL}/xtensa-esp-elf-${VER}-x86_64-linux-gnu.tar.xz"
+SRC_URI+=" riscv32? (
+ ${CROSSTOOL_URL}/riscv32-esp-elf-${VER}-x86_64-linux-gnu.tar.xz
+ https://github.com/espressif/binutils-gdb/releases/download/esp-gdb-v${GDB_VER}/riscv32-esp-elf-gdb-${GDB_VER}-x86_64-linux-gnu.tar.gz
+)"
+
+S="${WORKDIR}/${PN}-v${PV}"
+
+LICENSE="Apache-2.0"
+SLOT="0"
+KEYWORDS="~amd64"
+
+IUSE="riscv32"
+REQUIRED_USE="${PYTHON_REQUIRED_USE}"
+
+BDEPEND="app-arch/unzip"
+RDEPEND="
+ ${PYTHON_DEPS}
+
+ dev-libs/libusb:1
+ dev-python/click[${PYTHON_USEDEP}]
+ dev-python/pyserial[${PYTHON_USEDEP}]
+ dev-python/cryptography[${PYTHON_USEDEP}]
+ dev-python/pyparsing[${PYTHON_USEDEP}]
+ dev-python/pyelftools[${PYTHON_USEDEP}]
+ dev-embedded/esp-coredump[${PYTHON_USEDEP}]
+ dev-embedded/esptool
+ dev-embedded/esp-idf-kconfig[${PYTHON_USEDEP}]
+ dev-embedded/esp-idf-monitor[${PYTHON_USEDEP}]
+ dev-embedded/esp-idf-panic-decoder[${PYTHON_USEDEP}]
+ dev-embedded/esp-idf-size[${PYTHON_USEDEP}]
+ dev-embedded/freertos-gdb[${PYTHON_USEDEP}]
+ dev-embedded/idf-component-manager[${PYTHON_USEDEP}]
+ sys-libs/zlib
+"
+
+RESTRICT="strip"
+
+QA_PREBUILT="opt/* usr/lib* usr/share/esp-idf/*"
+QA_PRESTRIPPED="opt/*"
+
+PATCHES=(
+ "${FILESDIR}/allow-system-install-${PN}-5.3.patch"
+ "${FILESDIR}/${P}-fix-cpp-build-eth.patch"
+)
+
+install_tool() {
+ eshopts_push -s globstar
+
+ into /opt/${1}
+
+ if [[ -d "../${1}/lib" ]]; then
+ if stat *.so &>/dev/null; then
+ for i in ../${1}/lib/**/*.so*; do
+ dolib.so ${i}
+ done
+ fi
+
+ if stat *.a &>/dev/null; then
+ for i in ../${1}/lib/**/*.a*; do
+ dolib.a ${i}
+ done
+ fi
+
+ insinto /opt/${1}/lib
+ doins -r ../${1}/lib/*
+ fi
+
+ exeinto /opt/${1}/bin
+ doexe ../${1}/bin/*
+ (
+ cd ../${1}
+ for i in libexec/**/*; do
+ exeinto /opt/${1}/$(dirname ${i})
+ if [[ -x "${i}" && ! -d "${i}" ]]; then
+ doexe ${i}
+ fi
+ done
+
+ if [[ -d "include" ]]; then
+ insinto /opt/${1}
+ doins -r include
+ fi
+
+ if [[ -d "share" ]]; then
+ insinto /opt/${1}
+ doins -r share
+ fi
+ )
+
+ (
+ cd "${D}"/opt/${1}/bin/ || die
+ for i in *; do
+ dodir /opt/bin
+ cd "${D}"/opt/bin || die
+ dosym ../${1}/bin/${i} /opt/bin/${i}
+ done
+ )
+
+ eshopts_pop
+}
+
+src_install() {
+ newbin - idf <<-EOF
+ #!/bin/sh
+
+ # Silence a warning by idf.py
+ export IDF_PYTHON_ENV_PATH=
+ exec python /usr/share/${PN}/tools/idf.py \$@
+EOF
+
+ install_tool xtensa-esp-elf
+ install_tool xtensa-esp-elf/xtensa-esp-elf
+
+ if use riscv32; then
+ install_tool riscv32-esp-elf
+ install_tool riscv32-esp-elf/riscv32-esp-elf
+ fi
+
+ install_tool openocd-esp32
+
+ # Remove unsupported python versions
+ rm "${WORKDIR}"/xtensa-esp-elf-gdb/bin/xtensa-esp-elf-gdb-3.{8..10} || die
+ install_tool xtensa-esp-elf-gdb
+ if use riscv32; then
+ install_tool riscv32-esp-elf-gdb
+ fi
+
+ echo "IDF_PATH=/usr/share/${PN}" > 99esp-idf || die
+ doenvd 99esp-idf
+
+ insinto /usr/share/${PN}
+
+ rm -r .git || die
+ find . -name ".git" -exec rm -rf {} \; || die
+ doins -r .
+}
diff --git a/dev-embedded/esp-idf/files/esp-idf-5.3-fix-cpp-build-eth.patch b/dev-embedded/esp-idf/files/esp-idf-5.3-fix-cpp-build-eth.patch
new file mode 100644
index 000000000..41fe1e87b
--- /dev/null
+++ b/dev-embedded/esp-idf/files/esp-idf-5.3-fix-cpp-build-eth.patch
@@ -0,0 +1,125 @@
+diff --git a/components/esp_eth/include/esp_eth_mac_esp.h b/components/esp_eth/include/esp_eth_mac_esp.h
+index 8c4909b8c5..39db373798 100644
+--- a/components/esp_eth/include/esp_eth_mac_esp.h
++++ b/components/esp_eth/include/esp_eth_mac_esp.h
+@@ -217,64 +217,64 @@ typedef enum {
+ #error "Unsupported RMII clock mode"
+ #endif // CONFIG_ETH_RMII_CLK_INPUT
+
+-#define ETH_ESP32_EMAC_DEFAULT_CONFIG() \
+- { \
+- .smi_gpio = \
+- { \
+- .mdc_num = 23, \
+- .mdio_num = 18 \
+- }, \
+- .interface = EMAC_DATA_INTERFACE_RMII, \
+- .clock_config = \
+- { \
+- .rmii = \
+- { \
+- .clock_mode = DEFAULT_RMII_CLK_MODE, \
+- .clock_gpio = DEFAULT_RMII_CLK_GPIO \
+- } \
+- }, \
+- .dma_burst_len = ETH_DMA_BURST_LEN_32, \
+- .intr_priority = 0, \
++#define ETH_ESP32_EMAC_DEFAULT_CONFIG() \
++ { \
++ .smi_gpio = \
++ { \
++ .mdc_num = 23, \
++ .mdio_num = 18 \
++ }, \
++ .interface = EMAC_DATA_INTERFACE_RMII, \
++ .clock_config = \
++ { \
++ .rmii = \
++ { \
++ .clock_mode = DEFAULT_RMII_CLK_MODE, \
++ .clock_gpio = (emac_rmii_clock_gpio_t) DEFAULT_RMII_CLK_GPIO \
++ } \
++ }, \
++ .dma_burst_len = ETH_DMA_BURST_LEN_32, \
++ .intr_priority = 0, \
+ }
+ #elif CONFIG_IDF_TARGET_ESP32P4
+-#define ETH_ESP32_EMAC_DEFAULT_CONFIG() \
+- { \
+- .smi_gpio = \
+- { \
+- .mdc_num = 31, \
+- .mdio_num = 27 \
+- }, \
+- .interface = EMAC_DATA_INTERFACE_RMII, \
+- .clock_config = \
+- { \
+- .rmii = \
+- { \
+- .clock_mode = EMAC_CLK_EXT_IN, \
+- .clock_gpio = 50 \
+- } \
+- }, \
+- .clock_config_out_in = \
+- { \
+- .rmii = \
+- { \
+- .clock_mode = EMAC_CLK_EXT_IN, \
+- .clock_gpio = -1 \
+- } \
+- }, \
+- .dma_burst_len = ETH_DMA_BURST_LEN_32, \
+- .intr_priority = 0, \
+- .emac_dataif_gpio = \
+- { \
+- .rmii = \
+- { \
+- .tx_en_num = 49, \
+- .txd0_num = 34, \
+- .txd1_num = 35, \
+- .crs_dv_num = 28, \
+- .rxd0_num = 29, \
+- .rxd1_num = 30 \
+- } \
+- }, \
++#define ETH_ESP32_EMAC_DEFAULT_CONFIG() \
++ { \
++ .smi_gpio = \
++ { \
++ .mdc_num = 31, \
++ .mdio_num = 27 \
++ }, \
++ .interface = EMAC_DATA_INTERFACE_RMII, \
++ .clock_config = \
++ { \
++ .rmii = \
++ { \
++ .clock_mode = EMAC_CLK_EXT_IN, \
++ .clock_gpio = (emac_rmii_clock_gpio_t) 50 \
++ } \
++ }, \
++ .clock_config_out_in = \
++ { \
++ .rmii = \
++ { \
++ .clock_mode = EMAC_CLK_EXT_IN, \
++ .clock_gpio = (emac_rmii_clock_gpio_t) -1 \
++ } \
++ }, \
++ .dma_burst_len = ETH_DMA_BURST_LEN_32, \
++ .intr_priority = 0, \
++ .emac_dataif_gpio = \
++ { \
++ .rmii = \
++ { \
++ .tx_en_num = 49, \
++ .txd0_num = 34, \
++ .txd1_num = 35, \
++ .crs_dv_num = 28, \
++ .rxd0_num = 29, \
++ .rxd1_num = 30 \
++ } \
++ }, \
+ }
+ #endif // CONFIG_IDF_TARGET_ESP32P4
+