From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.gentoo.org (woodpecker.gentoo.org [140.211.166.183]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by finch.gentoo.org (Postfix) with ESMTPS id 7F27415808A for ; Sat, 19 Jul 2025 13:58:52 +0000 (UTC) Received: from lists.gentoo.org (bobolink.gentoo.org [140.211.166.189]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) (Authenticated sender: relay-lists.gentoo.org@gentoo.org) by smtp.gentoo.org (Postfix) with ESMTPSA id 636B1340C15 for ; Sat, 19 Jul 2025 13:58:52 +0000 (UTC) Received: from bobolink.gentoo.org (localhost [127.0.0.1]) by bobolink.gentoo.org (Postfix) with ESMTP id 5A1D711055E; Sat, 19 Jul 2025 13:58:51 +0000 (UTC) Received: from smtp.gentoo.org (woodpecker.gentoo.org [140.211.166.183]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) by bobolink.gentoo.org (Postfix) with ESMTPS id 50A0911055E for ; Sat, 19 Jul 2025 13:58:51 +0000 (UTC) Received: from oystercatcher.gentoo.org (oystercatcher.gentoo.org [148.251.78.52]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id F2ECF340C15 for ; Sat, 19 Jul 2025 13:58:50 +0000 (UTC) Received: from localhost.localdomain (localhost [IPv6:::1]) by oystercatcher.gentoo.org (Postfix) with ESMTP id 437F0322E for ; Sat, 19 Jul 2025 13:58:49 +0000 (UTC) From: "Sam James" To: gentoo-commits@lists.gentoo.org Content-Transfer-Encoding: 8bit Content-type: text/plain; charset=UTF-8 Reply-To: gentoo-dev@lists.gentoo.org, "Sam James" Message-ID: <1752933501.aa7949fa373f5424765342de0b54ba3c163aa40f.sam@gentoo> Subject: [gentoo-commits] repo/gentoo:master commit in: profiles/base/ X-VCS-Repository: repo/gentoo X-VCS-Files: profiles/base/package.use.force X-VCS-Directories: profiles/base/ X-VCS-Committer: sam X-VCS-Committer-Name: Sam James X-VCS-Revision: aa7949fa373f5424765342de0b54ba3c163aa40f X-VCS-Branch: master Date: Sat, 19 Jul 2025 13:58:49 +0000 (UTC) Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-commits@lists.gentoo.org X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-Archives-Salt: 82494d21-b433-4528-b16b-851d80765222 X-Archives-Hash: 36191b9a5d6b6d548867404670220b60 commit: aa7949fa373f5424765342de0b54ba3c163aa40f Author: Sam James gentoo org> AuthorDate: Sat Jul 19 13:55:49 2025 +0000 Commit: Sam James gentoo org> CommitDate: Sat Jul 19 13:58:21 2025 +0000 URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=aa7949fa Revert "profiles/base: don't force-enable all LLVM targets" This reverts commit b7a956ed5e89120b44bc650839ba1786c163941e. Unfortunately, while 19d04b7dc91df38eff441e255bc1d6d4499531e2 tries to match LLVM_TARGETS, we have a problem where the stage0 rustc is already broken and you can't temporarily workaround that. Rust always needs Rust to build, so it's not doable as-is, without disabling USE=system-llvm. Revert the mask change for now so we can think about it more. Bug: https://bugs.gentoo.org/767700 Bug: https://bugs.gentoo.org/768267 Signed-off-by: Sam James gentoo.org> profiles/base/package.use.force | 96 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/profiles/base/package.use.force b/profiles/base/package.use.force index 5b29f3b5e39a..2d1b08f7ddee 100644 --- a/profiles/base/package.use.force +++ b/profiles/base/package.use.force @@ -193,6 +193,102 @@ dev-java/openjdk:11 system-bootstrap dev-java/openjdk:17 system-bootstrap dev-java/openjdk:21 system-bootstrap +# Michał Górny (2021-11-04) +# Enable all LLVM targets unconditionally. Unfortunately, disabling +# targets tend to break reverse dependencies (e.g. Rust) and we are yet +# to find a clean way of resolving that. Compared to the damage +# potential, the increase of build time is a minor problem. Users who +# really insist of building a smaller system can un-force the flags +# at their own responsibility. See bug #767700. +>=llvm-core/clang-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU +>=llvm-core/clang-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF +>=llvm-core/clang-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai +>=llvm-core/clang-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips +>=llvm-core/clang-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC +>=llvm-core/clang-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc +>=llvm-core/clang-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly +>=llvm-core/clang-13.0.1_rc llvm_targets_X86 llvm_targets_XCore +>=llvm-core/clang-14 llvm_targets_VE +>=llvm-core/clang-16 llvm_targets_LoongArch +>=llvm-core/clang-20 llvm_targets_SPIRV +>=llvm-core/llvm-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU +>=llvm-core/llvm-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF +>=llvm-core/llvm-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai +>=llvm-core/llvm-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips +>=llvm-core/llvm-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC +>=llvm-core/llvm-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc +>=llvm-core/llvm-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly +>=llvm-core/llvm-13.0.1_rc llvm_targets_X86 llvm_targets_XCore +>=llvm-core/llvm-14 llvm_targets_VE +>=llvm-core/llvm-16 llvm_targets_LoongArch +>=llvm-core/llvm-20 llvm_targets_SPIRV +>=llvm-core/lld-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU +>=llvm-core/lld-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF +>=llvm-core/lld-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai +>=llvm-core/lld-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips +>=llvm-core/lld-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC +>=llvm-core/lld-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc +>=llvm-core/lld-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly +>=llvm-core/lld-13.0.1_rc llvm_targets_X86 llvm_targets_XCore +>=llvm-core/lld-14 llvm_targets_VE +>=llvm-core/lld-16 llvm_targets_LoongArch +>=llvm-core/lld-20 llvm_targets_SPIRV +>=llvm-core/lld-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU +>=llvm-core/lld-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF +>=llvm-core/lld-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai +>=llvm-core/lld-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips +>=llvm-core/lld-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC +>=llvm-core/lld-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc +>=llvm-core/lld-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly +>=llvm-core/lld-13.0.1_rc llvm_targets_X86 llvm_targets_XCore +>=llvm-core/lld-14 llvm_targets_VE +>=llvm-core/lld-16 llvm_targets_LoongArch +>=llvm-core/lld-20 llvm_targets_SPIRV +>=llvm-core/flang-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU +>=llvm-core/flang-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF +>=llvm-core/flang-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai +>=llvm-core/flang-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips +>=llvm-core/flang-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC +>=llvm-core/flang-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc +>=llvm-core/flang-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly +>=llvm-core/flang-13.0.1_rc llvm_targets_X86 llvm_targets_XCore +>=llvm-core/flang-14 llvm_targets_VE +>=llvm-core/flang-16 llvm_targets_LoongArch +>=llvm-core/flang-20 llvm_targets_SPIRV +>=llvm-core/lldb-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU +>=llvm-core/lldb-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF +>=llvm-core/lldb-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai +>=llvm-core/lldb-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips +>=llvm-core/lldb-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC +>=llvm-core/lldb-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc +>=llvm-core/lldb-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly +>=llvm-core/lldb-13.0.1_rc llvm_targets_X86 llvm_targets_XCore +>=llvm-core/lldb-14 llvm_targets_VE +>=llvm-core/lldb-16 llvm_targets_LoongArch +>=llvm-core/lldb-20 llvm_targets_SPIRV +>=llvm-core/lldb-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU +>=llvm-core/lldb-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF +>=llvm-core/lldb-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai +>=llvm-core/lldb-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips +>=llvm-core/lldb-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC +>=llvm-core/lldb-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc +>=llvm-core/lldb-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly +>=llvm-core/lldb-13.0.1_rc llvm_targets_X86 llvm_targets_XCore +>=llvm-core/lldb-14 llvm_targets_VE +>=llvm-core/lldb-16 llvm_targets_LoongArch +>=llvm-core/lldb-20 llvm_targets_SPIRV +>=llvm-core/lldb-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU +>=llvm-core/lldb-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF +>=llvm-core/lldb-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai +>=llvm-core/lldb-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips +>=llvm-core/lldb-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC +>=llvm-core/lldb-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc +>=llvm-core/lldb-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly +>=llvm-core/lldb-13.0.1_rc llvm_targets_X86 llvm_targets_XCore +>=llvm-core/lldb-14 llvm_targets_VE +>=llvm-core/lldb-16 llvm_targets_LoongArch +>=llvm-core/lldb-20 llvm_targets_SPIRV + # Andreas K. Hüttel (2021-07-14) # Upstream plans to drop libcrypt.so.1/crypt.h from glibc # distribution and rely on external providers like libxcrypt.