From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from lists.gentoo.org (pigeon.gentoo.org [208.92.234.80]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by finch.gentoo.org (Postfix) with ESMTPS id E8BEF1581F0 for ; Sat, 14 Dec 2024 23:47:52 +0000 (UTC) Received: from pigeon.gentoo.org (localhost [127.0.0.1]) by pigeon.gentoo.org (Postfix) with SMTP id 286A7E0948; Sat, 14 Dec 2024 23:47:52 +0000 (UTC) Received: from smtp.gentoo.org (woodpecker.gentoo.org [140.211.166.183]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by pigeon.gentoo.org (Postfix) with ESMTPS id 76AD3E0948 for ; Sat, 14 Dec 2024 23:47:51 +0000 (UTC) Received: from oystercatcher.gentoo.org (oystercatcher.gentoo.org [148.251.78.52]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id 6E902342F92 for ; Sat, 14 Dec 2024 23:47:49 +0000 (UTC) Received: from localhost.localdomain (localhost [IPv6:::1]) by oystercatcher.gentoo.org (Postfix) with ESMTP id 07B3190B for ; Sat, 14 Dec 2024 23:47:48 +0000 (UTC) From: "Mike Pagano" To: gentoo-commits@lists.gentoo.org Content-Transfer-Encoding: 8bit Content-type: text/plain; charset=UTF-8 Reply-To: gentoo-dev@lists.gentoo.org, "Mike Pagano" Message-ID: <1734220052.4c68b8a5598beeb003b0f59ae33deba3b220de9a.mpagano@gentoo> Subject: [gentoo-commits] proj/linux-patches:6.12 commit in: / X-VCS-Repository: proj/linux-patches X-VCS-Files: 0000_README 1004_linux-6.12.5.patch X-VCS-Directories: / X-VCS-Committer: mpagano X-VCS-Committer-Name: Mike Pagano X-VCS-Revision: 4c68b8a5598beeb003b0f59ae33deba3b220de9a X-VCS-Branch: 6.12 Date: Sat, 14 Dec 2024 23:47:48 +0000 (UTC) Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-commits@lists.gentoo.org X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-Archives-Salt: 5bf49219-fd45-4524-94c6-3ae1874541cc X-Archives-Hash: d5df62a40962e9b427c049f2ff20f6f3 commit: 4c68b8a5598beeb003b0f59ae33deba3b220de9a Author: Mike Pagano gentoo org> AuthorDate: Sat Dec 14 23:47:32 2024 +0000 Commit: Mike Pagano gentoo org> CommitDate: Sat Dec 14 23:47:32 2024 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=4c68b8a5 Linux patch 6.12.5 Signed-off-by: Mike Pagano gentoo.org> 0000_README | 4 + 1004_linux-6.12.5.patch | 33366 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 33370 insertions(+) diff --git a/0000_README b/0000_README index 81375872..6429d035 100644 --- a/0000_README +++ b/0000_README @@ -59,6 +59,10 @@ Patch: 1003_linux-6.12.4.patch From: https://www.kernel.org Desc: Linux 6.12.4 +Patch: 1004_linux-6.12.5.patch +From: https://www.kernel.org +Desc: Linux 6.12.5 + Patch: 1510_fs-enable-link-security-restrictions-by-default.patch From: http://sources.debian.net/src/linux/3.16.7-ckt4-3/debian/patches/debian/fs-enable-link-security-restrictions-by-default.patch/ Desc: Enable link security restrictions by default. diff --git a/1004_linux-6.12.5.patch b/1004_linux-6.12.5.patch new file mode 100644 index 00000000..6347cd6c --- /dev/null +++ b/1004_linux-6.12.5.patch @@ -0,0 +1,33366 @@ +diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci +index 7f63c7e9777358..5da6a14dc326bd 100644 +--- a/Documentation/ABI/testing/sysfs-bus-pci ++++ b/Documentation/ABI/testing/sysfs-bus-pci +@@ -163,6 +163,17 @@ Description: + will be present in sysfs. Writing 1 to this file + will perform reset. + ++What: /sys/bus/pci/devices/.../reset_subordinate ++Date: October 2024 ++Contact: linux-pci@vger.kernel.org ++Description: ++ This is visible only for bridge devices. If you want to reset ++ all devices attached through the subordinate bus of a specific ++ bridge device, writing 1 to this will try to do it. This will ++ affect all devices attached to the system through this bridge ++ similiar to writing 1 to their individual "reset" file, so use ++ with caution. ++ + What: /sys/bus/pci/devices/.../vpd + Date: February 2008 + Contact: Ben Hutchings +diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs +index 513296bb6f297f..3e1630c70d8ae7 100644 +--- a/Documentation/ABI/testing/sysfs-fs-f2fs ++++ b/Documentation/ABI/testing/sysfs-fs-f2fs +@@ -822,3 +822,9 @@ Description: It controls the valid block ratio threshold not to trigger excessiv + for zoned deivces. The initial value of it is 95(%). F2FS will stop the + background GC thread from intiating GC for sections having valid blocks + exceeding the ratio. ++ ++What: /sys/fs/f2fs//max_read_extent_count ++Date: November 2024 ++Contact: "Chao Yu" ++Description: It controls max read extent count for per-inode, the value of threshold ++ is 10240 by default. +diff --git a/Documentation/accel/qaic/aic080.rst b/Documentation/accel/qaic/aic080.rst +new file mode 100644 +index 00000000000000..d563771ea6ce48 +--- /dev/null ++++ b/Documentation/accel/qaic/aic080.rst +@@ -0,0 +1,14 @@ ++.. SPDX-License-Identifier: GPL-2.0-only ++ ++=============================== ++ Qualcomm Cloud AI 80 (AIC080) ++=============================== ++ ++Overview ++======== ++ ++The Qualcomm Cloud AI 80/AIC080 family of products are a derivative of AIC100. ++The number of NSPs and clock rates are reduced to fit within resource ++constrained solutions. The PCIe Product ID is 0xa080. ++ ++As a derivative product, all AIC100 documentation applies. +diff --git a/Documentation/accel/qaic/index.rst b/Documentation/accel/qaic/index.rst +index ad19b88d1a669e..967b9dd8baceac 100644 +--- a/Documentation/accel/qaic/index.rst ++++ b/Documentation/accel/qaic/index.rst +@@ -10,4 +10,5 @@ accelerator cards. + .. toctree:: + + qaic ++ aic080 + aic100 +diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst +index 65bfab1b186146..77db10e944f039 100644 +--- a/Documentation/arch/arm64/silicon-errata.rst ++++ b/Documentation/arch/arm64/silicon-errata.rst +@@ -258,6 +258,8 @@ stable kernels. + | Hisilicon | Hip{08,09,10,10C| #162001900 | N/A | + | | ,11} SMMU PMCG | | | + +----------------+-----------------+-----------------+-----------------------------+ ++| Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 | +++----------------+-----------------+-----------------+-----------------------------+ + +----------------+-----------------+-----------------+-----------------------------+ + | Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 | + +----------------+-----------------+-----------------+-----------------------------+ +diff --git a/Documentation/i2c/busses/i2c-i801.rst b/Documentation/i2c/busses/i2c-i801.rst +index c840b597912c87..47e8ac5b7099f7 100644 +--- a/Documentation/i2c/busses/i2c-i801.rst ++++ b/Documentation/i2c/busses/i2c-i801.rst +@@ -49,6 +49,7 @@ Supported adapters: + * Intel Meteor Lake (SOC and PCH) + * Intel Birch Stream (SOC) + * Intel Arrow Lake (SOC) ++ * Intel Panther Lake (SOC) + + Datasheets: Publicly available at the Intel website + +diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml +index 6a050d755b9cb4..f6c5d8214c7e98 100644 +--- a/Documentation/netlink/specs/ethtool.yaml ++++ b/Documentation/netlink/specs/ethtool.yaml +@@ -96,7 +96,12 @@ attribute-sets: + name: bits + type: nest + nested-attributes: bitset-bits +- ++ - ++ name: value ++ type: binary ++ - ++ name: mask ++ type: binary + - + name: string + attributes: +diff --git a/Makefile b/Makefile +index 87dc2f81086021..f158bfe6407ac9 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + VERSION = 6 + PATCHLEVEL = 12 +-SUBLEVEL = 4 ++SUBLEVEL = 5 + EXTRAVERSION = + NAME = Baby Opossum Posse + +@@ -456,6 +456,7 @@ export rust_common_flags := --edition=2021 \ + -Wclippy::mut_mut \ + -Wclippy::needless_bitwise_bool \ + -Wclippy::needless_continue \ ++ -Aclippy::needless_lifetimes \ + -Wclippy::no_mangle_with_rust_abi \ + -Wclippy::dbg_macro + +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 22f8a7bca6d21c..a11a7a42edbfb5 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -1232,6 +1232,17 @@ config HISILICON_ERRATUM_161600802 + + If unsure, say Y. + ++config HISILICON_ERRATUM_162100801 ++ bool "Hip09 162100801 erratum support" ++ default y ++ help ++ When enabling GICv4.1 in hip09, VMAPP will fail to clear some caches ++ during unmapping operation, which will cause some vSGIs lost. ++ To fix the issue, invalidate related vPE cache through GICR_INVALLR ++ after VMOVP. ++ ++ If unsure, say Y. ++ + config QCOM_FALKOR_ERRATUM_1003 + bool "Falkor E1003: Incorrect translation due to ASID change" + default y +diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c +index b756578aeaeea1..1559a239137f32 100644 +--- a/arch/arm64/kernel/ptrace.c ++++ b/arch/arm64/kernel/ptrace.c +@@ -719,6 +719,8 @@ static int fpmr_set(struct task_struct *target, const struct user_regset *regset + if (!system_supports_fpmr()) + return -EINVAL; + ++ fpmr = target->thread.uw.fpmr; ++ + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fpmr, 0, count); + if (ret) + return ret; +@@ -1418,7 +1420,7 @@ static int tagged_addr_ctrl_get(struct task_struct *target, + { + long ctrl = get_tagged_addr_ctrl(target); + +- if (IS_ERR_VALUE(ctrl)) ++ if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl))) + return ctrl; + + return membuf_write(&to, &ctrl, sizeof(ctrl)); +@@ -1432,6 +1434,10 @@ static int tagged_addr_ctrl_set(struct task_struct *target, const struct + int ret; + long ctrl; + ++ ctrl = get_tagged_addr_ctrl(target); ++ if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl))) ++ return ctrl; ++ + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1); + if (ret) + return ret; +@@ -1463,6 +1469,8 @@ static int poe_set(struct task_struct *target, const struct + if (!system_supports_poe()) + return -EINVAL; + ++ ctrl = target->thread.por_el0; ++ + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1); + if (ret) + return ret; +diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c +index 188197590fc9ce..b2ac062463273f 100644 +--- a/arch/arm64/mm/context.c ++++ b/arch/arm64/mm/context.c +@@ -32,9 +32,9 @@ static unsigned long nr_pinned_asids; + static unsigned long *pinned_asid_map; + + #define ASID_MASK (~GENMASK(asid_bits - 1, 0)) +-#define ASID_FIRST_VERSION (1UL << asid_bits) ++#define ASID_FIRST_VERSION (1UL << 16) + +-#define NUM_USER_ASIDS ASID_FIRST_VERSION ++#define NUM_USER_ASIDS (1UL << asid_bits) + #define ctxid2asid(asid) ((asid) & ~ASID_MASK) + #define asid2ctxid(asid, genid) ((asid) | (genid)) + +diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c +index 27a32ff15412aa..93ba66de160ce4 100644 +--- a/arch/arm64/mm/init.c ++++ b/arch/arm64/mm/init.c +@@ -116,15 +116,6 @@ static void __init arch_reserve_crashkernel(void) + + static phys_addr_t __init max_zone_phys(phys_addr_t zone_limit) + { +- /** +- * Information we get from firmware (e.g. DT dma-ranges) describe DMA +- * bus constraints. Devices using DMA might have their own limitations. +- * Some of them rely on DMA zone in low 32-bit memory. Keep low RAM +- * DMA zone on platforms that have RAM there. +- */ +- if (memblock_start_of_DRAM() < U32_MAX) +- zone_limit = min(zone_limit, U32_MAX); +- + return min(zone_limit, memblock_end_of_DRAM() - 1) + 1; + } + +@@ -140,6 +131,14 @@ static void __init zone_sizes_init(void) + acpi_zone_dma_limit = acpi_iort_dma_get_max_cpu_address(); + dt_zone_dma_limit = of_dma_get_max_cpu_address(NULL); + zone_dma_limit = min(dt_zone_dma_limit, acpi_zone_dma_limit); ++ /* ++ * Information we get from firmware (e.g. DT dma-ranges) describe DMA ++ * bus constraints. Devices using DMA might have their own limitations. ++ * Some of them rely on DMA zone in low 32-bit memory. Keep low RAM ++ * DMA zone on platforms that have RAM there. ++ */ ++ if (memblock_start_of_DRAM() < U32_MAX) ++ zone_dma_limit = min(zone_dma_limit, U32_MAX); + arm64_dma_phys_limit = max_zone_phys(zone_dma_limit); + max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit); + #endif +diff --git a/arch/loongarch/include/asm/hugetlb.h b/arch/loongarch/include/asm/hugetlb.h +index 5da32c00d483fb..376c0708e2979b 100644 +--- a/arch/loongarch/include/asm/hugetlb.h ++++ b/arch/loongarch/include/asm/hugetlb.h +@@ -29,6 +29,16 @@ static inline int prepare_hugepage_range(struct file *file, + return 0; + } + ++#define __HAVE_ARCH_HUGE_PTE_CLEAR ++static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr, ++ pte_t *ptep, unsigned long sz) ++{ ++ pte_t clear; ++ ++ pte_val(clear) = (unsigned long)invalid_pte_table; ++ set_pte_at(mm, addr, ptep, clear); ++} ++ + #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR + static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, + unsigned long addr, pte_t *ptep) +diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c +index 174734a23d0ac8..9d53eca66fcc70 100644 +--- a/arch/loongarch/kvm/vcpu.c ++++ b/arch/loongarch/kvm/vcpu.c +@@ -240,7 +240,7 @@ static void kvm_late_check_requests(struct kvm_vcpu *vcpu) + */ + static int kvm_enter_guest_check(struct kvm_vcpu *vcpu) + { +- int ret; ++ int idx, ret; + + /* + * Check conditions before entering the guest +@@ -249,7 +249,9 @@ static int kvm_enter_guest_check(struct kvm_vcpu *vcpu) + if (ret < 0) + return ret; + ++ idx = srcu_read_lock(&vcpu->kvm->srcu); + ret = kvm_check_requests(vcpu); ++ srcu_read_unlock(&vcpu->kvm->srcu, idx); + + return ret; + } +diff --git a/arch/loongarch/mm/tlb.c b/arch/loongarch/mm/tlb.c +index 5ac9beb5f0935e..3b427b319db21d 100644 +--- a/arch/loongarch/mm/tlb.c ++++ b/arch/loongarch/mm/tlb.c +@@ -289,7 +289,7 @@ static void setup_tlb_handler(int cpu) + /* Avoid lockdep warning */ + rcutree_report_cpu_starting(cpu); + +-#ifdef CONFIG_NUMA ++#if defined(CONFIG_NUMA) && !defined(CONFIG_PREEMPT_RT) + vec_sz = sizeof(exception_handlers); + + if (pcpu_handlers[cpu]) +diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +index cce9428afc41fc..ee71045883e7e7 100644 +--- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi ++++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +@@ -70,7 +70,6 @@ pci@1a000000 { + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; +- #interrupt-cells = <2>; + msi-parent = <&msi>; + + reg = <0 0x1a000000 0 0x02000000>, +@@ -234,7 +233,7 @@ phy1: ethernet-phy@1 { + }; + }; + +- pci_bridge@9,0 { ++ pcie@9,0 { + compatible = "pci0014,7a19.1", + "pci0014,7a19", + "pciclass060400", +@@ -244,12 +243,16 @@ pci_bridge@9,0 { + interrupts = <32 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@a,0 { ++ pcie@a,0 { + compatible = "pci0014,7a09.1", + "pci0014,7a09", + "pciclass060400", +@@ -259,12 +262,16 @@ pci_bridge@a,0 { + interrupts = <33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@b,0 { ++ pcie@b,0 { + compatible = "pci0014,7a09.1", + "pci0014,7a09", + "pciclass060400", +@@ -274,12 +281,16 @@ pci_bridge@b,0 { + interrupts = <34 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@c,0 { ++ pcie@c,0 { + compatible = "pci0014,7a09.1", + "pci0014,7a09", + "pciclass060400", +@@ -289,12 +300,16 @@ pci_bridge@c,0 { + interrupts = <35 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@d,0 { ++ pcie@d,0 { + compatible = "pci0014,7a19.1", + "pci0014,7a19", + "pciclass060400", +@@ -304,12 +319,16 @@ pci_bridge@d,0 { + interrupts = <36 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@e,0 { ++ pcie@e,0 { + compatible = "pci0014,7a09.1", + "pci0014,7a09", + "pciclass060400", +@@ -319,12 +338,16 @@ pci_bridge@e,0 { + interrupts = <37 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@f,0 { ++ pcie@f,0 { + compatible = "pci0014,7a29.1", + "pci0014,7a29", + "pciclass060400", +@@ -334,12 +357,16 @@ pci_bridge@f,0 { + interrupts = <40 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@10,0 { ++ pcie@10,0 { + compatible = "pci0014,7a19.1", + "pci0014,7a19", + "pciclass060400", +@@ -349,12 +376,16 @@ pci_bridge@10,0 { + interrupts = <41 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@11,0 { ++ pcie@11,0 { + compatible = "pci0014,7a29.1", + "pci0014,7a29", + "pciclass060400", +@@ -364,12 +395,16 @@ pci_bridge@11,0 { + interrupts = <42 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@12,0 { ++ pcie@12,0 { + compatible = "pci0014,7a19.1", + "pci0014,7a19", + "pciclass060400", +@@ -379,12 +414,16 @@ pci_bridge@12,0 { + interrupts = <43 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@13,0 { ++ pcie@13,0 { + compatible = "pci0014,7a29.1", + "pci0014,7a29", + "pciclass060400", +@@ -394,12 +433,16 @@ pci_bridge@13,0 { + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + +- pci_bridge@14,0 { ++ pcie@14,0 { + compatible = "pci0014,7a19.1", + "pci0014,7a19", + "pciclass060400", +@@ -409,9 +452,13 @@ pci_bridge@14,0 { + interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>; ++ ranges; + }; + }; + +diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c +index fbb68fc28ed3a5..935568d68196d0 100644 +--- a/arch/powerpc/kernel/prom_init.c ++++ b/arch/powerpc/kernel/prom_init.c +@@ -2932,7 +2932,7 @@ static void __init fixup_device_tree_chrp(void) + #endif + + #if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC) +-static void __init fixup_device_tree_pmac(void) ++static void __init fixup_device_tree_pmac64(void) + { + phandle u3, i2c, mpic; + u32 u3_rev; +@@ -2972,7 +2972,31 @@ static void __init fixup_device_tree_pmac(void) + &parent, sizeof(parent)); + } + #else +-#define fixup_device_tree_pmac() ++#define fixup_device_tree_pmac64() ++#endif ++ ++#ifdef CONFIG_PPC_PMAC ++static void __init fixup_device_tree_pmac(void) ++{ ++ __be32 val = 1; ++ char type[8]; ++ phandle node; ++ ++ // Some pmacs are missing #size-cells on escc nodes ++ for (node = 0; prom_next_node(&node); ) { ++ type[0] = '\0'; ++ prom_getprop(node, "device_type", type, sizeof(type)); ++ if (prom_strcmp(type, "escc")) ++ continue; ++ ++ if (prom_getproplen(node, "#size-cells") != PROM_ERROR) ++ continue; ++ ++ prom_setprop(node, NULL, "#size-cells", &val, sizeof(val)); ++ } ++} ++#else ++static inline void fixup_device_tree_pmac(void) { } + #endif + + #ifdef CONFIG_PPC_EFIKA +@@ -3197,6 +3221,7 @@ static void __init fixup_device_tree(void) + fixup_device_tree_maple_memory_controller(); + fixup_device_tree_chrp(); + fixup_device_tree_pmac(); ++ fixup_device_tree_pmac64(); + fixup_device_tree_efika(); + fixup_device_tree_pasemi(); + } +diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig +index 2341393cfac1ae..26c01b9e3434c4 100644 +--- a/arch/riscv/configs/defconfig ++++ b/arch/riscv/configs/defconfig +@@ -301,7 +301,6 @@ CONFIG_DEBUG_MEMORY_INIT=y + CONFIG_DEBUG_PER_CPU_MAPS=y + CONFIG_SOFTLOCKUP_DETECTOR=y + CONFIG_WQ_WATCHDOG=y +-CONFIG_DEBUG_TIMEKEEPING=y + CONFIG_DEBUG_RT_MUTEXES=y + CONFIG_DEBUG_SPINLOCK=y + CONFIG_DEBUG_MUTEXES=y +diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h +index 30b20ce9a70033..83789e39d1d5e5 100644 +--- a/arch/s390/include/asm/pci.h ++++ b/arch/s390/include/asm/pci.h +@@ -106,9 +106,10 @@ struct zpci_bus { + struct list_head resources; + struct list_head bus_next; + struct resource bus_resource; +- int pchid; ++ int topo; /* TID if topo_is_tid, PCHID otherwise */ + int domain_nr; +- bool multifunction; ++ u8 multifunction : 1; ++ u8 topo_is_tid : 1; + enum pci_bus_speed max_bus_speed; + }; + +@@ -129,6 +130,8 @@ struct zpci_dev { + u16 vfn; /* virtual function number */ + u16 pchid; /* physical channel ID */ + u16 maxstbl; /* Maximum store block size */ ++ u16 rid; /* RID as supplied by firmware */ ++ u16 tid; /* Topology for which RID is valid */ + u8 pfgid; /* function group ID */ + u8 pft; /* pci function type */ + u8 port; +@@ -139,7 +142,8 @@ struct zpci_dev { + u8 is_physfn : 1; + u8 util_str_avail : 1; + u8 irqs_registered : 1; +- u8 reserved : 2; ++ u8 tid_avail : 1; ++ u8 reserved : 1; + unsigned int devfn; /* DEVFN part of the RID*/ + + u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */ +@@ -210,12 +214,14 @@ extern struct airq_iv *zpci_aif_sbv; + ----------------------------------------------------------------------------- */ + /* Base stuff */ + struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state); ++int zpci_add_device(struct zpci_dev *zdev); + int zpci_enable_device(struct zpci_dev *); + int zpci_disable_device(struct zpci_dev *); + int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh); + int zpci_deconfigure_device(struct zpci_dev *zdev); + void zpci_device_reserved(struct zpci_dev *zdev); + bool zpci_is_device_configured(struct zpci_dev *zdev); ++int zpci_scan_devices(void); + + int zpci_hot_reset_device(struct zpci_dev *zdev); + int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64, u8 *); +@@ -225,7 +231,7 @@ void zpci_update_fh(struct zpci_dev *zdev, u32 fh); + + /* CLP */ + int clp_setup_writeback_mio(void); +-int clp_scan_pci_devices(void); ++int clp_scan_pci_devices(struct list_head *scan_list); + int clp_query_pci_fn(struct zpci_dev *zdev); + int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as); + int clp_disable_fh(struct zpci_dev *zdev, u32 *fh); +diff --git a/arch/s390/include/asm/pci_clp.h b/arch/s390/include/asm/pci_clp.h +index f0c677ddd27060..14afb9ce91f3bc 100644 +--- a/arch/s390/include/asm/pci_clp.h ++++ b/arch/s390/include/asm/pci_clp.h +@@ -110,7 +110,8 @@ struct clp_req_query_pci { + struct clp_rsp_query_pci { + struct clp_rsp_hdr hdr; + u16 vfn; /* virtual fn number */ +- u16 : 3; ++ u16 : 2; ++ u16 tid_avail : 1; + u16 rid_avail : 1; + u16 is_physfn : 1; + u16 reserved1 : 1; +@@ -130,8 +131,9 @@ struct clp_rsp_query_pci { + u64 edma; /* end dma as */ + #define ZPCI_RID_MASK_DEVFN 0x00ff + u16 rid; /* BUS/DEVFN PCI address */ +- u16 reserved0; +- u32 reserved[10]; ++ u32 reserved0; ++ u16 tid; ++ u32 reserved[9]; + u32 uid; /* user defined id */ + u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */ + u32 reserved2[16]; +diff --git a/arch/s390/kernel/perf_cpum_sf.c b/arch/s390/kernel/perf_cpum_sf.c +index 3317f4878eaa70..331e0654d61d78 100644 +--- a/arch/s390/kernel/perf_cpum_sf.c ++++ b/arch/s390/kernel/perf_cpum_sf.c +@@ -1780,7 +1780,9 @@ static void cpumsf_pmu_stop(struct perf_event *event, int flags) + event->hw.state |= PERF_HES_STOPPED; + + if ((flags & PERF_EF_UPDATE) && !(event->hw.state & PERF_HES_UPTODATE)) { +- hw_perf_event_update(event, 1); ++ /* CPU hotplug off removes SDBs. No samples to extract. */ ++ if (cpuhw->flags & PMU_F_RESERVED) ++ hw_perf_event_update(event, 1); + event->hw.state |= PERF_HES_UPTODATE; + } + perf_pmu_enable(event->pmu); +diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c +index 635fd8f2acbaa2..88f72745fa59e1 100644 +--- a/arch/s390/pci/pci.c ++++ b/arch/s390/pci/pci.c +@@ -29,6 +29,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -778,8 +779,9 @@ int zpci_hot_reset_device(struct zpci_dev *zdev) + * @fh: Current Function Handle of the device to be created + * @state: Initial state after creation either Standby or Configured + * +- * Creates a new zpci device and adds it to its, possibly newly created, zbus +- * as well as zpci_list. ++ * Allocates a new struct zpci_dev and queries the platform for its details. ++ * If successful the device can subsequently be added to the zPCI subsystem ++ * using zpci_add_device(). + * + * Returns: the zdev on success or an error pointer otherwise + */ +@@ -788,7 +790,6 @@ struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state) + struct zpci_dev *zdev; + int rc; + +- zpci_dbg(1, "add fid:%x, fh:%x, c:%d\n", fid, fh, state); + zdev = kzalloc(sizeof(*zdev), GFP_KERNEL); + if (!zdev) + return ERR_PTR(-ENOMEM); +@@ -803,11 +804,34 @@ struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state) + goto error; + zdev->state = state; + +- kref_init(&zdev->kref); + mutex_init(&zdev->state_lock); + mutex_init(&zdev->fmb_lock); + mutex_init(&zdev->kzdev_lock); + ++ return zdev; ++ ++error: ++ zpci_dbg(0, "crt fid:%x, rc:%d\n", fid, rc); ++ kfree(zdev); ++ return ERR_PTR(rc); ++} ++ ++/** ++ * zpci_add_device() - Add a previously created zPCI device to the zPCI subsystem ++ * @zdev: The zPCI device to be added ++ * ++ * A struct zpci_dev is added to the zPCI subsystem and to a virtual PCI bus creating ++ * a new one as necessary. A hotplug slot is created and events start to be handled. ++ * If successful from this point on zpci_zdev_get() and zpci_zdev_put() must be used. ++ * If adding the struct zpci_dev fails the device was not added and should be freed. ++ * ++ * Return: 0 on success, or an error code otherwise ++ */ ++int zpci_add_device(struct zpci_dev *zdev) ++{ ++ int rc; ++ ++ zpci_dbg(1, "add fid:%x, fh:%x, c:%d\n", zdev->fid, zdev->fh, zdev->state); + rc = zpci_init_iommu(zdev); + if (rc) + goto error; +@@ -816,18 +840,17 @@ struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state) + if (rc) + goto error_destroy_iommu; + ++ kref_init(&zdev->kref); + spin_lock(&zpci_list_lock); + list_add_tail(&zdev->entry, &zpci_list); + spin_unlock(&zpci_list_lock); +- +- return zdev; ++ return 0; + + error_destroy_iommu: + zpci_destroy_iommu(zdev); + error: +- zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc); +- kfree(zdev); +- return ERR_PTR(rc); ++ zpci_dbg(0, "add fid:%x, rc:%d\n", zdev->fid, rc); ++ return rc; + } + + bool zpci_is_device_configured(struct zpci_dev *zdev) +@@ -1069,6 +1092,50 @@ bool zpci_is_enabled(void) + return s390_pci_initialized; + } + ++static int zpci_cmp_rid(void *priv, const struct list_head *a, ++ const struct list_head *b) ++{ ++ struct zpci_dev *za = container_of(a, struct zpci_dev, entry); ++ struct zpci_dev *zb = container_of(b, struct zpci_dev, entry); ++ ++ /* ++ * PCI functions without RID available maintain original order ++ * between themselves but sort before those with RID. ++ */ ++ if (za->rid == zb->rid) ++ return za->rid_available > zb->rid_available; ++ /* ++ * PCI functions with RID sort by RID ascending. ++ */ ++ return za->rid > zb->rid; ++} ++ ++static void zpci_add_devices(struct list_head *scan_list) ++{ ++ struct zpci_dev *zdev, *tmp; ++ ++ list_sort(NULL, scan_list, &zpci_cmp_rid); ++ list_for_each_entry_safe(zdev, tmp, scan_list, entry) { ++ list_del_init(&zdev->entry); ++ if (zpci_add_device(zdev)) ++ kfree(zdev); ++ } ++} ++ ++int zpci_scan_devices(void) ++{ ++ LIST_HEAD(scan_list); ++ int rc; ++ ++ rc = clp_scan_pci_devices(&scan_list); ++ if (rc) ++ return rc; ++ ++ zpci_add_devices(&scan_list); ++ zpci_bus_scan_busses(); ++ return 0; ++} ++ + static int __init pci_base_init(void) + { + int rc; +@@ -1098,10 +1165,9 @@ static int __init pci_base_init(void) + if (rc) + goto out_irq; + +- rc = clp_scan_pci_devices(); ++ rc = zpci_scan_devices(); + if (rc) + goto out_find; +- zpci_bus_scan_busses(); + + s390_pci_initialized = 1; + return 0; +diff --git a/arch/s390/pci/pci_bus.c b/arch/s390/pci/pci_bus.c +index daa5d7450c7d38..1b74a000ff6459 100644 +--- a/arch/s390/pci/pci_bus.c ++++ b/arch/s390/pci/pci_bus.c +@@ -168,9 +168,16 @@ void zpci_bus_scan_busses(void) + mutex_unlock(&zbus_list_lock); + } + ++static bool zpci_bus_is_multifunction_root(struct zpci_dev *zdev) ++{ ++ return !s390_pci_no_rid && zdev->rid_available && ++ zpci_is_device_configured(zdev) && ++ !zdev->vfn; ++} ++ + /* zpci_bus_create_pci_bus - Create the PCI bus associated with this zbus + * @zbus: the zbus holding the zdevices +- * @fr: PCI root function that will determine the bus's domain, and bus speeed ++ * @fr: PCI root function that will determine the bus's domain, and bus speed + * @ops: the pci operations + * + * The PCI function @fr determines the domain (its UID), multifunction property +@@ -188,7 +195,7 @@ static int zpci_bus_create_pci_bus(struct zpci_bus *zbus, struct zpci_dev *fr, s + return domain; + + zbus->domain_nr = domain; +- zbus->multifunction = fr->rid_available; ++ zbus->multifunction = zpci_bus_is_multifunction_root(fr); + zbus->max_bus_speed = fr->max_bus_speed; + + /* +@@ -232,13 +239,15 @@ static void zpci_bus_put(struct zpci_bus *zbus) + kref_put(&zbus->kref, zpci_bus_release); + } + +-static struct zpci_bus *zpci_bus_get(int pchid) ++static struct zpci_bus *zpci_bus_get(int topo, bool topo_is_tid) + { + struct zpci_bus *zbus; + + mutex_lock(&zbus_list_lock); + list_for_each_entry(zbus, &zbus_list, bus_next) { +- if (pchid == zbus->pchid) { ++ if (!zbus->multifunction) ++ continue; ++ if (topo_is_tid == zbus->topo_is_tid && topo == zbus->topo) { + kref_get(&zbus->kref); + goto out_unlock; + } +@@ -249,7 +258,7 @@ static struct zpci_bus *zpci_bus_get(int pchid) + return zbus; + } + +-static struct zpci_bus *zpci_bus_alloc(int pchid) ++static struct zpci_bus *zpci_bus_alloc(int topo, bool topo_is_tid) + { + struct zpci_bus *zbus; + +@@ -257,7 +266,8 @@ static struct zpci_bus *zpci_bus_alloc(int pchid) + if (!zbus) + return NULL; + +- zbus->pchid = pchid; ++ zbus->topo = topo; ++ zbus->topo_is_tid = topo_is_tid; + INIT_LIST_HEAD(&zbus->bus_next); + mutex_lock(&zbus_list_lock); + list_add_tail(&zbus->bus_next, &zbus_list); +@@ -292,19 +302,22 @@ static int zpci_bus_add_device(struct zpci_bus *zbus, struct zpci_dev *zdev) + { + int rc = -EINVAL; + ++ if (zbus->multifunction) { ++ if (!zdev->rid_available) { ++ WARN_ONCE(1, "rid_available not set for multifunction\n"); ++ return rc; ++ } ++ zdev->devfn = zdev->rid & ZPCI_RID_MASK_DEVFN; ++ } ++ + if (zbus->function[zdev->devfn]) { + pr_err("devfn %04x is already assigned\n", zdev->devfn); + return rc; + } +- + zdev->zbus = zbus; + zbus->function[zdev->devfn] = zdev; + zpci_nb_devices++; + +- if (zbus->multifunction && !zdev->rid_available) { +- WARN_ONCE(1, "rid_available not set for multifunction\n"); +- goto error; +- } + rc = zpci_init_slot(zdev); + if (rc) + goto error; +@@ -321,8 +334,9 @@ static int zpci_bus_add_device(struct zpci_bus *zbus, struct zpci_dev *zdev) + + int zpci_bus_device_register(struct zpci_dev *zdev, struct pci_ops *ops) + { ++ bool topo_is_tid = zdev->tid_avail; + struct zpci_bus *zbus = NULL; +- int rc = -EBADF; ++ int topo, rc = -EBADF; + + if (zpci_nb_devices == ZPCI_NR_DEVICES) { + pr_warn("Adding PCI function %08x failed because the configured limit of %d is reached\n", +@@ -330,14 +344,10 @@ int zpci_bus_device_register(struct zpci_dev *zdev, struct pci_ops *ops) + return -ENOSPC; + } + +- if (zdev->devfn >= ZPCI_FUNCTIONS_PER_BUS) +- return -EINVAL; +- +- if (!s390_pci_no_rid && zdev->rid_available) +- zbus = zpci_bus_get(zdev->pchid); +- ++ topo = topo_is_tid ? zdev->tid : zdev->pchid; ++ zbus = zpci_bus_get(topo, topo_is_tid); + if (!zbus) { +- zbus = zpci_bus_alloc(zdev->pchid); ++ zbus = zpci_bus_alloc(topo, topo_is_tid); + if (!zbus) + return -ENOMEM; + } +diff --git a/arch/s390/pci/pci_clp.c b/arch/s390/pci/pci_clp.c +index 6f55a59a087115..74dac6da03d5bb 100644 +--- a/arch/s390/pci/pci_clp.c ++++ b/arch/s390/pci/pci_clp.c +@@ -164,10 +164,13 @@ static int clp_store_query_pci_fn(struct zpci_dev *zdev, + zdev->port = response->port; + zdev->uid = response->uid; + zdev->fmb_length = sizeof(u32) * response->fmb_len; +- zdev->rid_available = response->rid_avail; + zdev->is_physfn = response->is_physfn; +- if (!s390_pci_no_rid && zdev->rid_available) +- zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN; ++ zdev->rid_available = response->rid_avail; ++ if (zdev->rid_available) ++ zdev->rid = response->rid; ++ zdev->tid_avail = response->tid_avail; ++ if (zdev->tid_avail) ++ zdev->tid = response->tid; + + memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip)); + if (response->util_str_avail) { +@@ -407,6 +410,7 @@ static int clp_find_pci(struct clp_req_rsp_list_pci *rrb, u32 fid, + + static void __clp_add(struct clp_fh_list_entry *entry, void *data) + { ++ struct list_head *scan_list = data; + struct zpci_dev *zdev; + + if (!entry->vendor_id) +@@ -417,10 +421,11 @@ static void __clp_add(struct clp_fh_list_entry *entry, void *data) + zpci_zdev_put(zdev); + return; + } +- zpci_create_device(entry->fid, entry->fh, entry->config_state); ++ zdev = zpci_create_device(entry->fid, entry->fh, entry->config_state); ++ list_add_tail(&zdev->entry, scan_list); + } + +-int clp_scan_pci_devices(void) ++int clp_scan_pci_devices(struct list_head *scan_list) + { + struct clp_req_rsp_list_pci *rrb; + int rc; +@@ -429,7 +434,7 @@ int clp_scan_pci_devices(void) + if (!rrb) + return -ENOMEM; + +- rc = clp_list_pci(rrb, NULL, __clp_add); ++ rc = clp_list_pci(rrb, scan_list, __clp_add); + + clp_free_block(rrb); + return rc; +diff --git a/arch/s390/pci/pci_event.c b/arch/s390/pci/pci_event.c +index d4f19d33914cbc..7f7b732b3f3efa 100644 +--- a/arch/s390/pci/pci_event.c ++++ b/arch/s390/pci/pci_event.c +@@ -340,6 +340,10 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf) + zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_CONFIGURED); + if (IS_ERR(zdev)) + break; ++ if (zpci_add_device(zdev)) { ++ kfree(zdev); ++ break; ++ } + } else { + /* the configuration request may be stale */ + if (zdev->state != ZPCI_FN_STATE_STANDBY) +@@ -349,10 +353,17 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf) + zpci_scan_configured_device(zdev, ccdf->fh); + break; + case 0x0302: /* Reserved -> Standby */ +- if (!zdev) +- zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_STANDBY); +- else ++ if (!zdev) { ++ zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_STANDBY); ++ if (IS_ERR(zdev)) ++ break; ++ if (zpci_add_device(zdev)) { ++ kfree(zdev); ++ break; ++ } ++ } else { + zpci_update_fh(zdev, ccdf->fh); ++ } + break; + case 0x0303: /* Deconfiguration requested */ + if (zdev) { +@@ -381,7 +392,7 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf) + break; + case 0x0306: /* 0x308 or 0x302 for multiple devices */ + zpci_remove_reserved_devices(); +- clp_scan_pci_devices(); ++ zpci_scan_devices(); + break; + case 0x0308: /* Standby -> Reserved */ + if (!zdev) +diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig +index 7b9a7e8f39acc8..171be04eca1f5d 100644 +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -145,7 +145,6 @@ config X86 + select ARCH_HAS_PARANOID_L1D_FLUSH + select BUILDTIME_TABLE_SORT + select CLKEVT_I8253 +- select CLOCKSOURCE_VALIDATE_LAST_CYCLE + select CLOCKSOURCE_WATCHDOG + # Word-size accesses may read uninitialized data past the trailing \0 + # in strings and cause false KMSAN reports. +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index 920e3a640caddd..b4a1a2576510e0 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -943,11 +943,12 @@ static int amd_pmu_v2_snapshot_branch_stack(struct perf_branch_entry *entries, u + static int amd_pmu_v2_handle_irq(struct pt_regs *regs) + { + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ static atomic64_t status_warned = ATOMIC64_INIT(0); ++ u64 reserved, status, mask, new_bits, prev_bits; + struct perf_sample_data data; + struct hw_perf_event *hwc; + struct perf_event *event; + int handled = 0, idx; +- u64 reserved, status, mask; + bool pmu_enabled; + + /* +@@ -1012,7 +1013,12 @@ static int amd_pmu_v2_handle_irq(struct pt_regs *regs) + * the corresponding PMCs are expected to be inactive according to the + * active_mask + */ +- WARN_ON(status > 0); ++ if (status > 0) { ++ prev_bits = atomic64_fetch_or(status, &status_warned); ++ // A new bit was set for the very first time. ++ new_bits = status & ~prev_bits; ++ WARN(new_bits, "New overflows for inactive PMCs: %llx\n", new_bits); ++ } + + /* Clear overflow and freeze bits */ + amd_pmu_ack_global_status(~status); +diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h +index 6f82e75b61494e..4b804531b03c3c 100644 +--- a/arch/x86/include/asm/pgtable_types.h ++++ b/arch/x86/include/asm/pgtable_types.h +@@ -36,10 +36,12 @@ + #define _PAGE_BIT_DEVMAP _PAGE_BIT_SOFTW4 + + #ifdef CONFIG_X86_64 +-#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW5 /* Saved Dirty bit */ ++#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW5 /* Saved Dirty bit (leaf) */ ++#define _PAGE_BIT_NOPTISHADOW _PAGE_BIT_SOFTW5 /* No PTI shadow (root PGD) */ + #else + /* Shared with _PAGE_BIT_UFFD_WP which is not supported on 32 bit */ +-#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW2 /* Saved Dirty bit */ ++#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW2 /* Saved Dirty bit (leaf) */ ++#define _PAGE_BIT_NOPTISHADOW _PAGE_BIT_SOFTW2 /* No PTI shadow (root PGD) */ + #endif + + /* If _PAGE_BIT_PRESENT is clear, we use these: */ +@@ -139,6 +141,8 @@ + + #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE) + ++#define _PAGE_NOPTISHADOW (_AT(pteval_t, 1) << _PAGE_BIT_NOPTISHADOW) ++ + /* + * Set of bits not changed in pte_modify. The pte's + * protection key is treated like _PAGE_RW, for +diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c +index d8408aafeed988..79d2e17f6582e9 100644 +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -1065,7 +1065,7 @@ static void init_amd(struct cpuinfo_x86 *c) + */ + if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) && + cpu_has(c, X86_FEATURE_AUTOIBRS)) +- WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS)); ++ WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS) < 0); + + /* AMD CPUs don't need fencing after x2APIC/TSC_DEADLINE MSR writes. */ + clear_cpu_cap(c, X86_FEATURE_APIC_MSRS_FENCE); +diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c +index 392d09c936d60c..e6fa03ed9172c0 100644 +--- a/arch/x86/kernel/cpu/cacheinfo.c ++++ b/arch/x86/kernel/cpu/cacheinfo.c +@@ -178,8 +178,6 @@ struct _cpuid4_info_regs { + struct amd_northbridge *nb; + }; + +-static unsigned short num_cache_leaves; +- + /* AMD doesn't have CPUID4. Emulate it here to report the same + information to the user. This makes some assumptions about the machine: + L2 not shared, no SMT etc. that is currently true on AMD CPUs. +@@ -717,20 +715,23 @@ void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c) + + void init_amd_cacheinfo(struct cpuinfo_x86 *c) + { ++ struct cpu_cacheinfo *ci = get_cpu_cacheinfo(c->cpu_index); + + if (boot_cpu_has(X86_FEATURE_TOPOEXT)) { +- num_cache_leaves = find_num_cache_leaves(c); ++ ci->num_leaves = find_num_cache_leaves(c); + } else if (c->extended_cpuid_level >= 0x80000006) { + if (cpuid_edx(0x80000006) & 0xf000) +- num_cache_leaves = 4; ++ ci->num_leaves = 4; + else +- num_cache_leaves = 3; ++ ci->num_leaves = 3; + } + } + + void init_hygon_cacheinfo(struct cpuinfo_x86 *c) + { +- num_cache_leaves = find_num_cache_leaves(c); ++ struct cpu_cacheinfo *ci = get_cpu_cacheinfo(c->cpu_index); ++ ++ ci->num_leaves = find_num_cache_leaves(c); + } + + void init_intel_cacheinfo(struct cpuinfo_x86 *c) +@@ -740,21 +741,21 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c) + unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */ + unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */ + unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb; ++ struct cpu_cacheinfo *ci = get_cpu_cacheinfo(c->cpu_index); + + if (c->cpuid_level > 3) { +- static int is_initialized; +- +- if (is_initialized == 0) { +- /* Init num_cache_leaves from boot CPU */ +- num_cache_leaves = find_num_cache_leaves(c); +- is_initialized++; +- } ++ /* ++ * There should be at least one leaf. A non-zero value means ++ * that the number of leaves has been initialized. ++ */ ++ if (!ci->num_leaves) ++ ci->num_leaves = find_num_cache_leaves(c); + + /* + * Whenever possible use cpuid(4), deterministic cache + * parameters cpuid leaf to find the cache details + */ +- for (i = 0; i < num_cache_leaves; i++) { ++ for (i = 0; i < ci->num_leaves; i++) { + struct _cpuid4_info_regs this_leaf = {}; + int retval; + +@@ -790,14 +791,14 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c) + * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for + * trace cache + */ +- if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) { ++ if ((!ci->num_leaves || c->x86 == 15) && c->cpuid_level > 1) { + /* supports eax=2 call */ + int j, n; + unsigned int regs[4]; + unsigned char *dp = (unsigned char *)regs; + int only_trace = 0; + +- if (num_cache_leaves != 0 && c->x86 == 15) ++ if (ci->num_leaves && c->x86 == 15) + only_trace = 1; + + /* Number of times to iterate */ +@@ -991,14 +992,12 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, + + int init_cache_level(unsigned int cpu) + { +- struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); ++ struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu); + +- if (!num_cache_leaves) ++ /* There should be at least one leaf. */ ++ if (!ci->num_leaves) + return -ENOENT; +- if (!this_cpu_ci) +- return -EINVAL; +- this_cpu_ci->num_levels = 3; +- this_cpu_ci->num_leaves = num_cache_leaves; ++ + return 0; + } + +diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c +index e7656cbef68d54..4b5f3d0521517a 100644 +--- a/arch/x86/kernel/cpu/intel.c ++++ b/arch/x86/kernel/cpu/intel.c +@@ -586,7 +586,9 @@ static void init_intel(struct cpuinfo_x86 *c) + c->x86_vfm == INTEL_WESTMERE_EX)) + set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR); + +- if (boot_cpu_has(X86_FEATURE_MWAIT) && c->x86_vfm == INTEL_ATOM_GOLDMONT) ++ if (boot_cpu_has(X86_FEATURE_MWAIT) && ++ (c->x86_vfm == INTEL_ATOM_GOLDMONT || ++ c->x86_vfm == INTEL_LUNARLAKE_M)) + set_cpu_bug(c, X86_BUG_MONITOR); + + #ifdef CONFIG_X86_64 +diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c +index 621a151ccf7d0a..b2e313ea17bf6f 100644 +--- a/arch/x86/kernel/cpu/topology.c ++++ b/arch/x86/kernel/cpu/topology.c +@@ -428,8 +428,8 @@ void __init topology_apply_cmdline_limits_early(void) + { + unsigned int possible = nr_cpu_ids; + +- /* 'maxcpus=0' 'nosmp' 'nolapic' 'disableapic' 'noapic' */ +- if (!setup_max_cpus || ioapic_is_disabled || apic_is_disabled) ++ /* 'maxcpus=0' 'nosmp' 'nolapic' 'disableapic' */ ++ if (!setup_max_cpus || apic_is_disabled) + possible = 1; + + /* 'possible_cpus=N' */ +@@ -443,7 +443,7 @@ void __init topology_apply_cmdline_limits_early(void) + + static __init bool restrict_to_up(void) + { +- if (!smp_found_config || ioapic_is_disabled) ++ if (!smp_found_config) + return true; + /* + * XEN PV is special as it does not advertise the local APIC +diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c +index 1065ab995305cd..8f62e0666dea51 100644 +--- a/arch/x86/kernel/fpu/signal.c ++++ b/arch/x86/kernel/fpu/signal.c +@@ -63,16 +63,6 @@ static inline bool check_xstate_in_sigframe(struct fxregs_state __user *fxbuf, + return true; + } + +-/* +- * Update the value of PKRU register that was already pushed onto the signal frame. +- */ +-static inline int update_pkru_in_sigframe(struct xregs_state __user *buf, u32 pkru) +-{ +- if (unlikely(!cpu_feature_enabled(X86_FEATURE_OSPKE))) +- return 0; +- return __put_user(pkru, (unsigned int __user *)get_xsave_addr_user(buf, XFEATURE_PKRU)); +-} +- + /* + * Signal frame handlers. + */ +@@ -168,14 +158,8 @@ static inline bool save_xstate_epilog(void __user *buf, int ia32_frame, + + static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf, u32 pkru) + { +- int err = 0; +- +- if (use_xsave()) { +- err = xsave_to_user_sigframe(buf); +- if (!err) +- err = update_pkru_in_sigframe(buf, pkru); +- return err; +- } ++ if (use_xsave()) ++ return xsave_to_user_sigframe(buf, pkru); + + if (use_fxsr()) + return fxsave_to_user_sigframe((struct fxregs_state __user *) buf); +diff --git a/arch/x86/kernel/fpu/xstate.h b/arch/x86/kernel/fpu/xstate.h +index 0b86a5002c846d..aa16f1a1bbcf17 100644 +--- a/arch/x86/kernel/fpu/xstate.h ++++ b/arch/x86/kernel/fpu/xstate.h +@@ -69,6 +69,28 @@ static inline u64 xfeatures_mask_independent(void) + return fpu_kernel_cfg.independent_features; + } + ++/* ++ * Update the value of PKRU register that was already pushed onto the signal frame. ++ */ ++static inline int update_pkru_in_sigframe(struct xregs_state __user *buf, u64 mask, u32 pkru) ++{ ++ u64 xstate_bv; ++ int err; ++ ++ if (unlikely(!cpu_feature_enabled(X86_FEATURE_OSPKE))) ++ return 0; ++ ++ /* Mark PKRU as in-use so that it is restored correctly. */ ++ xstate_bv = (mask & xfeatures_in_use()) | XFEATURE_MASK_PKRU; ++ ++ err = __put_user(xstate_bv, &buf->header.xfeatures); ++ if (err) ++ return err; ++ ++ /* Update PKRU value in the userspace xsave buffer. */ ++ return __put_user(pkru, (unsigned int __user *)get_xsave_addr_user(buf, XFEATURE_PKRU)); ++} ++ + /* XSAVE/XRSTOR wrapper functions */ + + #ifdef CONFIG_X86_64 +@@ -256,7 +278,7 @@ static inline u64 xfeatures_need_sigframe_write(void) + * The caller has to zero buf::header before calling this because XSAVE* + * does not touch the reserved fields in the header. + */ +-static inline int xsave_to_user_sigframe(struct xregs_state __user *buf) ++static inline int xsave_to_user_sigframe(struct xregs_state __user *buf, u32 pkru) + { + /* + * Include the features which are not xsaved/rstored by the kernel +@@ -281,6 +303,9 @@ static inline int xsave_to_user_sigframe(struct xregs_state __user *buf) + XSTATE_OP(XSAVE, buf, lmask, hmask, err); + clac(); + ++ if (!err) ++ err = update_pkru_in_sigframe(buf, mask, pkru); ++ + return err; + } + +diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S +index e9e88c342f752e..540443d699e3c2 100644 +--- a/arch/x86/kernel/relocate_kernel_64.S ++++ b/arch/x86/kernel/relocate_kernel_64.S +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + + /* + * Must be relocatable PIC code callable as a C function, in particular +@@ -242,6 +243,13 @@ SYM_CODE_START_LOCAL_NOALIGN(virtual_mapped) + movq CR0(%r8), %r8 + movq %rax, %cr3 + movq %r8, %cr0 ++ ++#ifdef CONFIG_KEXEC_JUMP ++ /* Saved in save_processor_state. */ ++ movq $saved_context, %rax ++ lgdt saved_context_gdt_desc(%rax) ++#endif ++ + movq %rbp, %rax + + popf +diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c +index 3e353ed1f76736..1b4438e24814b4 100644 +--- a/arch/x86/kvm/mmu/mmu.c ++++ b/arch/x86/kvm/mmu/mmu.c +@@ -4580,6 +4580,7 @@ static bool is_page_fault_stale(struct kvm_vcpu *vcpu, + + static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) + { ++ kvm_pfn_t orig_pfn; + int r; + + /* Dummy roots are used only for shadowing bad guest roots. */ +@@ -4601,6 +4602,8 @@ static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault + if (r != RET_PF_CONTINUE) + return r; + ++ orig_pfn = fault->pfn; ++ + r = RET_PF_RETRY; + write_lock(&vcpu->kvm->mmu_lock); + +@@ -4615,7 +4618,7 @@ static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault + + out_unlock: + write_unlock(&vcpu->kvm->mmu_lock); +- kvm_release_pfn_clean(fault->pfn); ++ kvm_release_pfn_clean(orig_pfn); + return r; + } + +@@ -4675,6 +4678,7 @@ EXPORT_SYMBOL_GPL(kvm_handle_page_fault); + static int kvm_tdp_mmu_page_fault(struct kvm_vcpu *vcpu, + struct kvm_page_fault *fault) + { ++ kvm_pfn_t orig_pfn; + int r; + + if (page_fault_handle_page_track(vcpu, fault)) +@@ -4692,6 +4696,8 @@ static int kvm_tdp_mmu_page_fault(struct kvm_vcpu *vcpu, + if (r != RET_PF_CONTINUE) + return r; + ++ orig_pfn = fault->pfn; ++ + r = RET_PF_RETRY; + read_lock(&vcpu->kvm->mmu_lock); + +@@ -4702,7 +4708,7 @@ static int kvm_tdp_mmu_page_fault(struct kvm_vcpu *vcpu, + + out_unlock: + read_unlock(&vcpu->kvm->mmu_lock); +- kvm_release_pfn_clean(fault->pfn); ++ kvm_release_pfn_clean(orig_pfn); + return r; + } + #endif +diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h +index ae7d39ff2d07f0..b08017683920f0 100644 +--- a/arch/x86/kvm/mmu/paging_tmpl.h ++++ b/arch/x86/kvm/mmu/paging_tmpl.h +@@ -778,6 +778,7 @@ static int FNAME(fetch)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, + static int FNAME(page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) + { + struct guest_walker walker; ++ kvm_pfn_t orig_pfn; + int r; + + WARN_ON_ONCE(fault->is_tdp); +@@ -836,6 +837,8 @@ static int FNAME(page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault + walker.pte_access &= ~ACC_EXEC_MASK; + } + ++ orig_pfn = fault->pfn; ++ + r = RET_PF_RETRY; + write_lock(&vcpu->kvm->mmu_lock); + +@@ -849,7 +852,7 @@ static int FNAME(page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault + + out_unlock: + write_unlock(&vcpu->kvm->mmu_lock); +- kvm_release_pfn_clean(fault->pfn); ++ kvm_release_pfn_clean(orig_pfn); + return r; + } + +diff --git a/arch/x86/mm/ident_map.c b/arch/x86/mm/ident_map.c +index 437e96fb497734..5ab7bd2f1983c1 100644 +--- a/arch/x86/mm/ident_map.c ++++ b/arch/x86/mm/ident_map.c +@@ -174,7 +174,7 @@ static int ident_p4d_init(struct x86_mapping_info *info, p4d_t *p4d_page, + if (result) + return result; + +- set_p4d(p4d, __p4d(__pa(pud) | info->kernpg_flag)); ++ set_p4d(p4d, __p4d(__pa(pud) | info->kernpg_flag | _PAGE_NOPTISHADOW)); + } + + return 0; +@@ -218,14 +218,14 @@ int kernel_ident_mapping_init(struct x86_mapping_info *info, pgd_t *pgd_page, + if (result) + return result; + if (pgtable_l5_enabled()) { +- set_pgd(pgd, __pgd(__pa(p4d) | info->kernpg_flag)); ++ set_pgd(pgd, __pgd(__pa(p4d) | info->kernpg_flag | _PAGE_NOPTISHADOW)); + } else { + /* + * With p4d folded, pgd is equal to p4d. + * The pgd entry has to point to the pud page table in this case. + */ + pud_t *pud = pud_offset(p4d, 0); +- set_pgd(pgd, __pgd(__pa(pud) | info->kernpg_flag)); ++ set_pgd(pgd, __pgd(__pa(pud) | info->kernpg_flag | _PAGE_NOPTISHADOW)); + } + } + +diff --git a/arch/x86/mm/pti.c b/arch/x86/mm/pti.c +index 851ec8f1363a8b..5f0d579932c688 100644 +--- a/arch/x86/mm/pti.c ++++ b/arch/x86/mm/pti.c +@@ -132,7 +132,7 @@ pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) + * Top-level entries added to init_mm's usermode pgd after boot + * will not be automatically propagated to other mms. + */ +- if (!pgdp_maps_userspace(pgdp)) ++ if (!pgdp_maps_userspace(pgdp) || (pgd.pgd & _PAGE_NOPTISHADOW)) + return pgd; + + /* +diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c +index 55c4b07ec1f631..0c316bae1726ee 100644 +--- a/arch/x86/pci/acpi.c ++++ b/arch/x86/pci/acpi.c +@@ -250,6 +250,125 @@ void __init pci_acpi_crs_quirks(void) + pr_info("Please notify linux-pci@vger.kernel.org so future kernels can do this automatically\n"); + } + ++/* ++ * Check if pdev is part of a PCIe switch that is directly below the ++ * specified bridge. ++ */ ++static bool pcie_switch_directly_under(struct pci_dev *bridge, ++ struct pci_dev *pdev) ++{ ++ struct pci_dev *parent = pci_upstream_bridge(pdev); ++ ++ /* If the device doesn't have a parent, it's not under anything */ ++ if (!parent) ++ return false; ++ ++ /* ++ * If the device has a PCIe type, check if it is below the ++ * corresponding PCIe switch components (if applicable). Then check ++ * if its upstream port is directly beneath the specified bridge. ++ */ ++ switch (pci_pcie_type(pdev)) { ++ case PCI_EXP_TYPE_UPSTREAM: ++ return parent == bridge; ++ ++ case PCI_EXP_TYPE_DOWNSTREAM: ++ if (pci_pcie_type(parent) != PCI_EXP_TYPE_UPSTREAM) ++ return false; ++ parent = pci_upstream_bridge(parent); ++ return parent == bridge; ++ ++ case PCI_EXP_TYPE_ENDPOINT: ++ if (pci_pcie_type(parent) != PCI_EXP_TYPE_DOWNSTREAM) ++ return false; ++ parent = pci_upstream_bridge(parent); ++ if (!parent || pci_pcie_type(parent) != PCI_EXP_TYPE_UPSTREAM) ++ return false; ++ parent = pci_upstream_bridge(parent); ++ return parent == bridge; ++ } ++ ++ return false; ++} ++ ++static bool pcie_has_usb4_host_interface(struct pci_dev *pdev) ++{ ++ struct fwnode_handle *fwnode; ++ ++ /* ++ * For USB4, the tunneled PCIe Root or Downstream Ports are marked ++ * with the "usb4-host-interface" ACPI property, so we look for ++ * that first. This should cover most cases. ++ */ ++ fwnode = fwnode_find_reference(dev_fwnode(&pdev->dev), ++ "usb4-host-interface", 0); ++ if (!IS_ERR(fwnode)) { ++ fwnode_handle_put(fwnode); ++ return true; ++ } ++ ++ /* ++ * Any integrated Thunderbolt 3/4 PCIe Root Ports from Intel ++ * before Alder Lake do not have the "usb4-host-interface" ++ * property so we use their PCI IDs instead. All these are ++ * tunneled. This list is not expected to grow. ++ */ ++ if (pdev->vendor == PCI_VENDOR_ID_INTEL) { ++ switch (pdev->device) { ++ /* Ice Lake Thunderbolt 3 PCIe Root Ports */ ++ case 0x8a1d: ++ case 0x8a1f: ++ case 0x8a21: ++ case 0x8a23: ++ /* Tiger Lake-LP Thunderbolt 4 PCIe Root Ports */ ++ case 0x9a23: ++ case 0x9a25: ++ case 0x9a27: ++ case 0x9a29: ++ /* Tiger Lake-H Thunderbolt 4 PCIe Root Ports */ ++ case 0x9a2b: ++ case 0x9a2d: ++ case 0x9a2f: ++ case 0x9a31: ++ return true; ++ } ++ } ++ ++ return false; ++} ++ ++bool arch_pci_dev_is_removable(struct pci_dev *pdev) ++{ ++ struct pci_dev *parent, *root; ++ ++ /* pdev without a parent or Root Port is never tunneled */ ++ parent = pci_upstream_bridge(pdev); ++ if (!parent) ++ return false; ++ root = pcie_find_root_port(pdev); ++ if (!root) ++ return false; ++ ++ /* Internal PCIe devices are not tunneled */ ++ if (!root->external_facing) ++ return false; ++ ++ /* Anything directly behind a "usb4-host-interface" is tunneled */ ++ if (pcie_has_usb4_host_interface(parent)) ++ return true; ++ ++ /* ++ * Check if this is a discrete Thunderbolt/USB4 controller that is ++ * directly behind the non-USB4 PCIe Root Port marked as ++ * "ExternalFacingPort". Those are not behind a PCIe tunnel. ++ */ ++ if (pcie_switch_directly_under(root, pdev)) ++ return false; ++ ++ /* PCIe devices after the discrete chip are tunneled */ ++ return true; ++} ++ + #ifdef CONFIG_PCI_MMCONFIG + static int check_segment(u16 seg, struct device *dev, char *estr) + { +diff --git a/block/blk-zoned.c b/block/blk-zoned.c +index 95e517723db3e4..0b1184176ce77a 100644 +--- a/block/blk-zoned.c ++++ b/block/blk-zoned.c +@@ -350,9 +350,15 @@ int blkdev_zone_mgmt_ioctl(struct block_device *bdev, blk_mode_t mode, + + static inline bool disk_zone_is_conv(struct gendisk *disk, sector_t sector) + { +- if (!disk->conv_zones_bitmap) +- return false; +- return test_bit(disk_zone_no(disk, sector), disk->conv_zones_bitmap); ++ unsigned long *bitmap; ++ bool is_conv; ++ ++ rcu_read_lock(); ++ bitmap = rcu_dereference(disk->conv_zones_bitmap); ++ is_conv = bitmap && test_bit(disk_zone_no(disk, sector), bitmap); ++ rcu_read_unlock(); ++ ++ return is_conv; + } + + static bool disk_zone_is_last(struct gendisk *disk, struct blk_zone *zone) +@@ -1455,6 +1461,24 @@ static void disk_destroy_zone_wplugs_hash_table(struct gendisk *disk) + disk->zone_wplugs_hash_bits = 0; + } + ++static unsigned int disk_set_conv_zones_bitmap(struct gendisk *disk, ++ unsigned long *bitmap) ++{ ++ unsigned int nr_conv_zones = 0; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&disk->zone_wplugs_lock, flags); ++ if (bitmap) ++ nr_conv_zones = bitmap_weight(bitmap, disk->nr_zones); ++ bitmap = rcu_replace_pointer(disk->conv_zones_bitmap, bitmap, ++ lockdep_is_held(&disk->zone_wplugs_lock)); ++ spin_unlock_irqrestore(&disk->zone_wplugs_lock, flags); ++ ++ kfree_rcu_mightsleep(bitmap); ++ ++ return nr_conv_zones; ++} ++ + void disk_free_zone_resources(struct gendisk *disk) + { + if (!disk->zone_wplugs_pool) +@@ -1478,8 +1502,7 @@ void disk_free_zone_resources(struct gendisk *disk) + mempool_destroy(disk->zone_wplugs_pool); + disk->zone_wplugs_pool = NULL; + +- bitmap_free(disk->conv_zones_bitmap); +- disk->conv_zones_bitmap = NULL; ++ disk_set_conv_zones_bitmap(disk, NULL); + disk->zone_capacity = 0; + disk->last_zone_capacity = 0; + disk->nr_zones = 0; +@@ -1538,7 +1561,7 @@ static int disk_update_zone_resources(struct gendisk *disk, + struct blk_revalidate_zone_args *args) + { + struct request_queue *q = disk->queue; +- unsigned int nr_seq_zones, nr_conv_zones = 0; ++ unsigned int nr_seq_zones, nr_conv_zones; + unsigned int pool_size; + struct queue_limits lim; + int ret; +@@ -1546,10 +1569,8 @@ static int disk_update_zone_resources(struct gendisk *disk, + disk->nr_zones = args->nr_zones; + disk->zone_capacity = args->zone_capacity; + disk->last_zone_capacity = args->last_zone_capacity; +- swap(disk->conv_zones_bitmap, args->conv_zones_bitmap); +- if (disk->conv_zones_bitmap) +- nr_conv_zones = bitmap_weight(disk->conv_zones_bitmap, +- disk->nr_zones); ++ nr_conv_zones = ++ disk_set_conv_zones_bitmap(disk, args->conv_zones_bitmap); + if (nr_conv_zones >= disk->nr_zones) { + pr_warn("%s: Invalid number of conventional zones %u / %u\n", + disk->disk_name, nr_conv_zones, disk->nr_zones); +@@ -1829,8 +1850,6 @@ int blk_revalidate_disk_zones(struct gendisk *disk) + blk_mq_unfreeze_queue(q); + } + +- kfree(args.conv_zones_bitmap); +- + return ret; + } + EXPORT_SYMBOL_GPL(blk_revalidate_disk_zones); +diff --git a/crypto/ecdsa.c b/crypto/ecdsa.c +index d5a10959ec281c..80ef16ae6a40b4 100644 +--- a/crypto/ecdsa.c ++++ b/crypto/ecdsa.c +@@ -36,29 +36,24 @@ static int ecdsa_get_signature_rs(u64 *dest, size_t hdrlen, unsigned char tag, + const void *value, size_t vlen, unsigned int ndigits) + { + size_t bufsize = ndigits * sizeof(u64); +- ssize_t diff = vlen - bufsize; + const char *d = value; + +- if (!value || !vlen) ++ if (!value || !vlen || vlen > bufsize + 1) + return -EINVAL; + +- /* diff = 0: 'value' has exacly the right size +- * diff > 0: 'value' has too many bytes; one leading zero is allowed that +- * makes the value a positive integer; error on more +- * diff < 0: 'value' is missing leading zeros ++ /* ++ * vlen may be 1 byte larger than bufsize due to a leading zero byte ++ * (necessary if the most significant bit of the integer is set). + */ +- if (diff > 0) { ++ if (vlen > bufsize) { + /* skip over leading zeros that make 'value' a positive int */ + if (*d == 0) { + vlen -= 1; +- diff--; + d++; +- } +- if (diff) ++ } else { + return -EINVAL; ++ } + } +- if (-diff >= bufsize) +- return -EINVAL; + + ecc_digits_from_bytes(d, vlen, dest, ndigits); + +diff --git a/drivers/accel/qaic/qaic_drv.c b/drivers/accel/qaic/qaic_drv.c +index bf10156c334e71..f139c564eadf9f 100644 +--- a/drivers/accel/qaic/qaic_drv.c ++++ b/drivers/accel/qaic/qaic_drv.c +@@ -34,6 +34,7 @@ + + MODULE_IMPORT_NS(DMA_BUF); + ++#define PCI_DEV_AIC080 0xa080 + #define PCI_DEV_AIC100 0xa100 + #define QAIC_NAME "qaic" + #define QAIC_DESC "Qualcomm Cloud AI Accelerators" +@@ -365,7 +366,7 @@ static struct qaic_device *create_qdev(struct pci_dev *pdev, const struct pci_de + return NULL; + + qdev->dev_state = QAIC_OFFLINE; +- if (id->device == PCI_DEV_AIC100) { ++ if (id->device == PCI_DEV_AIC080 || id->device == PCI_DEV_AIC100) { + qdev->num_dbc = 16; + qdev->dbc = devm_kcalloc(dev, qdev->num_dbc, sizeof(*qdev->dbc), GFP_KERNEL); + if (!qdev->dbc) +@@ -607,6 +608,7 @@ static struct mhi_driver qaic_mhi_driver = { + }; + + static const struct pci_device_id qaic_ids[] = { ++ { PCI_DEVICE(PCI_VENDOR_ID_QCOM, PCI_DEV_AIC080), }, + { PCI_DEVICE(PCI_VENDOR_ID_QCOM, PCI_DEV_AIC100), }, + { } + }; +diff --git a/drivers/acpi/video_detect.c b/drivers/acpi/video_detect.c +index 015bd8e66c1cf8..d507d5e084354b 100644 +--- a/drivers/acpi/video_detect.c ++++ b/drivers/acpi/video_detect.c +@@ -549,6 +549,14 @@ static const struct dmi_system_id video_detect_dmi_table[] = { + DMI_MATCH(DMI_PRODUCT_NAME, "iMac12,2"), + }, + }, ++ { ++ .callback = video_detect_force_native, ++ /* Apple MacBook Air 7,2 */ ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir7,2"), ++ }, ++ }, + { + .callback = video_detect_force_native, + /* Apple MacBook Air 9,1 */ +@@ -565,6 +573,14 @@ static const struct dmi_system_id video_detect_dmi_table[] = { + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,2"), + }, + }, ++ { ++ .callback = video_detect_force_native, ++ /* Apple MacBook Pro 11,2 */ ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro11,2"), ++ }, ++ }, + { + /* https://bugzilla.redhat.com/show_bug.cgi?id=1217249 */ + .callback = video_detect_force_native, +diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c +index 6af546b21574f9..cb45ef5240dab6 100644 +--- a/drivers/acpi/x86/utils.c ++++ b/drivers/acpi/x86/utils.c +@@ -12,6 +12,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -295,6 +296,7 @@ static const struct dmi_system_id acpi_quirk_skip_dmi_ids[] = { + /* + * 2. Devices which also have the skip i2c/serdev quirks and which + * need the x86-android-tablets module to properly work. ++ * Sorted alphabetically. + */ + #if IS_ENABLED(CONFIG_X86_ANDROID_TABLETS) + { +@@ -308,6 +310,19 @@ static const struct dmi_system_id acpi_quirk_skip_dmi_ids[] = { + ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), + }, + { ++ /* Acer Iconia One 8 A1-840 (non FHD version) */ ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Insyde"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "BayTrail"), ++ /* Above strings are too generic also match BIOS date */ ++ DMI_MATCH(DMI_BIOS_DATE, "04/01/2014"), ++ }, ++ .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | ++ ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY | ++ ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), ++ }, ++ { ++ /* Asus ME176C tablet */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "ME176C"), +@@ -318,23 +333,24 @@ static const struct dmi_system_id acpi_quirk_skip_dmi_ids[] = { + ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), + }, + { +- /* Lenovo Yoga Book X90F/L */ ++ /* Asus TF103C transformer 2-in-1 */ + .matches = { +- DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), +- DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"), +- DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "YETI-11"), ++ DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "TF103C"), + }, + .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | +- ACPI_QUIRK_UART1_SKIP | + ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY | + ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), + }, + { ++ /* Lenovo Yoga Book X90F/L */ + .matches = { +- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), +- DMI_MATCH(DMI_PRODUCT_NAME, "TF103C"), ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "YETI-11"), + }, + .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | ++ ACPI_QUIRK_UART1_SKIP | + ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY | + ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), + }, +@@ -391,6 +407,19 @@ static const struct dmi_system_id acpi_quirk_skip_dmi_ids[] = { + .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | + ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY), + }, ++ { ++ /* Vexia Edu Atla 10 tablet 9V version */ ++ .matches = { ++ DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), ++ DMI_MATCH(DMI_BOARD_NAME, "Aptio CRB"), ++ /* Above strings are too generic, also match on BIOS date */ ++ DMI_MATCH(DMI_BIOS_DATE, "08/25/2014"), ++ }, ++ .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | ++ ACPI_QUIRK_UART1_SKIP | ++ ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY | ++ ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), ++ }, + { + /* Whitelabel (sold as various brands) TM800A550L */ + .matches = { +@@ -411,6 +440,7 @@ static const struct acpi_device_id i2c_acpi_known_good_ids[] = { + { "10EC5640", 0 }, /* RealTek ALC5640 audio codec */ + { "10EC5651", 0 }, /* RealTek ALC5651 audio codec */ + { "INT33F4", 0 }, /* X-Powers AXP288 PMIC */ ++ { "INT33F5", 0 }, /* TI Dollar Cove PMIC */ + { "INT33FD", 0 }, /* Intel Crystal Cove PMIC */ + { "INT34D3", 0 }, /* Intel Whiskey Cove PMIC */ + { "NPCE69A", 0 }, /* Asus Transformer keyboard dock */ +@@ -439,18 +469,35 @@ static int acpi_dmi_skip_serdev_enumeration(struct device *controller_parent, bo + struct acpi_device *adev = ACPI_COMPANION(controller_parent); + const struct dmi_system_id *dmi_id; + long quirks = 0; +- u64 uid; +- int ret; ++ u64 uid = 0; + +- ret = acpi_dev_uid_to_integer(adev, &uid); +- if (ret) ++ dmi_id = dmi_first_match(acpi_quirk_skip_dmi_ids); ++ if (!dmi_id) + return 0; + +- dmi_id = dmi_first_match(acpi_quirk_skip_dmi_ids); +- if (dmi_id) +- quirks = (unsigned long)dmi_id->driver_data; ++ quirks = (unsigned long)dmi_id->driver_data; ++ ++ /* uid is left at 0 on errors and 0 is not a valid UART UID */ ++ acpi_dev_uid_to_integer(adev, &uid); ++ ++ /* For PCI UARTs without an UID */ ++ if (!uid && dev_is_pci(controller_parent)) { ++ struct pci_dev *pdev = to_pci_dev(controller_parent); ++ ++ /* ++ * Devfn values for PCI UARTs on Bay Trail SoCs, which are ++ * the only devices where this fallback is necessary. ++ */ ++ if (pdev->devfn == PCI_DEVFN(0x1e, 3)) ++ uid = 1; ++ else if (pdev->devfn == PCI_DEVFN(0x1e, 4)) ++ uid = 2; ++ } ++ ++ if (!uid) ++ return 0; + +- if (!dev_is_platform(controller_parent)) { ++ if (!dev_is_platform(controller_parent) && !dev_is_pci(controller_parent)) { + /* PNP enumerated UARTs */ + if ((quirks & ACPI_QUIRK_PNP_UART1_SKIP) && uid == 1) + *skip = true; +@@ -505,7 +552,7 @@ int acpi_quirk_skip_serdev_enumeration(struct device *controller_parent, bool *s + * Set skip to true so that the tty core creates a serdev ctrl device. + * The backlight driver will manually create the serdev client device. + */ +- if (acpi_dev_hid_match(adev, "DELL0501")) { ++ if (adev && acpi_dev_hid_match(adev, "DELL0501")) { + *skip = true; + /* + * Create a platform dev for dell-uart-backlight to bind to. +diff --git a/drivers/base/arch_numa.c b/drivers/base/arch_numa.c +index e1870167642658..c99f2ab105e5b7 100644 +--- a/drivers/base/arch_numa.c ++++ b/drivers/base/arch_numa.c +@@ -208,6 +208,10 @@ static int __init numa_register_nodes(void) + { + int nid; + ++ /* Check the validity of the memblock/node mapping */ ++ if (!memblock_validate_numa_coverage(0)) ++ return -EINVAL; ++ + /* Finally register nodes. */ + for_each_node_mask(nid, numa_nodes_parsed) { + unsigned long start_pfn, end_pfn; +diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c +index 7a7609298e18bd..89410127089b93 100644 +--- a/drivers/base/cacheinfo.c ++++ b/drivers/base/cacheinfo.c +@@ -58,7 +58,7 @@ bool last_level_cache_is_valid(unsigned int cpu) + { + struct cacheinfo *llc; + +- if (!cache_leaves(cpu)) ++ if (!cache_leaves(cpu) || !per_cpu_cacheinfo(cpu)) + return false; + + llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1); +@@ -463,11 +463,9 @@ int __weak populate_cache_leaves(unsigned int cpu) + return -ENOENT; + } + +-static inline +-int allocate_cache_info(int cpu) ++static inline int allocate_cache_info(int cpu) + { +- per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu), +- sizeof(struct cacheinfo), GFP_ATOMIC); ++ per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu), sizeof(struct cacheinfo), GFP_ATOMIC); + if (!per_cpu_cacheinfo(cpu)) { + cache_leaves(cpu) = 0; + return -ENOMEM; +@@ -539,7 +537,11 @@ static inline int init_level_allocate_ci(unsigned int cpu) + */ + ci_cacheinfo(cpu)->early_ci_levels = false; + +- if (cache_leaves(cpu) <= early_leaves) ++ /* ++ * Some architectures (e.g., x86) do not use early initialization. ++ * Allocate memory now in such case. ++ */ ++ if (cache_leaves(cpu) <= early_leaves && per_cpu_cacheinfo(cpu)) + return 0; + + kfree(per_cpu_cacheinfo(cpu)); +diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h +index 83acccdc100897..bdb450436cbc53 100644 +--- a/drivers/base/regmap/internal.h ++++ b/drivers/base/regmap/internal.h +@@ -59,6 +59,7 @@ struct regmap { + unsigned long raw_spinlock_flags; + }; + }; ++ struct lock_class_key *lock_key; + regmap_lock lock; + regmap_unlock unlock; + void *lock_arg; /* This is passed to lock/unlock functions */ +diff --git a/drivers/base/regmap/regcache-maple.c b/drivers/base/regmap/regcache-maple.c +index 8d27d3653ea3e7..23da7b31d71534 100644 +--- a/drivers/base/regmap/regcache-maple.c ++++ b/drivers/base/regmap/regcache-maple.c +@@ -355,6 +355,9 @@ static int regcache_maple_init(struct regmap *map) + + mt_init(mt); + ++ if (!mt_external_lock(mt) && map->lock_key) ++ lockdep_set_class_and_subclass(&mt->ma_lock, map->lock_key, 1); ++ + if (!map->num_reg_defaults) + return 0; + +diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c +index 4ded93687c1f0a..e3e2afc2c83c6b 100644 +--- a/drivers/base/regmap/regmap.c ++++ b/drivers/base/regmap/regmap.c +@@ -598,6 +598,17 @@ int regmap_attach_dev(struct device *dev, struct regmap *map, + } + EXPORT_SYMBOL_GPL(regmap_attach_dev); + ++static int dev_get_regmap_match(struct device *dev, void *res, void *data); ++ ++static int regmap_detach_dev(struct device *dev, struct regmap *map) ++{ ++ if (!dev) ++ return 0; ++ ++ return devres_release(dev, dev_get_regmap_release, ++ dev_get_regmap_match, (void *)map->name); ++} ++ + static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus, + const struct regmap_config *config) + { +@@ -745,6 +756,7 @@ struct regmap *__regmap_init(struct device *dev, + lock_key, lock_name); + } + map->lock_arg = map; ++ map->lock_key = lock_key; + } + + /* +@@ -1444,6 +1456,7 @@ void regmap_exit(struct regmap *map) + { + struct regmap_async *async; + ++ regmap_detach_dev(map->dev, map); + regcache_exit(map); + + regmap_debugfs_exit(map); +diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c +index d6a1ba969266a4..d0432b1707ceb6 100644 +--- a/drivers/block/zram/zram_drv.c ++++ b/drivers/block/zram/zram_drv.c +@@ -298,17 +298,30 @@ static void mark_idle(struct zram *zram, ktime_t cutoff) + /* + * Do not mark ZRAM_UNDER_WB slot as ZRAM_IDLE to close race. + * See the comment in writeback_store. ++ * ++ * Also do not mark ZRAM_SAME slots as ZRAM_IDLE, because no ++ * post-processing (recompress, writeback) happens to the ++ * ZRAM_SAME slot. ++ * ++ * And ZRAM_WB slots simply cannot be ZRAM_IDLE. + */ + zram_slot_lock(zram, index); +- if (zram_allocated(zram, index) && +- !zram_test_flag(zram, index, ZRAM_UNDER_WB)) { ++ if (!zram_allocated(zram, index) || ++ zram_test_flag(zram, index, ZRAM_WB) || ++ zram_test_flag(zram, index, ZRAM_UNDER_WB) || ++ zram_test_flag(zram, index, ZRAM_SAME)) { ++ zram_slot_unlock(zram, index); ++ continue; ++ } ++ + #ifdef CONFIG_ZRAM_TRACK_ENTRY_ACTIME +- is_idle = !cutoff || ktime_after(cutoff, +- zram->table[index].ac_time); ++ is_idle = !cutoff || ++ ktime_after(cutoff, zram->table[index].ac_time); + #endif +- if (is_idle) +- zram_set_flag(zram, index, ZRAM_IDLE); +- } ++ if (is_idle) ++ zram_set_flag(zram, index, ZRAM_IDLE); ++ else ++ zram_clear_flag(zram, index, ZRAM_IDLE); + zram_slot_unlock(zram, index); + } + } +diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c +index 4ccaddb46ddd81..11755cb1eb1635 100644 +--- a/drivers/bluetooth/btusb.c ++++ b/drivers/bluetooth/btusb.c +@@ -524,6 +524,8 @@ static const struct usb_device_id quirks_table[] = { + BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x13d3, 0x3591), .driver_info = BTUSB_REALTEK | + BTUSB_WIDEBAND_SPEECH }, ++ { USB_DEVICE(0x0489, 0xe123), .driver_info = BTUSB_REALTEK | ++ BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x0489, 0xe125), .driver_info = BTUSB_REALTEK | + BTUSB_WIDEBAND_SPEECH }, + +@@ -563,6 +565,16 @@ static const struct usb_device_id quirks_table[] = { + { USB_DEVICE(0x043e, 0x3109), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH }, + ++ /* Additional MediaTek MT7920 Bluetooth devices */ ++ { USB_DEVICE(0x0489, 0xe134), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, ++ { USB_DEVICE(0x13d3, 0x3620), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, ++ { USB_DEVICE(0x13d3, 0x3621), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, ++ { USB_DEVICE(0x13d3, 0x3622), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, ++ + /* Additional MediaTek MT7921 Bluetooth devices */ + { USB_DEVICE(0x0489, 0xe0c8), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH }, +@@ -630,12 +642,24 @@ static const struct usb_device_id quirks_table[] = { + BTUSB_WIDEBAND_SPEECH }, + + /* Additional MediaTek MT7925 Bluetooth devices */ ++ { USB_DEVICE(0x0489, 0xe111), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x0489, 0xe113), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x0489, 0xe118), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x0489, 0xe11e), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH }, ++ { USB_DEVICE(0x0489, 0xe124), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, ++ { USB_DEVICE(0x0489, 0xe139), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, ++ { USB_DEVICE(0x0489, 0xe14f), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, ++ { USB_DEVICE(0x0489, 0xe150), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, ++ { USB_DEVICE(0x0489, 0xe151), .driver_info = BTUSB_MEDIATEK | ++ BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x13d3, 0x3602), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x13d3, 0x3603), .driver_info = BTUSB_MEDIATEK | +@@ -3897,6 +3921,8 @@ static int btusb_probe(struct usb_interface *intf, + set_bit(HCI_QUIRK_BROKEN_SET_RPA_TIMEOUT, &hdev->quirks); + set_bit(HCI_QUIRK_BROKEN_EXT_SCAN, &hdev->quirks); + set_bit(HCI_QUIRK_BROKEN_READ_ENC_KEY_SIZE, &hdev->quirks); ++ set_bit(HCI_QUIRK_BROKEN_EXT_CREATE_CONN, &hdev->quirks); ++ set_bit(HCI_QUIRK_BROKEN_WRITE_AUTH_PAYLOAD_TIMEOUT, &hdev->quirks); + } + + if (!reset) +diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c +index fdd8ea989ed24a..bc21b292144926 100644 +--- a/drivers/clk/clk-en7523.c ++++ b/drivers/clk/clk-en7523.c +@@ -508,6 +508,8 @@ static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_dat + u32 rate; + int i; + ++ clk_data->num = EN7523_NUM_CLOCKS; ++ + for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) { + const struct en_clk_desc *desc = &en7523_base_clks[i]; + u32 reg = desc->div_reg ? desc->div_reg : desc->base_reg; +@@ -529,8 +531,6 @@ static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_dat + + hw = en7523_register_pcie_clk(dev, np_base); + clk_data->hws[EN7523_CLK_PCIE] = hw; +- +- clk_data->num = EN7523_NUM_CLOCKS; + } + + static int en7523_clk_hw_init(struct platform_device *pdev, +diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig +index 4444dafa4e3dfa..9ba675f229b144 100644 +--- a/drivers/clk/qcom/Kconfig ++++ b/drivers/clk/qcom/Kconfig +@@ -959,10 +959,10 @@ config SM_DISPCC_8450 + config SM_DISPCC_8550 + tristate "SM8550 Display Clock Controller" + depends on ARM64 || COMPILE_TEST +- depends on SM_GCC_8550 || SM_GCC_8650 ++ depends on SM_GCC_8550 || SM_GCC_8650 || SAR_GCC_2130P + help + Support for the display clock controller on Qualcomm Technologies, Inc +- SM8550 or SM8650 devices. ++ SAR2130P, SM8550 or SM8650 devices. + Say Y if you want to support display devices and functionality such as + splash screen. + +diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c +index be9bee6ab65f6e..49687512184b92 100644 +--- a/drivers/clk/qcom/clk-alpha-pll.c ++++ b/drivers/clk/qcom/clk-alpha-pll.c +@@ -267,6 +267,17 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = { + [PLL_OFF_OPMODE] = 0x30, + [PLL_OFF_STATUS] = 0x3c, + }, ++ [CLK_ALPHA_PLL_TYPE_NSS_HUAYRA] = { ++ [PLL_OFF_L_VAL] = 0x04, ++ [PLL_OFF_ALPHA_VAL] = 0x08, ++ [PLL_OFF_TEST_CTL] = 0x0c, ++ [PLL_OFF_TEST_CTL_U] = 0x10, ++ [PLL_OFF_USER_CTL] = 0x14, ++ [PLL_OFF_CONFIG_CTL] = 0x18, ++ [PLL_OFF_CONFIG_CTL_U] = 0x1c, ++ [PLL_OFF_STATUS] = 0x20, ++ }, ++ + }; + EXPORT_SYMBOL_GPL(clk_alpha_pll_regs); + +diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h +index 55eca04b23a1fc..c6d1b8429f951a 100644 +--- a/drivers/clk/qcom/clk-alpha-pll.h ++++ b/drivers/clk/qcom/clk-alpha-pll.h +@@ -32,6 +32,7 @@ enum { + CLK_ALPHA_PLL_TYPE_BRAMMO_EVO, + CLK_ALPHA_PLL_TYPE_STROMER, + CLK_ALPHA_PLL_TYPE_STROMER_PLUS, ++ CLK_ALPHA_PLL_TYPE_NSS_HUAYRA, + CLK_ALPHA_PLL_TYPE_MAX, + }; + +diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h +index 8e0f3372dc7a83..80f1f4fcd52a68 100644 +--- a/drivers/clk/qcom/clk-rcg.h ++++ b/drivers/clk/qcom/clk-rcg.h +@@ -198,6 +198,7 @@ extern const struct clk_ops clk_byte2_ops; + extern const struct clk_ops clk_pixel_ops; + extern const struct clk_ops clk_gfx3d_ops; + extern const struct clk_ops clk_rcg2_shared_ops; ++extern const struct clk_ops clk_rcg2_shared_floor_ops; + extern const struct clk_ops clk_rcg2_shared_no_init_park_ops; + extern const struct clk_ops clk_dp_ops; + +diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c +index bf26c5448f0067..bf6406f5279a4c 100644 +--- a/drivers/clk/qcom/clk-rcg2.c ++++ b/drivers/clk/qcom/clk-rcg2.c +@@ -1186,15 +1186,23 @@ clk_rcg2_shared_force_enable_clear(struct clk_hw *hw, const struct freq_tbl *f) + return clk_rcg2_clear_force_enable(hw); + } + +-static int clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, +- unsigned long parent_rate) ++static int __clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long parent_rate, ++ enum freq_policy policy) + { + struct clk_rcg2 *rcg = to_clk_rcg2(hw); + const struct freq_tbl *f; + +- f = qcom_find_freq(rcg->freq_tbl, rate); +- if (!f) ++ switch (policy) { ++ case FLOOR: ++ f = qcom_find_freq_floor(rcg->freq_tbl, rate); ++ break; ++ case CEIL: ++ f = qcom_find_freq(rcg->freq_tbl, rate); ++ break; ++ default: + return -EINVAL; ++ } + + /* + * In case clock is disabled, update the M, N and D registers, cache +@@ -1207,10 +1215,28 @@ static int clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, + return clk_rcg2_shared_force_enable_clear(hw, f); + } + ++static int clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long parent_rate) ++{ ++ return __clk_rcg2_shared_set_rate(hw, rate, parent_rate, CEIL); ++} ++ + static int clk_rcg2_shared_set_rate_and_parent(struct clk_hw *hw, + unsigned long rate, unsigned long parent_rate, u8 index) + { +- return clk_rcg2_shared_set_rate(hw, rate, parent_rate); ++ return __clk_rcg2_shared_set_rate(hw, rate, parent_rate, CEIL); ++} ++ ++static int clk_rcg2_shared_set_floor_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long parent_rate) ++{ ++ return __clk_rcg2_shared_set_rate(hw, rate, parent_rate, FLOOR); ++} ++ ++static int clk_rcg2_shared_set_floor_rate_and_parent(struct clk_hw *hw, ++ unsigned long rate, unsigned long parent_rate, u8 index) ++{ ++ return __clk_rcg2_shared_set_rate(hw, rate, parent_rate, FLOOR); + } + + static int clk_rcg2_shared_enable(struct clk_hw *hw) +@@ -1348,6 +1374,18 @@ const struct clk_ops clk_rcg2_shared_ops = { + }; + EXPORT_SYMBOL_GPL(clk_rcg2_shared_ops); + ++const struct clk_ops clk_rcg2_shared_floor_ops = { ++ .enable = clk_rcg2_shared_enable, ++ .disable = clk_rcg2_shared_disable, ++ .get_parent = clk_rcg2_shared_get_parent, ++ .set_parent = clk_rcg2_shared_set_parent, ++ .recalc_rate = clk_rcg2_shared_recalc_rate, ++ .determine_rate = clk_rcg2_determine_floor_rate, ++ .set_rate = clk_rcg2_shared_set_floor_rate, ++ .set_rate_and_parent = clk_rcg2_shared_set_floor_rate_and_parent, ++}; ++EXPORT_SYMBOL_GPL(clk_rcg2_shared_floor_ops); ++ + static int clk_rcg2_shared_no_init_park(struct clk_hw *hw) + { + struct clk_rcg2 *rcg = to_clk_rcg2(hw); +diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c +index 4acde937114af3..eefc322ce36798 100644 +--- a/drivers/clk/qcom/clk-rpmh.c ++++ b/drivers/clk/qcom/clk-rpmh.c +@@ -389,6 +389,18 @@ DEFINE_CLK_RPMH_BCM(ipa, "IP0"); + DEFINE_CLK_RPMH_BCM(pka, "PKA0"); + DEFINE_CLK_RPMH_BCM(qpic_clk, "QP0"); + ++static struct clk_hw *sar2130p_rpmh_clocks[] = { ++ [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div1.hw, ++ [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div1_ao.hw, ++ [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, ++ [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, ++}; ++ ++static const struct clk_rpmh_desc clk_rpmh_sar2130p = { ++ .clks = sar2130p_rpmh_clocks, ++ .num_clks = ARRAY_SIZE(sar2130p_rpmh_clocks), ++}; ++ + static struct clk_hw *sdm845_rpmh_clocks[] = { + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, +@@ -880,6 +892,7 @@ static int clk_rpmh_probe(struct platform_device *pdev) + static const struct of_device_id clk_rpmh_match_table[] = { + { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000}, + { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p}, ++ { .compatible = "qcom,sar2130p-rpmh-clk", .data = &clk_rpmh_sar2130p}, + { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180}, + { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, + { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, +diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8550.c +index 7f9021ca0ecb0e..e41d4104d77021 100644 +--- a/drivers/clk/qcom/dispcc-sm8550.c ++++ b/drivers/clk/qcom/dispcc-sm8550.c +@@ -75,7 +75,7 @@ static struct pll_vco lucid_ole_vco[] = { + { 249600000, 2000000000, 0 }, + }; + +-static const struct alpha_pll_config disp_cc_pll0_config = { ++static struct alpha_pll_config disp_cc_pll0_config = { + .l = 0xd, + .alpha = 0x6492, + .config_ctl_val = 0x20485699, +@@ -106,7 +106,7 @@ static struct clk_alpha_pll disp_cc_pll0 = { + }, + }; + +-static const struct alpha_pll_config disp_cc_pll1_config = { ++static struct alpha_pll_config disp_cc_pll1_config = { + .l = 0x1f, + .alpha = 0x4000, + .config_ctl_val = 0x20485699, +@@ -594,6 +594,13 @@ static const struct freq_tbl ftbl_disp_cc_mdss_mdp_clk_src[] = { + { } + }; + ++static const struct freq_tbl ftbl_disp_cc_mdss_mdp_clk_src_sar2130p[] = { ++ F(200000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), ++ F(325000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), ++ F(514000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), ++ { } ++}; ++ + static const struct freq_tbl ftbl_disp_cc_mdss_mdp_clk_src_sm8650[] = { + F(19200000, P_BI_TCXO, 1, 0, 0), + F(85714286, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), +@@ -1750,6 +1757,7 @@ static struct qcom_cc_desc disp_cc_sm8550_desc = { + }; + + static const struct of_device_id disp_cc_sm8550_match_table[] = { ++ { .compatible = "qcom,sar2130p-dispcc" }, + { .compatible = "qcom,sm8550-dispcc" }, + { .compatible = "qcom,sm8650-dispcc" }, + { } +@@ -1780,6 +1788,12 @@ static int disp_cc_sm8550_probe(struct platform_device *pdev) + disp_cc_mdss_mdp_clk_src.freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src_sm8650; + disp_cc_mdss_dptx1_usb_router_link_intf_clk.clkr.hw.init->parent_hws[0] = + &disp_cc_mdss_dptx1_link_div_clk_src.clkr.hw; ++ } else if (of_device_is_compatible(pdev->dev.of_node, "qcom,sar2130p-dispcc")) { ++ disp_cc_pll0_config.l = 0x1f; ++ disp_cc_pll0_config.alpha = 0x4000; ++ disp_cc_pll0_config.user_ctl_val = 0x1; ++ disp_cc_pll1_config.user_ctl_val = 0x1; ++ disp_cc_mdss_mdp_clk_src.freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src_sar2130p; + } + + clk_lucid_ole_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); +diff --git a/drivers/clk/qcom/tcsrcc-sm8550.c b/drivers/clk/qcom/tcsrcc-sm8550.c +index e5e8f2e82b949d..41d73f92a000ab 100644 +--- a/drivers/clk/qcom/tcsrcc-sm8550.c ++++ b/drivers/clk/qcom/tcsrcc-sm8550.c +@@ -129,6 +129,13 @@ static struct clk_branch tcsr_usb3_clkref_en = { + }, + }; + ++static struct clk_regmap *tcsr_cc_sar2130p_clocks[] = { ++ [TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr, ++ [TCSR_PCIE_1_CLKREF_EN] = &tcsr_pcie_1_clkref_en.clkr, ++ [TCSR_USB2_CLKREF_EN] = &tcsr_usb2_clkref_en.clkr, ++ [TCSR_USB3_CLKREF_EN] = &tcsr_usb3_clkref_en.clkr, ++}; ++ + static struct clk_regmap *tcsr_cc_sm8550_clocks[] = { + [TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr, + [TCSR_PCIE_1_CLKREF_EN] = &tcsr_pcie_1_clkref_en.clkr, +@@ -146,6 +153,12 @@ static const struct regmap_config tcsr_cc_sm8550_regmap_config = { + .fast_io = true, + }; + ++static const struct qcom_cc_desc tcsr_cc_sar2130p_desc = { ++ .config = &tcsr_cc_sm8550_regmap_config, ++ .clks = tcsr_cc_sar2130p_clocks, ++ .num_clks = ARRAY_SIZE(tcsr_cc_sar2130p_clocks), ++}; ++ + static const struct qcom_cc_desc tcsr_cc_sm8550_desc = { + .config = &tcsr_cc_sm8550_regmap_config, + .clks = tcsr_cc_sm8550_clocks, +@@ -153,7 +166,8 @@ static const struct qcom_cc_desc tcsr_cc_sm8550_desc = { + }; + + static const struct of_device_id tcsr_cc_sm8550_match_table[] = { +- { .compatible = "qcom,sm8550-tcsr" }, ++ { .compatible = "qcom,sar2130p-tcsr", .data = &tcsr_cc_sar2130p_desc }, ++ { .compatible = "qcom,sm8550-tcsr", .data = &tcsr_cc_sm8550_desc }, + { } + }; + MODULE_DEVICE_TABLE(of, tcsr_cc_sm8550_match_table); +@@ -162,7 +176,7 @@ static int tcsr_cc_sm8550_probe(struct platform_device *pdev) + { + struct regmap *regmap; + +- regmap = qcom_cc_map(pdev, &tcsr_cc_sm8550_desc); ++ regmap = qcom_cc_map(pdev, of_device_get_match_data(&pdev->dev)); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + +diff --git a/drivers/dma-buf/dma-fence-array.c b/drivers/dma-buf/dma-fence-array.c +index 8a08ffde31e758..6657d4b30af9dc 100644 +--- a/drivers/dma-buf/dma-fence-array.c ++++ b/drivers/dma-buf/dma-fence-array.c +@@ -103,10 +103,36 @@ static bool dma_fence_array_enable_signaling(struct dma_fence *fence) + static bool dma_fence_array_signaled(struct dma_fence *fence) + { + struct dma_fence_array *array = to_dma_fence_array(fence); ++ int num_pending; ++ unsigned int i; + +- if (atomic_read(&array->num_pending) > 0) ++ /* ++ * We need to read num_pending before checking the enable_signal bit ++ * to avoid racing with the enable_signaling() implementation, which ++ * might decrement the counter, and cause a partial check. ++ * atomic_read_acquire() pairs with atomic_dec_and_test() in ++ * dma_fence_array_enable_signaling() ++ * ++ * The !--num_pending check is here to account for the any_signaled case ++ * if we race with enable_signaling(), that means the !num_pending check ++ * in the is_signalling_enabled branch might be outdated (num_pending ++ * might have been decremented), but that's fine. The user will get the ++ * right value when testing again later. ++ */ ++ num_pending = atomic_read_acquire(&array->num_pending); ++ if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &array->base.flags)) { ++ if (num_pending <= 0) ++ goto signal; + return false; ++ } ++ ++ for (i = 0; i < array->num_fences; ++i) { ++ if (dma_fence_is_signaled(array->fences[i]) && !--num_pending) ++ goto signal; ++ } ++ return false; + ++signal: + dma_fence_array_clear_pending_error(array); + return true; + } +diff --git a/drivers/dma-buf/dma-fence-unwrap.c b/drivers/dma-buf/dma-fence-unwrap.c +index 628af51c81af3d..6345062731f153 100644 +--- a/drivers/dma-buf/dma-fence-unwrap.c ++++ b/drivers/dma-buf/dma-fence-unwrap.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + + /* Internal helper to start new array iteration, don't use directly */ + static struct dma_fence * +@@ -59,6 +60,25 @@ struct dma_fence *dma_fence_unwrap_next(struct dma_fence_unwrap *cursor) + } + EXPORT_SYMBOL_GPL(dma_fence_unwrap_next); + ++ ++static int fence_cmp(const void *_a, const void *_b) ++{ ++ struct dma_fence *a = *(struct dma_fence **)_a; ++ struct dma_fence *b = *(struct dma_fence **)_b; ++ ++ if (a->context < b->context) ++ return -1; ++ else if (a->context > b->context) ++ return 1; ++ ++ if (dma_fence_is_later(b, a)) ++ return 1; ++ else if (dma_fence_is_later(a, b)) ++ return -1; ++ ++ return 0; ++} ++ + /* Implementation for the dma_fence_merge() marco, don't use directly */ + struct dma_fence *__dma_fence_unwrap_merge(unsigned int num_fences, + struct dma_fence **fences, +@@ -67,8 +87,7 @@ struct dma_fence *__dma_fence_unwrap_merge(unsigned int num_fences, + struct dma_fence_array *result; + struct dma_fence *tmp, **array; + ktime_t timestamp; +- unsigned int i; +- size_t count; ++ int i, j, count; + + count = 0; + timestamp = ns_to_ktime(0); +@@ -96,78 +115,55 @@ struct dma_fence *__dma_fence_unwrap_merge(unsigned int num_fences, + if (!array) + return NULL; + +- /* +- * This trashes the input fence array and uses it as position for the +- * following merge loop. This works because the dma_fence_merge() +- * wrapper macro is creating this temporary array on the stack together +- * with the iterators. +- */ +- for (i = 0; i < num_fences; ++i) +- fences[i] = dma_fence_unwrap_first(fences[i], &iter[i]); +- + count = 0; +- do { +- unsigned int sel; +- +-restart: +- tmp = NULL; +- for (i = 0; i < num_fences; ++i) { +- struct dma_fence *next; +- +- while (fences[i] && dma_fence_is_signaled(fences[i])) +- fences[i] = dma_fence_unwrap_next(&iter[i]); +- +- next = fences[i]; +- if (!next) +- continue; +- +- /* +- * We can't guarantee that inpute fences are ordered by +- * context, but it is still quite likely when this +- * function is used multiple times. So attempt to order +- * the fences by context as we pass over them and merge +- * fences with the same context. +- */ +- if (!tmp || tmp->context > next->context) { +- tmp = next; +- sel = i; +- +- } else if (tmp->context < next->context) { +- continue; +- +- } else if (dma_fence_is_later(tmp, next)) { +- fences[i] = dma_fence_unwrap_next(&iter[i]); +- goto restart; ++ for (i = 0; i < num_fences; ++i) { ++ dma_fence_unwrap_for_each(tmp, &iter[i], fences[i]) { ++ if (!dma_fence_is_signaled(tmp)) { ++ array[count++] = dma_fence_get(tmp); + } else { +- fences[sel] = dma_fence_unwrap_next(&iter[sel]); +- goto restart; ++ ktime_t t = dma_fence_timestamp(tmp); ++ ++ if (ktime_after(t, timestamp)) ++ timestamp = t; + } + } ++ } + +- if (tmp) { +- array[count++] = dma_fence_get(tmp); +- fences[sel] = dma_fence_unwrap_next(&iter[sel]); +- } +- } while (tmp); ++ if (count == 0 || count == 1) ++ goto return_fastpath; + +- if (count == 0) { +- tmp = dma_fence_allocate_private_stub(ktime_get()); +- goto return_tmp; +- } ++ sort(array, count, sizeof(*array), fence_cmp, NULL); + +- if (count == 1) { +- tmp = array[0]; +- goto return_tmp; ++ /* ++ * Only keep the most recent fence for each context. ++ */ ++ j = 0; ++ for (i = 1; i < count; i++) { ++ if (array[i]->context == array[j]->context) ++ dma_fence_put(array[i]); ++ else ++ array[++j] = array[i]; + } +- +- result = dma_fence_array_create(count, array, +- dma_fence_context_alloc(1), +- 1, false); +- if (!result) { +- tmp = NULL; +- goto return_tmp; ++ count = ++j; ++ ++ if (count > 1) { ++ result = dma_fence_array_create(count, array, ++ dma_fence_context_alloc(1), ++ 1, false); ++ if (!result) { ++ for (i = 0; i < count; i++) ++ dma_fence_put(array[i]); ++ tmp = NULL; ++ goto return_tmp; ++ } ++ return &result->base; + } +- return &result->base; ++ ++return_fastpath: ++ if (count == 0) ++ tmp = dma_fence_allocate_private_stub(timestamp); ++ else ++ tmp = array[0]; + + return_tmp: + kfree(array); +diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c +index 2e4260ba5f793c..14afd68664a911 100644 +--- a/drivers/firmware/qcom/qcom_scm.c ++++ b/drivers/firmware/qcom/qcom_scm.c +@@ -1742,9 +1742,11 @@ EXPORT_SYMBOL_GPL(qcom_scm_qseecom_app_send); + + any potential issues with this, only allow validated machines for now. + */ + static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unused = { ++ { .compatible = "dell,xps13-9345" }, + { .compatible = "lenovo,flex-5g" }, + { .compatible = "lenovo,thinkpad-t14s" }, + { .compatible = "lenovo,thinkpad-x13s", }, ++ { .compatible = "lenovo,yoga-slim7x" }, + { .compatible = "microsoft,romulus13", }, + { .compatible = "microsoft,romulus15", }, + { .compatible = "qcom,sc8180x-primus" }, +diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c +index 017c7170eb57c4..620793740c6681 100644 +--- a/drivers/gpio/gpio-grgpio.c ++++ b/drivers/gpio/gpio-grgpio.c +@@ -328,6 +328,7 @@ static const struct irq_domain_ops grgpio_irq_domain_ops = { + static int grgpio_probe(struct platform_device *ofdev) + { + struct device_node *np = ofdev->dev.of_node; ++ struct device *dev = &ofdev->dev; + void __iomem *regs; + struct gpio_chip *gc; + struct grgpio_priv *priv; +@@ -337,7 +338,7 @@ static int grgpio_probe(struct platform_device *ofdev) + int size; + int i; + +- priv = devm_kzalloc(&ofdev->dev, sizeof(*priv), GFP_KERNEL); ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + +@@ -346,28 +347,31 @@ static int grgpio_probe(struct platform_device *ofdev) + return PTR_ERR(regs); + + gc = &priv->gc; +- err = bgpio_init(gc, &ofdev->dev, 4, regs + GRGPIO_DATA, ++ err = bgpio_init(gc, dev, 4, regs + GRGPIO_DATA, + regs + GRGPIO_OUTPUT, NULL, regs + GRGPIO_DIR, NULL, + BGPIOF_BIG_ENDIAN_BYTE_ORDER); + if (err) { +- dev_err(&ofdev->dev, "bgpio_init() failed\n"); ++ dev_err(dev, "bgpio_init() failed\n"); + return err; + } + + priv->regs = regs; + priv->imask = gc->read_reg(regs + GRGPIO_IMASK); +- priv->dev = &ofdev->dev; ++ priv->dev = dev; + + gc->owner = THIS_MODULE; + gc->to_irq = grgpio_to_irq; +- gc->label = devm_kasprintf(&ofdev->dev, GFP_KERNEL, "%pOF", np); ++ gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np); ++ if (!gc->label) ++ return -ENOMEM; ++ + gc->base = -1; + + err = of_property_read_u32(np, "nbits", &prop); + if (err || prop <= 0 || prop > GRGPIO_MAX_NGPIO) { + gc->ngpio = GRGPIO_MAX_NGPIO; +- dev_dbg(&ofdev->dev, +- "No or invalid nbits property: assume %d\n", gc->ngpio); ++ dev_dbg(dev, "No or invalid nbits property: assume %d\n", ++ gc->ngpio); + } else { + gc->ngpio = prop; + } +@@ -379,7 +383,7 @@ static int grgpio_probe(struct platform_device *ofdev) + irqmap = (s32 *)of_get_property(np, "irqmap", &size); + if (irqmap) { + if (size < gc->ngpio) { +- dev_err(&ofdev->dev, ++ dev_err(dev, + "irqmap shorter than ngpio (%d < %d)\n", + size, gc->ngpio); + return -EINVAL; +@@ -389,7 +393,7 @@ static int grgpio_probe(struct platform_device *ofdev) + &grgpio_irq_domain_ops, + priv); + if (!priv->domain) { +- dev_err(&ofdev->dev, "Could not add irq domain\n"); ++ dev_err(dev, "Could not add irq domain\n"); + return -EINVAL; + } + +@@ -419,13 +423,13 @@ static int grgpio_probe(struct platform_device *ofdev) + + err = gpiochip_add_data(gc, priv); + if (err) { +- dev_err(&ofdev->dev, "Could not add gpiochip\n"); ++ dev_err(dev, "Could not add gpiochip\n"); + if (priv->domain) + irq_domain_remove(priv->domain); + return err; + } + +- dev_info(&ofdev->dev, "regs=0x%p, base=%d, ngpio=%d, irqs=%s\n", ++ dev_info(dev, "regs=0x%p, base=%d, ngpio=%d, irqs=%s\n", + priv->regs, gc->base, gc->ngpio, priv->domain ? "on" : "off"); + + return 0; +diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c +index 2b02655abb56ea..44372f8647d51a 100644 +--- a/drivers/gpio/gpiolib.c ++++ b/drivers/gpio/gpiolib.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -713,6 +714,45 @@ bool gpiochip_line_is_valid(const struct gpio_chip *gc, + } + EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); + ++static void gpiod_free_irqs(struct gpio_desc *desc) ++{ ++ int irq = gpiod_to_irq(desc); ++ struct irq_desc *irqd = irq_to_desc(irq); ++ void *cookie; ++ ++ for (;;) { ++ /* ++ * Make sure the action doesn't go away while we're ++ * dereferencing it. Retrieve and store the cookie value. ++ * If the irq is freed after we release the lock, that's ++ * alright - the underlying maple tree lookup will return NULL ++ * and nothing will happen in free_irq(). ++ */ ++ scoped_guard(mutex, &irqd->request_mutex) { ++ if (!irq_desc_has_action(irqd)) ++ return; ++ ++ cookie = irqd->action->dev_id; ++ } ++ ++ free_irq(irq, cookie); ++ } ++} ++ ++/* ++ * The chip is going away but there may be users who had requested interrupts ++ * on its GPIO lines who have no idea about its removal and have no way of ++ * being notified about it. We need to free any interrupts still in use here or ++ * we'll leak memory and resources (like procfs files). ++ */ ++static void gpiochip_free_remaining_irqs(struct gpio_chip *gc) ++{ ++ struct gpio_desc *desc; ++ ++ for_each_gpio_desc_with_flag(gc, desc, FLAG_USED_AS_IRQ) ++ gpiod_free_irqs(desc); ++} ++ + static void gpiodev_release(struct device *dev) + { + struct gpio_device *gdev = to_gpio_device(dev); +@@ -1125,6 +1165,7 @@ void gpiochip_remove(struct gpio_chip *gc) + /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ + gpiochip_sysfs_unregister(gdev); + gpiochip_free_hogs(gc); ++ gpiochip_free_remaining_irqs(gc); + + scoped_guard(mutex, &gpio_devices_lock) + list_del_rcu(&gdev->list); +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +index 7dd55ed57c1d97..b8d4e07d2043ed 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +@@ -800,6 +800,7 @@ int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev, + return -EIO; + } + ++ kfree(info); + return 0; + } + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 1f08cb88d51be5..51904906545e59 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -3666,7 +3666,7 @@ static int amdgpu_device_ip_resume_phase1(struct amdgpu_device *adev) + * + * @adev: amdgpu_device pointer + * +- * First resume function for hardware IPs. The list of all the hardware ++ * Second resume function for hardware IPs. The list of all the hardware + * IPs that make up the asic is walked and the resume callbacks are run for + * all blocks except COMMON, GMC, and IH. resume puts the hardware into a + * functional state after a suspend and updates the software state as +@@ -3684,6 +3684,7 @@ static int amdgpu_device_ip_resume_phase2(struct amdgpu_device *adev) + if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON || + adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC || + adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH || ++ adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_DCE || + adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP) + continue; + r = adev->ip_blocks[i].version->funcs->resume(adev); +@@ -3698,6 +3699,36 @@ static int amdgpu_device_ip_resume_phase2(struct amdgpu_device *adev) + return 0; + } + ++/** ++ * amdgpu_device_ip_resume_phase3 - run resume for hardware IPs ++ * ++ * @adev: amdgpu_device pointer ++ * ++ * Third resume function for hardware IPs. The list of all the hardware ++ * IPs that make up the asic is walked and the resume callbacks are run for ++ * all DCE. resume puts the hardware into a functional state after a suspend ++ * and updates the software state as necessary. This function is also used ++ * for restoring the GPU after a GPU reset. ++ * ++ * Returns 0 on success, negative error code on failure. ++ */ ++static int amdgpu_device_ip_resume_phase3(struct amdgpu_device *adev) ++{ ++ int i, r; ++ ++ for (i = 0; i < adev->num_ip_blocks; i++) { ++ if (!adev->ip_blocks[i].status.valid || adev->ip_blocks[i].status.hw) ++ continue; ++ if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_DCE) { ++ r = adev->ip_blocks[i].version->funcs->resume(adev); ++ if (r) ++ return r; ++ } ++ } ++ ++ return 0; ++} ++ + /** + * amdgpu_device_ip_resume - run resume for hardware IPs + * +@@ -3727,6 +3758,13 @@ static int amdgpu_device_ip_resume(struct amdgpu_device *adev) + if (adev->mman.buffer_funcs_ring->sched.ready) + amdgpu_ttm_set_buffer_funcs_status(adev, true); + ++ if (r) ++ return r; ++ ++ amdgpu_fence_driver_hw_init(adev); ++ ++ r = amdgpu_device_ip_resume_phase3(adev); ++ + return r; + } + +@@ -4809,7 +4847,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) + dev_err(adev->dev, "amdgpu_device_ip_resume failed (%d).\n", r); + goto exit; + } +- amdgpu_fence_driver_hw_init(adev); + + if (!adev->in_s0ix) { + r = amdgpu_amdkfd_resume(adev, adev->in_runpm); +@@ -5431,6 +5468,10 @@ int amdgpu_do_asic_reset(struct list_head *device_list_handle, + if (tmp_adev->mman.buffer_funcs_ring->sched.ready) + amdgpu_ttm_set_buffer_funcs_status(tmp_adev, true); + ++ r = amdgpu_device_ip_resume_phase3(tmp_adev); ++ if (r) ++ goto out; ++ + if (vram_lost) + amdgpu_device_fill_reset_magic(tmp_adev); + +@@ -6344,6 +6385,9 @@ bool amdgpu_device_cache_pci_state(struct pci_dev *pdev) + struct amdgpu_device *adev = drm_to_adev(dev); + int r; + ++ if (amdgpu_sriov_vf(adev)) ++ return false; ++ + r = pci_save_state(pdev); + if (!r) { + kfree(adev->pci_state); +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +index 74adb983ab03e0..9f922ec50ea2dc 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +@@ -812,7 +812,7 @@ static int amdgpu_ttm_tt_pin_userptr(struct ttm_device *bdev, + /* Map SG to device */ + r = dma_map_sgtable(adev->dev, ttm->sg, direction, 0); + if (r) +- goto release_sg; ++ goto release_sg_table; + + /* convert SG to linear array of pages and dma addresses */ + drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, +@@ -820,6 +820,8 @@ static int amdgpu_ttm_tt_pin_userptr(struct ttm_device *bdev, + + return 0; + ++release_sg_table: ++ sg_free_table(ttm->sg); + release_sg: + kfree(ttm->sg); + ttm->sg = NULL; +@@ -1849,6 +1851,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) + + mutex_init(&adev->mman.gtt_window_lock); + ++ dma_set_max_seg_size(adev->dev, UINT_MAX); + /* No others user of address space so set it to 0 */ + r = ttm_device_init(&adev->mman.bdev, &amdgpu_bo_driver, adev->dev, + adev_to_drm(adev)->anon_inode->i_mapping, +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 785a343a95f0ff..e7cd51c95141e1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -2223,6 +2223,18 @@ static int gfx_v9_0_sw_init(void *handle) + } + + switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { ++ case IP_VERSION(9, 4, 2): ++ adev->gfx.cleaner_shader_ptr = gfx_9_4_2_cleaner_shader_hex; ++ adev->gfx.cleaner_shader_size = sizeof(gfx_9_4_2_cleaner_shader_hex); ++ if (adev->gfx.mec_fw_version >= 88) { ++ adev->gfx.enable_cleaner_shader = true; ++ r = amdgpu_gfx_cleaner_shader_sw_init(adev, adev->gfx.cleaner_shader_size); ++ if (r) { ++ adev->gfx.enable_cleaner_shader = false; ++ dev_err(adev->dev, "Failed to initialize cleaner shader\n"); ++ } ++ } ++ break; + default: + adev->gfx.enable_cleaner_shader = false; + break; +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0_cleaner_shader.h b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0_cleaner_shader.h +index 36c0292b511067..0b6bd09b752993 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0_cleaner_shader.h ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0_cleaner_shader.h +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: MIT */ + /* +- * Copyright 2018 Advanced Micro Devices, Inc. ++ * Copyright 2024 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), +@@ -24,3 +24,45 @@ + static const u32 __maybe_unused gfx_9_0_cleaner_shader_hex[] = { + /* Add the cleaner shader code here */ + }; ++ ++/* Define the cleaner shader gfx_9_4_2 */ ++static const u32 gfx_9_4_2_cleaner_shader_hex[] = { ++ 0xbf068100, 0xbf84003b, ++ 0xbf8a0000, 0xb07c0000, ++ 0xbe8200ff, 0x00000078, ++ 0xbf110802, 0x7e000280, ++ 0x7e020280, 0x7e040280, ++ 0x7e060280, 0x7e080280, ++ 0x7e0a0280, 0x7e0c0280, ++ 0x7e0e0280, 0x80828802, ++ 0xbe803202, 0xbf84fff5, ++ 0xbf9c0000, 0xbe8200ff, ++ 0x80000000, 0x86020102, ++ 0xbf840011, 0xbefe00c1, ++ 0xbeff00c1, 0xd28c0001, ++ 0x0001007f, 0xd28d0001, ++ 0x0002027e, 0x10020288, ++ 0xbe8200bf, 0xbefc00c1, ++ 0xd89c2000, 0x00020201, ++ 0xd89c6040, 0x00040401, ++ 0x320202ff, 0x00000400, ++ 0x80828102, 0xbf84fff8, ++ 0xbefc00ff, 0x0000005c, ++ 0xbf800000, 0xbe802c80, ++ 0xbe812c80, 0xbe822c80, ++ 0xbe832c80, 0x80fc847c, ++ 0xbf84fffa, 0xbee60080, ++ 0xbee70080, 0xbeea0180, ++ 0xbeec0180, 0xbeee0180, ++ 0xbef00180, 0xbef20180, ++ 0xbef40180, 0xbef60180, ++ 0xbef80180, 0xbefa0180, ++ 0xbf810000, 0xbf8d0001, ++ 0xbefc00ff, 0x0000005c, ++ 0xbf800000, 0xbe802c80, ++ 0xbe812c80, 0xbe822c80, ++ 0xbe832c80, 0x80fc847c, ++ 0xbf84fffa, 0xbee60080, ++ 0xbee70080, 0xbeea01ff, ++ 0x000000ee, 0xbf810000, ++}; +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2_cleaner_shader.asm b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2_cleaner_shader.asm +new file mode 100644 +index 00000000000000..35b8cf9070bd98 +--- /dev/null ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2_cleaner_shader.asm +@@ -0,0 +1,153 @@ ++/* SPDX-License-Identifier: MIT */ ++/* ++ * Copyright 2024 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++// This shader is to clean LDS, SGPRs and VGPRs. It is first 64 Dwords or 256 bytes of 192 Dwords cleaner shader. ++//To turn this shader program on for complitaion change this to main and lower shader main to main_1 ++ ++// MI200 : Clear SGPRs, VGPRs and LDS ++// Uses two kernels launched separately: ++// 1. Clean VGPRs, LDS, and lower SGPRs ++// Launches one workgroup per CU, each workgroup with 4x wave64 per SIMD in the CU ++// Waves are "wave64" and have 128 VGPRs each, which uses all 512 VGPRs per SIMD ++// Waves in the workgroup share the 64KB of LDS ++// Each wave clears SGPRs 0 - 95. Because there are 4 waves/SIMD, this is physical SGPRs 0-383 ++// Each wave clears 128 VGPRs, so all 512 in the SIMD ++// The first wave of the workgroup clears its 64KB of LDS ++// The shader starts with "S_BARRIER" to ensure SPI has launched all waves of the workgroup ++// before any wave in the workgroup could end. Without this, it is possible not all SGPRs get cleared. ++// 2. Clean remaining SGPRs ++// Launches a workgroup with 24 waves per workgroup, yielding 6 waves per SIMD in each CU ++// Waves are allocating 96 SGPRs ++// CP sets up SPI_RESOURCE_RESERVE_* registers to prevent these waves from allocating SGPRs 0-223. ++// As such, these 6 waves per SIMD are allocated physical SGPRs 224-799 ++// Barriers do not work for >16 waves per workgroup, so we cannot start with S_BARRIER ++// Instead, the shader starts with an S_SETHALT 1. Once all waves are launched CP will send unhalt command ++// The shader then clears all SGPRs allocated to it, cleaning out physical SGPRs 224-799 ++ ++shader main ++ asic(MI200) ++ type(CS) ++ wave_size(64) ++// Note: original source code from SQ team ++ ++// (theorhetical fastest = ~512clks vgpr + 1536 lds + ~128 sgpr = 2176 clks) ++ ++ s_cmp_eq_u32 s0, 1 // Bit0 is set, sgpr0 is set then clear VGPRS and LDS as FW set COMPUTE_USER_DATA_3 ++ s_cbranch_scc0 label_0023 // Clean VGPRs and LDS if sgpr0 of wave is set, scc = (s3 == 1) ++ S_BARRIER ++ ++ s_movk_i32 m0, 0x0000 ++ s_mov_b32 s2, 0x00000078 // Loop 128/8=16 times (loop unrolled for performance) ++ // ++ // CLEAR VGPRs ++ // ++ s_set_gpr_idx_on s2, 0x8 // enable Dest VGPR indexing ++label_0005: ++ v_mov_b32 v0, 0 ++ v_mov_b32 v1, 0 ++ v_mov_b32 v2, 0 ++ v_mov_b32 v3, 0 ++ v_mov_b32 v4, 0 ++ v_mov_b32 v5, 0 ++ v_mov_b32 v6, 0 ++ v_mov_b32 v7, 0 ++ s_sub_u32 s2, s2, 8 ++ s_set_gpr_idx_idx s2 ++ s_cbranch_scc0 label_0005 ++ s_set_gpr_idx_off ++ ++ // ++ // ++ ++ s_mov_b32 s2, 0x80000000 // Bit31 is first_wave ++ s_and_b32 s2, s2, s1 // sgpr0 has tg_size (first_wave) term as in ucode only COMPUTE_PGM_RSRC2.tg_size_en is set ++ s_cbranch_scc0 label_clean_sgpr_1 // Clean LDS if its first wave of ThreadGroup/WorkGroup ++ // CLEAR LDS ++ // ++ s_mov_b32 exec_lo, 0xffffffff ++ s_mov_b32 exec_hi, 0xffffffff ++ v_mbcnt_lo_u32_b32 v1, exec_hi, 0 // Set V1 to thread-ID (0..63) ++ v_mbcnt_hi_u32_b32 v1, exec_lo, v1 // Set V1 to thread-ID (0..63) ++ v_mul_u32_u24 v1, 0x00000008, v1 // * 8, so each thread is a double-dword address (8byte) ++ s_mov_b32 s2, 0x00000003f // 64 loop iterations ++ s_mov_b32 m0, 0xffffffff ++ // Clear all of LDS space ++ // Each FirstWave of WorkGroup clears 64kbyte block ++ ++label_001F: ++ ds_write2_b64 v1, v[2:3], v[2:3] offset1:32 ++ ds_write2_b64 v1, v[4:5], v[4:5] offset0:64 offset1:96 ++ v_add_co_u32 v1, vcc, 0x00000400, v1 ++ s_sub_u32 s2, s2, 1 ++ s_cbranch_scc0 label_001F ++ // ++ // CLEAR SGPRs ++ // ++label_clean_sgpr_1: ++ s_mov_b32 m0, 0x0000005c // Loop 96/4=24 times (loop unrolled for performance) ++ s_nop 0 ++label_sgpr_loop: ++ s_movreld_b32 s0, 0 ++ s_movreld_b32 s1, 0 ++ s_movreld_b32 s2, 0 ++ s_movreld_b32 s3, 0 ++ s_sub_u32 m0, m0, 4 ++ s_cbranch_scc0 label_sgpr_loop ++ ++ //clear vcc, flat scratch ++ s_mov_b32 flat_scratch_lo, 0 //clear flat scratch lo SGPR ++ s_mov_b32 flat_scratch_hi, 0 //clear flat scratch hi SGPR ++ s_mov_b64 vcc, 0 //clear vcc ++ s_mov_b64 ttmp0, 0 //Clear ttmp0 and ttmp1 ++ s_mov_b64 ttmp2, 0 //Clear ttmp2 and ttmp3 ++ s_mov_b64 ttmp4, 0 //Clear ttmp4 and ttmp5 ++ s_mov_b64 ttmp6, 0 //Clear ttmp6 and ttmp7 ++ s_mov_b64 ttmp8, 0 //Clear ttmp8 and ttmp9 ++ s_mov_b64 ttmp10, 0 //Clear ttmp10 and ttmp11 ++ s_mov_b64 ttmp12, 0 //Clear ttmp12 and ttmp13 ++ s_mov_b64 ttmp14, 0 //Clear ttmp14 and ttmp15 ++s_endpgm ++ ++label_0023: ++ ++ s_sethalt 1 ++ ++ s_mov_b32 m0, 0x0000005c // Loop 96/4=24 times (loop unrolled for performance) ++ s_nop 0 ++label_sgpr_loop1: ++ ++ s_movreld_b32 s0, 0 ++ s_movreld_b32 s1, 0 ++ s_movreld_b32 s2, 0 ++ s_movreld_b32 s3, 0 ++ s_sub_u32 m0, m0, 4 ++ s_cbranch_scc0 label_sgpr_loop1 ++ ++ //clear vcc, flat scratch ++ s_mov_b32 flat_scratch_lo, 0 //clear flat scratch lo SGPR ++ s_mov_b32 flat_scratch_hi, 0 //clear flat scratch hi SGPR ++ s_mov_b64 vcc, 0xee //clear vcc ++ ++s_endpgm ++end ++ +diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c +index e019249883fb2f..194026e9be3331 100644 +--- a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c +@@ -40,10 +40,12 @@ + static void hdp_v4_0_flush_hdp(struct amdgpu_device *adev, + struct amdgpu_ring *ring) + { +- if (!ring || !ring->funcs->emit_wreg) ++ if (!ring || !ring->funcs->emit_wreg) { + WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); +- else ++ RREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2); ++ } else { + amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); ++ } + } + + static void hdp_v4_0_invalidate_hdp(struct amdgpu_device *adev, +@@ -54,11 +56,13 @@ static void hdp_v4_0_invalidate_hdp(struct amdgpu_device *adev, + amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 5)) + return; + +- if (!ring || !ring->funcs->emit_wreg) ++ if (!ring || !ring->funcs->emit_wreg) { + WREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE, 1); +- else ++ RREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE); ++ } else { + amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( + HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1); ++ } + } + + static void hdp_v4_0_query_ras_error_count(struct amdgpu_device *adev, +diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c +index ed7facacf2fe30..d3962d46908811 100644 +--- a/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c +@@ -31,10 +31,12 @@ + static void hdp_v5_0_flush_hdp(struct amdgpu_device *adev, + struct amdgpu_ring *ring) + { +- if (!ring || !ring->funcs->emit_wreg) ++ if (!ring || !ring->funcs->emit_wreg) { + WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); +- else ++ RREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2); ++ } else { + amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); ++ } + } + + static void hdp_v5_0_invalidate_hdp(struct amdgpu_device *adev, +@@ -42,6 +44,7 @@ static void hdp_v5_0_invalidate_hdp(struct amdgpu_device *adev, + { + if (!ring || !ring->funcs->emit_wreg) { + WREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE, 1); ++ RREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE); + } else { + amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( + HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1); +diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c b/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c +index 29c3484ae1f166..f52552c5fa27b6 100644 +--- a/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c ++++ b/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c +@@ -31,13 +31,15 @@ + static void hdp_v5_2_flush_hdp(struct amdgpu_device *adev, + struct amdgpu_ring *ring) + { +- if (!ring || !ring->funcs->emit_wreg) ++ if (!ring || !ring->funcs->emit_wreg) { + WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, + 0); +- else ++ RREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2); ++ } else { + amdgpu_ring_emit_wreg(ring, + (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, + 0); ++ } + } + + static void hdp_v5_2_update_mem_power_gating(struct amdgpu_device *adev, +diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c +index 33736d361dd0bc..6948fe9956ce47 100644 +--- a/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c +@@ -34,10 +34,12 @@ + static void hdp_v6_0_flush_hdp(struct amdgpu_device *adev, + struct amdgpu_ring *ring) + { +- if (!ring || !ring->funcs->emit_wreg) ++ if (!ring || !ring->funcs->emit_wreg) { + WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); +- else ++ RREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2); ++ } else { + amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); ++ } + } + + static void hdp_v6_0_update_clock_gating(struct amdgpu_device *adev, +diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c +index 1c99bb09e2a129..63820329f67eb6 100644 +--- a/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c +@@ -31,10 +31,12 @@ + static void hdp_v7_0_flush_hdp(struct amdgpu_device *adev, + struct amdgpu_ring *ring) + { +- if (!ring || !ring->funcs->emit_wreg) ++ if (!ring || !ring->funcs->emit_wreg) { + WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); +- else ++ RREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2); ++ } else { + amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); ++ } + } + + static void hdp_v7_0_update_clock_gating(struct amdgpu_device *adev, +diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c +index 0fda703363004f..6fca2915ea8fd5 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c ++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c +@@ -116,6 +116,20 @@ static int vcn_v4_0_3_early_init(void *handle) + return amdgpu_vcn_early_init(adev); + } + ++static int vcn_v4_0_3_fw_shared_init(struct amdgpu_device *adev, int inst_idx) ++{ ++ struct amdgpu_vcn4_fw_shared *fw_shared; ++ ++ fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; ++ fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); ++ fw_shared->sq.is_enabled = 1; ++ ++ if (amdgpu_vcnfw_log) ++ amdgpu_vcn_fwlog_init(&adev->vcn.inst[inst_idx]); ++ ++ return 0; ++} ++ + /** + * vcn_v4_0_3_sw_init - sw init for VCN block + * +@@ -148,8 +162,6 @@ static int vcn_v4_0_3_sw_init(void *handle) + return r; + + for (i = 0; i < adev->vcn.num_vcn_inst; i++) { +- volatile struct amdgpu_vcn4_fw_shared *fw_shared; +- + vcn_inst = GET_INST(VCN, i); + + ring = &adev->vcn.inst[i].ring_enc[0]; +@@ -172,12 +184,7 @@ static int vcn_v4_0_3_sw_init(void *handle) + if (r) + return r; + +- fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; +- fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); +- fw_shared->sq.is_enabled = true; +- +- if (amdgpu_vcnfw_log) +- amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]); ++ vcn_v4_0_3_fw_shared_init(adev, i); + } + + if (amdgpu_sriov_vf(adev)) { +@@ -273,6 +280,8 @@ static int vcn_v4_0_3_hw_init(void *handle) + } + } else { + for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { ++ struct amdgpu_vcn4_fw_shared *fw_shared; ++ + vcn_inst = GET_INST(VCN, i); + ring = &adev->vcn.inst[i].ring_enc[0]; + +@@ -296,6 +305,11 @@ static int vcn_v4_0_3_hw_init(void *handle) + regVCN_RB1_DB_CTRL); + } + ++ /* Re-init fw_shared when RAS fatal error occurred */ ++ fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; ++ if (!fw_shared->sq.is_enabled) ++ vcn_v4_0_3_fw_shared_init(adev, i); ++ + r = amdgpu_ring_test_helper(ring); + if (r) + return r; +diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c +index ac439f0565e357..16f5561fb86ec5 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c ++++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c +@@ -114,6 +114,33 @@ static int vega20_ih_toggle_ring_interrupts(struct amdgpu_device *adev, + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_ENABLE, (enable ? 1 : 0)); + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_GPU_TS_ENABLE, 1); + ++ if (enable) { ++ /* Unset the CLEAR_OVERFLOW bit to make sure the next step ++ * is switching the bit from 0 to 1 ++ */ ++ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0); ++ if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { ++ if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) ++ return -ETIMEDOUT; ++ } else { ++ WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp); ++ } ++ ++ /* Clear RB_OVERFLOW bit */ ++ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); ++ if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { ++ if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) ++ return -ETIMEDOUT; ++ } else { ++ WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp); ++ } ++ ++ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows ++ * can be detected. ++ */ ++ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0); ++ } ++ + /* enable_intr field is only valid in ring0 */ + if (ih == &adev->irq.ih) + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, ENABLE_INTR, (enable ? 1 : 0)); +diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c +index 48caecf7e72ed1..8de61cc524c943 100644 +--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c ++++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c +@@ -1509,6 +1509,8 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, + if (adev->gfx.config.gc_tcp_size_per_cu) { + pcache_info[i].cache_size = adev->gfx.config.gc_tcp_size_per_cu; + pcache_info[i].cache_level = 1; ++ /* Cacheline size not available in IP discovery for gc943,gc944 */ ++ pcache_info[i].cache_line_size = 128; + pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED | + CRAT_CACHE_FLAGS_DATA_CACHE | + CRAT_CACHE_FLAGS_SIMD_CACHE); +@@ -1520,6 +1522,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, + pcache_info[i].cache_size = + adev->gfx.config.gc_l1_instruction_cache_size_per_sqc; + pcache_info[i].cache_level = 1; ++ pcache_info[i].cache_line_size = 64; + pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED | + CRAT_CACHE_FLAGS_INST_CACHE | + CRAT_CACHE_FLAGS_SIMD_CACHE); +@@ -1530,6 +1533,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, + if (adev->gfx.config.gc_l1_data_cache_size_per_sqc) { + pcache_info[i].cache_size = adev->gfx.config.gc_l1_data_cache_size_per_sqc; + pcache_info[i].cache_level = 1; ++ pcache_info[i].cache_line_size = 64; + pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED | + CRAT_CACHE_FLAGS_DATA_CACHE | + CRAT_CACHE_FLAGS_SIMD_CACHE); +@@ -1540,6 +1544,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, + if (adev->gfx.config.gc_tcc_size) { + pcache_info[i].cache_size = adev->gfx.config.gc_tcc_size; + pcache_info[i].cache_level = 2; ++ pcache_info[i].cache_line_size = 128; + pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED | + CRAT_CACHE_FLAGS_DATA_CACHE | + CRAT_CACHE_FLAGS_SIMD_CACHE); +@@ -1550,6 +1555,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev, + if (adev->gmc.mall_size) { + pcache_info[i].cache_size = adev->gmc.mall_size / 1024; + pcache_info[i].cache_level = 3; ++ pcache_info[i].cache_line_size = 64; + pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED | + CRAT_CACHE_FLAGS_DATA_CACHE | + CRAT_CACHE_FLAGS_SIMD_CACHE); +diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c +index fad1c8f2bc8334..b05be24531e187 100644 +--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c ++++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c +@@ -235,6 +235,9 @@ static void kfd_device_info_init(struct kfd_dev *kfd, + */ + kfd->device_info.needs_pci_atomics = true; + kfd->device_info.no_atomic_fw_version = kfd->adev->gfx.rs64_enable ? 509 : 0; ++ } else if (gc_version < IP_VERSION(13, 0, 0)) { ++ kfd->device_info.needs_pci_atomics = true; ++ kfd->device_info.no_atomic_fw_version = 2090; + } else { + kfd->device_info.needs_pci_atomics = true; + } +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 24fbde7dd1c425..ad3a3aa72b51f3 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -1910,7 +1910,11 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) + else + init_data.flags.gpu_vm_support = (amdgpu_sg_display != 0); + } else { +- init_data.flags.gpu_vm_support = (amdgpu_sg_display != 0) && (adev->flags & AMD_IS_APU); ++ if (amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(2, 0, 3)) ++ init_data.flags.gpu_vm_support = (amdgpu_sg_display == 1); ++ else ++ init_data.flags.gpu_vm_support = ++ (amdgpu_sg_display != 0) && (adev->flags & AMD_IS_APU); + } + + adev->mode_info.gpu_vm_support = init_data.flags.gpu_vm_support; +@@ -7337,10 +7341,15 @@ create_validate_stream_for_sink(struct amdgpu_dm_connector *aconnector, + const struct drm_connector_state *drm_state = dm_state ? &dm_state->base : NULL; + int requested_bpc = drm_state ? drm_state->max_requested_bpc : 8; + enum dc_status dc_result = DC_OK; ++ uint8_t bpc_limit = 6; + + if (!dm_state) + return NULL; + ++ if (aconnector->dc_link->connector_signal == SIGNAL_TYPE_HDMI_TYPE_A || ++ aconnector->dc_link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) ++ bpc_limit = 8; ++ + do { + stream = create_stream_for_sink(connector, drm_mode, + dm_state, old_stream, +@@ -7361,11 +7370,12 @@ create_validate_stream_for_sink(struct amdgpu_dm_connector *aconnector, + dc_result = dm_validate_stream_and_context(adev->dm.dc, stream); + + if (dc_result != DC_OK) { +- DRM_DEBUG_KMS("Mode %dx%d (clk %d) failed DC validation with error %d (%s)\n", ++ DRM_DEBUG_KMS("Mode %dx%d (clk %d) pixel_encoding:%s color_depth:%s failed validation -- %s\n", + drm_mode->hdisplay, + drm_mode->vdisplay, + drm_mode->clock, +- dc_result, ++ dc_pixel_encoding_to_str(stream->timing.pixel_encoding), ++ dc_color_depth_to_str(stream->timing.display_color_depth), + dc_status_to_str(dc_result)); + + dc_stream_release(stream); +@@ -7373,10 +7383,13 @@ create_validate_stream_for_sink(struct amdgpu_dm_connector *aconnector, + requested_bpc -= 2; /* lower bpc to retry validation */ + } + +- } while (stream == NULL && requested_bpc >= 6); ++ } while (stream == NULL && requested_bpc >= bpc_limit); + +- if (dc_result == DC_FAIL_ENC_VALIDATE && !aconnector->force_yuv420_output) { +- DRM_DEBUG_KMS("Retry forcing YCbCr420 encoding\n"); ++ if ((dc_result == DC_FAIL_ENC_VALIDATE || ++ dc_result == DC_EXCEED_DONGLE_CAP) && ++ !aconnector->force_yuv420_output) { ++ DRM_DEBUG_KMS("%s:%d Retry forcing yuv420 encoding\n", ++ __func__, __LINE__); + + aconnector->force_yuv420_output = true; + stream = create_validate_stream_for_sink(aconnector, drm_mode, +diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c +index b46a3afe48ca7c..3bd0d46c170109 100644 +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c +@@ -132,6 +132,8 @@ static void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state * + for (i = 0; i < dc->res_pool->pipe_count; ++i) { + struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i]; + struct pipe_ctx *new_pipe = &context->res_ctx.pipe_ctx[i]; ++ struct clk_mgr_internal *clk_mgr_internal = TO_CLK_MGR_INTERNAL(clk_mgr_base); ++ struct dccg *dccg = clk_mgr_internal->dccg; + struct pipe_ctx *pipe = safe_to_lower + ? &context->res_ctx.pipe_ctx[i] + : &dc->current_state->res_ctx.pipe_ctx[i]; +@@ -148,8 +150,13 @@ static void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state * + new_pipe->stream_res.stream_enc && + new_pipe->stream_res.stream_enc->funcs->is_fifo_enabled && + new_pipe->stream_res.stream_enc->funcs->is_fifo_enabled(new_pipe->stream_res.stream_enc); +- if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) || +- !pipe->stream->link_enc) && !stream_changed_otg_dig_on) { ++ bool has_active_hpo = dccg->ctx->dc->link_srv->dp_is_128b_132b_signal(old_pipe) && dccg->ctx->dc->link_srv->dp_is_128b_132b_signal(new_pipe); ++ ++ if (!has_active_hpo && !dccg->ctx->dc->link_srv->dp_is_128b_132b_signal(pipe) && ++ (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) || ++ !pipe->stream->link_enc) && !stream_changed_otg_dig_on)) { ++ ++ + /* This w/a should not trigger when we have a dig active */ + if (disable) { + if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc) +@@ -257,11 +264,11 @@ static void dcn35_notify_host_router_bw(struct clk_mgr *clk_mgr_base, struct dc_ + struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); + uint32_t host_router_bw_kbps[MAX_HOST_ROUTERS_NUM] = { 0 }; + int i; +- + for (i = 0; i < context->stream_count; ++i) { + const struct dc_stream_state *stream = context->streams[i]; + const struct dc_link *link = stream->link; +- uint8_t lowest_dpia_index = 0, hr_index = 0; ++ uint8_t lowest_dpia_index = 0; ++ unsigned int hr_index = 0; + + if (!link) + continue; +@@ -271,6 +278,8 @@ static void dcn35_notify_host_router_bw(struct clk_mgr *clk_mgr_base, struct dc_ + continue; + + hr_index = (link->link_index - lowest_dpia_index) / 2; ++ if (hr_index >= MAX_HOST_ROUTERS_NUM) ++ continue; + host_router_bw_kbps[hr_index] += dc_bandwidth_in_kbps_from_timing( + &stream->timing, dc_link_get_highest_encoding_format(link)); + } +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c +index a6911bb2cf0c6c..9f570d447c2099 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c +@@ -6006,3 +6006,21 @@ struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state + + return profile; + } ++ ++/* ++ ********************************************************************************** ++ * dc_get_det_buffer_size_from_state() - extracts detile buffer size from dc state ++ * ++ * Called when DM wants to log detile buffer size from dc_state ++ * ++ ********************************************************************************** ++ */ ++unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context) ++{ ++ struct dc *dc = context->clk_mgr->ctx->dc; ++ ++ if (dc->res_pool->funcs->get_det_buffer_size) ++ return dc->res_pool->funcs->get_det_buffer_size(context); ++ else ++ return 0; ++} +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c +index 801cdbc8117d9b..e255c204b7e855 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c +@@ -434,3 +434,43 @@ char *dc_status_to_str(enum dc_status status) + + return "Unexpected status error"; + } ++ ++char *dc_pixel_encoding_to_str(enum dc_pixel_encoding pixel_encoding) ++{ ++ switch (pixel_encoding) { ++ case PIXEL_ENCODING_RGB: ++ return "RGB"; ++ case PIXEL_ENCODING_YCBCR422: ++ return "YUV422"; ++ case PIXEL_ENCODING_YCBCR444: ++ return "YUV444"; ++ case PIXEL_ENCODING_YCBCR420: ++ return "YUV420"; ++ default: ++ return "Unknown"; ++ } ++} ++ ++char *dc_color_depth_to_str(enum dc_color_depth color_depth) ++{ ++ switch (color_depth) { ++ case COLOR_DEPTH_666: ++ return "6-bpc"; ++ case COLOR_DEPTH_888: ++ return "8-bpc"; ++ case COLOR_DEPTH_101010: ++ return "10-bpc"; ++ case COLOR_DEPTH_121212: ++ return "12-bpc"; ++ case COLOR_DEPTH_141414: ++ return "14-bpc"; ++ case COLOR_DEPTH_161616: ++ return "16-bpc"; ++ case COLOR_DEPTH_999: ++ return "9-bpc"; ++ case COLOR_DEPTH_111111: ++ return "11-bpc"; ++ default: ++ return "Unknown"; ++ } ++} +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +index c7599c40d4be38..d915020a429582 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +@@ -765,25 +765,6 @@ static inline void get_vp_scan_direction( + *flip_horz_scan_dir = !*flip_horz_scan_dir; + } + +-/* +- * This is a preliminary vp size calculation to allow us to check taps support. +- * The result is completely overridden afterwards. +- */ +-static void calculate_viewport_size(struct pipe_ctx *pipe_ctx) +-{ +- struct scaler_data *data = &pipe_ctx->plane_res.scl_data; +- +- data->viewport.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz, data->recout.width)); +- data->viewport.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert, data->recout.height)); +- data->viewport_c.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz_c, data->recout.width)); +- data->viewport_c.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert_c, data->recout.height)); +- if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 || +- pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) { +- swap(data->viewport.width, data->viewport.height); +- swap(data->viewport_c.width, data->viewport_c.height); +- } +-} +- + static struct rect intersect_rec(const struct rect *r0, const struct rect *r1) + { + struct rect rec; +@@ -1468,6 +1449,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) + const struct dc_plane_state *plane_state = pipe_ctx->plane_state; + struct dc_crtc_timing *timing = &pipe_ctx->stream->timing; + const struct rect odm_slice_src = resource_get_odm_slice_src_rect(pipe_ctx); ++ struct scaling_taps temp = {0}; + bool res = false; + + DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger); +@@ -1519,14 +1501,16 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) + res = spl_calculate_scaler_params(spl_in, spl_out); + // Convert respective out params from SPL to scaler data + translate_SPL_out_params_to_pipe_ctx(pipe_ctx, spl_out); ++ ++ /* Ignore scaler failure if pipe context plane is phantom plane */ ++ if (!res && plane_state->is_phantom) ++ res = true; + } else { + #endif + /* depends on h_active */ + calculate_recout(pipe_ctx); + /* depends on pixel format */ + calculate_scaling_ratios(pipe_ctx); +- /* depends on scaling ratios and recout, does not calculate offset yet */ +- calculate_viewport_size(pipe_ctx); + + /* + * LB calculations depend on vp size, h/v_active and scaling ratios +@@ -1547,6 +1531,24 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) + + pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha; + ++ // get TAP value with 100x100 dummy data for max scaling qualify, override ++ // if a new scaling quality required ++ pipe_ctx->plane_res.scl_data.viewport.width = 100; ++ pipe_ctx->plane_res.scl_data.viewport.height = 100; ++ pipe_ctx->plane_res.scl_data.viewport_c.width = 100; ++ pipe_ctx->plane_res.scl_data.viewport_c.height = 100; ++ if (pipe_ctx->plane_res.xfm != NULL) ++ res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps( ++ pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); ++ ++ if (pipe_ctx->plane_res.dpp != NULL) ++ res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps( ++ pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); ++ ++ temp = pipe_ctx->plane_res.scl_data.taps; ++ ++ calculate_inits_and_viewports(pipe_ctx); ++ + if (pipe_ctx->plane_res.xfm != NULL) + res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps( + pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); +@@ -1573,11 +1575,14 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) + &plane_state->scaling_quality); + } + +- /* +- * Depends on recout, scaling ratios, h_active and taps +- * May need to re-check lb size after this in some obscure scenario +- */ +- if (res) ++ /* Ignore scaler failure if pipe context plane is phantom plane */ ++ if (!res && plane_state->is_phantom) ++ res = true; ++ ++ if (res && (pipe_ctx->plane_res.scl_data.taps.v_taps != temp.v_taps || ++ pipe_ctx->plane_res.scl_data.taps.h_taps != temp.h_taps || ++ pipe_ctx->plane_res.scl_data.taps.v_taps_c != temp.v_taps_c || ++ pipe_ctx->plane_res.scl_data.taps.h_taps_c != temp.h_taps_c)) + calculate_inits_and_viewports(pipe_ctx); + + /* +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +index 9a406d74c0dd76..3d93efdc1026dd 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +@@ -819,12 +819,12 @@ void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream) + stream->dst.height, + stream->output_color_space); + DC_LOG_DC( +- "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n", ++ "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixel_encoding:%s, color_depth:%s\n", + stream->timing.pix_clk_100hz / 10, + stream->timing.h_total, + stream->timing.v_total, +- stream->timing.pixel_encoding, +- stream->timing.display_color_depth); ++ dc_pixel_encoding_to_str(stream->timing.pixel_encoding), ++ dc_color_depth_to_str(stream->timing.display_color_depth)); + DC_LOG_DC( + "\tlink: %d\n", + stream->link->link_index); +diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h +index 3992ad73165bc6..7c163aa7e8bd2d 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc.h ++++ b/drivers/gpu/drm/amd/display/dc/dc.h +@@ -285,6 +285,7 @@ struct dc_caps { + uint16_t subvp_vertical_int_margin_us; + bool seamless_odm; + uint32_t max_v_total; ++ bool vtotal_limited_by_fp2; + uint32_t max_disp_clock_khz_at_vmin; + uint8_t subvp_drr_vblank_start_margin_us; + bool cursor_not_scaled; +@@ -2543,6 +2544,8 @@ struct dc_power_profile { + + struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context); + ++unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context); ++ + /* DSC Interfaces */ + #include "dc_dsc.h" + +diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c +index 1e7de0f03290a3..ec5009f411eb0d 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c ++++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c +@@ -1294,6 +1294,8 @@ static void dc_dmub_srv_notify_idle(const struct dc *dc, bool allow_idle) + + memset(&new_signals, 0, sizeof(new_signals)); + ++ new_signals.bits.allow_idle = 1; /* always set */ ++ + if (dc->config.disable_ips == DMUB_IPS_ENABLE || + dc->config.disable_ips == DMUB_IPS_DISABLE_DYNAMIC) { + new_signals.bits.allow_pg = 1; +@@ -1389,7 +1391,7 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc) + */ + dc_dmub_srv->needs_idle_wake = false; + +- if (prev_driver_signals.bits.allow_ips2 && ++ if ((prev_driver_signals.bits.allow_ips2 || prev_driver_signals.all == 0) && + (!dc->debug.optimize_ips_handshake || + ips_fw->signals.bits.ips2_commit || !ips_fw->signals.bits.in_idle)) { + DC_LOG_IPS( +@@ -1450,7 +1452,7 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc) + } + + dc_dmub_srv_notify_idle(dc, false); +- if (prev_driver_signals.bits.allow_ips1) { ++ if (prev_driver_signals.bits.allow_ips1 || prev_driver_signals.all == 0) { + DC_LOG_IPS( + "wait for IPS1 commit clear (ips1_commit=%u ips2_commit=%u)", + ips_fw->signals.bits.ips1_commit, +diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c +index 5b343f745cf333..ae81451a3a725c 100644 +--- a/drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c ++++ b/drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c +@@ -83,6 +83,15 @@ void enc314_disable_fifo(struct stream_encoder *enc) + REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_ENABLE, 0); + } + ++static bool enc314_is_fifo_enabled(struct stream_encoder *enc) ++{ ++ struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); ++ uint32_t reset_val; ++ ++ REG_GET(DIG_FIFO_CTRL0, DIG_FIFO_ENABLE, &reset_val); ++ return (reset_val != 0); ++} ++ + void enc314_dp_set_odm_combine( + struct stream_encoder *enc, + bool odm_combine) +@@ -468,6 +477,7 @@ static const struct stream_encoder_funcs dcn314_str_enc_funcs = { + + .enable_fifo = enc314_enable_fifo, + .disable_fifo = enc314_disable_fifo, ++ .is_fifo_enabled = enc314_is_fifo_enabled, + .set_input_mode = enc314_set_dig_input_mode, + }; + +diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c +index d851c081e3768a..8dabb1ac0b684d 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c ++++ b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c +@@ -1222,6 +1222,7 @@ static dml_bool_t CalculatePrefetchSchedule(struct display_mode_lib_scratch_st * + s->dst_y_prefetch_oto = s->Tvm_oto_lines + 2 * s->Tr0_oto_lines + s->Lsw_oto; + + s->dst_y_prefetch_equ = p->VStartup - (*p->TSetup + dml_max(p->TWait + p->TCalc, *p->Tdmdl)) / s->LineTime - (*p->DSTYAfterScaler + (dml_float_t) *p->DSTXAfterScaler / (dml_float_t)p->myPipe->HTotal); ++ s->dst_y_prefetch_equ = dml_min(s->dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH + + #ifdef __DML_VBA_DEBUG__ + dml_print("DML::%s: HTotal = %u\n", __func__, p->myPipe->HTotal); +diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c +index 8697eac1e1f7e1..8dee0d397e0322 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c ++++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c +@@ -339,11 +339,22 @@ void dml21_apply_soc_bb_overrides(struct dml2_initialize_instance_in_out *dml_in + // } + } + ++static unsigned int calc_max_hardware_v_total(const struct dc_stream_state *stream) ++{ ++ unsigned int max_hw_v_total = stream->ctx->dc->caps.max_v_total; ++ ++ if (stream->ctx->dc->caps.vtotal_limited_by_fp2) { ++ max_hw_v_total -= stream->timing.v_front_porch + 1; ++ } ++ ++ return max_hw_v_total; ++} ++ + static void populate_dml21_timing_config_from_stream_state(struct dml2_timing_cfg *timing, + struct dc_stream_state *stream, + struct dml2_context *dml_ctx) + { +- unsigned int hblank_start, vblank_start; ++ unsigned int hblank_start, vblank_start, min_hardware_refresh_in_uhz; + + timing->h_active = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right; + timing->v_active = stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.v_border_top; +@@ -371,11 +382,23 @@ static void populate_dml21_timing_config_from_stream_state(struct dml2_timing_cf + - stream->timing.v_border_top - stream->timing.v_border_bottom; + + timing->drr_config.enabled = stream->ignore_msa_timing_param; +- timing->drr_config.min_refresh_uhz = stream->timing.min_refresh_in_uhz; + timing->drr_config.drr_active_variable = stream->vrr_active_variable; + timing->drr_config.drr_active_fixed = stream->vrr_active_fixed; + timing->drr_config.disallowed = !stream->allow_freesync; + ++ /* limit min refresh rate to DC cap */ ++ min_hardware_refresh_in_uhz = stream->timing.min_refresh_in_uhz; ++ if (stream->ctx->dc->caps.max_v_total != 0) { ++ min_hardware_refresh_in_uhz = div64_u64((stream->timing.pix_clk_100hz * 100000000ULL), ++ (stream->timing.h_total * (long long)calc_max_hardware_v_total(stream))); ++ } ++ ++ if (stream->timing.min_refresh_in_uhz > min_hardware_refresh_in_uhz) { ++ timing->drr_config.min_refresh_uhz = stream->timing.min_refresh_in_uhz; ++ } else { ++ timing->drr_config.min_refresh_uhz = min_hardware_refresh_in_uhz; ++ } ++ + if (dml_ctx->config.callbacks.get_max_flickerless_instant_vtotal_increase && + stream->ctx->dc->config.enable_fpo_flicker_detection == 1) + timing->drr_config.max_instant_vtotal_delta = dml_ctx->config.callbacks.get_max_flickerless_instant_vtotal_increase(stream, false); +@@ -859,7 +882,7 @@ static void populate_dml21_plane_config_from_plane_state(struct dml2_context *dm + plane->immediate_flip = plane_state->flip_immediate; + + plane->composition.rect_out_height_spans_vactive = +- plane_state->dst_rect.height >= stream->timing.v_addressable && ++ plane_state->dst_rect.height >= stream->src.height && + stream->dst.height >= stream->timing.v_addressable; + } + +diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c +index 4e93eeedfc1bbd..efcc1a6b364c27 100644 +--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c ++++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c +@@ -355,6 +355,20 @@ void dcn314_calculate_pix_rate_divider( + } + } + ++static bool dcn314_is_pipe_dig_fifo_on(struct pipe_ctx *pipe) ++{ ++ return pipe && pipe->stream ++ // Check dig's otg instance. ++ && pipe->stream_res.stream_enc ++ && pipe->stream_res.stream_enc->funcs->dig_source_otg ++ && pipe->stream_res.tg->inst == pipe->stream_res.stream_enc->funcs->dig_source_otg(pipe->stream_res.stream_enc) ++ && pipe->stream->link && pipe->stream->link->link_enc ++ && pipe->stream->link->link_enc->funcs->is_dig_enabled ++ && pipe->stream->link->link_enc->funcs->is_dig_enabled(pipe->stream->link->link_enc) ++ && pipe->stream_res.stream_enc->funcs->is_fifo_enabled ++ && pipe->stream_res.stream_enc->funcs->is_fifo_enabled(pipe->stream_res.stream_enc); ++} ++ + void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, unsigned int current_pipe_idx) + { + unsigned int i; +@@ -371,7 +385,11 @@ void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc + if (pipe->top_pipe || pipe->prev_odm_pipe) + continue; + +- if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) { ++ if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal)) && ++ !pipe->stream->apply_seamless_boot_optimization && ++ !pipe->stream->apply_edp_fast_boot_optimization) { ++ if (dcn314_is_pipe_dig_fifo_on(pipe)) ++ continue; + pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg); + reset_sync_context_for_pipe(dc, context, i); + otg_disabled[i] = true; +diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_status.h b/drivers/gpu/drm/amd/display/dc/inc/core_status.h +index fa5edd03d00439..b5afd8c3103dba 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/core_status.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/core_status.h +@@ -60,5 +60,7 @@ enum dc_status { + }; + + char *dc_status_to_str(enum dc_status status); ++char *dc_pixel_encoding_to_str(enum dc_pixel_encoding pixel_encoding); ++char *dc_color_depth_to_str(enum dc_color_depth color_depth); + + #endif /* _CORE_STATUS_H_ */ +diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +index bfb8b8502d2026..e1e3142cdc00ac 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +@@ -215,6 +215,7 @@ struct resource_funcs { + + void (*get_panel_config_defaults)(struct dc_panel_config *panel_config); + void (*build_pipe_pix_clk_params)(struct pipe_ctx *pipe_ctx); ++ unsigned int (*get_det_buffer_size)(const struct dc_state *context); + }; + + struct audio_support{ +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c +index eea2b3b307cd5f..45e4de8d5cff8d 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c +@@ -1511,6 +1511,7 @@ bool dcn20_split_stream_for_odm( + + if (prev_odm_pipe->plane_state) { + struct scaler_data *sd = &prev_odm_pipe->plane_res.scl_data; ++ struct output_pixel_processor *opp = next_odm_pipe->stream_res.opp; + int new_width; + + /* HACTIVE halved for odm combine */ +@@ -1544,7 +1545,28 @@ bool dcn20_split_stream_for_odm( + sd->viewport_c.x += dc_fixpt_floor(dc_fixpt_mul_int( + sd->ratios.horz_c, sd->h_active - sd->recout.x)); + sd->recout.x = 0; ++ ++ /* ++ * When odm is used in YcbCr422 or 420 colour space, a split screen ++ * will be seen with the previous calculations since the extra left ++ * edge pixel is accounted for in fmt but not in viewport. ++ * ++ * Below are calculations which fix the split by fixing the calculations ++ * if there is an extra left edge pixel. ++ */ ++ if (opp && opp->funcs->opp_get_left_edge_extra_pixel_count ++ && opp->funcs->opp_get_left_edge_extra_pixel_count( ++ opp, next_odm_pipe->stream->timing.pixel_encoding, ++ resource_is_pipe_type(next_odm_pipe, OTG_MASTER)) == 1) { ++ sd->h_active += 1; ++ sd->recout.width += 1; ++ sd->viewport.x -= dc_fixpt_ceil(dc_fixpt_mul_int(sd->ratios.horz, 1)); ++ sd->viewport_c.x -= dc_fixpt_ceil(dc_fixpt_mul_int(sd->ratios.horz, 1)); ++ sd->viewport_c.width += dc_fixpt_ceil(dc_fixpt_mul_int(sd->ratios.horz, 1)); ++ sd->viewport.width += dc_fixpt_ceil(dc_fixpt_mul_int(sd->ratios.horz, 1)); ++ } + } ++ + if (!next_odm_pipe->top_pipe) + next_odm_pipe->stream_res.opp = pool->opps[next_odm_pipe->pipe_idx]; + else +@@ -2133,6 +2155,7 @@ bool dcn20_fast_validate_bw( + ASSERT(0); + } + } ++ + /* Actual dsc count per stream dsc validation*/ + if (!dcn20_validate_dsc(dc, context)) { + context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states] = +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c +index 347e6aaea582fb..14b28841657d21 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c +@@ -1298,7 +1298,7 @@ static struct link_encoder *dcn21_link_encoder_create( + kzalloc(sizeof(struct dcn21_link_encoder), GFP_KERNEL); + int link_regs_id; + +- if (!enc21) ++ if (!enc21 || enc_init_data->hpd_source >= ARRAY_SIZE(link_enc_hpd_regs)) + return NULL; + + link_regs_id = +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c +index 5040a4c6ed1862..75cc84473a577e 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c +@@ -2354,6 +2354,7 @@ static bool dcn30_resource_construct( + + dc->caps.dp_hdmi21_pcon_support = true; + dc->caps.max_v_total = (1 << 15) - 1; ++ dc->caps.vtotal_limited_by_fp2 = true; + + /* read VBIOS LTTPR caps */ + { +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c +index 5791b5cc287529..320b040d591d1e 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c +@@ -1234,6 +1234,7 @@ static bool dcn302_resource_construct( + dc->caps.extended_aux_timeout_support = true; + dc->caps.dmcub_support = true; + dc->caps.max_v_total = (1 << 15) - 1; ++ dc->caps.vtotal_limited_by_fp2 = true; + + /* Color pipeline capabilities */ + dc->caps.color.dpp.dcn_arch = 1; +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c +index 63f0f882c8610c..297cf4b5600dae 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c +@@ -1179,6 +1179,7 @@ static bool dcn303_resource_construct( + dc->caps.extended_aux_timeout_support = true; + dc->caps.dmcub_support = true; + dc->caps.max_v_total = (1 << 15) - 1; ++ dc->caps.vtotal_limited_by_fp2 = true; + + /* Color pipeline capabilities */ + dc->caps.color.dpp.dcn_arch = 1; +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c +index ac8cb20e2e3b64..80386f698ae4de 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c +@@ -1721,6 +1721,12 @@ int dcn31_populate_dml_pipes_from_context( + return pipe_cnt; + } + ++unsigned int dcn31_get_det_buffer_size( ++ const struct dc_state *context) ++{ ++ return context->bw_ctx.dml.ip.det_buffer_size_kbytes; ++} ++ + void dcn31_calculate_wm_and_dlg( + struct dc *dc, struct dc_state *context, + display_e2e_pipe_params_st *pipes, +@@ -1843,6 +1849,7 @@ static struct resource_funcs dcn31_res_pool_funcs = { + .update_bw_bounding_box = dcn31_update_bw_bounding_box, + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn31_get_panel_config_defaults, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static struct clock_source *dcn30_clock_source_create( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h +index 901436591ed45c..551ad912f7bea8 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h +@@ -63,6 +63,9 @@ struct resource_pool *dcn31_create_resource_pool( + const struct dc_init_data *init_data, + struct dc *dc); + ++unsigned int dcn31_get_det_buffer_size( ++ const struct dc_state *context); ++ + /*temp: B0 specific before switch to dcn313 headers*/ + #ifndef regPHYPLLF_PIXCLK_RESYNC_CNTL + #define regPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c +index 169924d0a8393e..01d95108ce662b 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c +@@ -1778,6 +1778,7 @@ static struct resource_funcs dcn314_res_pool_funcs = { + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn314_get_panel_config_defaults, + .get_preferred_eng_id_dpia = dcn314_get_preferred_eng_id_dpia, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static struct clock_source *dcn30_clock_source_create( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c +index 3f4b9dba411244..f2ce687c0e03ca 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c +@@ -1840,6 +1840,7 @@ static struct resource_funcs dcn315_res_pool_funcs = { + .update_bw_bounding_box = dcn315_update_bw_bounding_box, + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn315_get_panel_config_defaults, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static bool dcn315_resource_construct( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c +index 5fd52c5fcee458..af82e13029c9e4 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c +@@ -1720,6 +1720,7 @@ static struct resource_funcs dcn316_res_pool_funcs = { + .update_bw_bounding_box = dcn316_update_bw_bounding_box, + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn316_get_panel_config_defaults, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static bool dcn316_resource_construct( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c +index a124ad9bd108c8..6b889c8be0ca3f 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c +@@ -2186,6 +2186,7 @@ static bool dcn32_resource_construct( + dc->caps.dmcub_support = true; + dc->caps.seamless_odm = true; + dc->caps.max_v_total = (1 << 15) - 1; ++ dc->caps.vtotal_limited_by_fp2 = true; + + /* Color pipeline capabilities */ + dc->caps.color.dpp.dcn_arch = 1; +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c +index 827a94f84f1001..74113c578bac40 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c +@@ -1743,6 +1743,7 @@ static bool dcn321_resource_construct( + dc->caps.extended_aux_timeout_support = true; + dc->caps.dmcub_support = true; + dc->caps.max_v_total = (1 << 15) - 1; ++ dc->caps.vtotal_limited_by_fp2 = true; + + /* Color pipeline capabilities */ + dc->caps.color.dpp.dcn_arch = 1; +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c +index 893a9d9ee870df..d0c4693c12241b 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c +@@ -1779,6 +1779,7 @@ static struct resource_funcs dcn35_res_pool_funcs = { + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn35_get_panel_config_defaults, + .get_preferred_eng_id_dpia = dcn35_get_preferred_eng_id_dpia, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static bool dcn35_resource_construct( +@@ -1850,6 +1851,7 @@ static bool dcn35_resource_construct( + dc->caps.zstate_support = true; + dc->caps.ips_support = true; + dc->caps.max_v_total = (1 << 15) - 1; ++ dc->caps.vtotal_limited_by_fp2 = true; + + /* Color pipeline capabilities */ + dc->caps.color.dpp.dcn_arch = 1; +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c +index 70abd32ce2ad18..575c0aa12229cf 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c +@@ -1758,6 +1758,7 @@ static struct resource_funcs dcn351_res_pool_funcs = { + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn35_get_panel_config_defaults, + .get_preferred_eng_id_dpia = dcn351_get_preferred_eng_id_dpia, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static bool dcn351_resource_construct( +@@ -1829,6 +1830,7 @@ static bool dcn351_resource_construct( + dc->caps.zstate_support = true; + dc->caps.ips_support = true; + dc->caps.max_v_total = (1 << 15) - 1; ++ dc->caps.vtotal_limited_by_fp2 = true; + + /* Color pipeline capabilities */ + dc->caps.color.dpp.dcn_arch = 1; +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c +index 9d56fbdcd06afd..4aa975418fb18d 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c +@@ -1826,6 +1826,7 @@ static bool dcn401_resource_construct( + dc->caps.extended_aux_timeout_support = true; + dc->caps.dmcub_support = true; + dc->caps.max_v_total = (1 << 15) - 1; ++ dc->caps.vtotal_limited_by_fp2 = true; + + if (ASICREV_IS_GC_12_0_1_A0(dc->ctx->asic_id.hw_internal_rev)) + dc->caps.dcc_plane_width_limit = 7680; +diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +index ebcf68bfae2b32..7835100b37c41e 100644 +--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h ++++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +@@ -747,7 +747,8 @@ union dmub_shared_state_ips_driver_signals { + uint32_t allow_ips1 : 1; /**< 1 is IPS1 is allowed */ + uint32_t allow_ips2 : 1; /**< 1 is IPS1 is allowed */ + uint32_t allow_z10 : 1; /**< 1 if Z10 is allowed */ +- uint32_t reserved_bits : 28; /**< Reversed bits */ ++ uint32_t allow_idle : 1; /**< 1 if driver is allowing idle */ ++ uint32_t reserved_bits : 27; /**< Reversed bits */ + } bits; + uint32_t all; + }; +diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c +index bbd259cea4f4f6..ab62a76d48cf76 100644 +--- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c ++++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c +@@ -121,6 +121,17 @@ static unsigned int calc_duration_in_us_from_v_total( + return duration_in_us; + } + ++static unsigned int calc_max_hardware_v_total(const struct dc_stream_state *stream) ++{ ++ unsigned int max_hw_v_total = stream->ctx->dc->caps.max_v_total; ++ ++ if (stream->ctx->dc->caps.vtotal_limited_by_fp2) { ++ max_hw_v_total -= stream->timing.v_front_porch + 1; ++ } ++ ++ return max_hw_v_total; ++} ++ + unsigned int mod_freesync_calc_v_total_from_refresh( + const struct dc_stream_state *stream, + unsigned int refresh_in_uhz) +@@ -1002,7 +1013,7 @@ void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync, + + if (stream->ctx->dc->caps.max_v_total != 0 && stream->timing.h_total != 0) { + min_hardware_refresh_in_uhz = div64_u64((stream->timing.pix_clk_100hz * 100000000ULL), +- (stream->timing.h_total * (long long)stream->ctx->dc->caps.max_v_total)); ++ (stream->timing.h_total * (long long)calc_max_hardware_v_total(stream))); + } + /* Limit minimum refresh rate to what can be supported by hardware */ + min_refresh_in_uhz = min_hardware_refresh_in_uhz > in_config->min_refresh_in_uhz ? +diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c +index d5d6ab484e5add..0fa6fbee197899 100644 +--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c ++++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c +@@ -1409,7 +1409,11 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev, + * create a custom set of heuristics, write a string of numbers to the file + * starting with the number of the custom profile along with a setting + * for each heuristic parameter. Due to differences across asic families +- * the heuristic parameters vary from family to family. ++ * the heuristic parameters vary from family to family. Additionally, ++ * you can apply the custom heuristics to different clock domains. Each ++ * clock domain is considered a distinct operation so if you modify the ++ * gfxclk heuristics and then the memclk heuristics, the all of the ++ * custom heuristics will be retained until you switch to another profile. + * + */ + +diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +index 32bdeac2676b5c..0c0b9aa44dfa3a 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +@@ -72,6 +72,10 @@ static int smu_set_power_limit(void *handle, uint32_t limit); + static int smu_set_fan_speed_rpm(void *handle, uint32_t speed); + static int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled); + static int smu_set_mp1_state(void *handle, enum pp_mp1_state mp1_state); ++static void smu_power_profile_mode_get(struct smu_context *smu, ++ enum PP_SMC_POWER_PROFILE profile_mode); ++static void smu_power_profile_mode_put(struct smu_context *smu, ++ enum PP_SMC_POWER_PROFILE profile_mode); + + static int smu_sys_get_pp_feature_mask(void *handle, + char *buf) +@@ -1257,35 +1261,19 @@ static int smu_sw_init(void *handle) + INIT_WORK(&smu->interrupt_work, smu_interrupt_work_fn); + atomic64_set(&smu->throttle_int_counter, 0); + smu->watermarks_bitmap = 0; +- smu->power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; +- smu->default_power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; + + atomic_set(&smu->smu_power.power_gate.vcn_gated, 1); + atomic_set(&smu->smu_power.power_gate.jpeg_gated, 1); + atomic_set(&smu->smu_power.power_gate.vpe_gated, 1); + atomic_set(&smu->smu_power.power_gate.umsch_mm_gated, 1); + +- smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT] = 0; +- smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D] = 1; +- smu->workload_prority[PP_SMC_POWER_PROFILE_POWERSAVING] = 2; +- smu->workload_prority[PP_SMC_POWER_PROFILE_VIDEO] = 3; +- smu->workload_prority[PP_SMC_POWER_PROFILE_VR] = 4; +- smu->workload_prority[PP_SMC_POWER_PROFILE_COMPUTE] = 5; +- smu->workload_prority[PP_SMC_POWER_PROFILE_CUSTOM] = 6; +- + if (smu->is_apu || + !smu_is_workload_profile_available(smu, PP_SMC_POWER_PROFILE_FULLSCREEN3D)) +- smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT]; ++ smu->power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; + else +- smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D]; +- +- smu->workload_setting[0] = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; +- smu->workload_setting[1] = PP_SMC_POWER_PROFILE_FULLSCREEN3D; +- smu->workload_setting[2] = PP_SMC_POWER_PROFILE_POWERSAVING; +- smu->workload_setting[3] = PP_SMC_POWER_PROFILE_VIDEO; +- smu->workload_setting[4] = PP_SMC_POWER_PROFILE_VR; +- smu->workload_setting[5] = PP_SMC_POWER_PROFILE_COMPUTE; +- smu->workload_setting[6] = PP_SMC_POWER_PROFILE_CUSTOM; ++ smu->power_profile_mode = PP_SMC_POWER_PROFILE_FULLSCREEN3D; ++ smu_power_profile_mode_get(smu, smu->power_profile_mode); ++ + smu->display_config = &adev->pm.pm_display_cfg; + + smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; +@@ -1338,6 +1326,11 @@ static int smu_sw_fini(void *handle) + return ret; + } + ++ if (smu->custom_profile_params) { ++ kfree(smu->custom_profile_params); ++ smu->custom_profile_params = NULL; ++ } ++ + smu_fini_microcode(smu); + + return 0; +@@ -2117,6 +2110,9 @@ static int smu_suspend(void *handle) + if (!ret) + adev->gfx.gfx_off_entrycount = count; + ++ /* clear this on suspend so it will get reprogrammed on resume */ ++ smu->workload_mask = 0; ++ + return 0; + } + +@@ -2229,25 +2225,49 @@ static int smu_enable_umd_pstate(void *handle, + } + + static int smu_bump_power_profile_mode(struct smu_context *smu, +- long *param, +- uint32_t param_size) ++ long *custom_params, ++ u32 custom_params_max_idx) + { +- int ret = 0; ++ u32 workload_mask = 0; ++ int i, ret = 0; ++ ++ for (i = 0; i < PP_SMC_POWER_PROFILE_COUNT; i++) { ++ if (smu->workload_refcount[i]) ++ workload_mask |= 1 << i; ++ } ++ ++ if (smu->workload_mask == workload_mask) ++ return 0; + + if (smu->ppt_funcs->set_power_profile_mode) +- ret = smu->ppt_funcs->set_power_profile_mode(smu, param, param_size); ++ ret = smu->ppt_funcs->set_power_profile_mode(smu, workload_mask, ++ custom_params, ++ custom_params_max_idx); ++ ++ if (!ret) ++ smu->workload_mask = workload_mask; + + return ret; + } + ++static void smu_power_profile_mode_get(struct smu_context *smu, ++ enum PP_SMC_POWER_PROFILE profile_mode) ++{ ++ smu->workload_refcount[profile_mode]++; ++} ++ ++static void smu_power_profile_mode_put(struct smu_context *smu, ++ enum PP_SMC_POWER_PROFILE profile_mode) ++{ ++ if (smu->workload_refcount[profile_mode]) ++ smu->workload_refcount[profile_mode]--; ++} ++ + static int smu_adjust_power_state_dynamic(struct smu_context *smu, + enum amd_dpm_forced_level level, +- bool skip_display_settings, +- bool init) ++ bool skip_display_settings) + { + int ret = 0; +- int index = 0; +- long workload[1]; + struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); + + if (!skip_display_settings) { +@@ -2284,14 +2304,8 @@ static int smu_adjust_power_state_dynamic(struct smu_context *smu, + } + + if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL && +- smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { +- index = fls(smu->workload_mask); +- index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0; +- workload[0] = smu->workload_setting[index]; +- +- if (init || smu->power_profile_mode != workload[0]) +- smu_bump_power_profile_mode(smu, workload, 0); +- } ++ smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) ++ smu_bump_power_profile_mode(smu, NULL, 0); + + return ret; + } +@@ -2310,13 +2324,13 @@ static int smu_handle_task(struct smu_context *smu, + ret = smu_pre_display_config_changed(smu); + if (ret) + return ret; +- ret = smu_adjust_power_state_dynamic(smu, level, false, false); ++ ret = smu_adjust_power_state_dynamic(smu, level, false); + break; + case AMD_PP_TASK_COMPLETE_INIT: +- ret = smu_adjust_power_state_dynamic(smu, level, true, true); ++ ret = smu_adjust_power_state_dynamic(smu, level, true); + break; + case AMD_PP_TASK_READJUST_POWER_STATE: +- ret = smu_adjust_power_state_dynamic(smu, level, true, false); ++ ret = smu_adjust_power_state_dynamic(smu, level, true); + break; + default: + break; +@@ -2338,12 +2352,11 @@ static int smu_handle_dpm_task(void *handle, + + static int smu_switch_power_profile(void *handle, + enum PP_SMC_POWER_PROFILE type, +- bool en) ++ bool enable) + { + struct smu_context *smu = handle; + struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); +- long workload[1]; +- uint32_t index; ++ int ret; + + if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled) + return -EOPNOTSUPP; +@@ -2351,21 +2364,21 @@ static int smu_switch_power_profile(void *handle, + if (!(type < PP_SMC_POWER_PROFILE_CUSTOM)) + return -EINVAL; + +- if (!en) { +- smu->workload_mask &= ~(1 << smu->workload_prority[type]); +- index = fls(smu->workload_mask); +- index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0; +- workload[0] = smu->workload_setting[index]; +- } else { +- smu->workload_mask |= (1 << smu->workload_prority[type]); +- index = fls(smu->workload_mask); +- index = index <= WORKLOAD_POLICY_MAX ? index - 1 : 0; +- workload[0] = smu->workload_setting[index]; +- } +- + if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL && +- smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) +- smu_bump_power_profile_mode(smu, workload, 0); ++ smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { ++ if (enable) ++ smu_power_profile_mode_get(smu, type); ++ else ++ smu_power_profile_mode_put(smu, type); ++ ret = smu_bump_power_profile_mode(smu, NULL, 0); ++ if (ret) { ++ if (enable) ++ smu_power_profile_mode_put(smu, type); ++ else ++ smu_power_profile_mode_get(smu, type); ++ return ret; ++ } ++ } + + return 0; + } +@@ -3053,12 +3066,35 @@ static int smu_set_power_profile_mode(void *handle, + uint32_t param_size) + { + struct smu_context *smu = handle; ++ bool custom = false; ++ int ret = 0; + + if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled || + !smu->ppt_funcs->set_power_profile_mode) + return -EOPNOTSUPP; + +- return smu_bump_power_profile_mode(smu, param, param_size); ++ if (param[param_size] == PP_SMC_POWER_PROFILE_CUSTOM) { ++ custom = true; ++ /* clear frontend mask so custom changes propogate */ ++ smu->workload_mask = 0; ++ } ++ ++ if ((param[param_size] != smu->power_profile_mode) || custom) { ++ /* clear the old user preference */ ++ smu_power_profile_mode_put(smu, smu->power_profile_mode); ++ /* set the new user preference */ ++ smu_power_profile_mode_get(smu, param[param_size]); ++ ret = smu_bump_power_profile_mode(smu, ++ custom ? param : NULL, ++ custom ? param_size : 0); ++ if (ret) ++ smu_power_profile_mode_put(smu, param[param_size]); ++ else ++ /* store the user's preference */ ++ smu->power_profile_mode = param[param_size]; ++ } ++ ++ return ret; + } + + static int smu_get_fan_control_mode(void *handle, u32 *fan_mode) +diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +index b44a185d07e84c..2b8a18ce25d943 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h ++++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +@@ -556,11 +556,13 @@ struct smu_context { + uint32_t hard_min_uclk_req_from_dal; + bool disable_uclk_switch; + ++ /* asic agnostic workload mask */ + uint32_t workload_mask; +- uint32_t workload_prority[WORKLOAD_POLICY_MAX]; +- uint32_t workload_setting[WORKLOAD_POLICY_MAX]; ++ /* default/user workload preference */ + uint32_t power_profile_mode; +- uint32_t default_power_profile_mode; ++ uint32_t workload_refcount[PP_SMC_POWER_PROFILE_COUNT]; ++ /* backend specific custom workload settings */ ++ long *custom_profile_params; + bool pm_enabled; + bool is_apu; + +@@ -731,9 +733,12 @@ struct pptable_funcs { + * @set_power_profile_mode: Set a power profile mode. Also used to + * create/set custom power profile modes. + * &input: Power profile mode parameters. +- * &size: Size of &input. ++ * &workload_mask: mask of workloads to enable ++ * &custom_params: custom profile parameters ++ * &custom_params_max_idx: max valid idx into custom_params + */ +- int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size); ++ int (*set_power_profile_mode)(struct smu_context *smu, u32 workload_mask, ++ long *custom_params, u32 custom_params_max_idx); + + /** + * @dpm_set_vcn_enable: Enable/disable VCN engine dynamic power +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c +index d52512f5f1bd9d..fc1297fecc62e0 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c +@@ -1445,98 +1445,120 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu, + return size; + } + +-static int arcturus_set_power_profile_mode(struct smu_context *smu, +- long *input, +- uint32_t size) ++#define ARCTURUS_CUSTOM_PARAMS_COUNT 10 ++#define ARCTURUS_CUSTOM_PARAMS_CLOCK_COUNT 2 ++#define ARCTURUS_CUSTOM_PARAMS_SIZE (ARCTURUS_CUSTOM_PARAMS_CLOCK_COUNT * ARCTURUS_CUSTOM_PARAMS_COUNT * sizeof(long)) ++ ++static int arcturus_set_power_profile_mode_coeff(struct smu_context *smu, ++ long *input) + { + DpmActivityMonitorCoeffInt_t activity_monitor; +- int workload_type = 0; +- uint32_t profile_mode = input[size]; +- int ret = 0; ++ int ret, idx; + +- if (profile_mode > PP_SMC_POWER_PROFILE_CUSTOM) { +- dev_err(smu->adev->dev, "Invalid power profile mode %d\n", profile_mode); +- return -EINVAL; ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, ++ WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor), ++ false); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); ++ return ret; + } + ++ idx = 0 * ARCTURUS_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Gfxclk */ ++ activity_monitor.Gfx_FPS = input[idx + 1]; ++ activity_monitor.Gfx_UseRlcBusy = input[idx + 2]; ++ activity_monitor.Gfx_MinActiveFreqType = input[idx + 3]; ++ activity_monitor.Gfx_MinActiveFreq = input[idx + 4]; ++ activity_monitor.Gfx_BoosterFreqType = input[idx + 5]; ++ activity_monitor.Gfx_BoosterFreq = input[idx + 6]; ++ activity_monitor.Gfx_PD_Data_limit_c = input[idx + 7]; ++ activity_monitor.Gfx_PD_Data_error_coeff = input[idx + 8]; ++ activity_monitor.Gfx_PD_Data_error_rate_coeff = input[idx + 9]; ++ } ++ idx = 1 * ARCTURUS_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Uclk */ ++ activity_monitor.Mem_FPS = input[idx + 1]; ++ activity_monitor.Mem_UseRlcBusy = input[idx + 2]; ++ activity_monitor.Mem_MinActiveFreqType = input[idx + 3]; ++ activity_monitor.Mem_MinActiveFreq = input[idx + 4]; ++ activity_monitor.Mem_BoosterFreqType = input[idx + 5]; ++ activity_monitor.Mem_BoosterFreq = input[idx + 6]; ++ activity_monitor.Mem_PD_Data_limit_c = input[idx + 7]; ++ activity_monitor.Mem_PD_Data_error_coeff = input[idx + 8]; ++ activity_monitor.Mem_PD_Data_error_rate_coeff = input[idx + 9]; ++ } + +- if ((profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) && +- (smu->smc_fw_version >= 0x360d00)) { +- if (size != 10) +- return -EINVAL; ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, ++ WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor), ++ true); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ return ret; ++ } + +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, +- WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor), +- false); +- if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); +- return ret; +- } ++ return ret; ++} + +- switch (input[0]) { +- case 0: /* Gfxclk */ +- activity_monitor.Gfx_FPS = input[1]; +- activity_monitor.Gfx_UseRlcBusy = input[2]; +- activity_monitor.Gfx_MinActiveFreqType = input[3]; +- activity_monitor.Gfx_MinActiveFreq = input[4]; +- activity_monitor.Gfx_BoosterFreqType = input[5]; +- activity_monitor.Gfx_BoosterFreq = input[6]; +- activity_monitor.Gfx_PD_Data_limit_c = input[7]; +- activity_monitor.Gfx_PD_Data_error_coeff = input[8]; +- activity_monitor.Gfx_PD_Data_error_rate_coeff = input[9]; +- break; +- case 1: /* Uclk */ +- activity_monitor.Mem_FPS = input[1]; +- activity_monitor.Mem_UseRlcBusy = input[2]; +- activity_monitor.Mem_MinActiveFreqType = input[3]; +- activity_monitor.Mem_MinActiveFreq = input[4]; +- activity_monitor.Mem_BoosterFreqType = input[5]; +- activity_monitor.Mem_BoosterFreq = input[6]; +- activity_monitor.Mem_PD_Data_limit_c = input[7]; +- activity_monitor.Mem_PD_Data_error_coeff = input[8]; +- activity_monitor.Mem_PD_Data_error_rate_coeff = input[9]; +- break; +- default: ++static int arcturus_set_power_profile_mode(struct smu_context *smu, ++ u32 workload_mask, ++ long *custom_params, ++ u32 custom_params_max_idx) ++{ ++ u32 backend_workload_mask = 0; ++ int ret, idx = -1, i; ++ ++ smu_cmn_get_backend_workload_mask(smu, workload_mask, ++ &backend_workload_mask); ++ ++ if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { ++ if (smu->smc_fw_version < 0x360d00) + return -EINVAL; ++ if (!smu->custom_profile_params) { ++ smu->custom_profile_params = ++ kzalloc(ARCTURUS_CUSTOM_PARAMS_SIZE, GFP_KERNEL); ++ if (!smu->custom_profile_params) ++ return -ENOMEM; + } +- +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, +- WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor), +- true); ++ if (custom_params && custom_params_max_idx) { ++ if (custom_params_max_idx != ARCTURUS_CUSTOM_PARAMS_COUNT) ++ return -EINVAL; ++ if (custom_params[0] >= ARCTURUS_CUSTOM_PARAMS_CLOCK_COUNT) ++ return -EINVAL; ++ idx = custom_params[0] * ARCTURUS_CUSTOM_PARAMS_COUNT; ++ smu->custom_profile_params[idx] = 1; ++ for (i = 1; i < custom_params_max_idx; i++) ++ smu->custom_profile_params[idx + i] = custom_params[i]; ++ } ++ ret = arcturus_set_power_profile_mode_coeff(smu, ++ smu->custom_profile_params); + if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; + return ret; + } +- } +- +- /* +- * Conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT +- * Not all profile modes are supported on arcturus. +- */ +- workload_type = smu_cmn_to_asic_specific_index(smu, +- CMN2ASIC_MAPPING_WORKLOAD, +- profile_mode); +- if (workload_type < 0) { +- dev_dbg(smu->adev->dev, "Unsupported power profile mode %d on arcturus\n", profile_mode); +- return -EINVAL; ++ } else if (smu->custom_profile_params) { ++ memset(smu->custom_profile_params, 0, ARCTURUS_CUSTOM_PARAMS_SIZE); + } + + ret = smu_cmn_send_smc_msg_with_param(smu, +- SMU_MSG_SetWorkloadMask, +- 1 << workload_type, +- NULL); ++ SMU_MSG_SetWorkloadMask, ++ backend_workload_mask, ++ NULL); + if (ret) { +- dev_err(smu->adev->dev, "Fail to set workload type %d\n", workload_type); ++ dev_err(smu->adev->dev, "Failed to set workload mask 0x%08x\n", ++ workload_mask); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; + return ret; + } + +- smu->power_profile_mode = profile_mode; +- +- return 0; ++ return ret; + } + + static int arcturus_set_performance_level(struct smu_context *smu, +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c +index 16af1a329621f1..27c1892b2c7493 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c +@@ -2004,87 +2004,122 @@ static int navi10_get_power_profile_mode(struct smu_context *smu, char *buf) + return size; + } + +-static int navi10_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) ++#define NAVI10_CUSTOM_PARAMS_COUNT 10 ++#define NAVI10_CUSTOM_PARAMS_CLOCKS_COUNT 3 ++#define NAVI10_CUSTOM_PARAMS_SIZE (NAVI10_CUSTOM_PARAMS_CLOCKS_COUNT * NAVI10_CUSTOM_PARAMS_COUNT * sizeof(long)) ++ ++static int navi10_set_power_profile_mode_coeff(struct smu_context *smu, ++ long *input) + { + DpmActivityMonitorCoeffInt_t activity_monitor; +- int workload_type, ret = 0; ++ int ret, idx; + +- smu->power_profile_mode = input[size]; ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor), false); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); ++ return ret; ++ } + +- if (smu->power_profile_mode > PP_SMC_POWER_PROFILE_CUSTOM) { +- dev_err(smu->adev->dev, "Invalid power profile mode %d\n", smu->power_profile_mode); +- return -EINVAL; ++ idx = 0 * NAVI10_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Gfxclk */ ++ activity_monitor.Gfx_FPS = input[idx + 1]; ++ activity_monitor.Gfx_MinFreqStep = input[idx + 2]; ++ activity_monitor.Gfx_MinActiveFreqType = input[idx + 3]; ++ activity_monitor.Gfx_MinActiveFreq = input[idx + 4]; ++ activity_monitor.Gfx_BoosterFreqType = input[idx + 5]; ++ activity_monitor.Gfx_BoosterFreq = input[idx + 6]; ++ activity_monitor.Gfx_PD_Data_limit_c = input[idx + 7]; ++ activity_monitor.Gfx_PD_Data_error_coeff = input[idx + 8]; ++ activity_monitor.Gfx_PD_Data_error_rate_coeff = input[idx + 9]; ++ } ++ idx = 1 * NAVI10_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Socclk */ ++ activity_monitor.Soc_FPS = input[idx + 1]; ++ activity_monitor.Soc_MinFreqStep = input[idx + 2]; ++ activity_monitor.Soc_MinActiveFreqType = input[idx + 3]; ++ activity_monitor.Soc_MinActiveFreq = input[idx + 4]; ++ activity_monitor.Soc_BoosterFreqType = input[idx + 5]; ++ activity_monitor.Soc_BoosterFreq = input[idx + 6]; ++ activity_monitor.Soc_PD_Data_limit_c = input[idx + 7]; ++ activity_monitor.Soc_PD_Data_error_coeff = input[idx + 8]; ++ activity_monitor.Soc_PD_Data_error_rate_coeff = input[idx + 9]; ++ } ++ idx = 2 * NAVI10_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Memclk */ ++ activity_monitor.Mem_FPS = input[idx + 1]; ++ activity_monitor.Mem_MinFreqStep = input[idx + 2]; ++ activity_monitor.Mem_MinActiveFreqType = input[idx + 3]; ++ activity_monitor.Mem_MinActiveFreq = input[idx + 4]; ++ activity_monitor.Mem_BoosterFreqType = input[idx + 5]; ++ activity_monitor.Mem_BoosterFreq = input[idx + 6]; ++ activity_monitor.Mem_PD_Data_limit_c = input[idx + 7]; ++ activity_monitor.Mem_PD_Data_error_coeff = input[idx + 8]; ++ activity_monitor.Mem_PD_Data_error_rate_coeff = input[idx + 9]; ++ } ++ ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor), true); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ return ret; + } + +- if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { +- if (size != 10) +- return -EINVAL; ++ return ret; ++} + +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor), false); +- if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); +- return ret; +- } ++static int navi10_set_power_profile_mode(struct smu_context *smu, ++ u32 workload_mask, ++ long *custom_params, ++ u32 custom_params_max_idx) ++{ ++ u32 backend_workload_mask = 0; ++ int ret, idx = -1, i; + +- switch (input[0]) { +- case 0: /* Gfxclk */ +- activity_monitor.Gfx_FPS = input[1]; +- activity_monitor.Gfx_MinFreqStep = input[2]; +- activity_monitor.Gfx_MinActiveFreqType = input[3]; +- activity_monitor.Gfx_MinActiveFreq = input[4]; +- activity_monitor.Gfx_BoosterFreqType = input[5]; +- activity_monitor.Gfx_BoosterFreq = input[6]; +- activity_monitor.Gfx_PD_Data_limit_c = input[7]; +- activity_monitor.Gfx_PD_Data_error_coeff = input[8]; +- activity_monitor.Gfx_PD_Data_error_rate_coeff = input[9]; +- break; +- case 1: /* Socclk */ +- activity_monitor.Soc_FPS = input[1]; +- activity_monitor.Soc_MinFreqStep = input[2]; +- activity_monitor.Soc_MinActiveFreqType = input[3]; +- activity_monitor.Soc_MinActiveFreq = input[4]; +- activity_monitor.Soc_BoosterFreqType = input[5]; +- activity_monitor.Soc_BoosterFreq = input[6]; +- activity_monitor.Soc_PD_Data_limit_c = input[7]; +- activity_monitor.Soc_PD_Data_error_coeff = input[8]; +- activity_monitor.Soc_PD_Data_error_rate_coeff = input[9]; +- break; +- case 2: /* Memclk */ +- activity_monitor.Mem_FPS = input[1]; +- activity_monitor.Mem_MinFreqStep = input[2]; +- activity_monitor.Mem_MinActiveFreqType = input[3]; +- activity_monitor.Mem_MinActiveFreq = input[4]; +- activity_monitor.Mem_BoosterFreqType = input[5]; +- activity_monitor.Mem_BoosterFreq = input[6]; +- activity_monitor.Mem_PD_Data_limit_c = input[7]; +- activity_monitor.Mem_PD_Data_error_coeff = input[8]; +- activity_monitor.Mem_PD_Data_error_rate_coeff = input[9]; +- break; +- default: +- return -EINVAL; +- } ++ smu_cmn_get_backend_workload_mask(smu, workload_mask, ++ &backend_workload_mask); + +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor), true); ++ if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { ++ if (!smu->custom_profile_params) { ++ smu->custom_profile_params = kzalloc(NAVI10_CUSTOM_PARAMS_SIZE, GFP_KERNEL); ++ if (!smu->custom_profile_params) ++ return -ENOMEM; ++ } ++ if (custom_params && custom_params_max_idx) { ++ if (custom_params_max_idx != NAVI10_CUSTOM_PARAMS_COUNT) ++ return -EINVAL; ++ if (custom_params[0] >= NAVI10_CUSTOM_PARAMS_CLOCKS_COUNT) ++ return -EINVAL; ++ idx = custom_params[0] * NAVI10_CUSTOM_PARAMS_COUNT; ++ smu->custom_profile_params[idx] = 1; ++ for (i = 1; i < custom_params_max_idx; i++) ++ smu->custom_profile_params[idx + i] = custom_params[i]; ++ } ++ ret = navi10_set_power_profile_mode_coeff(smu, ++ smu->custom_profile_params); + if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; + return ret; + } ++ } else if (smu->custom_profile_params) { ++ memset(smu->custom_profile_params, 0, NAVI10_CUSTOM_PARAMS_SIZE); + } + +- /* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */ +- workload_type = smu_cmn_to_asic_specific_index(smu, +- CMN2ASIC_MAPPING_WORKLOAD, +- smu->power_profile_mode); +- if (workload_type < 0) +- return -EINVAL; + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask, +- 1 << workload_type, NULL); +- if (ret) +- dev_err(smu->adev->dev, "[%s] Failed to set work load mask!", __func__); ++ backend_workload_mask, NULL); ++ if (ret) { ++ dev_err(smu->adev->dev, "Failed to set workload mask 0x%08x\n", ++ workload_mask); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; ++ return ret; ++ } + + return ret; + } +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +index 9c3c48297cba03..1af90990d05c8f 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +@@ -1706,90 +1706,126 @@ static int sienna_cichlid_get_power_profile_mode(struct smu_context *smu, char * + return size; + } + +-static int sienna_cichlid_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) ++#define SIENNA_CICHLID_CUSTOM_PARAMS_COUNT 10 ++#define SIENNA_CICHLID_CUSTOM_PARAMS_CLOCK_COUNT 3 ++#define SIENNA_CICHLID_CUSTOM_PARAMS_SIZE (SIENNA_CICHLID_CUSTOM_PARAMS_CLOCK_COUNT * SIENNA_CICHLID_CUSTOM_PARAMS_COUNT * sizeof(long)) ++ ++static int sienna_cichlid_set_power_profile_mode_coeff(struct smu_context *smu, ++ long *input) + { + + DpmActivityMonitorCoeffIntExternal_t activity_monitor_external; + DpmActivityMonitorCoeffInt_t *activity_monitor = + &(activity_monitor_external.DpmActivityMonitorCoeffInt); +- int workload_type, ret = 0; ++ int ret, idx; + +- smu->power_profile_mode = input[size]; ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor_external), false); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); ++ return ret; ++ } + +- if (smu->power_profile_mode > PP_SMC_POWER_PROFILE_CUSTOM) { +- dev_err(smu->adev->dev, "Invalid power profile mode %d\n", smu->power_profile_mode); +- return -EINVAL; ++ idx = 0 * SIENNA_CICHLID_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Gfxclk */ ++ activity_monitor->Gfx_FPS = input[idx + 1]; ++ activity_monitor->Gfx_MinFreqStep = input[idx + 2]; ++ activity_monitor->Gfx_MinActiveFreqType = input[idx + 3]; ++ activity_monitor->Gfx_MinActiveFreq = input[idx + 4]; ++ activity_monitor->Gfx_BoosterFreqType = input[idx + 5]; ++ activity_monitor->Gfx_BoosterFreq = input[idx + 6]; ++ activity_monitor->Gfx_PD_Data_limit_c = input[idx + 7]; ++ activity_monitor->Gfx_PD_Data_error_coeff = input[idx + 8]; ++ activity_monitor->Gfx_PD_Data_error_rate_coeff = input[idx + 9]; ++ } ++ idx = 1 * SIENNA_CICHLID_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Socclk */ ++ activity_monitor->Fclk_FPS = input[idx + 1]; ++ activity_monitor->Fclk_MinFreqStep = input[idx + 2]; ++ activity_monitor->Fclk_MinActiveFreqType = input[idx + 3]; ++ activity_monitor->Fclk_MinActiveFreq = input[idx + 4]; ++ activity_monitor->Fclk_BoosterFreqType = input[idx + 5]; ++ activity_monitor->Fclk_BoosterFreq = input[idx + 6]; ++ activity_monitor->Fclk_PD_Data_limit_c = input[idx + 7]; ++ activity_monitor->Fclk_PD_Data_error_coeff = input[idx + 8]; ++ activity_monitor->Fclk_PD_Data_error_rate_coeff = input[idx + 9]; ++ } ++ idx = 2 * SIENNA_CICHLID_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Memclk */ ++ activity_monitor->Mem_FPS = input[idx + 1]; ++ activity_monitor->Mem_MinFreqStep = input[idx + 2]; ++ activity_monitor->Mem_MinActiveFreqType = input[idx + 3]; ++ activity_monitor->Mem_MinActiveFreq = input[idx + 4]; ++ activity_monitor->Mem_BoosterFreqType = input[idx + 5]; ++ activity_monitor->Mem_BoosterFreq = input[idx + 6]; ++ activity_monitor->Mem_PD_Data_limit_c = input[idx + 7]; ++ activity_monitor->Mem_PD_Data_error_coeff = input[idx + 8]; ++ activity_monitor->Mem_PD_Data_error_rate_coeff = input[idx + 9]; + } + +- if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { +- if (size != 10) +- return -EINVAL; ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor_external), true); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ return ret; ++ } + +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor_external), false); +- if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); +- return ret; +- } ++ return ret; ++} + +- switch (input[0]) { +- case 0: /* Gfxclk */ +- activity_monitor->Gfx_FPS = input[1]; +- activity_monitor->Gfx_MinFreqStep = input[2]; +- activity_monitor->Gfx_MinActiveFreqType = input[3]; +- activity_monitor->Gfx_MinActiveFreq = input[4]; +- activity_monitor->Gfx_BoosterFreqType = input[5]; +- activity_monitor->Gfx_BoosterFreq = input[6]; +- activity_monitor->Gfx_PD_Data_limit_c = input[7]; +- activity_monitor->Gfx_PD_Data_error_coeff = input[8]; +- activity_monitor->Gfx_PD_Data_error_rate_coeff = input[9]; +- break; +- case 1: /* Socclk */ +- activity_monitor->Fclk_FPS = input[1]; +- activity_monitor->Fclk_MinFreqStep = input[2]; +- activity_monitor->Fclk_MinActiveFreqType = input[3]; +- activity_monitor->Fclk_MinActiveFreq = input[4]; +- activity_monitor->Fclk_BoosterFreqType = input[5]; +- activity_monitor->Fclk_BoosterFreq = input[6]; +- activity_monitor->Fclk_PD_Data_limit_c = input[7]; +- activity_monitor->Fclk_PD_Data_error_coeff = input[8]; +- activity_monitor->Fclk_PD_Data_error_rate_coeff = input[9]; +- break; +- case 2: /* Memclk */ +- activity_monitor->Mem_FPS = input[1]; +- activity_monitor->Mem_MinFreqStep = input[2]; +- activity_monitor->Mem_MinActiveFreqType = input[3]; +- activity_monitor->Mem_MinActiveFreq = input[4]; +- activity_monitor->Mem_BoosterFreqType = input[5]; +- activity_monitor->Mem_BoosterFreq = input[6]; +- activity_monitor->Mem_PD_Data_limit_c = input[7]; +- activity_monitor->Mem_PD_Data_error_coeff = input[8]; +- activity_monitor->Mem_PD_Data_error_rate_coeff = input[9]; +- break; +- default: +- return -EINVAL; ++static int sienna_cichlid_set_power_profile_mode(struct smu_context *smu, ++ u32 workload_mask, ++ long *custom_params, ++ u32 custom_params_max_idx) ++{ ++ u32 backend_workload_mask = 0; ++ int ret, idx = -1, i; ++ ++ smu_cmn_get_backend_workload_mask(smu, workload_mask, ++ &backend_workload_mask); ++ ++ if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { ++ if (!smu->custom_profile_params) { ++ smu->custom_profile_params = ++ kzalloc(SIENNA_CICHLID_CUSTOM_PARAMS_SIZE, GFP_KERNEL); ++ if (!smu->custom_profile_params) ++ return -ENOMEM; + } +- +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor_external), true); ++ if (custom_params && custom_params_max_idx) { ++ if (custom_params_max_idx != SIENNA_CICHLID_CUSTOM_PARAMS_COUNT) ++ return -EINVAL; ++ if (custom_params[0] >= SIENNA_CICHLID_CUSTOM_PARAMS_CLOCK_COUNT) ++ return -EINVAL; ++ idx = custom_params[0] * SIENNA_CICHLID_CUSTOM_PARAMS_COUNT; ++ smu->custom_profile_params[idx] = 1; ++ for (i = 1; i < custom_params_max_idx; i++) ++ smu->custom_profile_params[idx + i] = custom_params[i]; ++ } ++ ret = sienna_cichlid_set_power_profile_mode_coeff(smu, ++ smu->custom_profile_params); + if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; + return ret; + } ++ } else if (smu->custom_profile_params) { ++ memset(smu->custom_profile_params, 0, SIENNA_CICHLID_CUSTOM_PARAMS_SIZE); + } + +- /* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */ +- workload_type = smu_cmn_to_asic_specific_index(smu, +- CMN2ASIC_MAPPING_WORKLOAD, +- smu->power_profile_mode); +- if (workload_type < 0) +- return -EINVAL; + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask, +- 1 << workload_type, NULL); +- if (ret) +- dev_err(smu->adev->dev, "[%s] Failed to set work load mask!", __func__); ++ backend_workload_mask, NULL); ++ if (ret) { ++ dev_err(smu->adev->dev, "Failed to set workload mask 0x%08x\n", ++ workload_mask); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; ++ return ret; ++ } + + return ret; + } +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c +index 1fe020f1f4dbe2..9bca748ac2e947 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c +@@ -1054,42 +1054,27 @@ static int vangogh_get_power_profile_mode(struct smu_context *smu, + return size; + } + +-static int vangogh_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) ++static int vangogh_set_power_profile_mode(struct smu_context *smu, ++ u32 workload_mask, ++ long *custom_params, ++ u32 custom_params_max_idx) + { +- int workload_type, ret; +- uint32_t profile_mode = input[size]; ++ u32 backend_workload_mask = 0; ++ int ret; + +- if (profile_mode >= PP_SMC_POWER_PROFILE_COUNT) { +- dev_err(smu->adev->dev, "Invalid power profile mode %d\n", profile_mode); +- return -EINVAL; +- } +- +- if (profile_mode == PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT || +- profile_mode == PP_SMC_POWER_PROFILE_POWERSAVING) +- return 0; +- +- /* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */ +- workload_type = smu_cmn_to_asic_specific_index(smu, +- CMN2ASIC_MAPPING_WORKLOAD, +- profile_mode); +- if (workload_type < 0) { +- dev_dbg(smu->adev->dev, "Unsupported power profile mode %d on VANGOGH\n", +- profile_mode); +- return -EINVAL; +- } ++ smu_cmn_get_backend_workload_mask(smu, workload_mask, ++ &backend_workload_mask); + + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ActiveProcessNotify, +- 1 << workload_type, +- NULL); ++ backend_workload_mask, ++ NULL); + if (ret) { +- dev_err_once(smu->adev->dev, "Fail to set workload type %d\n", +- workload_type); ++ dev_err_once(smu->adev->dev, "Fail to set workload mask 0x%08x\n", ++ workload_mask); + return ret; + } + +- smu->power_profile_mode = profile_mode; +- +- return 0; ++ return ret; + } + + static int vangogh_set_soft_freq_limited_range(struct smu_context *smu, +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c +index cc0504b063fa3a..1a8a42b176e520 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c +@@ -862,44 +862,27 @@ static int renoir_force_clk_levels(struct smu_context *smu, + return ret; + } + +-static int renoir_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) ++static int renoir_set_power_profile_mode(struct smu_context *smu, ++ u32 workload_mask, ++ long *custom_params, ++ u32 custom_params_max_idx) + { +- int workload_type, ret; +- uint32_t profile_mode = input[size]; ++ int ret; ++ u32 backend_workload_mask = 0; + +- if (profile_mode > PP_SMC_POWER_PROFILE_CUSTOM) { +- dev_err(smu->adev->dev, "Invalid power profile mode %d\n", profile_mode); +- return -EINVAL; +- } +- +- if (profile_mode == PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT || +- profile_mode == PP_SMC_POWER_PROFILE_POWERSAVING) +- return 0; +- +- /* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */ +- workload_type = smu_cmn_to_asic_specific_index(smu, +- CMN2ASIC_MAPPING_WORKLOAD, +- profile_mode); +- if (workload_type < 0) { +- /* +- * TODO: If some case need switch to powersave/default power mode +- * then can consider enter WORKLOAD_COMPUTE/WORKLOAD_CUSTOM for power saving. +- */ +- dev_dbg(smu->adev->dev, "Unsupported power profile mode %d on RENOIR\n", profile_mode); +- return -EINVAL; +- } ++ smu_cmn_get_backend_workload_mask(smu, workload_mask, ++ &backend_workload_mask); + + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ActiveProcessNotify, +- 1 << workload_type, +- NULL); ++ backend_workload_mask, ++ NULL); + if (ret) { +- dev_err_once(smu->adev->dev, "Fail to set workload type %d\n", workload_type); ++ dev_err_once(smu->adev->dev, "Failed to set workload mask 0x08%x\n", ++ workload_mask); + return ret; + } + +- smu->power_profile_mode = profile_mode; +- +- return 0; ++ return ret; + } + + static int renoir_set_peak_clock_by_device(struct smu_context *smu) +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c +index d53e162dcd8de2..a9373968807164 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c +@@ -2477,82 +2477,76 @@ static int smu_v13_0_0_get_power_profile_mode(struct smu_context *smu, + return size; + } + +-static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu, +- long *input, +- uint32_t size) ++#define SMU_13_0_0_CUSTOM_PARAMS_COUNT 9 ++#define SMU_13_0_0_CUSTOM_PARAMS_CLOCK_COUNT 2 ++#define SMU_13_0_0_CUSTOM_PARAMS_SIZE (SMU_13_0_0_CUSTOM_PARAMS_CLOCK_COUNT * SMU_13_0_0_CUSTOM_PARAMS_COUNT * sizeof(long)) ++ ++static int smu_v13_0_0_set_power_profile_mode_coeff(struct smu_context *smu, ++ long *input) + { + DpmActivityMonitorCoeffIntExternal_t activity_monitor_external; + DpmActivityMonitorCoeffInt_t *activity_monitor = + &(activity_monitor_external.DpmActivityMonitorCoeffInt); +- int workload_type, ret = 0; +- u32 workload_mask, selected_workload_mask; +- +- smu->power_profile_mode = input[size]; ++ int ret, idx; + +- if (smu->power_profile_mode >= PP_SMC_POWER_PROFILE_COUNT) { +- dev_err(smu->adev->dev, "Invalid power profile mode %d\n", smu->power_profile_mode); +- return -EINVAL; ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, ++ WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor_external), ++ false); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); ++ return ret; + } + +- if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { +- if (size != 9) +- return -EINVAL; +- +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, +- WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor_external), +- false); +- if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); +- return ret; +- } +- +- switch (input[0]) { +- case 0: /* Gfxclk */ +- activity_monitor->Gfx_FPS = input[1]; +- activity_monitor->Gfx_MinActiveFreqType = input[2]; +- activity_monitor->Gfx_MinActiveFreq = input[3]; +- activity_monitor->Gfx_BoosterFreqType = input[4]; +- activity_monitor->Gfx_BoosterFreq = input[5]; +- activity_monitor->Gfx_PD_Data_limit_c = input[6]; +- activity_monitor->Gfx_PD_Data_error_coeff = input[7]; +- activity_monitor->Gfx_PD_Data_error_rate_coeff = input[8]; +- break; +- case 1: /* Fclk */ +- activity_monitor->Fclk_FPS = input[1]; +- activity_monitor->Fclk_MinActiveFreqType = input[2]; +- activity_monitor->Fclk_MinActiveFreq = input[3]; +- activity_monitor->Fclk_BoosterFreqType = input[4]; +- activity_monitor->Fclk_BoosterFreq = input[5]; +- activity_monitor->Fclk_PD_Data_limit_c = input[6]; +- activity_monitor->Fclk_PD_Data_error_coeff = input[7]; +- activity_monitor->Fclk_PD_Data_error_rate_coeff = input[8]; +- break; +- default: +- return -EINVAL; +- } ++ idx = 0 * SMU_13_0_0_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Gfxclk */ ++ activity_monitor->Gfx_FPS = input[idx + 1]; ++ activity_monitor->Gfx_MinActiveFreqType = input[idx + 2]; ++ activity_monitor->Gfx_MinActiveFreq = input[idx + 3]; ++ activity_monitor->Gfx_BoosterFreqType = input[idx + 4]; ++ activity_monitor->Gfx_BoosterFreq = input[idx + 5]; ++ activity_monitor->Gfx_PD_Data_limit_c = input[idx + 6]; ++ activity_monitor->Gfx_PD_Data_error_coeff = input[idx + 7]; ++ activity_monitor->Gfx_PD_Data_error_rate_coeff = input[idx + 8]; ++ } ++ idx = 1 * SMU_13_0_0_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Fclk */ ++ activity_monitor->Fclk_FPS = input[idx + 1]; ++ activity_monitor->Fclk_MinActiveFreqType = input[idx + 2]; ++ activity_monitor->Fclk_MinActiveFreq = input[idx + 3]; ++ activity_monitor->Fclk_BoosterFreqType = input[idx + 4]; ++ activity_monitor->Fclk_BoosterFreq = input[idx + 5]; ++ activity_monitor->Fclk_PD_Data_limit_c = input[idx + 6]; ++ activity_monitor->Fclk_PD_Data_error_coeff = input[idx + 7]; ++ activity_monitor->Fclk_PD_Data_error_rate_coeff = input[idx + 8]; ++ } + +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, +- WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor_external), +- true); +- if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); +- return ret; +- } ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, ++ WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor_external), ++ true); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ return ret; + } + +- /* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */ +- workload_type = smu_cmn_to_asic_specific_index(smu, +- CMN2ASIC_MAPPING_WORKLOAD, +- smu->power_profile_mode); ++ return ret; ++} + +- if (workload_type < 0) +- return -EINVAL; ++static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu, ++ u32 workload_mask, ++ long *custom_params, ++ u32 custom_params_max_idx) ++{ ++ u32 backend_workload_mask = 0; ++ int workload_type, ret, idx = -1, i; + +- selected_workload_mask = workload_mask = 1 << workload_type; ++ smu_cmn_get_backend_workload_mask(smu, workload_mask, ++ &backend_workload_mask); + + /* Add optimizations for SMU13.0.0/10. Reuse the power saving profile */ + if ((amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 0) && +@@ -2564,15 +2558,48 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu, + CMN2ASIC_MAPPING_WORKLOAD, + PP_SMC_POWER_PROFILE_POWERSAVING); + if (workload_type >= 0) +- workload_mask |= 1 << workload_type; ++ backend_workload_mask |= 1 << workload_type; ++ } ++ ++ if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { ++ if (!smu->custom_profile_params) { ++ smu->custom_profile_params = ++ kzalloc(SMU_13_0_0_CUSTOM_PARAMS_SIZE, GFP_KERNEL); ++ if (!smu->custom_profile_params) ++ return -ENOMEM; ++ } ++ if (custom_params && custom_params_max_idx) { ++ if (custom_params_max_idx != SMU_13_0_0_CUSTOM_PARAMS_COUNT) ++ return -EINVAL; ++ if (custom_params[0] >= SMU_13_0_0_CUSTOM_PARAMS_CLOCK_COUNT) ++ return -EINVAL; ++ idx = custom_params[0] * SMU_13_0_0_CUSTOM_PARAMS_COUNT; ++ smu->custom_profile_params[idx] = 1; ++ for (i = 1; i < custom_params_max_idx; i++) ++ smu->custom_profile_params[idx + i] = custom_params[i]; ++ } ++ ret = smu_v13_0_0_set_power_profile_mode_coeff(smu, ++ smu->custom_profile_params); ++ if (ret) { ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; ++ return ret; ++ } ++ } else if (smu->custom_profile_params) { ++ memset(smu->custom_profile_params, 0, SMU_13_0_0_CUSTOM_PARAMS_SIZE); + } + + ret = smu_cmn_send_smc_msg_with_param(smu, +- SMU_MSG_SetWorkloadMask, +- workload_mask, +- NULL); +- if (!ret) +- smu->workload_mask = selected_workload_mask; ++ SMU_MSG_SetWorkloadMask, ++ backend_workload_mask, ++ NULL); ++ if (ret) { ++ dev_err(smu->adev->dev, "Failed to set workload mask 0x%08x\n", ++ workload_mask); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; ++ return ret; ++ } + + return ret; + } +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c +index ceaf4572db2527..d0e6d051e9cf9f 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c +@@ -2436,78 +2436,110 @@ do { \ + return result; + } + +-static int smu_v13_0_7_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) ++#define SMU_13_0_7_CUSTOM_PARAMS_COUNT 8 ++#define SMU_13_0_7_CUSTOM_PARAMS_CLOCK_COUNT 2 ++#define SMU_13_0_7_CUSTOM_PARAMS_SIZE (SMU_13_0_7_CUSTOM_PARAMS_CLOCK_COUNT * SMU_13_0_7_CUSTOM_PARAMS_COUNT * sizeof(long)) ++ ++static int smu_v13_0_7_set_power_profile_mode_coeff(struct smu_context *smu, ++ long *input) + { + + DpmActivityMonitorCoeffIntExternal_t activity_monitor_external; + DpmActivityMonitorCoeffInt_t *activity_monitor = + &(activity_monitor_external.DpmActivityMonitorCoeffInt); +- int workload_type, ret = 0; ++ int ret, idx; + +- smu->power_profile_mode = input[size]; ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor_external), false); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); ++ return ret; ++ } + +- if (smu->power_profile_mode > PP_SMC_POWER_PROFILE_WINDOW3D) { +- dev_err(smu->adev->dev, "Invalid power profile mode %d\n", smu->power_profile_mode); +- return -EINVAL; ++ idx = 0 * SMU_13_0_7_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Gfxclk */ ++ activity_monitor->Gfx_ActiveHystLimit = input[idx + 1]; ++ activity_monitor->Gfx_IdleHystLimit = input[idx + 2]; ++ activity_monitor->Gfx_FPS = input[idx + 3]; ++ activity_monitor->Gfx_MinActiveFreqType = input[idx + 4]; ++ activity_monitor->Gfx_BoosterFreqType = input[idx + 5]; ++ activity_monitor->Gfx_MinActiveFreq = input[idx + 6]; ++ activity_monitor->Gfx_BoosterFreq = input[idx + 7]; ++ } ++ idx = 1 * SMU_13_0_7_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Fclk */ ++ activity_monitor->Fclk_ActiveHystLimit = input[idx + 1]; ++ activity_monitor->Fclk_IdleHystLimit = input[idx + 2]; ++ activity_monitor->Fclk_FPS = input[idx + 3]; ++ activity_monitor->Fclk_MinActiveFreqType = input[idx + 4]; ++ activity_monitor->Fclk_BoosterFreqType = input[idx + 5]; ++ activity_monitor->Fclk_MinActiveFreq = input[idx + 6]; ++ activity_monitor->Fclk_BoosterFreq = input[idx + 7]; + } + +- if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { +- if (size != 8) +- return -EINVAL; ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor_external), true); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ return ret; ++ } + +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor_external), false); +- if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); +- return ret; +- } ++ return ret; ++} + +- switch (input[0]) { +- case 0: /* Gfxclk */ +- activity_monitor->Gfx_ActiveHystLimit = input[1]; +- activity_monitor->Gfx_IdleHystLimit = input[2]; +- activity_monitor->Gfx_FPS = input[3]; +- activity_monitor->Gfx_MinActiveFreqType = input[4]; +- activity_monitor->Gfx_BoosterFreqType = input[5]; +- activity_monitor->Gfx_MinActiveFreq = input[6]; +- activity_monitor->Gfx_BoosterFreq = input[7]; +- break; +- case 1: /* Fclk */ +- activity_monitor->Fclk_ActiveHystLimit = input[1]; +- activity_monitor->Fclk_IdleHystLimit = input[2]; +- activity_monitor->Fclk_FPS = input[3]; +- activity_monitor->Fclk_MinActiveFreqType = input[4]; +- activity_monitor->Fclk_BoosterFreqType = input[5]; +- activity_monitor->Fclk_MinActiveFreq = input[6]; +- activity_monitor->Fclk_BoosterFreq = input[7]; +- break; +- default: +- return -EINVAL; ++static int smu_v13_0_7_set_power_profile_mode(struct smu_context *smu, ++ u32 workload_mask, ++ long *custom_params, ++ u32 custom_params_max_idx) ++{ ++ u32 backend_workload_mask = 0; ++ int ret, idx = -1, i; ++ ++ smu_cmn_get_backend_workload_mask(smu, workload_mask, ++ &backend_workload_mask); ++ ++ if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { ++ if (!smu->custom_profile_params) { ++ smu->custom_profile_params = ++ kzalloc(SMU_13_0_7_CUSTOM_PARAMS_SIZE, GFP_KERNEL); ++ if (!smu->custom_profile_params) ++ return -ENOMEM; + } +- +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor_external), true); ++ if (custom_params && custom_params_max_idx) { ++ if (custom_params_max_idx != SMU_13_0_7_CUSTOM_PARAMS_COUNT) ++ return -EINVAL; ++ if (custom_params[0] >= SMU_13_0_7_CUSTOM_PARAMS_CLOCK_COUNT) ++ return -EINVAL; ++ idx = custom_params[0] * SMU_13_0_7_CUSTOM_PARAMS_COUNT; ++ smu->custom_profile_params[idx] = 1; ++ for (i = 1; i < custom_params_max_idx; i++) ++ smu->custom_profile_params[idx + i] = custom_params[i]; ++ } ++ ret = smu_v13_0_7_set_power_profile_mode_coeff(smu, ++ smu->custom_profile_params); + if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; + return ret; + } ++ } else if (smu->custom_profile_params) { ++ memset(smu->custom_profile_params, 0, SMU_13_0_7_CUSTOM_PARAMS_SIZE); + } + +- /* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */ +- workload_type = smu_cmn_to_asic_specific_index(smu, +- CMN2ASIC_MAPPING_WORKLOAD, +- smu->power_profile_mode); +- if (workload_type < 0) +- return -EINVAL; + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask, +- 1 << workload_type, NULL); ++ backend_workload_mask, NULL); + +- if (ret) +- dev_err(smu->adev->dev, "[%s] Failed to set work load mask!", __func__); +- else +- smu->workload_mask = (1 << workload_type); ++ if (ret) { ++ dev_err(smu->adev->dev, "Failed to set workload mask 0x%08x\n", ++ workload_mask); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; ++ return ret; ++ } + + return ret; + } +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c +index 82aef8626afa97..b22fb7eafcd3f2 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c +@@ -1751,90 +1751,120 @@ static int smu_v14_0_2_get_power_profile_mode(struct smu_context *smu, + return size; + } + +-static int smu_v14_0_2_set_power_profile_mode(struct smu_context *smu, +- long *input, +- uint32_t size) ++#define SMU_14_0_2_CUSTOM_PARAMS_COUNT 9 ++#define SMU_14_0_2_CUSTOM_PARAMS_CLOCK_COUNT 2 ++#define SMU_14_0_2_CUSTOM_PARAMS_SIZE (SMU_14_0_2_CUSTOM_PARAMS_CLOCK_COUNT * SMU_14_0_2_CUSTOM_PARAMS_COUNT * sizeof(long)) ++ ++static int smu_v14_0_2_set_power_profile_mode_coeff(struct smu_context *smu, ++ long *input) + { + DpmActivityMonitorCoeffIntExternal_t activity_monitor_external; + DpmActivityMonitorCoeffInt_t *activity_monitor = + &(activity_monitor_external.DpmActivityMonitorCoeffInt); +- int workload_type, ret = 0; +- uint32_t current_profile_mode = smu->power_profile_mode; +- smu->power_profile_mode = input[size]; ++ int ret, idx; + +- if (smu->power_profile_mode >= PP_SMC_POWER_PROFILE_COUNT) { +- dev_err(smu->adev->dev, "Invalid power profile mode %d\n", smu->power_profile_mode); +- return -EINVAL; ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, ++ WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor_external), ++ false); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); ++ return ret; + } + +- if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { +- if (size != 9) +- return -EINVAL; ++ idx = 0 * SMU_14_0_2_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Gfxclk */ ++ activity_monitor->Gfx_FPS = input[idx + 1]; ++ activity_monitor->Gfx_MinActiveFreqType = input[idx + 2]; ++ activity_monitor->Gfx_MinActiveFreq = input[idx + 3]; ++ activity_monitor->Gfx_BoosterFreqType = input[idx + 4]; ++ activity_monitor->Gfx_BoosterFreq = input[idx + 5]; ++ activity_monitor->Gfx_PD_Data_limit_c = input[idx + 6]; ++ activity_monitor->Gfx_PD_Data_error_coeff = input[idx + 7]; ++ activity_monitor->Gfx_PD_Data_error_rate_coeff = input[idx + 8]; ++ } ++ idx = 1 * SMU_14_0_2_CUSTOM_PARAMS_COUNT; ++ if (input[idx]) { ++ /* Fclk */ ++ activity_monitor->Fclk_FPS = input[idx + 1]; ++ activity_monitor->Fclk_MinActiveFreqType = input[idx + 2]; ++ activity_monitor->Fclk_MinActiveFreq = input[idx + 3]; ++ activity_monitor->Fclk_BoosterFreqType = input[idx + 4]; ++ activity_monitor->Fclk_BoosterFreq = input[idx + 5]; ++ activity_monitor->Fclk_PD_Data_limit_c = input[idx + 6]; ++ activity_monitor->Fclk_PD_Data_error_coeff = input[idx + 7]; ++ activity_monitor->Fclk_PD_Data_error_rate_coeff = input[idx + 8]; ++ } + +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, +- WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor_external), +- false); +- if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__); +- return ret; +- } ++ ret = smu_cmn_update_table(smu, ++ SMU_TABLE_ACTIVITY_MONITOR_COEFF, ++ WORKLOAD_PPLIB_CUSTOM_BIT, ++ (void *)(&activity_monitor_external), ++ true); ++ if (ret) { ++ dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); ++ return ret; ++ } + +- switch (input[0]) { +- case 0: /* Gfxclk */ +- activity_monitor->Gfx_FPS = input[1]; +- activity_monitor->Gfx_MinActiveFreqType = input[2]; +- activity_monitor->Gfx_MinActiveFreq = input[3]; +- activity_monitor->Gfx_BoosterFreqType = input[4]; +- activity_monitor->Gfx_BoosterFreq = input[5]; +- activity_monitor->Gfx_PD_Data_limit_c = input[6]; +- activity_monitor->Gfx_PD_Data_error_coeff = input[7]; +- activity_monitor->Gfx_PD_Data_error_rate_coeff = input[8]; +- break; +- case 1: /* Fclk */ +- activity_monitor->Fclk_FPS = input[1]; +- activity_monitor->Fclk_MinActiveFreqType = input[2]; +- activity_monitor->Fclk_MinActiveFreq = input[3]; +- activity_monitor->Fclk_BoosterFreqType = input[4]; +- activity_monitor->Fclk_BoosterFreq = input[5]; +- activity_monitor->Fclk_PD_Data_limit_c = input[6]; +- activity_monitor->Fclk_PD_Data_error_coeff = input[7]; +- activity_monitor->Fclk_PD_Data_error_rate_coeff = input[8]; +- break; +- default: +- return -EINVAL; +- } ++ return ret; ++} + +- ret = smu_cmn_update_table(smu, +- SMU_TABLE_ACTIVITY_MONITOR_COEFF, +- WORKLOAD_PPLIB_CUSTOM_BIT, +- (void *)(&activity_monitor_external), +- true); +- if (ret) { +- dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__); +- return ret; +- } +- } ++static int smu_v14_0_2_set_power_profile_mode(struct smu_context *smu, ++ u32 workload_mask, ++ long *custom_params, ++ u32 custom_params_max_idx) ++{ ++ u32 backend_workload_mask = 0; ++ int ret, idx = -1, i; ++ ++ smu_cmn_get_backend_workload_mask(smu, workload_mask, ++ &backend_workload_mask); + +- if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_COMPUTE) ++ /* disable deep sleep if compute is enabled */ ++ if (workload_mask & (1 << PP_SMC_POWER_PROFILE_COMPUTE)) + smu_v14_0_deep_sleep_control(smu, false); +- else if (current_profile_mode == PP_SMC_POWER_PROFILE_COMPUTE) ++ else + smu_v14_0_deep_sleep_control(smu, true); + +- /* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */ +- workload_type = smu_cmn_to_asic_specific_index(smu, +- CMN2ASIC_MAPPING_WORKLOAD, +- smu->power_profile_mode); +- if (workload_type < 0) +- return -EINVAL; ++ if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { ++ if (!smu->custom_profile_params) { ++ smu->custom_profile_params = ++ kzalloc(SMU_14_0_2_CUSTOM_PARAMS_SIZE, GFP_KERNEL); ++ if (!smu->custom_profile_params) ++ return -ENOMEM; ++ } ++ if (custom_params && custom_params_max_idx) { ++ if (custom_params_max_idx != SMU_14_0_2_CUSTOM_PARAMS_COUNT) ++ return -EINVAL; ++ if (custom_params[0] >= SMU_14_0_2_CUSTOM_PARAMS_CLOCK_COUNT) ++ return -EINVAL; ++ idx = custom_params[0] * SMU_14_0_2_CUSTOM_PARAMS_COUNT; ++ smu->custom_profile_params[idx] = 1; ++ for (i = 1; i < custom_params_max_idx; i++) ++ smu->custom_profile_params[idx + i] = custom_params[i]; ++ } ++ ret = smu_v14_0_2_set_power_profile_mode_coeff(smu, ++ smu->custom_profile_params); ++ if (ret) { ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; ++ return ret; ++ } ++ } else if (smu->custom_profile_params) { ++ memset(smu->custom_profile_params, 0, SMU_14_0_2_CUSTOM_PARAMS_SIZE); ++ } + +- ret = smu_cmn_send_smc_msg_with_param(smu, +- SMU_MSG_SetWorkloadMask, +- 1 << workload_type, +- NULL); +- if (!ret) +- smu->workload_mask = 1 << workload_type; ++ ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask, ++ backend_workload_mask, NULL); ++ if (ret) { ++ dev_err(smu->adev->dev, "Failed to set workload mask 0x%08x\n", ++ workload_mask); ++ if (idx != -1) ++ smu->custom_profile_params[idx] = 0; ++ return ret; ++ } + + return ret; + } +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c +index 91ad434bcdaeb4..0d71db7be325da 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c +@@ -1215,3 +1215,28 @@ void smu_cmn_generic_plpd_policy_desc(struct smu_dpm_policy *policy) + { + policy->desc = &xgmi_plpd_policy_desc; + } ++ ++void smu_cmn_get_backend_workload_mask(struct smu_context *smu, ++ u32 workload_mask, ++ u32 *backend_workload_mask) ++{ ++ int workload_type; ++ u32 profile_mode; ++ ++ *backend_workload_mask = 0; ++ ++ for (profile_mode = 0; profile_mode < PP_SMC_POWER_PROFILE_COUNT; profile_mode++) { ++ if (!(workload_mask & (1 << profile_mode))) ++ continue; ++ ++ /* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */ ++ workload_type = smu_cmn_to_asic_specific_index(smu, ++ CMN2ASIC_MAPPING_WORKLOAD, ++ profile_mode); ++ ++ if (workload_type < 0) ++ continue; ++ ++ *backend_workload_mask |= 1 << workload_type; ++ } ++} +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h +index 1de685defe85b1..a020277dec3e96 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h +@@ -147,5 +147,9 @@ bool smu_cmn_is_audio_func_enabled(struct amdgpu_device *adev); + void smu_cmn_generic_soc_policy_desc(struct smu_dpm_policy *policy); + void smu_cmn_generic_plpd_policy_desc(struct smu_dpm_policy *policy); + ++void smu_cmn_get_backend_workload_mask(struct smu_context *smu, ++ u32 workload_mask, ++ u32 *backend_workload_mask); ++ + #endif + #endif +diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c +index 65b57de20203f5..008d86cc562af7 100644 +--- a/drivers/gpu/drm/bridge/ite-it6505.c ++++ b/drivers/gpu/drm/bridge/ite-it6505.c +@@ -3507,6 +3507,7 @@ static const struct of_device_id it6505_of_match[] = { + { .compatible = "ite,it6505" }, + { } + }; ++MODULE_DEVICE_TABLE(of, it6505_of_match); + + static struct i2c_driver it6505_i2c_driver = { + .driver = { +diff --git a/drivers/gpu/drm/display/drm_dp_dual_mode_helper.c b/drivers/gpu/drm/display/drm_dp_dual_mode_helper.c +index 14a2a8473682b0..c491e3203bf11c 100644 +--- a/drivers/gpu/drm/display/drm_dp_dual_mode_helper.c ++++ b/drivers/gpu/drm/display/drm_dp_dual_mode_helper.c +@@ -160,11 +160,11 @@ EXPORT_SYMBOL(drm_dp_dual_mode_write); + + static bool is_hdmi_adaptor(const char hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN]) + { +- static const char dp_dual_mode_hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN] = ++ static const char dp_dual_mode_hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN + 1] = + "DP-HDMI ADAPTOR\x04"; + + return memcmp(hdmi_id, dp_dual_mode_hdmi_id, +- sizeof(dp_dual_mode_hdmi_id)) == 0; ++ DP_DUAL_MODE_HDMI_ID_LEN) == 0; + } + + static bool is_type1_adaptor(uint8_t adaptor_id) +diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c +index ac90118b9e7a81..bcf3a33123be1c 100644 +--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c ++++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c +@@ -320,6 +320,9 @@ static bool drm_dp_decode_sideband_msg_hdr(const struct drm_dp_mst_topology_mgr + hdr->broadcast = (buf[idx] >> 7) & 0x1; + hdr->path_msg = (buf[idx] >> 6) & 0x1; + hdr->msg_len = buf[idx] & 0x3f; ++ if (hdr->msg_len < 1) /* min space for body CRC */ ++ return false; ++ + idx++; + hdr->somt = (buf[idx] >> 7) & 0x1; + hdr->eomt = (buf[idx] >> 6) & 0x1; +@@ -3697,8 +3700,7 @@ int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool ms + ret = 0; + mgr->payload_id_table_cleared = false; + +- memset(&mgr->down_rep_recv, 0, sizeof(mgr->down_rep_recv)); +- memset(&mgr->up_req_recv, 0, sizeof(mgr->up_req_recv)); ++ mgr->reset_rx_state = true; + } + + out_unlock: +@@ -3856,6 +3858,11 @@ int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr, + } + EXPORT_SYMBOL(drm_dp_mst_topology_mgr_resume); + ++static void reset_msg_rx_state(struct drm_dp_sideband_msg_rx *msg) ++{ ++ memset(msg, 0, sizeof(*msg)); ++} ++ + static bool + drm_dp_get_one_sb_msg(struct drm_dp_mst_topology_mgr *mgr, bool up, + struct drm_dp_mst_branch **mstb) +@@ -3934,6 +3941,34 @@ drm_dp_get_one_sb_msg(struct drm_dp_mst_topology_mgr *mgr, bool up, + return true; + } + ++static int get_msg_request_type(u8 data) ++{ ++ return data & 0x7f; ++} ++ ++static bool verify_rx_request_type(struct drm_dp_mst_topology_mgr *mgr, ++ const struct drm_dp_sideband_msg_tx *txmsg, ++ const struct drm_dp_sideband_msg_rx *rxmsg) ++{ ++ const struct drm_dp_sideband_msg_hdr *hdr = &rxmsg->initial_hdr; ++ const struct drm_dp_mst_branch *mstb = txmsg->dst; ++ int tx_req_type = get_msg_request_type(txmsg->msg[0]); ++ int rx_req_type = get_msg_request_type(rxmsg->msg[0]); ++ char rad_str[64]; ++ ++ if (tx_req_type == rx_req_type) ++ return true; ++ ++ drm_dp_mst_rad_to_str(mstb->rad, mstb->lct, rad_str, sizeof(rad_str)); ++ drm_dbg_kms(mgr->dev, ++ "Got unexpected MST reply, mstb: %p seqno: %d lct: %d rad: %s rx_req_type: %s (%02x) != tx_req_type: %s (%02x)\n", ++ mstb, hdr->seqno, mstb->lct, rad_str, ++ drm_dp_mst_req_type_str(rx_req_type), rx_req_type, ++ drm_dp_mst_req_type_str(tx_req_type), tx_req_type); ++ ++ return false; ++} ++ + static int drm_dp_mst_handle_down_rep(struct drm_dp_mst_topology_mgr *mgr) + { + struct drm_dp_sideband_msg_tx *txmsg; +@@ -3963,6 +3998,9 @@ static int drm_dp_mst_handle_down_rep(struct drm_dp_mst_topology_mgr *mgr) + goto out_clear_reply; + } + ++ if (!verify_rx_request_type(mgr, txmsg, msg)) ++ goto out_clear_reply; ++ + drm_dp_sideband_parse_reply(mgr, msg, &txmsg->reply); + + if (txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK) { +@@ -4138,6 +4176,17 @@ static int drm_dp_mst_handle_up_req(struct drm_dp_mst_topology_mgr *mgr) + return 0; + } + ++static void update_msg_rx_state(struct drm_dp_mst_topology_mgr *mgr) ++{ ++ mutex_lock(&mgr->lock); ++ if (mgr->reset_rx_state) { ++ mgr->reset_rx_state = false; ++ reset_msg_rx_state(&mgr->down_rep_recv); ++ reset_msg_rx_state(&mgr->up_req_recv); ++ } ++ mutex_unlock(&mgr->lock); ++} ++ + /** + * drm_dp_mst_hpd_irq_handle_event() - MST hotplug IRQ handle MST event + * @mgr: manager to notify irq for. +@@ -4172,6 +4221,8 @@ int drm_dp_mst_hpd_irq_handle_event(struct drm_dp_mst_topology_mgr *mgr, const u + *handled = true; + } + ++ update_msg_rx_state(mgr); ++ + if (esi[1] & DP_DOWN_REP_MSG_RDY) { + ret = drm_dp_mst_handle_down_rep(mgr); + *handled = true; +diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c b/drivers/gpu/drm/drm_panel_orientation_quirks.c +index 2d84d7ea1ab7a0..4a73821b81f6fd 100644 +--- a/drivers/gpu/drm/drm_panel_orientation_quirks.c ++++ b/drivers/gpu/drm/drm_panel_orientation_quirks.c +@@ -184,6 +184,12 @@ static const struct dmi_system_id orientation_data[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T103HAF"), + }, + .driver_data = (void *)&lcd800x1280_rightside_up, ++ }, { /* AYA NEO AYANEO 2 */ ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AYANEO"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "AYANEO 2"), ++ }, ++ .driver_data = (void *)&lcd1200x1920_rightside_up, + }, { /* AYA NEO 2021 */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AYADEVICE"), +@@ -196,6 +202,18 @@ static const struct dmi_system_id orientation_data[] = { + DMI_MATCH(DMI_PRODUCT_NAME, "AIR"), + }, + .driver_data = (void *)&lcd1080x1920_leftside_up, ++ }, { /* AYA NEO Founder */ ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AYA NEO"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "AYA NEO Founder"), ++ }, ++ .driver_data = (void *)&lcd800x1280_rightside_up, ++ }, { /* AYA NEO GEEK */ ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AYANEO"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "GEEK"), ++ }, ++ .driver_data = (void *)&lcd800x1280_rightside_up, + }, { /* AYA NEO NEXT */ + .matches = { + DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AYANEO"), +diff --git a/drivers/gpu/drm/drm_panic.c b/drivers/gpu/drm/drm_panic.c +index 74412b7bf936c2..0a9ecc1380d2a4 100644 +--- a/drivers/gpu/drm/drm_panic.c ++++ b/drivers/gpu/drm/drm_panic.c +@@ -209,6 +209,14 @@ static u32 convert_xrgb8888_to_argb2101010(u32 pix) + return GENMASK(31, 30) /* set alpha bits */ | pix | ((pix >> 8) & 0x00300C03); + } + ++static u32 convert_xrgb8888_to_abgr2101010(u32 pix) ++{ ++ pix = ((pix & 0x00FF0000) >> 14) | ++ ((pix & 0x0000FF00) << 4) | ++ ((pix & 0x000000FF) << 22); ++ return GENMASK(31, 30) /* set alpha bits */ | pix | ((pix >> 8) & 0x00300C03); ++} ++ + /* + * convert_from_xrgb8888 - convert one pixel from xrgb8888 to the desired format + * @color: input color, in xrgb8888 format +@@ -242,6 +250,8 @@ static u32 convert_from_xrgb8888(u32 color, u32 format) + return convert_xrgb8888_to_xrgb2101010(color); + case DRM_FORMAT_ARGB2101010: + return convert_xrgb8888_to_argb2101010(color); ++ case DRM_FORMAT_ABGR2101010: ++ return convert_xrgb8888_to_abgr2101010(color); + default: + WARN_ONCE(1, "Can't convert to %p4cc\n", &format); + return 0; +diff --git a/drivers/gpu/drm/mcde/mcde_drv.c b/drivers/gpu/drm/mcde/mcde_drv.c +index 10c06440c7e73e..f1bb38f4e67349 100644 +--- a/drivers/gpu/drm/mcde/mcde_drv.c ++++ b/drivers/gpu/drm/mcde/mcde_drv.c +@@ -473,6 +473,7 @@ static const struct of_device_id mcde_of_match[] = { + }, + {}, + }; ++MODULE_DEVICE_TABLE(of, mcde_of_match); + + static struct platform_driver mcde_driver = { + .driver = { +diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c +index 86735430462fa6..06381c62820975 100644 +--- a/drivers/gpu/drm/panel/panel-simple.c ++++ b/drivers/gpu/drm/panel/panel-simple.c +@@ -4565,6 +4565,31 @@ static const struct panel_desc yes_optoelectronics_ytc700tlag_05_201c = { + .connector_type = DRM_MODE_CONNECTOR_LVDS, + }; + ++static const struct drm_display_mode mchp_ac69t88a_mode = { ++ .clock = 25000, ++ .hdisplay = 800, ++ .hsync_start = 800 + 88, ++ .hsync_end = 800 + 88 + 5, ++ .htotal = 800 + 88 + 5 + 40, ++ .vdisplay = 480, ++ .vsync_start = 480 + 23, ++ .vsync_end = 480 + 23 + 5, ++ .vtotal = 480 + 23 + 5 + 1, ++}; ++ ++static const struct panel_desc mchp_ac69t88a = { ++ .modes = &mchp_ac69t88a_mode, ++ .num_modes = 1, ++ .bpc = 8, ++ .size = { ++ .width = 108, ++ .height = 65, ++ }, ++ .bus_flags = DRM_BUS_FLAG_DE_HIGH, ++ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, ++ .connector_type = DRM_MODE_CONNECTOR_LVDS, ++}; ++ + static const struct drm_display_mode arm_rtsm_mode[] = { + { + .clock = 65000, +@@ -5048,6 +5073,9 @@ static const struct of_device_id platform_of_match[] = { + }, { + .compatible = "yes-optoelectronics,ytc700tlag-05-201c", + .data = &yes_optoelectronics_ytc700tlag_05_201c, ++ }, { ++ .compatible = "microchip,ac69t88a", ++ .data = &mchp_ac69t88a, + }, { + /* Must be the last entry */ + .compatible = "panel-dpi", +diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c +index 1b2d31c4d77caa..ac77d1246b9453 100644 +--- a/drivers/gpu/drm/radeon/r600_cs.c ++++ b/drivers/gpu/drm/radeon/r600_cs.c +@@ -2104,7 +2104,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p, + return -EINVAL; + } + +- offset = radeon_get_ib_value(p, idx+1) << 8; ++ offset = (u64)radeon_get_ib_value(p, idx+1) << 8; + if (offset != track->vgt_strmout_bo_offset[idx_value]) { + DRM_ERROR("bad STRMOUT_BASE_UPDATE, bo offset does not match: 0x%llx, 0x%x\n", + offset, track->vgt_strmout_bo_offset[idx_value]); +diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c +index e97c6c60bc96ef..416590ea0dc3d6 100644 +--- a/drivers/gpu/drm/scheduler/sched_main.c ++++ b/drivers/gpu/drm/scheduler/sched_main.c +@@ -803,6 +803,14 @@ int drm_sched_job_init(struct drm_sched_job *job, + return -EINVAL; + } + ++ /* ++ * We don't know for sure how the user has allocated. Thus, zero the ++ * struct so that unallowed (i.e., too early) usage of pointers that ++ * this function does not set is guaranteed to lead to a NULL pointer ++ * exception instead of UB. ++ */ ++ memset(job, 0, sizeof(*job)); ++ + job->entity = entity; + job->credits = credits; + job->s_fence = drm_sched_fence_alloc(entity, owner); +diff --git a/drivers/gpu/drm/sti/sti_mixer.c b/drivers/gpu/drm/sti/sti_mixer.c +index 7e5f14646625b4..06c1b81912f79f 100644 +--- a/drivers/gpu/drm/sti/sti_mixer.c ++++ b/drivers/gpu/drm/sti/sti_mixer.c +@@ -137,7 +137,7 @@ static void mixer_dbg_crb(struct seq_file *s, int val) + } + } + +-static void mixer_dbg_mxn(struct seq_file *s, void *addr) ++static void mixer_dbg_mxn(struct seq_file *s, void __iomem *addr) + { + int i; + +diff --git a/drivers/gpu/drm/v3d/v3d_perfmon.c b/drivers/gpu/drm/v3d/v3d_perfmon.c +index 00cd081d787327..6ee56cbd3f1bfc 100644 +--- a/drivers/gpu/drm/v3d/v3d_perfmon.c ++++ b/drivers/gpu/drm/v3d/v3d_perfmon.c +@@ -254,9 +254,9 @@ void v3d_perfmon_start(struct v3d_dev *v3d, struct v3d_perfmon *perfmon) + V3D_CORE_WRITE(0, V3D_V4_PCTR_0_SRC_X(source), channel); + } + ++ V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, mask); + V3D_CORE_WRITE(0, V3D_V4_PCTR_0_CLR, mask); + V3D_CORE_WRITE(0, V3D_PCTR_0_OVERFLOW, mask); +- V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, mask); + + v3d->active_perfmon = perfmon; + } +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index 2d7d3e90f3be44..7e0a5ea7ab859a 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -1924,7 +1924,7 @@ static int vc4_hdmi_audio_startup(struct device *dev, void *data) + } + + if (!vc4_hdmi_audio_can_stream(vc4_hdmi)) { +- ret = -ENODEV; ++ ret = -ENOTSUPP; + goto out_dev_exit; + } + +diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c +index 863539e1f7e04b..c389e82463bfdb 100644 +--- a/drivers/gpu/drm/vc4/vc4_hvs.c ++++ b/drivers/gpu/drm/vc4/vc4_hvs.c +@@ -963,6 +963,17 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) + SCALER_DISPCTRL_SCLEIRQ); + + ++ /* Set AXI panic mode. ++ * VC4 panics when < 2 lines in FIFO. ++ * VC5 panics when less than 1 line in the FIFO. ++ */ ++ dispctrl &= ~(SCALER_DISPCTRL_PANIC0_MASK | ++ SCALER_DISPCTRL_PANIC1_MASK | ++ SCALER_DISPCTRL_PANIC2_MASK); ++ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC0); ++ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC1); ++ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC2); ++ + /* Set AXI panic mode. + * VC4 panics when < 2 lines in FIFO. + * VC5 panics when less than 1 line in the FIFO. +diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h +index 81b71903675e0d..7c78496e6213cc 100644 +--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h ++++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h +@@ -186,6 +186,7 @@ + + #define VDBOX_CGCTL3F10(base) XE_REG((base) + 0x3f10) + #define IECPUNIT_CLKGATE_DIS REG_BIT(22) ++#define RAMDFTUNIT_CLKGATE_DIS REG_BIT(9) + + #define VDBOX_CGCTL3F18(base) XE_REG((base) + 0x3f18) + #define ALNUNIT_CLKGATE_DIS REG_BIT(13) +diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h +index bd604b9f08e4fa..5404de2aea5457 100644 +--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h ++++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h +@@ -286,6 +286,9 @@ + #define GAMTLBVEBOX0_CLKGATE_DIS REG_BIT(16) + #define LTCDD_CLKGATE_DIS REG_BIT(10) + ++#define UNSLCGCTL9454 XE_REG(0x9454) ++#define LSCFE_CLKGATE_DIS REG_BIT(4) ++ + #define XEHP_SLICE_UNIT_LEVEL_CLKGATE XE_REG_MCR(0x94d4) + #define L3_CR2X_CLKGATE_DIS REG_BIT(17) + #define L3_CLKGATE_DIS REG_BIT(16) +diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c +index bdb76e834e4c36..5221ee3f12149b 100644 +--- a/drivers/gpu/drm/xe/xe_devcoredump.c ++++ b/drivers/gpu/drm/xe/xe_devcoredump.c +@@ -6,6 +6,7 @@ + #include "xe_devcoredump.h" + #include "xe_devcoredump_types.h" + ++#include + #include + #include + +@@ -85,9 +86,9 @@ static ssize_t __xe_devcoredump_read(char *buffer, size_t count, + + p = drm_coredump_printer(&iter); + +- drm_printf(&p, "**** Xe Device Coredump ****\n"); +- drm_printf(&p, "kernel: " UTS_RELEASE "\n"); +- drm_printf(&p, "module: " KBUILD_MODNAME "\n"); ++ drm_puts(&p, "**** Xe Device Coredump ****\n"); ++ drm_puts(&p, "kernel: " UTS_RELEASE "\n"); ++ drm_puts(&p, "module: " KBUILD_MODNAME "\n"); + + ts = ktime_to_timespec64(ss->snapshot_time); + drm_printf(&p, "Snapshot time: %lld.%09ld\n", ts.tv_sec, ts.tv_nsec); +@@ -96,20 +97,25 @@ static ssize_t __xe_devcoredump_read(char *buffer, size_t count, + drm_printf(&p, "Process: %s\n", ss->process_name); + xe_device_snapshot_print(xe, &p); + +- drm_printf(&p, "\n**** GuC CT ****\n"); +- xe_guc_ct_snapshot_print(coredump->snapshot.ct, &p); +- xe_guc_exec_queue_snapshot_print(coredump->snapshot.ge, &p); ++ drm_printf(&p, "\n**** GT #%d ****\n", ss->gt->info.id); ++ drm_printf(&p, "\tTile: %d\n", ss->gt->tile->id); + +- drm_printf(&p, "\n**** Job ****\n"); +- xe_sched_job_snapshot_print(coredump->snapshot.job, &p); ++ drm_puts(&p, "\n**** GuC CT ****\n"); ++ xe_guc_ct_snapshot_print(ss->ct, &p); + +- drm_printf(&p, "\n**** HW Engines ****\n"); ++ drm_puts(&p, "\n**** Contexts ****\n"); ++ xe_guc_exec_queue_snapshot_print(ss->ge, &p); ++ ++ drm_puts(&p, "\n**** Job ****\n"); ++ xe_sched_job_snapshot_print(ss->job, &p); ++ ++ drm_puts(&p, "\n**** HW Engines ****\n"); + for (i = 0; i < XE_NUM_HW_ENGINES; i++) +- if (coredump->snapshot.hwe[i]) +- xe_hw_engine_snapshot_print(coredump->snapshot.hwe[i], +- &p); +- drm_printf(&p, "\n**** VM state ****\n"); +- xe_vm_snapshot_print(coredump->snapshot.vm, &p); ++ if (ss->hwe[i]) ++ xe_hw_engine_snapshot_print(ss->hwe[i], &p); ++ ++ drm_puts(&p, "\n**** VM state ****\n"); ++ xe_vm_snapshot_print(ss->vm, &p); + + return count - iter.remain; + } +@@ -141,13 +147,15 @@ static void xe_devcoredump_deferred_snap_work(struct work_struct *work) + { + struct xe_devcoredump_snapshot *ss = container_of(work, typeof(*ss), work); + struct xe_devcoredump *coredump = container_of(ss, typeof(*coredump), snapshot); ++ unsigned int fw_ref; + + /* keep going if fw fails as we still want to save the memory and SW data */ +- if (xe_force_wake_get(gt_to_fw(ss->gt), XE_FORCEWAKE_ALL)) ++ fw_ref = xe_force_wake_get(gt_to_fw(ss->gt), XE_FORCEWAKE_ALL); ++ if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) + xe_gt_info(ss->gt, "failed to get forcewake for coredump capture\n"); + xe_vm_snapshot_capture_delayed(ss->vm); + xe_guc_exec_queue_snapshot_capture_delayed(ss->ge); +- xe_force_wake_put(gt_to_fw(ss->gt), XE_FORCEWAKE_ALL); ++ xe_force_wake_put(gt_to_fw(ss->gt), fw_ref); + + /* Calculate devcoredump size */ + ss->read.size = __xe_devcoredump_read(NULL, INT_MAX, coredump); +@@ -220,8 +228,9 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump, + u32 width_mask = (0x1 << q->width) - 1; + const char *process_name = "no process"; + +- int i; ++ unsigned int fw_ref; + bool cookie; ++ int i; + + ss->snapshot_time = ktime_get_real(); + ss->boot_time = ktime_get_boottime(); +@@ -244,26 +253,25 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump, + } + + /* keep going if fw fails as we still want to save the memory and SW data */ +- if (xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL)) +- xe_gt_info(ss->gt, "failed to get forcewake for coredump capture\n"); ++ fw_ref = xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL); + +- coredump->snapshot.ct = xe_guc_ct_snapshot_capture(&guc->ct, true); +- coredump->snapshot.ge = xe_guc_exec_queue_snapshot_capture(q); +- coredump->snapshot.job = xe_sched_job_snapshot_capture(job); +- coredump->snapshot.vm = xe_vm_snapshot_capture(q->vm); ++ ss->ct = xe_guc_ct_snapshot_capture(&guc->ct, true); ++ ss->ge = xe_guc_exec_queue_snapshot_capture(q); ++ ss->job = xe_sched_job_snapshot_capture(job); ++ ss->vm = xe_vm_snapshot_capture(q->vm); + + for_each_hw_engine(hwe, q->gt, id) { + if (hwe->class != q->hwe->class || + !(BIT(hwe->logical_instance) & adj_logical_mask)) { +- coredump->snapshot.hwe[id] = NULL; ++ ss->hwe[id] = NULL; + continue; + } +- coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe); ++ ss->hwe[id] = xe_hw_engine_snapshot_capture(hwe); + } + + queue_work(system_unbound_wq, &ss->work); + +- xe_force_wake_put(gt_to_fw(q->gt), XE_FORCEWAKE_ALL); ++ xe_force_wake_put(gt_to_fw(q->gt), fw_ref); + dma_fence_end_signalling(cookie); + } + +@@ -310,3 +318,89 @@ int xe_devcoredump_init(struct xe_device *xe) + } + + #endif ++ ++/** ++ * xe_print_blob_ascii85 - print a BLOB to some useful location in ASCII85 ++ * ++ * The output is split to multiple lines because some print targets, e.g. dmesg ++ * cannot handle arbitrarily long lines. Note also that printing to dmesg in ++ * piece-meal fashion is not possible, each separate call to drm_puts() has a ++ * line-feed automatically added! Therefore, the entire output line must be ++ * constructed in a local buffer first, then printed in one atomic output call. ++ * ++ * There is also a scheduler yield call to prevent the 'task has been stuck for ++ * 120s' kernel hang check feature from firing when printing to a slow target ++ * such as dmesg over a serial port. ++ * ++ * TODO: Add compression prior to the ASCII85 encoding to shrink huge buffers down. ++ * ++ * @p: the printer object to output to ++ * @prefix: optional prefix to add to output string ++ * @blob: the Binary Large OBject to dump out ++ * @offset: offset in bytes to skip from the front of the BLOB, must be a multiple of sizeof(u32) ++ * @size: the size in bytes of the BLOB, must be a multiple of sizeof(u32) ++ */ ++void xe_print_blob_ascii85(struct drm_printer *p, const char *prefix, ++ const void *blob, size_t offset, size_t size) ++{ ++ const u32 *blob32 = (const u32 *)blob; ++ char buff[ASCII85_BUFSZ], *line_buff; ++ size_t line_pos = 0; ++ ++#define DMESG_MAX_LINE_LEN 800 ++#define MIN_SPACE (ASCII85_BUFSZ + 2) /* 85 + "\n\0" */ ++ ++ if (size & 3) ++ drm_printf(p, "Size not word aligned: %zu", size); ++ if (offset & 3) ++ drm_printf(p, "Offset not word aligned: %zu", size); ++ ++ line_buff = kzalloc(DMESG_MAX_LINE_LEN, GFP_KERNEL); ++ if (IS_ERR_OR_NULL(line_buff)) { ++ drm_printf(p, "Failed to allocate line buffer: %pe", line_buff); ++ return; ++ } ++ ++ blob32 += offset / sizeof(*blob32); ++ size /= sizeof(*blob32); ++ ++ if (prefix) { ++ strscpy(line_buff, prefix, DMESG_MAX_LINE_LEN - MIN_SPACE - 2); ++ line_pos = strlen(line_buff); ++ ++ line_buff[line_pos++] = ':'; ++ line_buff[line_pos++] = ' '; ++ } ++ ++ while (size--) { ++ u32 val = *(blob32++); ++ ++ strscpy(line_buff + line_pos, ascii85_encode(val, buff), ++ DMESG_MAX_LINE_LEN - line_pos); ++ line_pos += strlen(line_buff + line_pos); ++ ++ if ((line_pos + MIN_SPACE) >= DMESG_MAX_LINE_LEN) { ++ line_buff[line_pos++] = '\n'; ++ line_buff[line_pos++] = 0; ++ ++ drm_puts(p, line_buff); ++ ++ line_pos = 0; ++ ++ /* Prevent 'stuck thread' time out errors */ ++ cond_resched(); ++ } ++ } ++ ++ if (line_pos) { ++ line_buff[line_pos++] = '\n'; ++ line_buff[line_pos++] = 0; ++ ++ drm_puts(p, line_buff); ++ } ++ ++ kfree(line_buff); ++ ++#undef MIN_SPACE ++#undef DMESG_MAX_LINE_LEN ++} +diff --git a/drivers/gpu/drm/xe/xe_devcoredump.h b/drivers/gpu/drm/xe/xe_devcoredump.h +index e2fa65ce093226..a4eebc285fc837 100644 +--- a/drivers/gpu/drm/xe/xe_devcoredump.h ++++ b/drivers/gpu/drm/xe/xe_devcoredump.h +@@ -6,6 +6,9 @@ + #ifndef _XE_DEVCOREDUMP_H_ + #define _XE_DEVCOREDUMP_H_ + ++#include ++ ++struct drm_printer; + struct xe_device; + struct xe_sched_job; + +@@ -23,4 +26,7 @@ static inline int xe_devcoredump_init(struct xe_device *xe) + } + #endif + ++void xe_print_blob_ascii85(struct drm_printer *p, const char *prefix, ++ const void *blob, size_t offset, size_t size); ++ + #endif +diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h +index 440d05d77a5af8..3cc2f095fdfbd1 100644 +--- a/drivers/gpu/drm/xe/xe_devcoredump_types.h ++++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h +@@ -37,7 +37,8 @@ struct xe_devcoredump_snapshot { + /* GuC snapshots */ + /** @ct: GuC CT snapshot */ + struct xe_guc_ct_snapshot *ct; +- /** @ge: Guc Engine snapshot */ ++ ++ /** @ge: GuC Submission Engine snapshot */ + struct xe_guc_submit_exec_queue_snapshot *ge; + + /** @hwe: HW Engine snapshot array */ +diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c +index a1987b554a8d2a..bb85208cf1a94c 100644 +--- a/drivers/gpu/drm/xe/xe_device.c ++++ b/drivers/gpu/drm/xe/xe_device.c +@@ -919,6 +919,7 @@ void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p) + + for_each_gt(gt, xe, id) { + drm_printf(p, "GT id: %u\n", id); ++ drm_printf(p, "\tTile: %u\n", gt->tile->id); + drm_printf(p, "\tType: %s\n", + gt->info.type == XE_GT_TYPE_MAIN ? "main" : "media"); + drm_printf(p, "\tIP ver: %u.%u.%u\n", +diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h +index a2577672f4e3e6..1608a55edc846e 100644 +--- a/drivers/gpu/drm/xe/xe_force_wake.h ++++ b/drivers/gpu/drm/xe/xe_force_wake.h +@@ -46,4 +46,20 @@ xe_force_wake_assert_held(struct xe_force_wake *fw, + xe_gt_assert(fw->gt, fw->awake_domains & domain); + } + ++/** ++ * xe_force_wake_ref_has_domain - verifies if the domains are in fw_ref ++ * @fw_ref : the force_wake reference ++ * @domain : forcewake domain to verify ++ * ++ * This function confirms whether the @fw_ref includes a reference to the ++ * specified @domain. ++ * ++ * Return: true if domain is refcounted. ++ */ ++static inline bool ++xe_force_wake_ref_has_domain(unsigned int fw_ref, enum xe_force_wake_domains domain) ++{ ++ return fw_ref & domain; ++} ++ + #endif +diff --git a/drivers/gpu/drm/xe/xe_gt_topology.c b/drivers/gpu/drm/xe/xe_gt_topology.c +index 0662f71c6ede78..3e113422b88de2 100644 +--- a/drivers/gpu/drm/xe/xe_gt_topology.c ++++ b/drivers/gpu/drm/xe/xe_gt_topology.c +@@ -5,6 +5,7 @@ + + #include "xe_gt_topology.h" + ++#include + #include + #include + +@@ -12,6 +13,7 @@ + #include "xe_assert.h" + #include "xe_gt.h" + #include "xe_mmio.h" ++#include "xe_wa.h" + + static void + load_dss_mask(struct xe_gt *gt, xe_dss_mask_t mask, int numregs, ...) +@@ -129,6 +131,18 @@ load_l3_bank_mask(struct xe_gt *gt, xe_l3_bank_mask_t l3_bank_mask) + struct xe_device *xe = gt_to_xe(gt); + u32 fuse3 = xe_mmio_read32(gt, MIRROR_FUSE3); + ++ /* ++ * PTL platforms with media version 30.00 do not provide proper values ++ * for the media GT's L3 bank registers. Skip the readout since we ++ * don't have any way to obtain real values. ++ * ++ * This may get re-described as an official workaround in the future, ++ * but there's no tracking number assigned yet so we use a custom ++ * OOB workaround descriptor. ++ */ ++ if (XE_WA(gt, no_media_l3)) ++ return; ++ + if (GRAPHICS_VER(xe) >= 20) { + xe_l3_bank_mask_t per_node = {}; + u32 meml3_en = REG_FIELD_GET(XE2_NODE_ENABLE_MASK, fuse3); +diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c +index 9c505d3517cd1a..cd6a5f09d631e4 100644 +--- a/drivers/gpu/drm/xe/xe_guc_ct.c ++++ b/drivers/gpu/drm/xe/xe_guc_ct.c +@@ -906,6 +906,24 @@ static int guc_ct_send_recv(struct xe_guc_ct *ct, const u32 *action, u32 len, + } + } + ++ /* ++ * Occasionally it is seen that the G2H worker starts running after a delay of more than ++ * a second even after being queued and activated by the Linux workqueue subsystem. This ++ * leads to G2H timeout error. The root cause of issue lies with scheduling latency of ++ * Lunarlake Hybrid CPU. Issue dissappears if we disable Lunarlake atom cores from BIOS ++ * and this is beyond xe kmd. ++ * ++ * TODO: Drop this change once workqueue scheduling delay issue is fixed on LNL Hybrid CPU. ++ */ ++ if (!ret) { ++ flush_work(&ct->g2h_worker); ++ if (g2h_fence.done) { ++ xe_gt_warn(gt, "G2H fence %u, action %04x, done\n", ++ g2h_fence.seqno, action[0]); ++ ret = 1; ++ } ++ } ++ + /* + * Ensure we serialize with completion side to prevent UAF with fence going out of scope on + * the stack, since we have no clue if it will fire after the timeout before we can erase +diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c +index a37ee341942844..be47780ec2a7e7 100644 +--- a/drivers/gpu/drm/xe/xe_guc_log.c ++++ b/drivers/gpu/drm/xe/xe_guc_log.c +@@ -6,9 +6,12 @@ + #include "xe_guc_log.h" + + #include ++#include + + #include "xe_bo.h" ++#include "xe_devcoredump.h" + #include "xe_gt.h" ++#include "xe_gt_printk.h" + #include "xe_map.h" + #include "xe_module.h" + +@@ -49,32 +52,35 @@ static size_t guc_log_size(void) + CAPTURE_BUFFER_SIZE; + } + ++/** ++ * xe_guc_log_print - dump a copy of the GuC log to some useful location ++ * @log: GuC log structure ++ * @p: the printer object to output to ++ */ + void xe_guc_log_print(struct xe_guc_log *log, struct drm_printer *p) + { + struct xe_device *xe = log_to_xe(log); + size_t size; +- int i, j; ++ void *copy; + +- xe_assert(xe, log->bo); ++ if (!log->bo) { ++ drm_puts(p, "GuC log buffer not allocated"); ++ return; ++ } + + size = log->bo->size; + +-#define DW_PER_READ 128 +- xe_assert(xe, !(size % (DW_PER_READ * sizeof(u32)))); +- for (i = 0; i < size / sizeof(u32); i += DW_PER_READ) { +- u32 read[DW_PER_READ]; +- +- xe_map_memcpy_from(xe, read, &log->bo->vmap, i * sizeof(u32), +- DW_PER_READ * sizeof(u32)); +-#define DW_PER_PRINT 4 +- for (j = 0; j < DW_PER_READ / DW_PER_PRINT; ++j) { +- u32 *print = read + j * DW_PER_PRINT; +- +- drm_printf(p, "0x%08x 0x%08x 0x%08x 0x%08x\n", +- *(print + 0), *(print + 1), +- *(print + 2), *(print + 3)); +- } ++ copy = vmalloc(size); ++ if (!copy) { ++ drm_printf(p, "Failed to allocate %zu", size); ++ return; + } ++ ++ xe_map_memcpy_from(xe, copy, &log->bo->vmap, 0, size); ++ ++ xe_print_blob_ascii85(p, "Log data", copy, 0, size); ++ ++ vfree(copy); + } + + int xe_guc_log_init(struct xe_guc_log *log) +diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c +index 2927745d689549..fed23304e4da58 100644 +--- a/drivers/gpu/drm/xe/xe_guc_submit.c ++++ b/drivers/gpu/drm/xe/xe_guc_submit.c +@@ -2193,7 +2193,7 @@ xe_guc_exec_queue_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snaps + if (!snapshot) + return; + +- drm_printf(p, "\nGuC ID: %d\n", snapshot->guc.id); ++ drm_printf(p, "GuC ID: %d\n", snapshot->guc.id); + drm_printf(p, "\tName: %s\n", snapshot->name); + drm_printf(p, "\tClass: %d\n", snapshot->class); + drm_printf(p, "\tLogical mask: 0x%x\n", snapshot->logical_mask); +diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c +index c9c3beb3ce8d06..547919e8ce9e45 100644 +--- a/drivers/gpu/drm/xe/xe_hw_engine.c ++++ b/drivers/gpu/drm/xe/xe_hw_engine.c +@@ -1053,7 +1053,6 @@ void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot, + if (snapshot->hwe->class == XE_ENGINE_CLASS_COMPUTE) + drm_printf(p, "\tRCU_MODE: 0x%08x\n", + snapshot->reg.rcu_mode); +- drm_puts(p, "\n"); + } + + /** +diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c +index 5e962e72c97ea6..025d649434673d 100644 +--- a/drivers/gpu/drm/xe/xe_pci.c ++++ b/drivers/gpu/drm/xe/xe_pci.c +@@ -383,10 +383,12 @@ static const struct pci_device_id pciidlist[] = { + XE_ADLS_IDS(INTEL_VGA_DEVICE, &adl_s_desc), + XE_ADLP_IDS(INTEL_VGA_DEVICE, &adl_p_desc), + XE_ADLN_IDS(INTEL_VGA_DEVICE, &adl_n_desc), ++ XE_RPLU_IDS(INTEL_VGA_DEVICE, &adl_p_desc), + XE_RPLP_IDS(INTEL_VGA_DEVICE, &adl_p_desc), + XE_RPLS_IDS(INTEL_VGA_DEVICE, &adl_s_desc), + XE_DG1_IDS(INTEL_VGA_DEVICE, &dg1_desc), + XE_ATS_M_IDS(INTEL_VGA_DEVICE, &ats_m_desc), ++ XE_ARL_IDS(INTEL_VGA_DEVICE, &mtl_desc), + XE_DG2_IDS(INTEL_VGA_DEVICE, &dg2_desc), + XE_MTL_IDS(INTEL_VGA_DEVICE, &mtl_desc), + XE_LNL_IDS(INTEL_VGA_DEVICE, &lnl_desc), +diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c +index 848da8e68c7a83..1c96375bd7df75 100644 +--- a/drivers/gpu/drm/xe/xe_query.c ++++ b/drivers/gpu/drm/xe/xe_query.c +@@ -9,6 +9,7 @@ + #include + + #include ++#include + #include + + #include "regs/xe_engine_regs.h" +@@ -23,6 +24,7 @@ + #include "xe_macros.h" + #include "xe_mmio.h" + #include "xe_ttm_vram_mgr.h" ++#include "xe_wa.h" + + static const u16 xe_to_user_engine_class[] = { + [XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER, +@@ -458,12 +460,23 @@ static int query_hwconfig(struct xe_device *xe, + + static size_t calc_topo_query_size(struct xe_device *xe) + { +- return xe->info.gt_count * +- (4 * sizeof(struct drm_xe_query_topology_mask) + +- sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) + +- sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) + +- sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask) + +- sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss)); ++ struct xe_gt *gt; ++ size_t query_size = 0; ++ int id; ++ ++ for_each_gt(gt, xe, id) { ++ query_size += 3 * sizeof(struct drm_xe_query_topology_mask) + ++ sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) + ++ sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) + ++ sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss); ++ ++ /* L3bank mask may not be available for some GTs */ ++ if (!XE_WA(gt, no_media_l3)) ++ query_size += sizeof(struct drm_xe_query_topology_mask) + ++ sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask); ++ } ++ ++ return query_size; + } + + static int copy_mask(void __user **ptr, +@@ -516,11 +529,18 @@ static int query_gt_topology(struct xe_device *xe, + if (err) + return err; + +- topo.type = DRM_XE_TOPO_L3_BANK; +- err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask, +- sizeof(gt->fuse_topo.l3_bank_mask)); +- if (err) +- return err; ++ /* ++ * If the kernel doesn't have a way to obtain a correct L3bank ++ * mask, then it's better to omit L3 from the query rather than ++ * reporting bogus or zeroed information to userspace. ++ */ ++ if (!XE_WA(gt, no_media_l3)) { ++ topo.type = DRM_XE_TOPO_L3_BANK; ++ err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask, ++ sizeof(gt->fuse_topo.l3_bank_mask)); ++ if (err) ++ return err; ++ } + + topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ? + DRM_XE_TOPO_SIMD16_EU_PER_DSS : +diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c +index 353936a0f877de..37e592b2bf062a 100644 +--- a/drivers/gpu/drm/xe/xe_wa.c ++++ b/drivers/gpu/drm/xe/xe_wa.c +@@ -251,6 +251,34 @@ static const struct xe_rtp_entry_sr gt_was[] = { + XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), + }, + ++ /* Xe3_LPG */ ++ ++ { XE_RTP_NAME("14021871409"), ++ XE_RTP_RULES(GRAPHICS_VERSION(3000), GRAPHICS_STEP(A0, B0)), ++ XE_RTP_ACTIONS(SET(UNSLCGCTL9454, LSCFE_CLKGATE_DIS)) ++ }, ++ ++ /* Xe3_LPM */ ++ ++ { XE_RTP_NAME("16021867713"), ++ XE_RTP_RULES(MEDIA_VERSION(3000), ++ ENGINE_CLASS(VIDEO_DECODE)), ++ XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)), ++ XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), ++ }, ++ { XE_RTP_NAME("16021865536"), ++ XE_RTP_RULES(MEDIA_VERSION(3000), ++ ENGINE_CLASS(VIDEO_DECODE)), ++ XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), IECPUNIT_CLKGATE_DIS)), ++ XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), ++ }, ++ { XE_RTP_NAME("14021486841"), ++ XE_RTP_RULES(MEDIA_VERSION(3000), MEDIA_STEP(A0, B0), ++ ENGINE_CLASS(VIDEO_DECODE)), ++ XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), RAMDFTUNIT_CLKGATE_DIS)), ++ XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), ++ }, ++ + {} + }; + +@@ -567,6 +595,13 @@ static const struct xe_rtp_entry_sr engine_was[] = { + XE_RTP_ACTION_FLAG(ENGINE_BASE))) + }, + ++ /* Xe3_LPG */ ++ ++ { XE_RTP_NAME("14021402888"), ++ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), FUNC(xe_rtp_match_first_render_or_compute)), ++ XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE)) ++ }, ++ + {} + }; + +@@ -742,6 +777,18 @@ static const struct xe_rtp_entry_sr lrc_was[] = { + XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX)) + }, + ++ /* Xe3_LPG */ ++ { XE_RTP_NAME("14021490052"), ++ XE_RTP_RULES(GRAPHICS_VERSION(3000), GRAPHICS_STEP(A0, B0), ++ ENGINE_CLASS(RENDER)), ++ XE_RTP_ACTIONS(SET(FF_MODE, ++ DIS_MESH_PARTIAL_AUTOSTRIP | ++ DIS_MESH_AUTOSTRIP), ++ SET(VFLSKPD, ++ DIS_PARTIAL_AUTOSTRIP | ++ DIS_AUTOSTRIP)) ++ }, ++ + {} + }; + +diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules +index 920ca506014661..264d6e116499ce 100644 +--- a/drivers/gpu/drm/xe/xe_wa_oob.rules ++++ b/drivers/gpu/drm/xe/xe_wa_oob.rules +@@ -33,7 +33,9 @@ + GRAPHICS_VERSION(2004) + 22019338487 MEDIA_VERSION(2000) + GRAPHICS_VERSION(2001) ++ MEDIA_VERSION(3000), MEDIA_STEP(A0, B0) + 22019338487_display PLATFORM(LUNARLAKE) + 16023588340 GRAPHICS_VERSION(2001) + 14019789679 GRAPHICS_VERSION(1255) + GRAPHICS_VERSION_RANGE(1270, 2004) ++no_media_l3 MEDIA_VERSION(3000) +diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c +index 582fd234eec789..935ccc38d12958 100644 +--- a/drivers/hid/hid-core.c ++++ b/drivers/hid/hid-core.c +@@ -2674,9 +2674,10 @@ static bool hid_check_device_match(struct hid_device *hdev, + /* + * hid-generic implements .match(), so we must be dealing with a + * different HID driver here, and can simply check if +- * hid_ignore_special_drivers is set or not. ++ * hid_ignore_special_drivers or HID_QUIRK_IGNORE_SPECIAL_DRIVER ++ * are set or not. + */ +- return !hid_ignore_special_drivers; ++ return !hid_ignore_special_drivers && !(hdev->quirks & HID_QUIRK_IGNORE_SPECIAL_DRIVER); + } + + static int __hid_device_probe(struct hid_device *hdev, struct hid_driver *hdrv) +diff --git a/drivers/hid/hid-generic.c b/drivers/hid/hid-generic.c +index d2439399fb357a..9e04c6d0fcc874 100644 +--- a/drivers/hid/hid-generic.c ++++ b/drivers/hid/hid-generic.c +@@ -40,6 +40,9 @@ static bool hid_generic_match(struct hid_device *hdev, + if (ignore_special_driver) + return true; + ++ if (hdev->quirks & HID_QUIRK_IGNORE_SPECIAL_DRIVER) ++ return true; ++ + if (hdev->quirks & HID_QUIRK_HAVE_SPECIAL_DRIVER) + return false; + +diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h +index 92cff3f2658cf5..0f23be98c56e22 100644 +--- a/drivers/hid/hid-ids.h ++++ b/drivers/hid/hid-ids.h +@@ -94,6 +94,7 @@ + #define USB_DEVICE_ID_APPLE_MAGICMOUSE2 0x0269 + #define USB_DEVICE_ID_APPLE_MAGICTRACKPAD 0x030e + #define USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 0x0265 ++#define USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC 0x0324 + #define USB_DEVICE_ID_APPLE_FOUNTAIN_ANSI 0x020e + #define USB_DEVICE_ID_APPLE_FOUNTAIN_ISO 0x020f + #define USB_DEVICE_ID_APPLE_GEYSER_ANSI 0x0214 +diff --git a/drivers/hid/hid-magicmouse.c b/drivers/hid/hid-magicmouse.c +index 8a73b59e0827b9..ec110dea87726d 100644 +--- a/drivers/hid/hid-magicmouse.c ++++ b/drivers/hid/hid-magicmouse.c +@@ -227,7 +227,9 @@ static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tda + touch_minor = tdata[4]; + state = tdata[7] & TOUCH_STATE_MASK; + down = state != TOUCH_STATE_NONE; +- } else if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { ++ } else if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ input->id.product == ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) { + id = tdata[8] & 0xf; + x = (tdata[1] << 27 | tdata[0] << 19) >> 19; + y = -((tdata[3] << 30 | tdata[2] << 22 | tdata[1] << 14) >> 19); +@@ -259,8 +261,9 @@ static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tda + /* If requested, emulate a scroll wheel by detecting small + * vertical touch motions. + */ +- if (emulate_scroll_wheel && (input->id.product != +- USB_DEVICE_ID_APPLE_MAGICTRACKPAD2)) { ++ if (emulate_scroll_wheel && ++ input->id.product != USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 && ++ input->id.product != USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) { + unsigned long now = jiffies; + int step_x = msc->touches[id].scroll_x - x; + int step_y = msc->touches[id].scroll_y - y; +@@ -359,7 +362,9 @@ static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tda + input_report_abs(input, ABS_MT_POSITION_X, x); + input_report_abs(input, ABS_MT_POSITION_Y, y); + +- if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) ++ if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ input->id.product == ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) + input_report_abs(input, ABS_MT_PRESSURE, pressure); + + if (report_undeciphered) { +@@ -367,7 +372,9 @@ static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tda + input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) + input_event(input, EV_MSC, MSC_RAW, tdata[7]); + else if (input->id.product != +- USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 && ++ input->id.product != ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) + input_event(input, EV_MSC, MSC_RAW, tdata[8]); + } + } +@@ -493,7 +500,9 @@ static int magicmouse_raw_event(struct hid_device *hdev, + magicmouse_emit_buttons(msc, clicks & 3); + input_report_rel(input, REL_X, x); + input_report_rel(input, REL_Y, y); +- } else if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { ++ } else if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ input->id.product == ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) { + input_mt_sync_frame(input); + input_report_key(input, BTN_MOUSE, clicks & 1); + } else { /* USB_DEVICE_ID_APPLE_MAGICTRACKPAD */ +@@ -545,7 +554,9 @@ static int magicmouse_setup_input(struct input_dev *input, struct hid_device *hd + __set_bit(REL_WHEEL_HI_RES, input->relbit); + __set_bit(REL_HWHEEL_HI_RES, input->relbit); + } +- } else if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { ++ } else if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ input->id.product == ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) { + /* If the trackpad has been connected to a Mac, the name is + * automatically personalized, e.g., "José Expósito's Trackpad". + * When connected through Bluetooth, the personalized name is +@@ -621,7 +632,9 @@ static int magicmouse_setup_input(struct input_dev *input, struct hid_device *hd + MOUSE_RES_X); + input_abs_set_res(input, ABS_MT_POSITION_Y, + MOUSE_RES_Y); +- } else if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { ++ } else if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ input->id.product == ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) { + input_set_abs_params(input, ABS_MT_PRESSURE, 0, 253, 0, 0); + input_set_abs_params(input, ABS_PRESSURE, 0, 253, 0, 0); + input_set_abs_params(input, ABS_MT_ORIENTATION, -3, 4, 0, 0); +@@ -660,7 +673,8 @@ static int magicmouse_setup_input(struct input_dev *input, struct hid_device *hd + input_set_events_per_packet(input, 60); + + if (report_undeciphered && +- input->id.product != USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { ++ input->id.product != USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 && ++ input->id.product != USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) { + __set_bit(EV_MSC, input->evbit); + __set_bit(MSC_RAW, input->mscbit); + } +@@ -685,7 +699,9 @@ static int magicmouse_input_mapping(struct hid_device *hdev, + + /* Magic Trackpad does not give relative data after switching to MT */ + if ((hi->input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD || +- hi->input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) && ++ hi->input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ hi->input->id.product == ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) && + field->flags & HID_MAIN_ITEM_RELATIVE) + return -1; + +@@ -721,7 +737,8 @@ static int magicmouse_enable_multitouch(struct hid_device *hdev) + int ret; + int feature_size; + +- if (hdev->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { ++ if (hdev->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ hdev->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) { + if (hdev->vendor == BT_VENDOR_ID_APPLE) { + feature_size = sizeof(feature_mt_trackpad2_bt); + feature = feature_mt_trackpad2_bt; +@@ -766,7 +783,8 @@ static int magicmouse_fetch_battery(struct hid_device *hdev) + + if (!hdev->battery || hdev->vendor != USB_VENDOR_ID_APPLE || + (hdev->product != USB_DEVICE_ID_APPLE_MAGICMOUSE2 && +- hdev->product != USB_DEVICE_ID_APPLE_MAGICTRACKPAD2)) ++ hdev->product != USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 && ++ hdev->product != USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC)) + return -1; + + report_enum = &hdev->report_enum[hdev->battery_report_type]; +@@ -835,7 +853,9 @@ static int magicmouse_probe(struct hid_device *hdev, + + if (id->vendor == USB_VENDOR_ID_APPLE && + (id->product == USB_DEVICE_ID_APPLE_MAGICMOUSE2 || +- (id->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 && hdev->type != HID_TYPE_USBMOUSE))) ++ ((id->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ id->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) && ++ hdev->type != HID_TYPE_USBMOUSE))) + return 0; + + if (!msc->input) { +@@ -850,7 +870,8 @@ static int magicmouse_probe(struct hid_device *hdev, + else if (id->product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) + report = hid_register_report(hdev, HID_INPUT_REPORT, + MOUSE2_REPORT_ID, 0); +- else if (id->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { ++ else if (id->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ id->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) { + if (id->vendor == BT_VENDOR_ID_APPLE) + report = hid_register_report(hdev, HID_INPUT_REPORT, + TRACKPAD2_BT_REPORT_ID, 0); +@@ -920,7 +941,8 @@ static const __u8 *magicmouse_report_fixup(struct hid_device *hdev, __u8 *rdesc, + */ + if (hdev->vendor == USB_VENDOR_ID_APPLE && + (hdev->product == USB_DEVICE_ID_APPLE_MAGICMOUSE2 || +- hdev->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) && ++ hdev->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 || ++ hdev->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC) && + *rsize == 83 && rdesc[46] == 0x84 && rdesc[58] == 0x85) { + hid_info(hdev, + "fixing up magicmouse battery report descriptor\n"); +@@ -951,6 +973,10 @@ static const struct hid_device_id magic_mice[] = { + USB_DEVICE_ID_APPLE_MAGICTRACKPAD2), .driver_data = 0 }, + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, + USB_DEVICE_ID_APPLE_MAGICTRACKPAD2), .driver_data = 0 }, ++ { HID_BLUETOOTH_DEVICE(BT_VENDOR_ID_APPLE, ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC), .driver_data = 0 }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, ++ USB_DEVICE_ID_APPLE_MAGICTRACKPAD2_USBC), .driver_data = 0 }, + { } + }; + MODULE_DEVICE_TABLE(hid, magic_mice); +diff --git a/drivers/hid/i2c-hid/i2c-hid-core.c b/drivers/hid/i2c-hid/i2c-hid-core.c +index 43664a24176fca..4e87380d3edd6b 100644 +--- a/drivers/hid/i2c-hid/i2c-hid-core.c ++++ b/drivers/hid/i2c-hid/i2c-hid-core.c +@@ -414,7 +414,19 @@ static int i2c_hid_set_power(struct i2c_hid *ihid, int power_state) + + i2c_hid_dbg(ihid, "%s\n", __func__); + ++ /* ++ * Some STM-based devices need 400µs after a rising clock edge to wake ++ * from deep sleep, in which case the first request will fail due to ++ * the address not being acknowledged. Try after a short sleep to see ++ * if the device came alive on the bus. Certain Weida Tech devices also ++ * need this. ++ */ + ret = i2c_hid_set_power_command(ihid, power_state); ++ if (ret && power_state == I2C_HID_PWR_ON) { ++ usleep_range(400, 500); ++ ret = i2c_hid_set_power_command(ihid, I2C_HID_PWR_ON); ++ } ++ + if (ret) + dev_err(&ihid->client->dev, + "failed to change power setting.\n"); +@@ -976,14 +988,6 @@ static int i2c_hid_core_resume(struct i2c_hid *ihid) + + enable_irq(client->irq); + +- /* Make sure the device is awake on the bus */ +- ret = i2c_hid_probe_address(ihid); +- if (ret < 0) { +- dev_err(&client->dev, "nothing at address after resume: %d\n", +- ret); +- return -ENXIO; +- } +- + /* On Goodix 27c6:0d42 wait extra time before device wakeup. + * It's not clear why but if we send wakeup too early, the device will + * never trigger input interrupts. +diff --git a/drivers/hid/wacom_sys.c b/drivers/hid/wacom_sys.c +index 2bc45b24075c3f..9843b52bd017a0 100644 +--- a/drivers/hid/wacom_sys.c ++++ b/drivers/hid/wacom_sys.c +@@ -2241,7 +2241,8 @@ static void wacom_update_name(struct wacom *wacom, const char *suffix) + if (hid_is_usb(wacom->hdev)) { + struct usb_interface *intf = to_usb_interface(wacom->hdev->dev.parent); + struct usb_device *dev = interface_to_usbdev(intf); +- product_name = dev->product; ++ if (dev->product != NULL) ++ product_name = dev->product; + } + + if (wacom->hdev->bus == BUS_I2C) { +diff --git a/drivers/hwmon/nct6775-platform.c b/drivers/hwmon/nct6775-platform.c +index 096f1daa8f2bcf..1218a3b449a801 100644 +--- a/drivers/hwmon/nct6775-platform.c ++++ b/drivers/hwmon/nct6775-platform.c +@@ -1350,6 +1350,8 @@ static const char * const asus_msi_boards[] = { + "Pro H610M-CT D4", + "Pro H610T D4", + "Pro Q670M-C", ++ "Pro WS 600M-CL", ++ "Pro WS 665-ACE", + "Pro WS W680-ACE", + "Pro WS W680-ACE IPMI", + "Pro WS W790-ACE", +diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig +index 6b3ba7e5723aa1..2254abda5c46c9 100644 +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -160,6 +160,7 @@ config I2C_I801 + Meteor Lake (SOC and PCH) + Birch Stream (SOC) + Arrow Lake (SOC) ++ Panther Lake (SOC) + + This driver can also be built as a module. If so, the module + will be called i2c-i801. +diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c +index 299fe9d3afab0a..75dab01d43a750 100644 +--- a/drivers/i2c/busses/i2c-i801.c ++++ b/drivers/i2c/busses/i2c-i801.c +@@ -81,6 +81,8 @@ + * Meteor Lake PCH-S (PCH) 0x7f23 32 hard yes yes yes + * Birch Stream (SOC) 0x5796 32 hard yes yes yes + * Arrow Lake-H (SOC) 0x7722 32 hard yes yes yes ++ * Panther Lake-H (SOC) 0xe322 32 hard yes yes yes ++ * Panther Lake-P (SOC) 0xe422 32 hard yes yes yes + * + * Features supported by this driver: + * Software PEC no +@@ -261,6 +263,8 @@ + #define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323 + #define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS 0xa3a3 + #define PCI_DEVICE_ID_INTEL_METEOR_LAKE_SOC_S_SMBUS 0xae22 ++#define PCI_DEVICE_ID_INTEL_PANTHER_LAKE_H_SMBUS 0xe322 ++#define PCI_DEVICE_ID_INTEL_PANTHER_LAKE_P_SMBUS 0xe422 + + struct i801_mux_config { + char *gpio_chip; +@@ -1055,6 +1059,8 @@ static const struct pci_device_id i801_ids[] = { + { PCI_DEVICE_DATA(INTEL, METEOR_LAKE_PCH_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, + { PCI_DEVICE_DATA(INTEL, BIRCH_STREAM_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, + { PCI_DEVICE_DATA(INTEL, ARROW_LAKE_H_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, ++ { PCI_DEVICE_DATA(INTEL, PANTHER_LAKE_H_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, ++ { PCI_DEVICE_DATA(INTEL, PANTHER_LAKE_P_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, + { 0, } + }; + +diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c +index da83c49223b33e..42310c9a00c2d1 100644 +--- a/drivers/i3c/master.c ++++ b/drivers/i3c/master.c +@@ -282,7 +282,8 @@ static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *e + struct i3c_device_info devinfo; + u16 manuf, part, ext; + +- i3c_device_get_info(i3cdev, &devinfo); ++ if (i3cdev->desc) ++ devinfo = i3cdev->desc->info; + manuf = I3C_PID_MANUF_ID(devinfo.pid); + part = I3C_PID_PART_ID(devinfo.pid); + ext = I3C_PID_EXTRA_INFO(devinfo.pid); +@@ -345,10 +346,10 @@ const struct bus_type i3c_bus_type = { + EXPORT_SYMBOL_GPL(i3c_bus_type); + + static enum i3c_addr_slot_status +-i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) ++i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask) + { + unsigned long status; +- int bitpos = addr * 2; ++ int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; + + if (addr > I2C_MAX_ADDR) + return I3C_ADDR_SLOT_RSVD; +@@ -356,22 +357,33 @@ i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) + status = bus->addrslots[bitpos / BITS_PER_LONG]; + status >>= bitpos % BITS_PER_LONG; + +- return status & I3C_ADDR_SLOT_STATUS_MASK; ++ return status & mask; + } + +-static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, +- enum i3c_addr_slot_status status) ++static enum i3c_addr_slot_status ++i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) ++{ ++ return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK); ++} ++ ++static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, ++ enum i3c_addr_slot_status status, u32 mask) + { +- int bitpos = addr * 2; ++ int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; + unsigned long *ptr; + + if (addr > I2C_MAX_ADDR) + return; + + ptr = bus->addrslots + (bitpos / BITS_PER_LONG); +- *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK << +- (bitpos % BITS_PER_LONG)); +- *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG); ++ *ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG)); ++ *ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG); ++} ++ ++static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, ++ enum i3c_addr_slot_status status) ++{ ++ i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK); + } + + static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) +@@ -383,13 +395,44 @@ static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) + return status == I3C_ADDR_SLOT_FREE; + } + ++/* ++ * ┌────┬─────────────┬───┬─────────┬───┐ ++ * │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐ ++ * └────┴─────────────┴───┴─────────┴───┘ │ ++ * ┌─────────────────────────────────────────┘ ++ * │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐ ++ * └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│ ++ * └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘ ++ * Some master controllers (such as HCI) need to prepare the entire above transaction before ++ * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated ++ * before knowing the target device's UID information. ++ * ++ * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is ++ * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI ++ * priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is ++ * not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with ++ * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise, ++ * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be ++ * able to switch to its desired address. ++ * ++ * If the previous step fails, fallback returning one of the remaining unassigned address, ++ * regardless of its state in the desired list. ++ */ + static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) + { + enum i3c_addr_slot_status status; + u8 addr; + + for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { +- status = i3c_bus_get_addr_slot_status(bus, addr); ++ status = i3c_bus_get_addr_slot_status_mask(bus, addr, ++ I3C_ADDR_SLOT_EXT_STATUS_MASK); ++ if (status == I3C_ADDR_SLOT_FREE) ++ return addr; ++ } ++ ++ for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { ++ status = i3c_bus_get_addr_slot_status_mask(bus, addr, ++ I3C_ADDR_SLOT_STATUS_MASK); + if (status == I3C_ADDR_SLOT_FREE) + return addr; + } +@@ -1506,16 +1549,9 @@ static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, + u8 old_dyn_addr) + { + struct i3c_master_controller *master = i3c_dev_get_master(dev); +- enum i3c_addr_slot_status status; + int ret; + +- if (dev->info.dyn_addr != old_dyn_addr && +- (!dev->boardinfo || +- dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) { +- status = i3c_bus_get_addr_slot_status(&master->bus, +- dev->info.dyn_addr); +- if (status != I3C_ADDR_SLOT_FREE) +- return -EBUSY; ++ if (dev->info.dyn_addr != old_dyn_addr) { + i3c_bus_set_addr_slot_status(&master->bus, + dev->info.dyn_addr, + I3C_ADDR_SLOT_I3C_DEV); +@@ -1918,9 +1954,11 @@ static int i3c_master_bus_init(struct i3c_master_controller *master) + goto err_rstdaa; + } + +- i3c_bus_set_addr_slot_status(&master->bus, +- i3cboardinfo->init_dyn_addr, +- I3C_ADDR_SLOT_I3C_DEV); ++ /* Do not mark as occupied until real device exist in bus */ ++ i3c_bus_set_addr_slot_status_mask(&master->bus, ++ i3cboardinfo->init_dyn_addr, ++ I3C_ADDR_SLOT_EXT_DESIRED, ++ I3C_ADDR_SLOT_EXT_STATUS_MASK); + + /* + * Only try to create/attach devices that have a static +@@ -2088,7 +2126,8 @@ int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, + else + expected_dyn_addr = newdev->info.dyn_addr; + +- if (newdev->info.dyn_addr != expected_dyn_addr) { ++ if (newdev->info.dyn_addr != expected_dyn_addr && ++ i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) { + /* + * Try to apply the expected dynamic address. If it fails, keep + * the address assigned by the master. +diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c +index a918e96b21fddc..13adc584009429 100644 +--- a/drivers/i3c/master/mipi-i3c-hci/dma.c ++++ b/drivers/i3c/master/mipi-i3c-hci/dma.c +@@ -159,10 +159,10 @@ static void hci_dma_cleanup(struct i3c_hci *hci) + for (i = 0; i < rings->total; i++) { + rh = &rings->headers[i]; + ++ rh_reg_write(INTR_SIGNAL_ENABLE, 0); + rh_reg_write(RING_CONTROL, 0); + rh_reg_write(CR_SETUP, 0); + rh_reg_write(IBI_SETUP, 0); +- rh_reg_write(INTR_SIGNAL_ENABLE, 0); + + if (rh->xfer) + dma_free_coherent(&hci->master.dev, +diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c +index 7042ddfdfc03ee..955e9eff0099e5 100644 +--- a/drivers/iio/adc/ad7192.c ++++ b/drivers/iio/adc/ad7192.c +@@ -1394,6 +1394,9 @@ static int ad7192_probe(struct spi_device *spi) + st->int_vref_mv = ret == -ENODEV ? avdd_mv : ret / MILLI; + + st->chip_info = spi_get_device_match_data(spi); ++ if (!st->chip_info) ++ return -ENODEV; ++ + indio_dev->name = st->chip_info->name; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->info = st->chip_info->info; +diff --git a/drivers/iio/light/ltr501.c b/drivers/iio/light/ltr501.c +index 8c516ede911619..640a5d3aa2c6e7 100644 +--- a/drivers/iio/light/ltr501.c ++++ b/drivers/iio/light/ltr501.c +@@ -1613,6 +1613,8 @@ static const struct acpi_device_id ltr_acpi_match[] = { + { "LTER0501", ltr501 }, + { "LTER0559", ltr559 }, + { "LTER0301", ltr301 }, ++ /* https://www.catalog.update.microsoft.com/Search.aspx?q=lter0303 */ ++ { "LTER0303", ltr303 }, + { }, + }; + MODULE_DEVICE_TABLE(acpi, ltr_acpi_match); +diff --git a/drivers/iio/magnetometer/af8133j.c b/drivers/iio/magnetometer/af8133j.c +index d81d89af6283b7..acd291f3e7924c 100644 +--- a/drivers/iio/magnetometer/af8133j.c ++++ b/drivers/iio/magnetometer/af8133j.c +@@ -312,10 +312,11 @@ static int af8133j_set_scale(struct af8133j_data *data, + * When suspended, just store the new range to data->range to be + * applied later during power up. + */ +- if (!pm_runtime_status_suspended(dev)) ++ if (!pm_runtime_status_suspended(dev)) { + scoped_guard(mutex, &data->mutex) + ret = regmap_write(data->regmap, + AF8133J_REG_RANGE, range); ++ } + + pm_runtime_enable(dev); + +diff --git a/drivers/iio/magnetometer/yamaha-yas530.c b/drivers/iio/magnetometer/yamaha-yas530.c +index 65011a8598d332..c55a38650c0d47 100644 +--- a/drivers/iio/magnetometer/yamaha-yas530.c ++++ b/drivers/iio/magnetometer/yamaha-yas530.c +@@ -372,6 +372,7 @@ static int yas537_measure(struct yas5xx *yas5xx, u16 *t, u16 *x, u16 *y1, u16 *y + u8 data[8]; + u16 xy1y2[3]; + s32 h[3], s[3]; ++ int half_range = BIT(13); + int i, ret; + + mutex_lock(&yas5xx->lock); +@@ -406,13 +407,13 @@ static int yas537_measure(struct yas5xx *yas5xx, u16 *t, u16 *x, u16 *y1, u16 *y + /* The second version of YAS537 needs to include calibration coefficients */ + if (yas5xx->version == YAS537_VERSION_1) { + for (i = 0; i < 3; i++) +- s[i] = xy1y2[i] - BIT(13); +- h[0] = (c->k * (128 * s[0] + c->a2 * s[1] + c->a3 * s[2])) / BIT(13); +- h[1] = (c->k * (c->a4 * s[0] + c->a5 * s[1] + c->a6 * s[2])) / BIT(13); +- h[2] = (c->k * (c->a7 * s[0] + c->a8 * s[1] + c->a9 * s[2])) / BIT(13); ++ s[i] = xy1y2[i] - half_range; ++ h[0] = (c->k * (128 * s[0] + c->a2 * s[1] + c->a3 * s[2])) / half_range; ++ h[1] = (c->k * (c->a4 * s[0] + c->a5 * s[1] + c->a6 * s[2])) / half_range; ++ h[2] = (c->k * (c->a7 * s[0] + c->a8 * s[1] + c->a9 * s[2])) / half_range; + for (i = 0; i < 3; i++) { +- clamp_val(h[i], -BIT(13), BIT(13) - 1); +- xy1y2[i] = h[i] + BIT(13); ++ h[i] = clamp(h[i], -half_range, half_range - 1); ++ xy1y2[i] = h[i] + half_range; + } + } + +diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/io_pgtable.c +index 804b788f3f167d..f3399087859fd1 100644 +--- a/drivers/iommu/amd/io_pgtable.c ++++ b/drivers/iommu/amd/io_pgtable.c +@@ -118,6 +118,7 @@ static void free_sub_pt(u64 *root, int mode, struct list_head *freelist) + */ + static bool increase_address_space(struct amd_io_pgtable *pgtable, + unsigned long address, ++ unsigned int page_size_level, + gfp_t gfp) + { + struct io_pgtable_cfg *cfg = &pgtable->pgtbl.cfg; +@@ -133,7 +134,8 @@ static bool increase_address_space(struct amd_io_pgtable *pgtable, + + spin_lock_irqsave(&domain->lock, flags); + +- if (address <= PM_LEVEL_SIZE(pgtable->mode)) ++ if (address <= PM_LEVEL_SIZE(pgtable->mode) && ++ pgtable->mode - 1 >= page_size_level) + goto out; + + ret = false; +@@ -163,18 +165,21 @@ static u64 *alloc_pte(struct amd_io_pgtable *pgtable, + gfp_t gfp, + bool *updated) + { ++ unsigned long last_addr = address + (page_size - 1); + struct io_pgtable_cfg *cfg = &pgtable->pgtbl.cfg; + int level, end_lvl; + u64 *pte, *page; + + BUG_ON(!is_power_of_2(page_size)); + +- while (address > PM_LEVEL_SIZE(pgtable->mode)) { ++ while (last_addr > PM_LEVEL_SIZE(pgtable->mode) || ++ pgtable->mode - 1 < PAGE_SIZE_LEVEL(page_size)) { + /* + * Return an error if there is no memory to update the + * page-table. + */ +- if (!increase_address_space(pgtable, address, gfp)) ++ if (!increase_address_space(pgtable, last_addr, ++ PAGE_SIZE_LEVEL(page_size), gfp)) + return NULL; + } + +diff --git a/drivers/iommu/iommufd/fault.c b/drivers/iommu/iommufd/fault.c +index e590973ce5cfa2..b8393a8c075396 100644 +--- a/drivers/iommu/iommufd/fault.c ++++ b/drivers/iommu/iommufd/fault.c +@@ -415,8 +415,6 @@ int iommufd_fault_alloc(struct iommufd_ucmd *ucmd) + put_unused_fd(fdno); + out_fput: + fput(filep); +- refcount_dec(&fault->obj.users); +- iommufd_ctx_put(fault->ictx); + out_abort: + iommufd_object_abort_and_destroy(ucmd->ictx, &fault->obj); + +diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig +index d82bcab233a1b0..66ce15027f28d7 100644 +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -407,7 +407,7 @@ config PARTITION_PERCPU + config STM32MP_EXTI + tristate "STM32MP extended interrupts and event controller" + depends on (ARCH_STM32 && !ARM_SINGLE_ARMV7M) || COMPILE_TEST +- default y ++ default ARCH_STM32 && !ARM_SINGLE_ARMV7M + select IRQ_DOMAIN_HIERARCHY + select GENERIC_IRQ_CHIP + help +diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c +index 52f625e07658cb..d9b6ec844cdda0 100644 +--- a/drivers/irqchip/irq-gic-v3-its.c ++++ b/drivers/irqchip/irq-gic-v3-its.c +@@ -44,6 +44,7 @@ + #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) + #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) + #define ITS_FLAGS_FORCE_NON_SHAREABLE (1ULL << 3) ++#define ITS_FLAGS_WORKAROUND_HISILICON_162100801 (1ULL << 4) + + #define RD_LOCAL_LPI_ENABLED BIT(0) + #define RD_LOCAL_PENDTABLE_PREALLOCATED BIT(1) +@@ -61,6 +62,7 @@ static u32 lpi_id_bits; + #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) + + static u8 __ro_after_init lpi_prop_prio; ++static struct its_node *find_4_1_its(void); + + /* + * Collection structure - just an ID, and a redistributor address to +@@ -3797,6 +3799,20 @@ static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) + raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); + } + ++static void its_vpe_4_1_invall_locked(int cpu, struct its_vpe *vpe) ++{ ++ void __iomem *rdbase; ++ u64 val; ++ ++ val = GICR_INVALLR_V; ++ val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); ++ ++ guard(raw_spinlock)(&gic_data_rdist_cpu(cpu)->rd_lock); ++ rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; ++ gic_write_lpir(val, rdbase + GICR_INVALLR); ++ wait_for_syncr(rdbase); ++} ++ + static int its_vpe_set_affinity(struct irq_data *d, + const struct cpumask *mask_val, + bool force) +@@ -3804,6 +3820,7 @@ static int its_vpe_set_affinity(struct irq_data *d, + struct its_vpe *vpe = irq_data_get_irq_chip_data(d); + unsigned int from, cpu = nr_cpu_ids; + struct cpumask *table_mask; ++ struct its_node *its; + unsigned long flags; + + /* +@@ -3866,6 +3883,11 @@ static int its_vpe_set_affinity(struct irq_data *d, + vpe->col_idx = cpu; + + its_send_vmovp(vpe); ++ ++ its = find_4_1_its(); ++ if (its && its->flags & ITS_FLAGS_WORKAROUND_HISILICON_162100801) ++ its_vpe_4_1_invall_locked(cpu, vpe); ++ + its_vpe_db_proxy_move(vpe, from, cpu); + + out: +@@ -4173,22 +4195,12 @@ static void its_vpe_4_1_deschedule(struct its_vpe *vpe, + + static void its_vpe_4_1_invall(struct its_vpe *vpe) + { +- void __iomem *rdbase; + unsigned long flags; +- u64 val; + int cpu; + +- val = GICR_INVALLR_V; +- val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); +- + /* Target the redistributor this vPE is currently known on */ + cpu = vpe_to_cpuid_lock(vpe, &flags); +- raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); +- rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; +- gic_write_lpir(val, rdbase + GICR_INVALLR); +- +- wait_for_syncr(rdbase); +- raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); ++ its_vpe_4_1_invall_locked(cpu, vpe); + vpe_to_cpuid_unlock(vpe, flags); + } + +@@ -4781,6 +4793,14 @@ static bool its_set_non_coherent(void *data) + return true; + } + ++static bool __maybe_unused its_enable_quirk_hip09_162100801(void *data) ++{ ++ struct its_node *its = data; ++ ++ its->flags |= ITS_FLAGS_WORKAROUND_HISILICON_162100801; ++ return true; ++} ++ + static const struct gic_quirk its_quirks[] = { + #ifdef CONFIG_CAVIUM_ERRATUM_22375 + { +@@ -4827,6 +4847,14 @@ static const struct gic_quirk its_quirks[] = { + .init = its_enable_quirk_hip07_161600802, + }, + #endif ++#ifdef CONFIG_HISILICON_ERRATUM_162100801 ++ { ++ .desc = "ITS: Hip09 erratum 162100801", ++ .iidr = 0x00051736, ++ .mask = 0xffffffff, ++ .init = its_enable_quirk_hip09_162100801, ++ }, ++#endif + #ifdef CONFIG_ROCKCHIP_ERRATUM_3588001 + { + .desc = "ITS: Rockchip erratum RK3588001", +diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c +index 06b97fd49ad9a2..f69f4e928d6143 100644 +--- a/drivers/leds/led-class.c ++++ b/drivers/leds/led-class.c +@@ -29,11 +29,14 @@ static ssize_t brightness_show(struct device *dev, + struct device_attribute *attr, char *buf) + { + struct led_classdev *led_cdev = dev_get_drvdata(dev); ++ unsigned int brightness; + +- /* no lock needed for this */ ++ mutex_lock(&led_cdev->led_access); + led_update_brightness(led_cdev); ++ brightness = led_cdev->brightness; ++ mutex_unlock(&led_cdev->led_access); + +- return sprintf(buf, "%u\n", led_cdev->brightness); ++ return sprintf(buf, "%u\n", brightness); + } + + static ssize_t brightness_store(struct device *dev, +@@ -70,8 +73,13 @@ static ssize_t max_brightness_show(struct device *dev, + struct device_attribute *attr, char *buf) + { + struct led_classdev *led_cdev = dev_get_drvdata(dev); ++ unsigned int max_brightness; ++ ++ mutex_lock(&led_cdev->led_access); ++ max_brightness = led_cdev->max_brightness; ++ mutex_unlock(&led_cdev->led_access); + +- return sprintf(buf, "%u\n", led_cdev->max_brightness); ++ return sprintf(buf, "%u\n", max_brightness); + } + static DEVICE_ATTR_RO(max_brightness); + +diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c +index 94885e411085ad..82102a4c5d6883 100644 +--- a/drivers/mailbox/pcc.c ++++ b/drivers/mailbox/pcc.c +@@ -269,6 +269,35 @@ static bool pcc_mbox_cmd_complete_check(struct pcc_chan_info *pchan) + return !!val; + } + ++static void check_and_ack(struct pcc_chan_info *pchan, struct mbox_chan *chan) ++{ ++ struct acpi_pcct_ext_pcc_shared_memory pcc_hdr; ++ ++ if (pchan->type != ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) ++ return; ++ /* If the memory region has not been mapped, we cannot ++ * determine if we need to send the message, but we still ++ * need to set the cmd_update flag before returning. ++ */ ++ if (pchan->chan.shmem == NULL) { ++ pcc_chan_reg_read_modify_write(&pchan->cmd_update); ++ return; ++ } ++ memcpy_fromio(&pcc_hdr, pchan->chan.shmem, ++ sizeof(struct acpi_pcct_ext_pcc_shared_memory)); ++ /* ++ * The PCC slave subspace channel needs to set the command complete bit ++ * after processing message. If the PCC_ACK_FLAG is set, it should also ++ * ring the doorbell. ++ * ++ * The PCC master subspace channel clears chan_in_use to free channel. ++ */ ++ if (le32_to_cpup(&pcc_hdr.flags) & PCC_ACK_FLAG_MASK) ++ pcc_send_data(chan, NULL); ++ else ++ pcc_chan_reg_read_modify_write(&pchan->cmd_update); ++} ++ + /** + * pcc_mbox_irq - PCC mailbox interrupt handler + * @irq: interrupt number +@@ -306,14 +335,7 @@ static irqreturn_t pcc_mbox_irq(int irq, void *p) + + mbox_chan_received_data(chan, NULL); + +- /* +- * The PCC slave subspace channel needs to set the command complete bit +- * and ring doorbell after processing message. +- * +- * The PCC master subspace channel clears chan_in_use to free channel. +- */ +- if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) +- pcc_send_data(chan, NULL); ++ check_and_ack(pchan, chan); + pchan->chan_in_use = false; + + return IRQ_HANDLED; +@@ -365,14 +387,37 @@ EXPORT_SYMBOL_GPL(pcc_mbox_request_channel); + void pcc_mbox_free_channel(struct pcc_mbox_chan *pchan) + { + struct mbox_chan *chan = pchan->mchan; ++ struct pcc_chan_info *pchan_info; ++ struct pcc_mbox_chan *pcc_mbox_chan; + + if (!chan || !chan->cl) + return; ++ pchan_info = chan->con_priv; ++ pcc_mbox_chan = &pchan_info->chan; ++ if (pcc_mbox_chan->shmem) { ++ iounmap(pcc_mbox_chan->shmem); ++ pcc_mbox_chan->shmem = NULL; ++ } + + mbox_free_channel(chan); + } + EXPORT_SYMBOL_GPL(pcc_mbox_free_channel); + ++int pcc_mbox_ioremap(struct mbox_chan *chan) ++{ ++ struct pcc_chan_info *pchan_info; ++ struct pcc_mbox_chan *pcc_mbox_chan; ++ ++ if (!chan || !chan->cl) ++ return -1; ++ pchan_info = chan->con_priv; ++ pcc_mbox_chan = &pchan_info->chan; ++ pcc_mbox_chan->shmem = ioremap(pcc_mbox_chan->shmem_base_addr, ++ pcc_mbox_chan->shmem_size); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(pcc_mbox_ioremap); ++ + /** + * pcc_send_data - Called from Mailbox Controller code. Used + * here only to ring the channel doorbell. The PCC client +diff --git a/drivers/md/bcache/super.c b/drivers/md/bcache/super.c +index e7abfdd77c3b66..e42f1400cea9d7 100644 +--- a/drivers/md/bcache/super.c ++++ b/drivers/md/bcache/super.c +@@ -1718,7 +1718,7 @@ static CLOSURE_CALLBACK(cache_set_flush) + if (!IS_ERR_OR_NULL(c->gc_thread)) + kthread_stop(c->gc_thread); + +- if (!IS_ERR(c->root)) ++ if (!IS_ERR_OR_NULL(c->root)) + list_add(&c->root->list, &c->btree_cache); + + /* +diff --git a/drivers/media/pci/intel/ipu6/Kconfig b/drivers/media/pci/intel/ipu6/Kconfig +index a4537818a58c05..cd1c545293574a 100644 +--- a/drivers/media/pci/intel/ipu6/Kconfig ++++ b/drivers/media/pci/intel/ipu6/Kconfig +@@ -8,7 +8,7 @@ config VIDEO_INTEL_IPU6 + select IOMMU_IOVA + select VIDEO_V4L2_SUBDEV_API + select MEDIA_CONTROLLER +- select VIDEOBUF2_DMA_CONTIG ++ select VIDEOBUF2_DMA_SG + select V4L2_FWNODE + help + This is the 6th Gen Intel Image Processing Unit, found in Intel SoCs +diff --git a/drivers/media/pci/intel/ipu6/ipu6-isys-queue.c b/drivers/media/pci/intel/ipu6/ipu6-isys-queue.c +index 03dbb0e0ea7957..bbb66b56ee88c9 100644 +--- a/drivers/media/pci/intel/ipu6/ipu6-isys-queue.c ++++ b/drivers/media/pci/intel/ipu6/ipu6-isys-queue.c +@@ -13,17 +13,48 @@ + + #include + #include +-#include ++#include + #include + + #include "ipu6-bus.h" ++#include "ipu6-dma.h" + #include "ipu6-fw-isys.h" + #include "ipu6-isys.h" + #include "ipu6-isys-video.h" + +-static int queue_setup(struct vb2_queue *q, unsigned int *num_buffers, +- unsigned int *num_planes, unsigned int sizes[], +- struct device *alloc_devs[]) ++static int ipu6_isys_buf_init(struct vb2_buffer *vb) ++{ ++ struct ipu6_isys *isys = vb2_get_drv_priv(vb->vb2_queue); ++ struct sg_table *sg = vb2_dma_sg_plane_desc(vb, 0); ++ struct vb2_v4l2_buffer *vvb = to_vb2_v4l2_buffer(vb); ++ struct ipu6_isys_video_buffer *ivb = ++ vb2_buffer_to_ipu6_isys_video_buffer(vvb); ++ int ret; ++ ++ ret = ipu6_dma_map_sgtable(isys->adev, sg, DMA_TO_DEVICE, 0); ++ if (ret) ++ return ret; ++ ++ ivb->dma_addr = sg_dma_address(sg->sgl); ++ ++ return 0; ++} ++ ++static void ipu6_isys_buf_cleanup(struct vb2_buffer *vb) ++{ ++ struct ipu6_isys *isys = vb2_get_drv_priv(vb->vb2_queue); ++ struct sg_table *sg = vb2_dma_sg_plane_desc(vb, 0); ++ struct vb2_v4l2_buffer *vvb = to_vb2_v4l2_buffer(vb); ++ struct ipu6_isys_video_buffer *ivb = ++ vb2_buffer_to_ipu6_isys_video_buffer(vvb); ++ ++ ivb->dma_addr = 0; ++ ipu6_dma_unmap_sgtable(isys->adev, sg, DMA_TO_DEVICE, 0); ++} ++ ++static int ipu6_isys_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, ++ unsigned int *num_planes, unsigned int sizes[], ++ struct device *alloc_devs[]) + { + struct ipu6_isys_queue *aq = vb2_queue_to_isys_queue(q); + struct ipu6_isys_video *av = ipu6_isys_queue_to_video(aq); +@@ -207,9 +238,11 @@ ipu6_isys_buf_to_fw_frame_buf_pin(struct vb2_buffer *vb, + struct ipu6_fw_isys_frame_buff_set_abi *set) + { + struct ipu6_isys_queue *aq = vb2_queue_to_isys_queue(vb->vb2_queue); ++ struct vb2_v4l2_buffer *vvb = to_vb2_v4l2_buffer(vb); ++ struct ipu6_isys_video_buffer *ivb = ++ vb2_buffer_to_ipu6_isys_video_buffer(vvb); + +- set->output_pins[aq->fw_output].addr = +- vb2_dma_contig_plane_dma_addr(vb, 0); ++ set->output_pins[aq->fw_output].addr = ivb->dma_addr; + set->output_pins[aq->fw_output].out_buf_id = vb->index + 1; + } + +@@ -332,7 +365,7 @@ static void buf_queue(struct vb2_buffer *vb) + + dev_dbg(dev, "queue buffer %u for %s\n", vb->index, av->vdev.name); + +- dma = vb2_dma_contig_plane_dma_addr(vb, 0); ++ dma = ivb->dma_addr; + dev_dbg(dev, "iova: iova %pad\n", &dma); + + spin_lock_irqsave(&aq->lock, flags); +@@ -724,10 +757,14 @@ void ipu6_isys_queue_buf_ready(struct ipu6_isys_stream *stream, + } + + list_for_each_entry_reverse(ib, &aq->active, head) { ++ struct ipu6_isys_video_buffer *ivb; ++ struct vb2_v4l2_buffer *vvb; + dma_addr_t addr; + + vb = ipu6_isys_buffer_to_vb2_buffer(ib); +- addr = vb2_dma_contig_plane_dma_addr(vb, 0); ++ vvb = to_vb2_v4l2_buffer(vb); ++ ivb = vb2_buffer_to_ipu6_isys_video_buffer(vvb); ++ addr = ivb->dma_addr; + + if (info->pin.addr != addr) { + if (first) +@@ -766,10 +803,12 @@ void ipu6_isys_queue_buf_ready(struct ipu6_isys_stream *stream, + } + + static const struct vb2_ops ipu6_isys_queue_ops = { +- .queue_setup = queue_setup, ++ .queue_setup = ipu6_isys_queue_setup, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, ++ .buf_init = ipu6_isys_buf_init, + .buf_prepare = ipu6_isys_buf_prepare, ++ .buf_cleanup = ipu6_isys_buf_cleanup, + .start_streaming = start_streaming, + .stop_streaming = stop_streaming, + .buf_queue = buf_queue, +@@ -779,16 +818,17 @@ int ipu6_isys_queue_init(struct ipu6_isys_queue *aq) + { + struct ipu6_isys *isys = ipu6_isys_queue_to_video(aq)->isys; + struct ipu6_isys_video *av = ipu6_isys_queue_to_video(aq); ++ struct ipu6_bus_device *adev = isys->adev; + int ret; + + /* no support for userptr */ + if (!aq->vbq.io_modes) + aq->vbq.io_modes = VB2_MMAP | VB2_DMABUF; + +- aq->vbq.drv_priv = aq; ++ aq->vbq.drv_priv = isys; + aq->vbq.ops = &ipu6_isys_queue_ops; + aq->vbq.lock = &av->mutex; +- aq->vbq.mem_ops = &vb2_dma_contig_memops; ++ aq->vbq.mem_ops = &vb2_dma_sg_memops; + aq->vbq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + aq->vbq.min_queued_buffers = 1; + aq->vbq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; +@@ -797,8 +837,8 @@ int ipu6_isys_queue_init(struct ipu6_isys_queue *aq) + if (ret) + return ret; + +- aq->dev = &isys->adev->auxdev.dev; +- aq->vbq.dev = &isys->adev->auxdev.dev; ++ aq->dev = &adev->auxdev.dev; ++ aq->vbq.dev = &adev->isp->pdev->dev; + spin_lock_init(&aq->lock); + INIT_LIST_HEAD(&aq->active); + INIT_LIST_HEAD(&aq->incoming); +diff --git a/drivers/media/pci/intel/ipu6/ipu6-isys-queue.h b/drivers/media/pci/intel/ipu6/ipu6-isys-queue.h +index 95cfd4869d9356..fe8fc796a58f5d 100644 +--- a/drivers/media/pci/intel/ipu6/ipu6-isys-queue.h ++++ b/drivers/media/pci/intel/ipu6/ipu6-isys-queue.h +@@ -38,6 +38,7 @@ struct ipu6_isys_buffer { + struct ipu6_isys_video_buffer { + struct vb2_v4l2_buffer vb_v4l2; + struct ipu6_isys_buffer ib; ++ dma_addr_t dma_addr; + }; + + #define IPU6_ISYS_BUFFER_LIST_FL_INCOMING BIT(0) +diff --git a/drivers/media/pci/intel/ipu6/ipu6-isys.c b/drivers/media/pci/intel/ipu6/ipu6-isys.c +index c4aff2e2009bab..c85e056cb904b2 100644 +--- a/drivers/media/pci/intel/ipu6/ipu6-isys.c ++++ b/drivers/media/pci/intel/ipu6/ipu6-isys.c +@@ -34,6 +34,7 @@ + + #include "ipu6-bus.h" + #include "ipu6-cpd.h" ++#include "ipu6-dma.h" + #include "ipu6-isys.h" + #include "ipu6-isys-csi2.h" + #include "ipu6-mmu.h" +@@ -933,29 +934,27 @@ static const struct dev_pm_ops isys_pm_ops = { + + static void free_fw_msg_bufs(struct ipu6_isys *isys) + { +- struct device *dev = &isys->adev->auxdev.dev; + struct isys_fw_msgs *fwmsg, *safe; + + list_for_each_entry_safe(fwmsg, safe, &isys->framebuflist, head) +- dma_free_attrs(dev, sizeof(struct isys_fw_msgs), fwmsg, +- fwmsg->dma_addr, 0); ++ ipu6_dma_free(isys->adev, sizeof(struct isys_fw_msgs), fwmsg, ++ fwmsg->dma_addr, 0); + + list_for_each_entry_safe(fwmsg, safe, &isys->framebuflist_fw, head) +- dma_free_attrs(dev, sizeof(struct isys_fw_msgs), fwmsg, +- fwmsg->dma_addr, 0); ++ ipu6_dma_free(isys->adev, sizeof(struct isys_fw_msgs), fwmsg, ++ fwmsg->dma_addr, 0); + } + + static int alloc_fw_msg_bufs(struct ipu6_isys *isys, int amount) + { +- struct device *dev = &isys->adev->auxdev.dev; + struct isys_fw_msgs *addr; + dma_addr_t dma_addr; + unsigned long flags; + unsigned int i; + + for (i = 0; i < amount; i++) { +- addr = dma_alloc_attrs(dev, sizeof(struct isys_fw_msgs), +- &dma_addr, GFP_KERNEL, 0); ++ addr = ipu6_dma_alloc(isys->adev, sizeof(*addr), ++ &dma_addr, GFP_KERNEL, 0); + if (!addr) + break; + addr->dma_addr = dma_addr; +@@ -974,8 +973,8 @@ static int alloc_fw_msg_bufs(struct ipu6_isys *isys, int amount) + struct isys_fw_msgs, head); + list_del(&addr->head); + spin_unlock_irqrestore(&isys->listlock, flags); +- dma_free_attrs(dev, sizeof(struct isys_fw_msgs), addr, +- addr->dma_addr, 0); ++ ipu6_dma_free(isys->adev, sizeof(struct isys_fw_msgs), addr, ++ addr->dma_addr, 0); + spin_lock_irqsave(&isys->listlock, flags); + } + spin_unlock_irqrestore(&isys->listlock, flags); +diff --git a/drivers/media/usb/cx231xx/cx231xx-cards.c b/drivers/media/usb/cx231xx/cx231xx-cards.c +index 92efe6c1f47bae..bda729b42d05fe 100644 +--- a/drivers/media/usb/cx231xx/cx231xx-cards.c ++++ b/drivers/media/usb/cx231xx/cx231xx-cards.c +@@ -994,6 +994,8 @@ const unsigned int cx231xx_bcount = ARRAY_SIZE(cx231xx_boards); + + /* table of devices that work with this driver */ + struct usb_device_id cx231xx_id_table[] = { ++ {USB_DEVICE(0x1D19, 0x6108), ++ .driver_info = CX231XX_BOARD_PV_XCAPTURE_USB}, + {USB_DEVICE(0x1D19, 0x6109), + .driver_info = CX231XX_BOARD_PV_XCAPTURE_USB}, + {USB_DEVICE(0x0572, 0x5A3C), +diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c +index 675be4858366f0..9f38a9b23c0181 100644 +--- a/drivers/media/usb/uvc/uvc_driver.c ++++ b/drivers/media/usb/uvc/uvc_driver.c +@@ -2474,9 +2474,22 @@ static const struct uvc_device_info uvc_quirk_force_y8 = { + * The Logitech cameras listed below have their interface class set to + * VENDOR_SPEC because they don't announce themselves as UVC devices, even + * though they are compliant. ++ * ++ * Sort these by vendor/product ID. + */ + static const struct usb_device_id uvc_ids[] = { + /* Quanta ACER HD User Facing */ ++ { .match_flags = USB_DEVICE_ID_MATCH_DEVICE ++ | USB_DEVICE_ID_MATCH_INT_INFO, ++ .idVendor = 0x0408, ++ .idProduct = 0x4033, ++ .bInterfaceClass = USB_CLASS_VIDEO, ++ .bInterfaceSubClass = 1, ++ .bInterfaceProtocol = UVC_PC_PROTOCOL_15, ++ .driver_info = (kernel_ulong_t)&(const struct uvc_device_info){ ++ .uvc_version = 0x010a, ++ } }, ++ /* Quanta ACER HD User Facing */ + { .match_flags = USB_DEVICE_ID_MATCH_DEVICE + | USB_DEVICE_ID_MATCH_INT_INFO, + .idVendor = 0x0408, +@@ -3010,6 +3023,15 @@ static const struct usb_device_id uvc_ids[] = { + .bInterfaceProtocol = 0, + .driver_info = UVC_INFO_QUIRK(UVC_QUIRK_PROBE_MINMAX + | UVC_QUIRK_IGNORE_SELECTOR_UNIT) }, ++ /* NXP Semiconductors IR VIDEO */ ++ { .match_flags = USB_DEVICE_ID_MATCH_DEVICE ++ | USB_DEVICE_ID_MATCH_INT_INFO, ++ .idVendor = 0x1fc9, ++ .idProduct = 0x009b, ++ .bInterfaceClass = USB_CLASS_VIDEO, ++ .bInterfaceSubClass = 1, ++ .bInterfaceProtocol = 0, ++ .driver_info = (kernel_ulong_t)&uvc_quirk_probe_minmax }, + /* Oculus VR Positional Tracker DK2 */ + { .match_flags = USB_DEVICE_ID_MATCH_DEVICE + | USB_DEVICE_ID_MATCH_INT_INFO, +@@ -3118,6 +3140,15 @@ static const struct usb_device_id uvc_ids[] = { + .bInterfaceSubClass = 1, + .bInterfaceProtocol = 0, + .driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) }, ++ /* Intel D421 Depth Module */ ++ { .match_flags = USB_DEVICE_ID_MATCH_DEVICE ++ | USB_DEVICE_ID_MATCH_INT_INFO, ++ .idVendor = 0x8086, ++ .idProduct = 0x1155, ++ .bInterfaceClass = USB_CLASS_VIDEO, ++ .bInterfaceSubClass = 1, ++ .bInterfaceProtocol = 0, ++ .driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) }, + /* Generic USB Video Class */ + { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_UNDEFINED) }, + { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, UVC_PC_PROTOCOL_15) }, +diff --git a/drivers/misc/eeprom/eeprom_93cx6.c b/drivers/misc/eeprom/eeprom_93cx6.c +index 9627294fe3e951..4c9827fe921731 100644 +--- a/drivers/misc/eeprom/eeprom_93cx6.c ++++ b/drivers/misc/eeprom/eeprom_93cx6.c +@@ -186,6 +186,11 @@ void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom, const u8 word, + eeprom_93cx6_write_bits(eeprom, command, + PCI_EEPROM_WIDTH_OPCODE + eeprom->width); + ++ if (has_quirk_extra_read_cycle(eeprom)) { ++ eeprom_93cx6_pulse_high(eeprom); ++ eeprom_93cx6_pulse_low(eeprom); ++ } ++ + /* + * Read the requested 16 bits. + */ +@@ -252,6 +257,11 @@ void eeprom_93cx6_readb(struct eeprom_93cx6 *eeprom, const u8 byte, + eeprom_93cx6_write_bits(eeprom, command, + PCI_EEPROM_WIDTH_OPCODE + eeprom->width + 1); + ++ if (has_quirk_extra_read_cycle(eeprom)) { ++ eeprom_93cx6_pulse_high(eeprom); ++ eeprom_93cx6_pulse_low(eeprom); ++ } ++ + /* + * Read the requested 8 bits. + */ +diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c +index ef06a4d5d65bb2..1d08009f2bd83f 100644 +--- a/drivers/mmc/core/block.c ++++ b/drivers/mmc/core/block.c +@@ -50,6 +50,7 @@ + #include + + #include ++#include + + #include "queue.h" + #include "block.h" +@@ -993,11 +994,12 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) + int err; + u32 result; + __be32 *blocks; ++ u8 resp_sz = mmc_card_ult_capacity(card) ? 8 : 4; ++ unsigned int noio_flag; + + struct mmc_request mrq = {}; + struct mmc_command cmd = {}; + struct mmc_data data = {}; +- + struct scatterlist sg; + + err = mmc_app_cmd(card->host, card); +@@ -1008,7 +1010,7 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) + cmd.arg = 0; + cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; + +- data.blksz = 4; ++ data.blksz = resp_sz; + data.blocks = 1; + data.flags = MMC_DATA_READ; + data.sg = &sg; +@@ -1018,15 +1020,29 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) + mrq.cmd = &cmd; + mrq.data = &data; + +- blocks = kmalloc(4, GFP_KERNEL); ++ noio_flag = memalloc_noio_save(); ++ blocks = kmalloc(resp_sz, GFP_KERNEL); ++ memalloc_noio_restore(noio_flag); + if (!blocks) + return -ENOMEM; + +- sg_init_one(&sg, blocks, 4); ++ sg_init_one(&sg, blocks, resp_sz); + + mmc_wait_for_req(card->host, &mrq); + +- result = ntohl(*blocks); ++ if (mmc_card_ult_capacity(card)) { ++ /* ++ * Normally, ACMD22 returns the number of written sectors as ++ * u32. SDUC, however, returns it as u64. This is not a ++ * superfluous requirement, because SDUC writes may exceed 2TB. ++ * For Linux mmc however, the previously write operation could ++ * not be more than the block layer limits, thus just make room ++ * for a u64 and cast the response back to u32. ++ */ ++ result = clamp_val(get_unaligned_be64(blocks), 0, UINT_MAX); ++ } else { ++ result = ntohl(*blocks); ++ } + kfree(blocks); + + if (cmd.error || data.error) +diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c +index 0ddaee0eae54f0..4f3a26676ccb86 100644 +--- a/drivers/mmc/core/bus.c ++++ b/drivers/mmc/core/bus.c +@@ -149,6 +149,8 @@ static void mmc_bus_shutdown(struct device *dev) + if (dev->driver && drv->shutdown) + drv->shutdown(card); + ++ __mmc_stop_host(host); ++ + if (host->bus_ops->shutdown) { + ret = host->bus_ops->shutdown(host); + if (ret) +@@ -321,7 +323,9 @@ int mmc_add_card(struct mmc_card *card) + case MMC_TYPE_SD: + type = "SD"; + if (mmc_card_blockaddr(card)) { +- if (mmc_card_ext_capacity(card)) ++ if (mmc_card_ult_capacity(card)) ++ type = "SDUC"; ++ else if (mmc_card_ext_capacity(card)) + type = "SDXC"; + else + type = "SDHC"; +diff --git a/drivers/mmc/core/card.h b/drivers/mmc/core/card.h +index b7754a1b8d9788..3205feb1e8ff6a 100644 +--- a/drivers/mmc/core/card.h ++++ b/drivers/mmc/core/card.h +@@ -23,6 +23,7 @@ + #define MMC_CARD_SDXC (1<<3) /* card is SDXC */ + #define MMC_CARD_REMOVED (1<<4) /* card has been removed */ + #define MMC_STATE_SUSPENDED (1<<5) /* card is suspended */ ++#define MMC_CARD_SDUC (1<<6) /* card is SDUC */ + + #define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) + #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) +@@ -30,11 +31,13 @@ + #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) + #define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) + #define mmc_card_suspended(c) ((c)->state & MMC_STATE_SUSPENDED) ++#define mmc_card_ult_capacity(c) ((c)->state & MMC_CARD_SDUC) + + #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) + #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) + #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) + #define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC) ++#define mmc_card_set_ult_capacity(c) ((c)->state |= MMC_CARD_SDUC) + #define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED) + #define mmc_card_set_suspended(c) ((c)->state |= MMC_STATE_SUSPENDED) + #define mmc_card_clr_suspended(c) ((c)->state &= ~MMC_STATE_SUSPENDED) +@@ -82,6 +85,7 @@ struct mmc_fixup { + #define CID_MANFID_SANDISK_SD 0x3 + #define CID_MANFID_ATP 0x9 + #define CID_MANFID_TOSHIBA 0x11 ++#define CID_MANFID_GIGASTONE 0x12 + #define CID_MANFID_MICRON 0x13 + #define CID_MANFID_SAMSUNG 0x15 + #define CID_MANFID_APACER 0x27 +@@ -284,4 +288,10 @@ static inline int mmc_card_broken_cache_flush(const struct mmc_card *c) + { + return c->quirks & MMC_QUIRK_BROKEN_CACHE_FLUSH; + } ++ ++static inline int mmc_card_broken_sd_poweroff_notify(const struct mmc_card *c) ++{ ++ return c->quirks & MMC_QUIRK_BROKEN_SD_POWEROFF_NOTIFY; ++} ++ + #endif +diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c +index d6c819dd68ed47..327029f5c59b79 100644 +--- a/drivers/mmc/core/core.c ++++ b/drivers/mmc/core/core.c +@@ -2296,6 +2296,9 @@ void mmc_start_host(struct mmc_host *host) + + void __mmc_stop_host(struct mmc_host *host) + { ++ if (host->rescan_disable) ++ return; ++ + if (host->slot.cd_irq >= 0) { + mmc_gpio_set_cd_wake(host, false); + disable_irq(host->slot.cd_irq); +diff --git a/drivers/mmc/core/quirks.h b/drivers/mmc/core/quirks.h +index 92905fc46436dd..89b512905be140 100644 +--- a/drivers/mmc/core/quirks.h ++++ b/drivers/mmc/core/quirks.h +@@ -25,6 +25,15 @@ static const struct mmc_fixup __maybe_unused mmc_sd_fixups[] = { + 0, -1ull, SDIO_ANY_ID, SDIO_ANY_ID, add_quirk_sd, + MMC_QUIRK_BROKEN_SD_CACHE, EXT_CSD_REV_ANY), + ++ /* ++ * GIGASTONE Gaming Plus microSD cards manufactured on 02/2022 never ++ * clear Flush Cache bit and set Poweroff Notification Ready bit. ++ */ ++ _FIXUP_EXT("ASTC", CID_MANFID_GIGASTONE, 0x3456, 2022, 2, ++ 0, -1ull, SDIO_ANY_ID, SDIO_ANY_ID, add_quirk_sd, ++ MMC_QUIRK_BROKEN_SD_CACHE | MMC_QUIRK_BROKEN_SD_POWEROFF_NOTIFY, ++ EXT_CSD_REV_ANY), ++ + END_FIXUP + }; + +diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c +index 12fe282bea77ef..63915541c0e494 100644 +--- a/drivers/mmc/core/sd.c ++++ b/drivers/mmc/core/sd.c +@@ -100,7 +100,7 @@ void mmc_decode_cid(struct mmc_card *card) + /* + * Given a 128-bit response, decode to our card CSD structure. + */ +-static int mmc_decode_csd(struct mmc_card *card) ++static int mmc_decode_csd(struct mmc_card *card, bool is_sduc) + { + struct mmc_csd *csd = &card->csd; + unsigned int e, m, csd_struct; +@@ -144,9 +144,10 @@ static int mmc_decode_csd(struct mmc_card *card) + mmc_card_set_readonly(card); + break; + case 1: ++ case 2: + /* +- * This is a block-addressed SDHC or SDXC card. Most +- * interesting fields are unused and have fixed ++ * This is a block-addressed SDHC, SDXC or SDUC card. ++ * Most interesting fields are unused and have fixed + * values. To avoid getting tripped by buggy cards, + * we assume those fixed values ourselves. + */ +@@ -159,14 +160,19 @@ static int mmc_decode_csd(struct mmc_card *card) + e = unstuff_bits(resp, 96, 3); + csd->max_dtr = tran_exp[e] * tran_mant[m]; + csd->cmdclass = unstuff_bits(resp, 84, 12); +- csd->c_size = unstuff_bits(resp, 48, 22); + +- /* SDXC cards have a minimum C_SIZE of 0x00FFFF */ +- if (csd->c_size >= 0xFFFF) ++ if (csd_struct == 1) ++ m = unstuff_bits(resp, 48, 22); ++ else ++ m = unstuff_bits(resp, 48, 28); ++ csd->c_size = m; ++ ++ if (csd->c_size >= 0x400000 && is_sduc) ++ mmc_card_set_ult_capacity(card); ++ else if (csd->c_size >= 0xFFFF) + mmc_card_set_ext_capacity(card); + +- m = unstuff_bits(resp, 48, 22); +- csd->capacity = (1 + m) << 10; ++ csd->capacity = (1 + (typeof(sector_t))m) << 10; + + csd->read_blkbits = 9; + csd->read_partial = 0; +@@ -876,7 +882,7 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) + return err; + } + +-int mmc_sd_get_csd(struct mmc_card *card) ++int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc) + { + int err; + +@@ -887,7 +893,7 @@ int mmc_sd_get_csd(struct mmc_card *card) + if (err) + return err; + +- err = mmc_decode_csd(card); ++ err = mmc_decode_csd(card, is_sduc); + if (err) + return err; + +@@ -1107,7 +1113,7 @@ static int sd_parse_ext_reg_power(struct mmc_card *card, u8 fno, u8 page, + card->ext_power.rev = reg_buf[0] & 0xf; + + /* Power Off Notification support at bit 4. */ +- if (reg_buf[1] & BIT(4)) ++ if ((reg_buf[1] & BIT(4)) && !mmc_card_broken_sd_poweroff_notify(card)) + card->ext_power.feature_support |= SD_EXT_POWER_OFF_NOTIFY; + + /* Power Sustenance support at bit 5. */ +@@ -1442,7 +1448,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, + } + + if (!oldcard) { +- err = mmc_sd_get_csd(card); ++ err = mmc_sd_get_csd(card, false); + if (err) + goto free_card; + +diff --git a/drivers/mmc/core/sd.h b/drivers/mmc/core/sd.h +index fe6dd46927a423..7e8beface2ca61 100644 +--- a/drivers/mmc/core/sd.h ++++ b/drivers/mmc/core/sd.h +@@ -10,7 +10,7 @@ struct mmc_host; + struct mmc_card; + + int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr); +-int mmc_sd_get_csd(struct mmc_card *card); ++int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc); + void mmc_decode_cid(struct mmc_card *card); + int mmc_sd_setup_card(struct mmc_host *host, struct mmc_card *card, + bool reinit); +diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c +index 4fb247fde5c080..9566837c9848e6 100644 +--- a/drivers/mmc/core/sdio.c ++++ b/drivers/mmc/core/sdio.c +@@ -769,7 +769,7 @@ static int mmc_sdio_init_card(struct mmc_host *host, u32 ocr, + * Read CSD, before selecting the card + */ + if (!oldcard && mmc_card_sd_combo(card)) { +- err = mmc_sd_get_csd(card); ++ err = mmc_sd_get_csd(card, false); + if (err) + goto remove; + +diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c +index 89018b6c97b9a7..813bc20cfb5a6c 100644 +--- a/drivers/mmc/host/mtk-sd.c ++++ b/drivers/mmc/host/mtk-sd.c +@@ -2736,20 +2736,18 @@ static int msdc_drv_probe(struct platform_device *pdev) + } + + /* Allocate MMC host for this device */ +- mmc = mmc_alloc_host(sizeof(struct msdc_host), &pdev->dev); ++ mmc = devm_mmc_alloc_host(&pdev->dev, sizeof(struct msdc_host)); + if (!mmc) + return -ENOMEM; + + host = mmc_priv(mmc); + ret = mmc_of_parse(mmc); + if (ret) +- goto host_free; ++ return ret; + + host->base = devm_platform_ioremap_resource(pdev, 0); +- if (IS_ERR(host->base)) { +- ret = PTR_ERR(host->base); +- goto host_free; +- } ++ if (IS_ERR(host->base)) ++ return PTR_ERR(host->base); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (res) { +@@ -2760,53 +2758,45 @@ static int msdc_drv_probe(struct platform_device *pdev) + + ret = mmc_regulator_get_supply(mmc); + if (ret) +- goto host_free; ++ return ret; + + ret = msdc_of_clock_parse(pdev, host); + if (ret) +- goto host_free; ++ return ret; + + host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, + "hrst"); +- if (IS_ERR(host->reset)) { +- ret = PTR_ERR(host->reset); +- goto host_free; +- } ++ if (IS_ERR(host->reset)) ++ return PTR_ERR(host->reset); + + /* only eMMC has crypto property */ + if (!(mmc->caps2 & MMC_CAP2_NO_MMC)) { + host->crypto_clk = devm_clk_get_optional(&pdev->dev, "crypto"); + if (IS_ERR(host->crypto_clk)) +- host->crypto_clk = NULL; +- else ++ return PTR_ERR(host->crypto_clk); ++ else if (host->crypto_clk) + mmc->caps2 |= MMC_CAP2_CRYPTO; + } + + host->irq = platform_get_irq(pdev, 0); +- if (host->irq < 0) { +- ret = host->irq; +- goto host_free; +- } ++ if (host->irq < 0) ++ return host->irq; + + host->pinctrl = devm_pinctrl_get(&pdev->dev); +- if (IS_ERR(host->pinctrl)) { +- ret = PTR_ERR(host->pinctrl); +- dev_err(&pdev->dev, "Cannot find pinctrl!\n"); +- goto host_free; +- } ++ if (IS_ERR(host->pinctrl)) ++ return dev_err_probe(&pdev->dev, PTR_ERR(host->pinctrl), ++ "Cannot find pinctrl"); + + host->pins_default = pinctrl_lookup_state(host->pinctrl, "default"); + if (IS_ERR(host->pins_default)) { +- ret = PTR_ERR(host->pins_default); + dev_err(&pdev->dev, "Cannot find pinctrl default!\n"); +- goto host_free; ++ return PTR_ERR(host->pins_default); + } + + host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs"); + if (IS_ERR(host->pins_uhs)) { +- ret = PTR_ERR(host->pins_uhs); + dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n"); +- goto host_free; ++ return PTR_ERR(host->pins_uhs); + } + + /* Support for SDIO eint irq ? */ +@@ -2885,7 +2875,7 @@ static int msdc_drv_probe(struct platform_device *pdev) + ret = msdc_ungate_clock(host); + if (ret) { + dev_err(&pdev->dev, "Cannot ungate clocks!\n"); +- goto release_mem; ++ goto release_clk; + } + msdc_init_hw(host); + +@@ -2895,14 +2885,14 @@ static int msdc_drv_probe(struct platform_device *pdev) + GFP_KERNEL); + if (!host->cq_host) { + ret = -ENOMEM; +- goto host_free; ++ goto release; + } + host->cq_host->caps |= CQHCI_TASK_DESC_SZ_128; + host->cq_host->mmio = host->base + 0x800; + host->cq_host->ops = &msdc_cmdq_ops; + ret = cqhci_init(host->cq_host, mmc, true); + if (ret) +- goto host_free; ++ goto release; + mmc->max_segs = 128; + /* cqhci 16bit length */ + /* 0 size, means 65536 so we don't have to -1 here */ +@@ -2929,9 +2919,10 @@ static int msdc_drv_probe(struct platform_device *pdev) + end: + pm_runtime_disable(host->dev); + release: +- platform_set_drvdata(pdev, NULL); + msdc_deinit_hw(host); ++release_clk: + msdc_gate_clock(host); ++ platform_set_drvdata(pdev, NULL); + release_mem: + if (host->dma.gpd) + dma_free_coherent(&pdev->dev, +@@ -2939,11 +2930,8 @@ static int msdc_drv_probe(struct platform_device *pdev) + host->dma.gpd, host->dma.gpd_addr); + if (host->dma.bd) + dma_free_coherent(&pdev->dev, +- MAX_BD_NUM * sizeof(struct mt_bdma_desc), +- host->dma.bd, host->dma.bd_addr); +-host_free: +- mmc_free_host(mmc); +- ++ MAX_BD_NUM * sizeof(struct mt_bdma_desc), ++ host->dma.bd, host->dma.bd_addr); + return ret; + } + +@@ -2968,9 +2956,7 @@ static void msdc_drv_remove(struct platform_device *pdev) + 2 * sizeof(struct mt_gpdma_desc), + host->dma.gpd, host->dma.gpd_addr); + dma_free_coherent(&pdev->dev, MAX_BD_NUM * sizeof(struct mt_bdma_desc), +- host->dma.bd, host->dma.bd_addr); +- +- mmc_free_host(mmc); ++ host->dma.bd, host->dma.bd_addr); + } + + static void msdc_save_reg(struct msdc_host *host) +diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c +index 8f0bc6dca2b040..ef3a44f2dff16d 100644 +--- a/drivers/mmc/host/sdhci-esdhc-imx.c ++++ b/drivers/mmc/host/sdhci-esdhc-imx.c +@@ -238,6 +238,7 @@ struct esdhc_platform_data { + + struct esdhc_soc_data { + u32 flags; ++ u32 quirks; + }; + + static const struct esdhc_soc_data esdhc_imx25_data = { +@@ -309,10 +310,12 @@ static struct esdhc_soc_data usdhc_imx7ulp_data = { + | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 + | ESDHC_FLAG_PMQOS | ESDHC_FLAG_HS400 + | ESDHC_FLAG_STATE_LOST_IN_LPMODE, ++ .quirks = SDHCI_QUIRK_NO_LED, + }; + static struct esdhc_soc_data usdhc_imxrt1050_data = { + .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING + | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200, ++ .quirks = SDHCI_QUIRK_NO_LED, + }; + + static struct esdhc_soc_data usdhc_imx8qxp_data = { +@@ -321,6 +324,7 @@ static struct esdhc_soc_data usdhc_imx8qxp_data = { + | ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES + | ESDHC_FLAG_STATE_LOST_IN_LPMODE + | ESDHC_FLAG_CLK_RATE_LOST_IN_PM_RUNTIME, ++ .quirks = SDHCI_QUIRK_NO_LED, + }; + + static struct esdhc_soc_data usdhc_imx8mm_data = { +@@ -328,6 +332,7 @@ static struct esdhc_soc_data usdhc_imx8mm_data = { + | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 + | ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES + | ESDHC_FLAG_STATE_LOST_IN_LPMODE, ++ .quirks = SDHCI_QUIRK_NO_LED, + }; + + struct pltfm_imx_data { +@@ -1687,6 +1692,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) + + imx_data->socdata = device_get_match_data(&pdev->dev); + ++ host->quirks |= imx_data->socdata->quirks; + if (imx_data->socdata->flags & ESDHC_FLAG_PMQOS) + cpu_latency_qos_add_request(&imx_data->pm_qos_req, 0); + +diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c +index ed45ed0bdafd96..2e2e15e2d8fb8b 100644 +--- a/drivers/mmc/host/sdhci-pci-core.c ++++ b/drivers/mmc/host/sdhci-pci-core.c +@@ -21,6 +21,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -1235,6 +1236,29 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { + .priv_size = sizeof(struct intel_host), + }; + ++/* DMI quirks for devices with missing or broken CD GPIO info */ ++static const struct gpiod_lookup_table vexia_edu_atla10_cd_gpios = { ++ .dev_id = "0000:00:12.0", ++ .table = { ++ GPIO_LOOKUP("INT33FC:00", 38, "cd", GPIO_ACTIVE_HIGH), ++ { } ++ }, ++}; ++ ++static const struct dmi_system_id sdhci_intel_byt_cd_gpio_override[] = { ++ { ++ /* Vexia Edu Atla 10 tablet 9V version */ ++ .matches = { ++ DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), ++ DMI_MATCH(DMI_BOARD_NAME, "Aptio CRB"), ++ /* Above strings are too generic, also match on BIOS date */ ++ DMI_MATCH(DMI_BIOS_DATE, "08/25/2014"), ++ }, ++ .driver_data = (void *)&vexia_edu_atla10_cd_gpios, ++ }, ++ { } ++}; ++ + static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { + #ifdef CONFIG_PM_SLEEP + .resume = byt_resume, +@@ -1253,6 +1277,7 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { + .add_host = byt_add_host, + .remove_slot = byt_remove_slot, + .ops = &sdhci_intel_byt_ops, ++ .cd_gpio_override = sdhci_intel_byt_cd_gpio_override, + .priv_size = sizeof(struct intel_host), + }; + +@@ -2054,6 +2079,42 @@ static const struct dev_pm_ops sdhci_pci_pm_ops = { + * * + \*****************************************************************************/ + ++static struct gpiod_lookup_table *sdhci_pci_add_gpio_lookup_table( ++ struct sdhci_pci_chip *chip) ++{ ++ struct gpiod_lookup_table *cd_gpio_lookup_table; ++ const struct dmi_system_id *dmi_id = NULL; ++ size_t count; ++ ++ if (chip->fixes && chip->fixes->cd_gpio_override) ++ dmi_id = dmi_first_match(chip->fixes->cd_gpio_override); ++ ++ if (!dmi_id) ++ return NULL; ++ ++ cd_gpio_lookup_table = dmi_id->driver_data; ++ for (count = 0; cd_gpio_lookup_table->table[count].key; count++) ++ ; ++ ++ cd_gpio_lookup_table = kmemdup(dmi_id->driver_data, ++ /* count + 1 terminating entry */ ++ struct_size(cd_gpio_lookup_table, table, count + 1), ++ GFP_KERNEL); ++ if (!cd_gpio_lookup_table) ++ return ERR_PTR(-ENOMEM); ++ ++ gpiod_add_lookup_table(cd_gpio_lookup_table); ++ return cd_gpio_lookup_table; ++} ++ ++static void sdhci_pci_remove_gpio_lookup_table(struct gpiod_lookup_table *lookup_table) ++{ ++ if (lookup_table) { ++ gpiod_remove_lookup_table(lookup_table); ++ kfree(lookup_table); ++ } ++} ++ + static struct sdhci_pci_slot *sdhci_pci_probe_slot( + struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar, + int slotno) +@@ -2129,8 +2190,19 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot( + device_init_wakeup(&pdev->dev, true); + + if (slot->cd_idx >= 0) { ++ struct gpiod_lookup_table *cd_gpio_lookup_table; ++ ++ cd_gpio_lookup_table = sdhci_pci_add_gpio_lookup_table(chip); ++ if (IS_ERR(cd_gpio_lookup_table)) { ++ ret = PTR_ERR(cd_gpio_lookup_table); ++ goto remove; ++ } ++ + ret = mmc_gpiod_request_cd(host->mmc, "cd", slot->cd_idx, + slot->cd_override_level, 0); ++ ++ sdhci_pci_remove_gpio_lookup_table(cd_gpio_lookup_table); ++ + if (ret && ret != -EPROBE_DEFER) + ret = mmc_gpiod_request_cd(host->mmc, NULL, + slot->cd_idx, +diff --git a/drivers/mmc/host/sdhci-pci.h b/drivers/mmc/host/sdhci-pci.h +index 153704f812edc8..4973fa8592175e 100644 +--- a/drivers/mmc/host/sdhci-pci.h ++++ b/drivers/mmc/host/sdhci-pci.h +@@ -156,6 +156,7 @@ struct sdhci_pci_fixes { + #endif + + const struct sdhci_ops *ops; ++ const struct dmi_system_id *cd_gpio_override; + size_t priv_size; + }; + +diff --git a/drivers/net/can/c_can/c_can_main.c b/drivers/net/can/c_can/c_can_main.c +index 511615dc334196..cc371d0c9f3c76 100644 +--- a/drivers/net/can/c_can/c_can_main.c ++++ b/drivers/net/can/c_can/c_can_main.c +@@ -1014,49 +1014,57 @@ static int c_can_handle_bus_err(struct net_device *dev, + + /* propagate the error condition to the CAN stack */ + skb = alloc_can_err_skb(dev, &cf); +- if (unlikely(!skb)) +- return 0; + + /* check for 'last error code' which tells us the + * type of the last error to occur on the CAN bus + */ +- cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; ++ if (likely(skb)) ++ cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; + + switch (lec_type) { + case LEC_STUFF_ERROR: + netdev_dbg(dev, "stuff error\n"); +- cf->data[2] |= CAN_ERR_PROT_STUFF; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_STUFF; + stats->rx_errors++; + break; + case LEC_FORM_ERROR: + netdev_dbg(dev, "form error\n"); +- cf->data[2] |= CAN_ERR_PROT_FORM; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_FORM; + stats->rx_errors++; + break; + case LEC_ACK_ERROR: + netdev_dbg(dev, "ack error\n"); +- cf->data[3] = CAN_ERR_PROT_LOC_ACK; ++ if (likely(skb)) ++ cf->data[3] = CAN_ERR_PROT_LOC_ACK; + stats->tx_errors++; + break; + case LEC_BIT1_ERROR: + netdev_dbg(dev, "bit1 error\n"); +- cf->data[2] |= CAN_ERR_PROT_BIT1; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_BIT1; + stats->tx_errors++; + break; + case LEC_BIT0_ERROR: + netdev_dbg(dev, "bit0 error\n"); +- cf->data[2] |= CAN_ERR_PROT_BIT0; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_BIT0; + stats->tx_errors++; + break; + case LEC_CRC_ERROR: + netdev_dbg(dev, "CRC error\n"); +- cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; ++ if (likely(skb)) ++ cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; + stats->rx_errors++; + break; + default: + break; + } + ++ if (unlikely(!skb)) ++ return 0; ++ + netif_receive_skb(skb); + return 1; + } +diff --git a/drivers/net/can/dev/dev.c b/drivers/net/can/dev/dev.c +index 6792c14fd7eb00..681643ab37804e 100644 +--- a/drivers/net/can/dev/dev.c ++++ b/drivers/net/can/dev/dev.c +@@ -468,7 +468,7 @@ static int can_set_termination(struct net_device *ndev, u16 term) + else + set = 0; + +- gpiod_set_value(priv->termination_gpio, set); ++ gpiod_set_value_cansleep(priv->termination_gpio, set); + + return 0; + } +diff --git a/drivers/net/can/ifi_canfd/ifi_canfd.c b/drivers/net/can/ifi_canfd/ifi_canfd.c +index d32b10900d2f62..c86b57d47085fd 100644 +--- a/drivers/net/can/ifi_canfd/ifi_canfd.c ++++ b/drivers/net/can/ifi_canfd/ifi_canfd.c +@@ -390,36 +390,55 @@ static int ifi_canfd_handle_lec_err(struct net_device *ndev) + return 0; + + priv->can.can_stats.bus_error++; +- stats->rx_errors++; + + /* Propagate the error condition to the CAN stack. */ + skb = alloc_can_err_skb(ndev, &cf); +- if (unlikely(!skb)) +- return 0; + + /* Read the error counter register and check for new errors. */ +- cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; ++ if (likely(skb)) ++ cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; + +- if (errctr & IFI_CANFD_ERROR_CTR_OVERLOAD_FIRST) +- cf->data[2] |= CAN_ERR_PROT_OVERLOAD; ++ if (errctr & IFI_CANFD_ERROR_CTR_OVERLOAD_FIRST) { ++ stats->rx_errors++; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_OVERLOAD; ++ } + +- if (errctr & IFI_CANFD_ERROR_CTR_ACK_ERROR_FIRST) +- cf->data[3] = CAN_ERR_PROT_LOC_ACK; ++ if (errctr & IFI_CANFD_ERROR_CTR_ACK_ERROR_FIRST) { ++ stats->tx_errors++; ++ if (likely(skb)) ++ cf->data[3] = CAN_ERR_PROT_LOC_ACK; ++ } + +- if (errctr & IFI_CANFD_ERROR_CTR_BIT0_ERROR_FIRST) +- cf->data[2] |= CAN_ERR_PROT_BIT0; ++ if (errctr & IFI_CANFD_ERROR_CTR_BIT0_ERROR_FIRST) { ++ stats->tx_errors++; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_BIT0; ++ } + +- if (errctr & IFI_CANFD_ERROR_CTR_BIT1_ERROR_FIRST) +- cf->data[2] |= CAN_ERR_PROT_BIT1; ++ if (errctr & IFI_CANFD_ERROR_CTR_BIT1_ERROR_FIRST) { ++ stats->tx_errors++; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_BIT1; ++ } + +- if (errctr & IFI_CANFD_ERROR_CTR_STUFF_ERROR_FIRST) +- cf->data[2] |= CAN_ERR_PROT_STUFF; ++ if (errctr & IFI_CANFD_ERROR_CTR_STUFF_ERROR_FIRST) { ++ stats->rx_errors++; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_STUFF; ++ } + +- if (errctr & IFI_CANFD_ERROR_CTR_CRC_ERROR_FIRST) +- cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; ++ if (errctr & IFI_CANFD_ERROR_CTR_CRC_ERROR_FIRST) { ++ stats->rx_errors++; ++ if (likely(skb)) ++ cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; ++ } + +- if (errctr & IFI_CANFD_ERROR_CTR_FORM_ERROR_FIRST) +- cf->data[2] |= CAN_ERR_PROT_FORM; ++ if (errctr & IFI_CANFD_ERROR_CTR_FORM_ERROR_FIRST) { ++ stats->rx_errors++; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_FORM; ++ } + + /* Reset the error counter, ack the IRQ and re-enable the counter. */ + writel(IFI_CANFD_ERROR_CTR_ER_RESET, priv->base + IFI_CANFD_ERROR_CTR); +@@ -427,6 +446,9 @@ static int ifi_canfd_handle_lec_err(struct net_device *ndev) + priv->base + IFI_CANFD_INTERRUPT); + writel(IFI_CANFD_ERROR_CTR_ER_ENABLE, priv->base + IFI_CANFD_ERROR_CTR); + ++ if (unlikely(!skb)) ++ return 0; ++ + netif_receive_skb(skb); + + return 1; +diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c +index 16e9e7d7527d97..533bcb77c9f934 100644 +--- a/drivers/net/can/m_can/m_can.c ++++ b/drivers/net/can/m_can/m_can.c +@@ -695,47 +695,60 @@ static int m_can_handle_lec_err(struct net_device *dev, + u32 timestamp = 0; + + cdev->can.can_stats.bus_error++; +- stats->rx_errors++; + + /* propagate the error condition to the CAN stack */ + skb = alloc_can_err_skb(dev, &cf); +- if (unlikely(!skb)) +- return 0; + + /* check for 'last error code' which tells us the + * type of the last error to occur on the CAN bus + */ +- cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; ++ if (likely(skb)) ++ cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; + + switch (lec_type) { + case LEC_STUFF_ERROR: + netdev_dbg(dev, "stuff error\n"); +- cf->data[2] |= CAN_ERR_PROT_STUFF; ++ stats->rx_errors++; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_STUFF; + break; + case LEC_FORM_ERROR: + netdev_dbg(dev, "form error\n"); +- cf->data[2] |= CAN_ERR_PROT_FORM; ++ stats->rx_errors++; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_FORM; + break; + case LEC_ACK_ERROR: + netdev_dbg(dev, "ack error\n"); +- cf->data[3] = CAN_ERR_PROT_LOC_ACK; ++ stats->tx_errors++; ++ if (likely(skb)) ++ cf->data[3] = CAN_ERR_PROT_LOC_ACK; + break; + case LEC_BIT1_ERROR: + netdev_dbg(dev, "bit1 error\n"); +- cf->data[2] |= CAN_ERR_PROT_BIT1; ++ stats->tx_errors++; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_BIT1; + break; + case LEC_BIT0_ERROR: + netdev_dbg(dev, "bit0 error\n"); +- cf->data[2] |= CAN_ERR_PROT_BIT0; ++ stats->tx_errors++; ++ if (likely(skb)) ++ cf->data[2] |= CAN_ERR_PROT_BIT0; + break; + case LEC_CRC_ERROR: + netdev_dbg(dev, "CRC error\n"); +- cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; ++ stats->rx_errors++; ++ if (likely(skb)) ++ cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; + break; + default: + break; + } + ++ if (unlikely(!skb)) ++ return 0; ++ + if (cdev->is_peripheral) + timestamp = m_can_get_timestamp(cdev); + +diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c +index ddb3247948ad2f..4d245857ef1cec 100644 +--- a/drivers/net/can/sja1000/sja1000.c ++++ b/drivers/net/can/sja1000/sja1000.c +@@ -416,8 +416,6 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status) + int ret = 0; + + skb = alloc_can_err_skb(dev, &cf); +- if (skb == NULL) +- return -ENOMEM; + + txerr = priv->read_reg(priv, SJA1000_TXERR); + rxerr = priv->read_reg(priv, SJA1000_RXERR); +@@ -425,8 +423,11 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status) + if (isrc & IRQ_DOI) { + /* data overrun interrupt */ + netdev_dbg(dev, "data overrun interrupt\n"); +- cf->can_id |= CAN_ERR_CRTL; +- cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; ++ if (skb) { ++ cf->can_id |= CAN_ERR_CRTL; ++ cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; ++ } ++ + stats->rx_over_errors++; + stats->rx_errors++; + sja1000_write_cmdreg(priv, CMD_CDO); /* clear bit */ +@@ -452,7 +453,7 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status) + else + state = CAN_STATE_ERROR_ACTIVE; + } +- if (state != CAN_STATE_BUS_OFF) { ++ if (state != CAN_STATE_BUS_OFF && skb) { + cf->can_id |= CAN_ERR_CNT; + cf->data[6] = txerr; + cf->data[7] = rxerr; +@@ -460,33 +461,38 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status) + if (isrc & IRQ_BEI) { + /* bus error interrupt */ + priv->can.can_stats.bus_error++; +- stats->rx_errors++; + + ecc = priv->read_reg(priv, SJA1000_ECC); ++ if (skb) { ++ cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; + +- cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; +- +- /* set error type */ +- switch (ecc & ECC_MASK) { +- case ECC_BIT: +- cf->data[2] |= CAN_ERR_PROT_BIT; +- break; +- case ECC_FORM: +- cf->data[2] |= CAN_ERR_PROT_FORM; +- break; +- case ECC_STUFF: +- cf->data[2] |= CAN_ERR_PROT_STUFF; +- break; +- default: +- break; +- } ++ /* set error type */ ++ switch (ecc & ECC_MASK) { ++ case ECC_BIT: ++ cf->data[2] |= CAN_ERR_PROT_BIT; ++ break; ++ case ECC_FORM: ++ cf->data[2] |= CAN_ERR_PROT_FORM; ++ break; ++ case ECC_STUFF: ++ cf->data[2] |= CAN_ERR_PROT_STUFF; ++ break; ++ default: ++ break; ++ } + +- /* set error location */ +- cf->data[3] = ecc & ECC_SEG; ++ /* set error location */ ++ cf->data[3] = ecc & ECC_SEG; ++ } + + /* Error occurred during transmission? */ +- if ((ecc & ECC_DIR) == 0) +- cf->data[2] |= CAN_ERR_PROT_TX; ++ if ((ecc & ECC_DIR) == 0) { ++ stats->tx_errors++; ++ if (skb) ++ cf->data[2] |= CAN_ERR_PROT_TX; ++ } else { ++ stats->rx_errors++; ++ } + } + if (isrc & IRQ_EPI) { + /* error passive interrupt */ +@@ -502,8 +508,10 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status) + netdev_dbg(dev, "arbitration lost interrupt\n"); + alc = priv->read_reg(priv, SJA1000_ALC); + priv->can.can_stats.arbitration_lost++; +- cf->can_id |= CAN_ERR_LOSTARB; +- cf->data[0] = alc & 0x1f; ++ if (skb) { ++ cf->can_id |= CAN_ERR_LOSTARB; ++ cf->data[0] = alc & 0x1f; ++ } + } + + if (state != priv->can.state) { +@@ -516,6 +524,9 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status) + can_bus_off(dev); + } + ++ if (!skb) ++ return -ENOMEM; ++ + netif_rx(skb); + + return ret; +diff --git a/drivers/net/can/spi/hi311x.c b/drivers/net/can/spi/hi311x.c +index 148d974ebb2107..1b9501ee10deb5 100644 +--- a/drivers/net/can/spi/hi311x.c ++++ b/drivers/net/can/spi/hi311x.c +@@ -671,9 +671,9 @@ static irqreturn_t hi3110_can_ist(int irq, void *dev_id) + tx_state = txerr >= rxerr ? new_state : 0; + rx_state = txerr <= rxerr ? new_state : 0; + can_change_state(net, cf, tx_state, rx_state); +- netif_rx(skb); + + if (new_state == CAN_STATE_BUS_OFF) { ++ netif_rx(skb); + can_bus_off(net); + if (priv->can.restart_ms == 0) { + priv->force_quit = 1; +@@ -684,6 +684,7 @@ static irqreturn_t hi3110_can_ist(int irq, void *dev_id) + cf->can_id |= CAN_ERR_CNT; + cf->data[6] = txerr; + cf->data[7] = rxerr; ++ netif_rx(skb); + } + } + +@@ -696,27 +697,38 @@ static irqreturn_t hi3110_can_ist(int irq, void *dev_id) + /* Check for protocol errors */ + if (eflag & HI3110_ERR_PROTOCOL_MASK) { + skb = alloc_can_err_skb(net, &cf); +- if (!skb) +- break; ++ if (skb) ++ cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; + +- cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; + priv->can.can_stats.bus_error++; +- priv->net->stats.rx_errors++; +- if (eflag & HI3110_ERR_BITERR) +- cf->data[2] |= CAN_ERR_PROT_BIT; +- else if (eflag & HI3110_ERR_FRMERR) +- cf->data[2] |= CAN_ERR_PROT_FORM; +- else if (eflag & HI3110_ERR_STUFERR) +- cf->data[2] |= CAN_ERR_PROT_STUFF; +- else if (eflag & HI3110_ERR_CRCERR) +- cf->data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ; +- else if (eflag & HI3110_ERR_ACKERR) +- cf->data[3] |= CAN_ERR_PROT_LOC_ACK; +- +- cf->data[6] = hi3110_read(spi, HI3110_READ_TEC); +- cf->data[7] = hi3110_read(spi, HI3110_READ_REC); ++ if (eflag & HI3110_ERR_BITERR) { ++ priv->net->stats.tx_errors++; ++ if (skb) ++ cf->data[2] |= CAN_ERR_PROT_BIT; ++ } else if (eflag & HI3110_ERR_FRMERR) { ++ priv->net->stats.rx_errors++; ++ if (skb) ++ cf->data[2] |= CAN_ERR_PROT_FORM; ++ } else if (eflag & HI3110_ERR_STUFERR) { ++ priv->net->stats.rx_errors++; ++ if (skb) ++ cf->data[2] |= CAN_ERR_PROT_STUFF; ++ } else if (eflag & HI3110_ERR_CRCERR) { ++ priv->net->stats.rx_errors++; ++ if (skb) ++ cf->data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ; ++ } else if (eflag & HI3110_ERR_ACKERR) { ++ priv->net->stats.tx_errors++; ++ if (skb) ++ cf->data[3] |= CAN_ERR_PROT_LOC_ACK; ++ } ++ + netdev_dbg(priv->net, "Bus Error\n"); +- netif_rx(skb); ++ if (skb) { ++ cf->data[6] = hi3110_read(spi, HI3110_READ_TEC); ++ cf->data[7] = hi3110_read(spi, HI3110_READ_REC); ++ netif_rx(skb); ++ } + } + } + +diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c +index d3ac865933fdf6..e94321849fd7e6 100644 +--- a/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c ++++ b/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c +@@ -21,6 +21,11 @@ static inline bool mcp251xfd_tx_fifo_sta_empty(u32 fifo_sta) + return fifo_sta & MCP251XFD_REG_FIFOSTA_TFERFFIF; + } + ++static inline bool mcp251xfd_tx_fifo_sta_less_than_half_full(u32 fifo_sta) ++{ ++ return fifo_sta & MCP251XFD_REG_FIFOSTA_TFHRFHIF; ++} ++ + static inline int + mcp251xfd_tef_tail_get_from_chip(const struct mcp251xfd_priv *priv, + u8 *tef_tail) +@@ -147,7 +152,29 @@ mcp251xfd_get_tef_len(struct mcp251xfd_priv *priv, u8 *len_p) + BUILD_BUG_ON(sizeof(tx_ring->obj_num) != sizeof(len)); + + len = (chip_tx_tail << shift) - (tail << shift); +- *len_p = len >> shift; ++ len >>= shift; ++ ++ /* According to mcp2518fd erratum DS80000789E 6. the FIFOCI ++ * bits of a FIFOSTA register, here the TX-FIFO tail index ++ * might be corrupted. ++ * ++ * However here it seems the bit indicating that the TX-FIFO ++ * is empty (MCP251XFD_REG_FIFOSTA_TFERFFIF) is not correct ++ * while the TX-FIFO tail index is. ++ * ++ * We assume the TX-FIFO is empty, i.e. all pending CAN frames ++ * haven been send, if: ++ * - Chip's head and tail index are equal (len == 0). ++ * - The TX-FIFO is less than half full. ++ * (The TX-FIFO empty case has already been checked at the ++ * beginning of this function.) ++ * - No free buffers in the TX ring. ++ */ ++ if (len == 0 && mcp251xfd_tx_fifo_sta_less_than_half_full(fifo_sta) && ++ mcp251xfd_get_tx_free(tx_ring) == 0) ++ len = tx_ring->obj_num; ++ ++ *len_p = len; + + return 0; + } +diff --git a/drivers/net/can/sun4i_can.c b/drivers/net/can/sun4i_can.c +index 360158c295d348..4311c1f0eafd8d 100644 +--- a/drivers/net/can/sun4i_can.c ++++ b/drivers/net/can/sun4i_can.c +@@ -579,11 +579,9 @@ static int sun4i_can_err(struct net_device *dev, u8 isrc, u8 status) + /* bus error interrupt */ + netdev_dbg(dev, "bus error interrupt\n"); + priv->can.can_stats.bus_error++; +- stats->rx_errors++; ++ ecc = readl(priv->base + SUN4I_REG_STA_ADDR); + + if (likely(skb)) { +- ecc = readl(priv->base + SUN4I_REG_STA_ADDR); +- + cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; + + switch (ecc & SUN4I_STA_MASK_ERR) { +@@ -601,9 +599,15 @@ static int sun4i_can_err(struct net_device *dev, u8 isrc, u8 status) + >> 16; + break; + } +- /* error occurred during transmission? */ +- if ((ecc & SUN4I_STA_ERR_DIR) == 0) ++ } ++ ++ /* error occurred during transmission? */ ++ if ((ecc & SUN4I_STA_ERR_DIR) == 0) { ++ if (likely(skb)) + cf->data[2] |= CAN_ERR_PROT_TX; ++ stats->tx_errors++; ++ } else { ++ stats->rx_errors++; + } + } + if (isrc & SUN4I_INT_ERR_PASSIVE) { +@@ -629,10 +633,10 @@ static int sun4i_can_err(struct net_device *dev, u8 isrc, u8 status) + tx_state = txerr >= rxerr ? state : 0; + rx_state = txerr <= rxerr ? state : 0; + +- if (likely(skb)) +- can_change_state(dev, cf, tx_state, rx_state); +- else +- priv->can.state = state; ++ /* The skb allocation might fail, but can_change_state() ++ * handles cf == NULL. ++ */ ++ can_change_state(dev, cf, tx_state, rx_state); + if (state == CAN_STATE_BUS_OFF) + can_bus_off(dev); + } +diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c +index 050c0b49938a42..5355bac4dccbe0 100644 +--- a/drivers/net/can/usb/ems_usb.c ++++ b/drivers/net/can/usb/ems_usb.c +@@ -335,15 +335,14 @@ static void ems_usb_rx_err(struct ems_usb *dev, struct ems_cpc_msg *msg) + struct net_device_stats *stats = &dev->netdev->stats; + + skb = alloc_can_err_skb(dev->netdev, &cf); +- if (skb == NULL) +- return; + + if (msg->type == CPC_MSG_TYPE_CAN_STATE) { + u8 state = msg->msg.can_state; + + if (state & SJA1000_SR_BS) { + dev->can.state = CAN_STATE_BUS_OFF; +- cf->can_id |= CAN_ERR_BUSOFF; ++ if (skb) ++ cf->can_id |= CAN_ERR_BUSOFF; + + dev->can.can_stats.bus_off++; + can_bus_off(dev->netdev); +@@ -361,44 +360,53 @@ static void ems_usb_rx_err(struct ems_usb *dev, struct ems_cpc_msg *msg) + + /* bus error interrupt */ + dev->can.can_stats.bus_error++; +- stats->rx_errors++; + +- cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; ++ if (skb) { ++ cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; + +- switch (ecc & SJA1000_ECC_MASK) { +- case SJA1000_ECC_BIT: +- cf->data[2] |= CAN_ERR_PROT_BIT; +- break; +- case SJA1000_ECC_FORM: +- cf->data[2] |= CAN_ERR_PROT_FORM; +- break; +- case SJA1000_ECC_STUFF: +- cf->data[2] |= CAN_ERR_PROT_STUFF; +- break; +- default: +- cf->data[3] = ecc & SJA1000_ECC_SEG; +- break; ++ switch (ecc & SJA1000_ECC_MASK) { ++ case SJA1000_ECC_BIT: ++ cf->data[2] |= CAN_ERR_PROT_BIT; ++ break; ++ case SJA1000_ECC_FORM: ++ cf->data[2] |= CAN_ERR_PROT_FORM; ++ break; ++ case SJA1000_ECC_STUFF: ++ cf->data[2] |= CAN_ERR_PROT_STUFF; ++ break; ++ default: ++ cf->data[3] = ecc & SJA1000_ECC_SEG; ++ break; ++ } + } + + /* Error occurred during transmission? */ +- if ((ecc & SJA1000_ECC_DIR) == 0) +- cf->data[2] |= CAN_ERR_PROT_TX; ++ if ((ecc & SJA1000_ECC_DIR) == 0) { ++ stats->tx_errors++; ++ if (skb) ++ cf->data[2] |= CAN_ERR_PROT_TX; ++ } else { ++ stats->rx_errors++; ++ } + +- if (dev->can.state == CAN_STATE_ERROR_WARNING || +- dev->can.state == CAN_STATE_ERROR_PASSIVE) { ++ if (skb && (dev->can.state == CAN_STATE_ERROR_WARNING || ++ dev->can.state == CAN_STATE_ERROR_PASSIVE)) { + cf->can_id |= CAN_ERR_CRTL; + cf->data[1] = (txerr > rxerr) ? + CAN_ERR_CRTL_TX_PASSIVE : CAN_ERR_CRTL_RX_PASSIVE; + } + } else if (msg->type == CPC_MSG_TYPE_OVERRUN) { +- cf->can_id |= CAN_ERR_CRTL; +- cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; ++ if (skb) { ++ cf->can_id |= CAN_ERR_CRTL; ++ cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; ++ } + + stats->rx_over_errors++; + stats->rx_errors++; + } + +- netif_rx(skb); ++ if (skb) ++ netif_rx(skb); + } + + /* +diff --git a/drivers/net/can/usb/f81604.c b/drivers/net/can/usb/f81604.c +index bc0c8903fe7794..e0cfa1460b0b83 100644 +--- a/drivers/net/can/usb/f81604.c ++++ b/drivers/net/can/usb/f81604.c +@@ -526,7 +526,6 @@ static void f81604_handle_can_bus_errors(struct f81604_port_priv *priv, + netdev_dbg(netdev, "bus error interrupt\n"); + + priv->can.can_stats.bus_error++; +- stats->rx_errors++; + + if (skb) { + cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; +@@ -548,10 +547,15 @@ static void f81604_handle_can_bus_errors(struct f81604_port_priv *priv, + + /* set error location */ + cf->data[3] = data->ecc & F81604_SJA1000_ECC_SEG; ++ } + +- /* Error occurred during transmission? */ +- if ((data->ecc & F81604_SJA1000_ECC_DIR) == 0) ++ /* Error occurred during transmission? */ ++ if ((data->ecc & F81604_SJA1000_ECC_DIR) == 0) { ++ stats->tx_errors++; ++ if (skb) + cf->data[2] |= CAN_ERR_PROT_TX; ++ } else { ++ stats->rx_errors++; + } + + set_bit(F81604_CLEAR_ECC, &priv->clear_flags); +diff --git a/drivers/net/can/usb/gs_usb.c b/drivers/net/can/usb/gs_usb.c +index bc86e9b329fd10..b6f4de375df75d 100644 +--- a/drivers/net/can/usb/gs_usb.c ++++ b/drivers/net/can/usb/gs_usb.c +@@ -43,9 +43,6 @@ + #define USB_XYLANTA_SAINT3_VENDOR_ID 0x16d0 + #define USB_XYLANTA_SAINT3_PRODUCT_ID 0x0f30 + +-#define GS_USB_ENDPOINT_IN 1 +-#define GS_USB_ENDPOINT_OUT 2 +- + /* Timestamp 32 bit timer runs at 1 MHz (1 µs tick). Worker accounts + * for timer overflow (will be after ~71 minutes) + */ +@@ -336,6 +333,9 @@ struct gs_usb { + + unsigned int hf_size_rx; + u8 active_channels; ++ ++ unsigned int pipe_in; ++ unsigned int pipe_out; + }; + + /* 'allocate' a tx context. +@@ -687,7 +687,7 @@ static void gs_usb_receive_bulk_callback(struct urb *urb) + + resubmit_urb: + usb_fill_bulk_urb(urb, parent->udev, +- usb_rcvbulkpipe(parent->udev, GS_USB_ENDPOINT_IN), ++ parent->pipe_in, + hf, dev->parent->hf_size_rx, + gs_usb_receive_bulk_callback, parent); + +@@ -819,7 +819,7 @@ static netdev_tx_t gs_can_start_xmit(struct sk_buff *skb, + } + + usb_fill_bulk_urb(urb, dev->udev, +- usb_sndbulkpipe(dev->udev, GS_USB_ENDPOINT_OUT), ++ dev->parent->pipe_out, + hf, dev->hf_size_tx, + gs_usb_xmit_callback, txc); + +@@ -925,8 +925,7 @@ static int gs_can_open(struct net_device *netdev) + /* fill, anchor, and submit rx urb */ + usb_fill_bulk_urb(urb, + dev->udev, +- usb_rcvbulkpipe(dev->udev, +- GS_USB_ENDPOINT_IN), ++ dev->parent->pipe_in, + buf, + dev->parent->hf_size_rx, + gs_usb_receive_bulk_callback, parent); +@@ -1413,6 +1412,7 @@ static int gs_usb_probe(struct usb_interface *intf, + const struct usb_device_id *id) + { + struct usb_device *udev = interface_to_usbdev(intf); ++ struct usb_endpoint_descriptor *ep_in, *ep_out; + struct gs_host_frame *hf; + struct gs_usb *parent; + struct gs_host_config hconf = { +@@ -1422,6 +1422,13 @@ static int gs_usb_probe(struct usb_interface *intf, + unsigned int icount, i; + int rc; + ++ rc = usb_find_common_endpoints(intf->cur_altsetting, ++ &ep_in, &ep_out, NULL, NULL); ++ if (rc) { ++ dev_err(&intf->dev, "Required endpoints not found\n"); ++ return rc; ++ } ++ + /* send host config */ + rc = usb_control_msg_send(udev, 0, + GS_USB_BREQ_HOST_FORMAT, +@@ -1466,6 +1473,10 @@ static int gs_usb_probe(struct usb_interface *intf, + usb_set_intfdata(intf, parent); + parent->udev = udev; + ++ /* store the detected endpoints */ ++ parent->pipe_in = usb_rcvbulkpipe(parent->udev, ep_in->bEndpointAddress); ++ parent->pipe_out = usb_sndbulkpipe(parent->udev, ep_out->bEndpointAddress); ++ + for (i = 0; i < icount; i++) { + unsigned int hf_size_rx = 0; + +diff --git a/drivers/net/dsa/qca/qca8k-8xxx.c b/drivers/net/dsa/qca/qca8k-8xxx.c +index f8d8c70642c4ff..59b4a7240b5832 100644 +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -673,7 +673,7 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, + * We therefore need to lock the MDIO bus onto which the switch is + * connected. + */ +- mutex_lock(&priv->bus->mdio_lock); ++ mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); + + /* Actually start the request: + * 1. Send mdio master packet +diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c +index 20ba14eb87e00b..b901ecb57f2552 100644 +--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c ++++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c +@@ -1193,10 +1193,14 @@ static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) + } + } + +- if (fltr->base.flags & BNXT_ACT_DROP) ++ if (fltr->base.flags & BNXT_ACT_DROP) { + fs->ring_cookie = RX_CLS_FLOW_DISC; +- else ++ } else if (fltr->base.flags & BNXT_ACT_RSS_CTX) { ++ fs->flow_type |= FLOW_RSS; ++ cmd->rss_context = fltr->base.fw_vnic_id; ++ } else { + fs->ring_cookie = fltr->base.rxq; ++ } + rc = 0; + + fltr_err: +diff --git a/drivers/net/ethernet/freescale/enetc/enetc.c b/drivers/net/ethernet/freescale/enetc/enetc.c +index c09370eab319b2..16a7908c79f703 100644 +--- a/drivers/net/ethernet/freescale/enetc/enetc.c ++++ b/drivers/net/ethernet/freescale/enetc/enetc.c +@@ -28,6 +28,9 @@ EXPORT_SYMBOL_GPL(enetc_port_mac_wr); + static void enetc_change_preemptible_tcs(struct enetc_ndev_priv *priv, + u8 preemptible_tcs) + { ++ if (!(priv->si->hw_features & ENETC_SI_F_QBU)) ++ return; ++ + priv->preemptible_tcs = preemptible_tcs; + enetc_mm_commit_preemptible_tcs(priv); + } +diff --git a/drivers/net/ethernet/freescale/fec_mpc52xx_phy.c b/drivers/net/ethernet/freescale/fec_mpc52xx_phy.c +index 39689826cc8ffc..ce253aac5344cc 100644 +--- a/drivers/net/ethernet/freescale/fec_mpc52xx_phy.c ++++ b/drivers/net/ethernet/freescale/fec_mpc52xx_phy.c +@@ -94,7 +94,7 @@ static int mpc52xx_fec_mdio_probe(struct platform_device *of) + goto out_free; + } + +- snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start); ++ snprintf(bus->id, MII_BUS_ID_SIZE, "%pa", &res.start); + bus->priv = priv; + + bus->parent = dev; +diff --git a/drivers/net/ethernet/freescale/fman/fman.c b/drivers/net/ethernet/freescale/fman/fman.c +index d96028f01770cf..fb416d60dcd727 100644 +--- a/drivers/net/ethernet/freescale/fman/fman.c ++++ b/drivers/net/ethernet/freescale/fman/fman.c +@@ -24,7 +24,6 @@ + + /* General defines */ + #define FMAN_LIODN_TBL 64 /* size of LIODN table */ +-#define MAX_NUM_OF_MACS 10 + #define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4 + #define BASE_RX_PORTID 0x08 + #define BASE_TX_PORTID 0x28 +diff --git a/drivers/net/ethernet/freescale/fman/fman.h b/drivers/net/ethernet/freescale/fman/fman.h +index 2ea575a46675b0..74eb62eba0d7ff 100644 +--- a/drivers/net/ethernet/freescale/fman/fman.h ++++ b/drivers/net/ethernet/freescale/fman/fman.h +@@ -74,6 +74,9 @@ + #define BM_MAX_NUM_OF_POOLS 64 /* Buffers pools */ + #define FMAN_PORT_MAX_EXT_POOLS_NUM 8 /* External BM pools per Rx port */ + ++/* General defines */ ++#define MAX_NUM_OF_MACS 10 ++ + struct fman; /* FMan data */ + + /* Enum for defining port types */ +diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c +index 11da139082e1bf..1916a2ac48b9f1 100644 +--- a/drivers/net/ethernet/freescale/fman/mac.c ++++ b/drivers/net/ethernet/freescale/fman/mac.c +@@ -259,6 +259,11 @@ static int mac_probe(struct platform_device *_of_dev) + err = -EINVAL; + goto _return_dev_put; + } ++ if (val >= MAX_NUM_OF_MACS) { ++ dev_err(dev, "cell-index value is too big for %pOF\n", mac_node); ++ err = -EINVAL; ++ goto _return_dev_put; ++ } + priv->cell_index = (u8)val; + + /* Get the MAC address */ +diff --git a/drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c b/drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c +index 2e210a00355843..249b482e32d3bd 100644 +--- a/drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c ++++ b/drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c +@@ -123,7 +123,7 @@ static int fs_mii_bitbang_init(struct mii_bus *bus, struct device_node *np) + * we get is an int, and the odds of multiple bitbang mdio buses + * is low enough that it's not worth going too crazy. + */ +- snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start); ++ snprintf(bus->id, MII_BUS_ID_SIZE, "%pa", &res.start); + + data = of_get_property(np, "fsl,mdio-pin", &len); + if (!data || len != 4) +diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c +index 009716a12a26af..f1324e25b2af1c 100644 +--- a/drivers/net/ethernet/intel/ice/ice_common.c ++++ b/drivers/net/ethernet/intel/ice/ice_common.c +@@ -542,7 +542,8 @@ ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, + /** + * ice_find_netlist_node + * @hw: pointer to the hw struct +- * @node_type_ctx: type of netlist node to look for ++ * @node_type: type of netlist node to look for ++ * @ctx: context of the search + * @node_part_number: node part number to look for + * @node_handle: output parameter if node found - optional + * +@@ -552,10 +553,12 @@ ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, + * valid if the function returns zero, and should be ignored on any non-zero + * return value. + * +- * Returns: 0 if the node is found, -ENOENT if no handle was found, and +- * a negative error code on failure to access the AQ. ++ * Return: ++ * * 0 if the node is found, ++ * * -ENOENT if no handle was found, ++ * * negative error code on failure to access the AQ. + */ +-static int ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, ++static int ice_find_netlist_node(struct ice_hw *hw, u8 node_type, u8 ctx, + u8 node_part_number, u16 *node_handle) + { + u8 idx; +@@ -566,8 +569,8 @@ static int ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, + int status; + + cmd.addr.topo_params.node_type_ctx = +- FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_TYPE_M, +- node_type_ctx); ++ FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_TYPE_M, node_type) | ++ FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M, ctx); + cmd.addr.topo_params.index = idx; + + status = ice_aq_get_netlist_node(hw, &cmd, +@@ -2726,9 +2729,11 @@ bool ice_is_pf_c827(struct ice_hw *hw) + */ + bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw) + { +- if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, ++ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_PHY, ++ ICE_AQC_LINK_TOPO_NODE_CTX_PORT, + ICE_AQC_GET_LINK_TOPO_NODE_NR_C827, NULL) && +- ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, ++ ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_PHY, ++ ICE_AQC_LINK_TOPO_NODE_CTX_PORT, + ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY, NULL)) + return false; + +@@ -2744,6 +2749,7 @@ bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw) + bool ice_is_clock_mux_in_netlist(struct ice_hw *hw) + { + if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, ++ ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL, + ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, + NULL)) + return false; +@@ -2764,12 +2770,14 @@ bool ice_is_clock_mux_in_netlist(struct ice_hw *hw) + bool ice_is_cgu_in_netlist(struct ice_hw *hw) + { + if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, ++ ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL, + ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032, + NULL)) { + hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032; + return true; + } else if (!ice_find_netlist_node(hw, + ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, ++ ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL, + ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384, + NULL)) { + hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384; +@@ -2788,6 +2796,7 @@ bool ice_is_cgu_in_netlist(struct ice_hw *hw) + bool ice_is_gps_in_netlist(struct ice_hw *hw) + { + if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_GPS, ++ ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL, + ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL)) + return false; + +diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c +index b1e7727b8677f9..8f2e758c394277 100644 +--- a/drivers/net/ethernet/intel/ice/ice_main.c ++++ b/drivers/net/ethernet/intel/ice/ice_main.c +@@ -6361,10 +6361,12 @@ ice_set_vlan_filtering_features(struct ice_vsi *vsi, netdev_features_t features) + int err = 0; + + /* support Single VLAN Mode (SVM) and Double VLAN Mode (DVM) by checking +- * if either bit is set ++ * if either bit is set. In switchdev mode Rx filtering should never be ++ * enabled. + */ +- if (features & +- (NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_STAG_FILTER)) ++ if ((features & ++ (NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_STAG_FILTER)) && ++ !ice_is_eswitch_mode_switchdev(vsi->back)) + err = vlan_ops->ena_rx_filtering(vsi); + else + err = vlan_ops->dis_rx_filtering(vsi); +diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +index ec8db830ac73ae..3816e45b6ab44a 100644 +--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c ++++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +@@ -1495,7 +1495,8 @@ static int ice_read_ptp_tstamp_eth56g(struct ice_hw *hw, u8 port, u8 idx, + * lower 8 bits in the low register, and the upper 32 bits in the high + * register. + */ +- *tstamp = ((u64)hi) << TS_PHY_HIGH_S | ((u64)lo & TS_PHY_LOW_M); ++ *tstamp = FIELD_PREP(TS_PHY_HIGH_M, hi) | ++ FIELD_PREP(TS_PHY_LOW_M, lo); + + return 0; + } +diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +index 6cedc1a906afb6..4c8b8457134427 100644 +--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h ++++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +@@ -663,9 +663,8 @@ static inline u64 ice_get_base_incval(struct ice_hw *hw) + #define TS_HIGH_M 0xFF + #define TS_HIGH_S 32 + +-#define TS_PHY_LOW_M 0xFF +-#define TS_PHY_HIGH_M 0xFFFFFFFF +-#define TS_PHY_HIGH_S 8 ++#define TS_PHY_LOW_M GENMASK(7, 0) ++#define TS_PHY_HIGH_M GENMASK_ULL(39, 8) + + #define BYTES_PER_IDX_ADDR_L_U 8 + #define BYTES_PER_IDX_ADDR_L 4 +diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.c b/drivers/net/ethernet/intel/idpf/idpf_txrx.c +index d4e6f0e104872d..60d15b3e6e2faa 100644 +--- a/drivers/net/ethernet/intel/idpf/idpf_txrx.c ++++ b/drivers/net/ethernet/intel/idpf/idpf_txrx.c +@@ -2448,6 +2448,7 @@ static void idpf_tx_splitq_map(struct idpf_tx_queue *tx_q, + * rest of the packet. + */ + tx_buf->type = LIBETH_SQE_EMPTY; ++ idpf_tx_buf_compl_tag(tx_buf) = params->compl_tag; + + /* Adjust the DMA offset and the remaining size of the + * fragment. On the first iteration of this loop, +diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c +index f1d0881687233e..18284a838e2424 100644 +--- a/drivers/net/ethernet/intel/igb/igb_main.c ++++ b/drivers/net/ethernet/intel/igb/igb_main.c +@@ -637,6 +637,10 @@ static int __init igb_init_module(void) + dca_register_notify(&dca_notifier); + #endif + ret = pci_register_driver(&igb_driver); ++#ifdef CONFIG_IGB_DCA ++ if (ret) ++ dca_unregister_notify(&dca_notifier); ++#endif + return ret; + } + +diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h +index 6493abf189de5e..6639069ad52834 100644 +--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h ++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h +@@ -194,6 +194,8 @@ u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg); + dev_err(&adapter->pdev->dev, format, ## arg) + #define e_dev_notice(format, arg...) \ + dev_notice(&adapter->pdev->dev, format, ## arg) ++#define e_dbg(msglvl, format, arg...) \ ++ netif_dbg(adapter, msglvl, adapter->netdev, format, ## arg) + #define e_info(msglvl, format, arg...) \ + netif_info(adapter, msglvl, adapter->netdev, format, ## arg) + #define e_err(msglvl, format, arg...) \ +diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h +index 14aa2ca51f70ec..81179c60af4e01 100644 +--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h ++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h +@@ -40,7 +40,7 @@ + #define IXGBE_SFF_1GBASESX_CAPABLE 0x1 + #define IXGBE_SFF_1GBASELX_CAPABLE 0x2 + #define IXGBE_SFF_1GBASET_CAPABLE 0x8 +-#define IXGBE_SFF_BASEBX10_CAPABLE 0x64 ++#define IXGBE_SFF_BASEBX10_CAPABLE 0x40 + #define IXGBE_SFF_10GBASESR_CAPABLE 0x10 + #define IXGBE_SFF_10GBASELR_CAPABLE 0x20 + #define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8 +diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c +index e71715f5da2287..20415c1238ef8d 100644 +--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c ++++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c +@@ -1047,7 +1047,7 @@ static int ixgbe_negotiate_vf_api(struct ixgbe_adapter *adapter, + break; + } + +- e_info(drv, "VF %d requested invalid api version %u\n", vf, api); ++ e_dbg(drv, "VF %d requested unsupported api version %u\n", vf, api); + + return -1; + } +diff --git a/drivers/net/ethernet/intel/ixgbevf/ipsec.c b/drivers/net/ethernet/intel/ixgbevf/ipsec.c +index 66cf17f1940820..f804b35d79c726 100644 +--- a/drivers/net/ethernet/intel/ixgbevf/ipsec.c ++++ b/drivers/net/ethernet/intel/ixgbevf/ipsec.c +@@ -629,7 +629,6 @@ void ixgbevf_init_ipsec_offload(struct ixgbevf_adapter *adapter) + + switch (adapter->hw.api_version) { + case ixgbe_mbox_api_14: +- case ixgbe_mbox_api_15: + break; + default: + return; +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c +index 878cbdbf5ec8b4..e7e01f3298efb0 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c +@@ -5,6 +5,7 @@ + #include + #include + #include "tc_tun_encap.h" ++#include "fs_core.h" + #include "en_tc.h" + #include "tc_tun.h" + #include "rep/tc.h" +@@ -24,10 +25,18 @@ static int mlx5e_set_int_port_tunnel(struct mlx5e_priv *priv, + + route_dev = dev_get_by_index(dev_net(e->out_dev), e->route_dev_ifindex); + +- if (!route_dev || !netif_is_ovs_master(route_dev) || +- attr->parse_attr->filter_dev == e->out_dev) ++ if (!route_dev || !netif_is_ovs_master(route_dev)) + goto out; + ++ if (priv->mdev->priv.steering->mode == MLX5_FLOW_STEERING_MODE_DMFS && ++ mlx5e_eswitch_uplink_rep(attr->parse_attr->filter_dev) && ++ (attr->esw_attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP)) { ++ mlx5_core_warn(priv->mdev, ++ "Matching on external port with encap + fwd to table actions is not allowed for firmware steering\n"); ++ err = -EINVAL; ++ goto out; ++ } ++ + err = mlx5e_set_fwd_to_int_port_actions(priv, attr, e->route_dev_ifindex, + MLX5E_TC_INT_PORT_EGRESS, + &attr->action, out_index); +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +index 13a3fa8dc0cb09..c14bef83d84d0f 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +@@ -2652,11 +2652,11 @@ void mlx5e_trigger_napi_sched(struct napi_struct *napi) + + static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix, + struct mlx5e_params *params, +- struct mlx5e_channel_param *cparam, + struct xsk_buff_pool *xsk_pool, + struct mlx5e_channel **cp) + { + struct net_device *netdev = priv->netdev; ++ struct mlx5e_channel_param *cparam; + struct mlx5_core_dev *mdev; + struct mlx5e_xsk_param xsk; + struct mlx5e_channel *c; +@@ -2678,8 +2678,15 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix, + return err; + + c = kvzalloc_node(sizeof(*c), GFP_KERNEL, cpu_to_node(cpu)); +- if (!c) +- return -ENOMEM; ++ cparam = kvzalloc(sizeof(*cparam), GFP_KERNEL); ++ if (!c || !cparam) { ++ err = -ENOMEM; ++ goto err_free; ++ } ++ ++ err = mlx5e_build_channel_param(mdev, params, cparam); ++ if (err) ++ goto err_free; + + c->priv = priv; + c->mdev = mdev; +@@ -2713,6 +2720,7 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix, + + *cp = c; + ++ kvfree(cparam); + return 0; + + err_close_queues: +@@ -2721,6 +2729,8 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix, + err_napi_del: + netif_napi_del(&c->napi); + ++err_free: ++ kvfree(cparam); + kvfree(c); + + return err; +@@ -2779,20 +2789,14 @@ static void mlx5e_close_channel(struct mlx5e_channel *c) + int mlx5e_open_channels(struct mlx5e_priv *priv, + struct mlx5e_channels *chs) + { +- struct mlx5e_channel_param *cparam; + int err = -ENOMEM; + int i; + + chs->num = chs->params.num_channels; + + chs->c = kcalloc(chs->num, sizeof(struct mlx5e_channel *), GFP_KERNEL); +- cparam = kvzalloc(sizeof(struct mlx5e_channel_param), GFP_KERNEL); +- if (!chs->c || !cparam) +- goto err_free; +- +- err = mlx5e_build_channel_param(priv->mdev, &chs->params, cparam); +- if (err) +- goto err_free; ++ if (!chs->c) ++ goto err_out; + + for (i = 0; i < chs->num; i++) { + struct xsk_buff_pool *xsk_pool = NULL; +@@ -2800,7 +2804,7 @@ int mlx5e_open_channels(struct mlx5e_priv *priv, + if (chs->params.xdp_prog) + xsk_pool = mlx5e_xsk_get_pool(&chs->params, chs->params.xsk, i); + +- err = mlx5e_open_channel(priv, i, &chs->params, cparam, xsk_pool, &chs->c[i]); ++ err = mlx5e_open_channel(priv, i, &chs->params, xsk_pool, &chs->c[i]); + if (err) + goto err_close_channels; + } +@@ -2818,7 +2822,6 @@ int mlx5e_open_channels(struct mlx5e_priv *priv, + } + + mlx5e_health_channels_update(priv); +- kvfree(cparam); + return 0; + + err_close_ptp: +@@ -2829,9 +2832,8 @@ int mlx5e_open_channels(struct mlx5e_priv *priv, + for (i--; i >= 0; i--) + mlx5e_close_channel(chs->c[i]); + +-err_free: + kfree(chs->c); +- kvfree(cparam); ++err_out: + chs->num = 0; + return err; + } +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c +index 6e4f8aaf8d2f21..2eabfcc247c6ae 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c +@@ -3698,6 +3698,7 @@ void mlx5_fs_core_free(struct mlx5_core_dev *dev) + int mlx5_fs_core_alloc(struct mlx5_core_dev *dev) + { + struct mlx5_flow_steering *steering; ++ char name[80]; + int err = 0; + + err = mlx5_init_fc_stats(dev); +@@ -3722,10 +3723,12 @@ int mlx5_fs_core_alloc(struct mlx5_core_dev *dev) + else + steering->mode = MLX5_FLOW_STEERING_MODE_DMFS; + +- steering->fgs_cache = kmem_cache_create("mlx5_fs_fgs", ++ snprintf(name, sizeof(name), "%s-mlx5_fs_fgs", dev_name(dev->device)); ++ steering->fgs_cache = kmem_cache_create(name, + sizeof(struct mlx5_flow_group), 0, + 0, NULL); +- steering->ftes_cache = kmem_cache_create("mlx5_fs_ftes", sizeof(struct fs_fte), 0, ++ snprintf(name, sizeof(name), "%s-mlx5_fs_ftes", dev_name(dev->device)); ++ steering->ftes_cache = kmem_cache_create(name, sizeof(struct fs_fte), 0, + 0, NULL); + if (!steering->ftes_cache || !steering->fgs_cache) { + err = -ENOMEM; +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c +index 601fad5fc54a39..ee4058bafe119b 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c +@@ -39,6 +39,8 @@ bool mlx5hws_bwc_match_params_is_complex(struct mlx5hws_context *ctx, + } else { + mlx5hws_err(ctx, "Failed to calculate matcher definer layout\n"); + } ++ } else { ++ kfree(mt->fc); + } + + mlx5hws_match_template_destroy(mt); +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.c +index 6d443e6ee8d9e9..08be034bd1e16d 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.c +@@ -990,6 +990,7 @@ static int hws_bwc_send_queues_init(struct mlx5hws_context *ctx) + for (i = 0; i < bwc_queues; i++) { + mutex_init(&ctx->bwc_send_queue_locks[i]); + lockdep_register_key(ctx->bwc_lock_class_keys + i); ++ lockdep_set_class(ctx->bwc_send_queue_locks + i, ctx->bwc_lock_class_keys + i); + } + + return 0; +diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c b/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c +index 947500f8ed7142..7aa1a462a1035b 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c +@@ -67,7 +67,7 @@ static bool mlxsw_afk_blocks_check(struct mlxsw_afk *mlxsw_afk) + + for (j = 0; j < block->instances_count; j++) { + const struct mlxsw_afk_element_info *elinfo; +- struct mlxsw_afk_element_inst *elinst; ++ const struct mlxsw_afk_element_inst *elinst; + + elinst = &block->instances[j]; + elinfo = &mlxsw_afk_element_infos[elinst->element]; +@@ -154,7 +154,7 @@ static void mlxsw_afk_picker_count_hits(struct mlxsw_afk *mlxsw_afk, + const struct mlxsw_afk_block *block = &mlxsw_afk->blocks[i]; + + for (j = 0; j < block->instances_count; j++) { +- struct mlxsw_afk_element_inst *elinst; ++ const struct mlxsw_afk_element_inst *elinst; + + elinst = &block->instances[j]; + if (elinst->element == element) { +@@ -386,7 +386,7 @@ mlxsw_afk_block_elinst_get(const struct mlxsw_afk_block *block, + int i; + + for (i = 0; i < block->instances_count; i++) { +- struct mlxsw_afk_element_inst *elinst; ++ const struct mlxsw_afk_element_inst *elinst; + + elinst = &block->instances[i]; + if (elinst->element == element) +diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h b/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h +index 98a05598178b3b..5aa1afb3f2ca81 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h ++++ b/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h +@@ -117,7 +117,7 @@ struct mlxsw_afk_element_inst { /* element instance in actual block */ + + struct mlxsw_afk_block { + u16 encoding; /* block ID */ +- struct mlxsw_afk_element_inst *instances; ++ const struct mlxsw_afk_element_inst *instances; + unsigned int instances_count; + bool high_entropy; + }; +diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c +index eaad7860560271..1850a975b38044 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c +@@ -7,7 +7,7 @@ + #include "item.h" + #include "core_acl_flex_keys.h" + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l2_dmac[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l2_dmac[] = { + MLXSW_AFK_ELEMENT_INST_BUF(DMAC_32_47, 0x00, 2), + MLXSW_AFK_ELEMENT_INST_BUF(DMAC_0_31, 0x02, 4), + MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x08, 13, 3), +@@ -15,7 +15,7 @@ static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l2_dmac[] = { + MLXSW_AFK_ELEMENT_INST_U32(SRC_SYS_PORT, 0x0C, 0, 16), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l2_smac[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l2_smac[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SMAC_32_47, 0x00, 2), + MLXSW_AFK_ELEMENT_INST_BUF(SMAC_0_31, 0x02, 4), + MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x08, 13, 3), +@@ -23,27 +23,27 @@ static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l2_smac[] = { + MLXSW_AFK_ELEMENT_INST_U32(SRC_SYS_PORT, 0x0C, 0, 16), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l2_smac_ex[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l2_smac_ex[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SMAC_32_47, 0x02, 2), + MLXSW_AFK_ELEMENT_INST_BUF(SMAC_0_31, 0x04, 4), + MLXSW_AFK_ELEMENT_INST_U32(ETHERTYPE, 0x0C, 0, 16), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_sip[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_sip[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_0_31, 0x00, 4), + MLXSW_AFK_ELEMENT_INST_U32(L4_PORT_RANGE, 0x04, 16, 16), + MLXSW_AFK_ELEMENT_INST_U32(IP_PROTO, 0x08, 0, 8), + MLXSW_AFK_ELEMENT_INST_U32(SRC_SYS_PORT, 0x0C, 0, 16), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_dip[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_dip[] = { + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_0_31, 0x00, 4), + MLXSW_AFK_ELEMENT_INST_U32(L4_PORT_RANGE, 0x04, 16, 16), + MLXSW_AFK_ELEMENT_INST_U32(IP_PROTO, 0x08, 0, 8), + MLXSW_AFK_ELEMENT_INST_U32(SRC_SYS_PORT, 0x0C, 0, 16), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_0_31, 0x00, 4), + MLXSW_AFK_ELEMENT_INST_U32(IP_ECN, 0x04, 4, 2), + MLXSW_AFK_ELEMENT_INST_U32(IP_TTL_, 0x04, 24, 8), +@@ -51,35 +51,35 @@ static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4[] = { + MLXSW_AFK_ELEMENT_INST_U32(TCP_FLAGS, 0x08, 8, 9), /* TCP_CONTROL+TCP_ECN */ + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_ex[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_ex[] = { + MLXSW_AFK_ELEMENT_INST_U32(VID, 0x00, 0, 12), + MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x08, 29, 3), + MLXSW_AFK_ELEMENT_INST_U32(SRC_L4_PORT, 0x08, 0, 16), + MLXSW_AFK_ELEMENT_INST_U32(DST_L4_PORT, 0x0C, 0, 16), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_dip[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_dip[] = { + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_32_63, 0x00, 4), + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_0_31, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_ex1[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_ex1[] = { + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_96_127, 0x00, 4), + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_64_95, 0x04, 4), + MLXSW_AFK_ELEMENT_INST_U32(IP_PROTO, 0x08, 0, 8), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_sip[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_sip[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_32_63, 0x00, 4), + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_0_31, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_sip_ex[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_sip_ex[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_96_127, 0x00, 4), + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_64_95, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_packet_type[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_packet_type[] = { + MLXSW_AFK_ELEMENT_INST_U32(ETHERTYPE, 0x00, 0, 16), + }; + +@@ -124,90 +124,90 @@ const struct mlxsw_afk_ops mlxsw_sp1_afk_ops = { + .clear_block = mlxsw_sp1_afk_clear_block, + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_0[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_0[] = { + MLXSW_AFK_ELEMENT_INST_U32(FDB_MISS, 0x00, 3, 1), + MLXSW_AFK_ELEMENT_INST_BUF(DMAC_0_31, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_1[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_1[] = { + MLXSW_AFK_ELEMENT_INST_U32(FDB_MISS, 0x00, 3, 1), + MLXSW_AFK_ELEMENT_INST_BUF(SMAC_0_31, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_2[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_2[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SMAC_32_47, 0x04, 2), + MLXSW_AFK_ELEMENT_INST_BUF(DMAC_32_47, 0x06, 2), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_3[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_3[] = { + MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x00, 0, 3), + MLXSW_AFK_ELEMENT_INST_U32(VID, 0x04, 16, 12), + MLXSW_AFK_ELEMENT_INST_BUF(DMAC_32_47, 0x06, 2), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_4[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_4[] = { + MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x00, 0, 3), + MLXSW_AFK_ELEMENT_INST_U32(VID, 0x04, 16, 12), + MLXSW_AFK_ELEMENT_INST_U32(ETHERTYPE, 0x04, 0, 16), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_5[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_5[] = { + MLXSW_AFK_ELEMENT_INST_U32(VID, 0x04, 16, 12), + MLXSW_AFK_ELEMENT_INST_EXT_U32(SRC_SYS_PORT, 0x04, 0, 8, -1, true), /* RX_ACL_SYSTEM_PORT */ + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_0[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_0[] = { + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_0_31, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_1[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_1[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_0_31, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_2[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_2[] = { + MLXSW_AFK_ELEMENT_INST_U32(IP_DSCP, 0x04, 0, 6), + MLXSW_AFK_ELEMENT_INST_U32(IP_ECN, 0x04, 6, 2), + MLXSW_AFK_ELEMENT_INST_U32(IP_TTL_, 0x04, 8, 8), + MLXSW_AFK_ELEMENT_INST_U32(IP_PROTO, 0x04, 16, 8), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_5[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_5[] = { + MLXSW_AFK_ELEMENT_INST_EXT_U32(VIRT_ROUTER, 0x04, 20, 11, 0, true), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_0[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_0[] = { + MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_0_3, 0x00, 0, 4), + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_32_63, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_1[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_1[] = { + MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_4_7, 0x00, 0, 4), + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_64_95, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_2[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_2[] = { + MLXSW_AFK_ELEMENT_INST_EXT_U32(VIRT_ROUTER_MSB, 0x00, 0, 3, 0, true), + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_96_127, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_3[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_3[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_32_63, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_4[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_4[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_64_95, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_5[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_5[] = { + MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_96_127, 0x04, 4), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l4_0[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l4_0[] = { + MLXSW_AFK_ELEMENT_INST_U32(SRC_L4_PORT, 0x04, 16, 16), + MLXSW_AFK_ELEMENT_INST_U32(DST_L4_PORT, 0x04, 0, 16), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l4_2[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_l4_2[] = { + MLXSW_AFK_ELEMENT_INST_U32(TCP_FLAGS, 0x04, 16, 9), /* TCP_CONTROL + TCP_ECN */ + MLXSW_AFK_ELEMENT_INST_U32(L4_PORT_RANGE, 0x04, 0, 16), + }; +@@ -319,16 +319,20 @@ const struct mlxsw_afk_ops mlxsw_sp2_afk_ops = { + .clear_block = mlxsw_sp2_afk_clear_block, + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_5b[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_5b[] = { + MLXSW_AFK_ELEMENT_INST_U32(VID, 0x04, 18, 12), + MLXSW_AFK_ELEMENT_INST_EXT_U32(SRC_SYS_PORT, 0x04, 0, 9, -1, true), /* RX_ACL_SYSTEM_PORT */ + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_5b[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_1b[] = { ++ MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_0_31, 0x04, 4), ++}; ++ ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_5b[] = { + MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER, 0x04, 20, 12), + }; + +-static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_2b[] = { ++static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_2b[] = { + MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_MSB, 0x00, 0, 4), + MLXSW_AFK_ELEMENT_INST_BUF(DST_IP_96_127, 0x04, 4), + }; +@@ -341,7 +345,7 @@ static const struct mlxsw_afk_block mlxsw_sp4_afk_blocks[] = { + MLXSW_AFK_BLOCK(0x14, mlxsw_sp_afk_element_info_mac_4), + MLXSW_AFK_BLOCK_HIGH_ENTROPY(0x1A, mlxsw_sp_afk_element_info_mac_5b), + MLXSW_AFK_BLOCK_HIGH_ENTROPY(0x38, mlxsw_sp_afk_element_info_ipv4_0), +- MLXSW_AFK_BLOCK_HIGH_ENTROPY(0x39, mlxsw_sp_afk_element_info_ipv4_1), ++ MLXSW_AFK_BLOCK_HIGH_ENTROPY(0x3F, mlxsw_sp_afk_element_info_ipv4_1b), + MLXSW_AFK_BLOCK(0x3A, mlxsw_sp_afk_element_info_ipv4_2), + MLXSW_AFK_BLOCK(0x36, mlxsw_sp_afk_element_info_ipv4_5b), + MLXSW_AFK_BLOCK(0x40, mlxsw_sp_afk_element_info_ipv6_0), +diff --git a/drivers/net/ethernet/microsoft/mana/mana_en.c b/drivers/net/ethernet/microsoft/mana/mana_en.c +index c47266d1c7c279..b2d206dec70c8a 100644 +--- a/drivers/net/ethernet/microsoft/mana/mana_en.c ++++ b/drivers/net/ethernet/microsoft/mana/mana_en.c +@@ -2439,6 +2439,7 @@ void mana_query_gf_stats(struct mana_port_context *apc) + + mana_gd_init_req_hdr(&req.hdr, MANA_QUERY_GF_STAT, + sizeof(req), sizeof(resp)); ++ req.hdr.resp.msg_version = GDMA_MESSAGE_V2; + req.req_stats = STATISTICS_FLAGS_RX_DISCARDS_NO_WQE | + STATISTICS_FLAGS_RX_ERRORS_VPORT_DISABLED | + STATISTICS_FLAGS_HC_RX_BYTES | +diff --git a/drivers/net/ethernet/qlogic/qed/qed_mcp.c b/drivers/net/ethernet/qlogic/qed/qed_mcp.c +index 16e6bd4661433f..6218d9c2685546 100644 +--- a/drivers/net/ethernet/qlogic/qed/qed_mcp.c ++++ b/drivers/net/ethernet/qlogic/qed/qed_mcp.c +@@ -3314,7 +3314,9 @@ int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn, + if (rc) + return rc; + +- if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK)) ++ if (((rsp & FW_MSG_CODE_MASK) == FW_MSG_CODE_UNSUPPORTED)) ++ rc = -EOPNOTSUPP; ++ else if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK)) + rc = -EINVAL; + + return rc; +diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c +index 713a89bb21e93b..5ed2818bac257c 100644 +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -4233,8 +4233,8 @@ static unsigned int rtl8125_quirk_udp_padto(struct rtl8169_private *tp, + { + unsigned int padto = 0, len = skb->len; + +- if (rtl_is_8125(tp) && len < 128 + RTL_MIN_PATCH_LEN && +- rtl_skb_is_udp(skb) && skb_transport_header_was_set(skb)) { ++ if (len < 128 + RTL_MIN_PATCH_LEN && rtl_skb_is_udp(skb) && ++ skb_transport_header_was_set(skb)) { + unsigned int trans_data_len = skb_tail_pointer(skb) - + skb_transport_header(skb); + +@@ -4258,9 +4258,15 @@ static unsigned int rtl8125_quirk_udp_padto(struct rtl8169_private *tp, + static unsigned int rtl_quirk_packet_padto(struct rtl8169_private *tp, + struct sk_buff *skb) + { +- unsigned int padto; ++ unsigned int padto = 0; + +- padto = rtl8125_quirk_udp_padto(tp, skb); ++ switch (tp->mac_version) { ++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_63: ++ padto = rtl8125_quirk_udp_padto(tp, skb); ++ break; ++ default: ++ break; ++ } + + switch (tp->mac_version) { + case RTL_GIGA_MAC_VER_34: +diff --git a/drivers/net/ethernet/rocker/rocker_main.c b/drivers/net/ethernet/rocker/rocker_main.c +index 84fa911c78db55..fe0bf1d3217af2 100644 +--- a/drivers/net/ethernet/rocker/rocker_main.c ++++ b/drivers/net/ethernet/rocker/rocker_main.c +@@ -2502,7 +2502,7 @@ static void rocker_carrier_init(const struct rocker_port *rocker_port) + u64 link_status = rocker_read64(rocker, PORT_PHYS_LINK_STATUS); + bool link_up; + +- link_up = link_status & (1 << rocker_port->pport); ++ link_up = link_status & (1ULL << rocker_port->pport); + if (link_up) + netif_carrier_on(rocker_port->dev); + else +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +index 93a78fd0737b6c..28fff6cab812e4 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +@@ -44,6 +44,7 @@ + #define GMAC_MDIO_DATA 0x00000204 + #define GMAC_GPIO_STATUS 0x0000020C + #define GMAC_ARP_ADDR 0x00000210 ++#define GMAC_EXT_CFG1 0x00000238 + #define GMAC_ADDR_HIGH(reg) (0x300 + reg * 8) + #define GMAC_ADDR_LOW(reg) (0x304 + reg * 8) + #define GMAC_L3L4_CTRL(reg) (0x900 + (reg) * 0x30) +@@ -284,6 +285,10 @@ enum power_event { + #define GMAC_HW_FEAT_DVLAN BIT(5) + #define GMAC_HW_FEAT_NRVF GENMASK(2, 0) + ++/* MAC extended config 1 */ ++#define GMAC_CONFIG1_SAVE_EN BIT(24) ++#define GMAC_CONFIG1_SPLM(v) FIELD_PREP(GENMASK(9, 8), v) ++ + /* GMAC GPIO Status reg */ + #define GMAC_GPO0 BIT(16) + #define GMAC_GPO1 BIT(17) +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +index 77b35abc6f6fa4..22a044d93e172f 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +@@ -534,6 +534,11 @@ static void dwmac4_enable_sph(struct stmmac_priv *priv, void __iomem *ioaddr, + value |= GMAC_CONFIG_HDSMS_256; /* Segment max 256 bytes */ + writel(value, ioaddr + GMAC_EXT_CONFIG); + ++ value = readl(ioaddr + GMAC_EXT_CFG1); ++ value |= GMAC_CONFIG1_SPLM(1); /* Split mode set to L2OFST */ ++ value |= GMAC_CONFIG1_SAVE_EN; /* Enable Split AV mode */ ++ writel(value, ioaddr + GMAC_EXT_CFG1); ++ + value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan)); + if (en) + value |= DMA_CONTROL_SPH; +diff --git a/drivers/net/geneve.c b/drivers/net/geneve.c +index 7f611c74eb629b..ba15a0a4ce629e 100644 +--- a/drivers/net/geneve.c ++++ b/drivers/net/geneve.c +@@ -895,7 +895,7 @@ static int geneve_xmit_skb(struct sk_buff *skb, struct net_device *dev, + if (geneve->cfg.df == GENEVE_DF_SET) { + df = htons(IP_DF); + } else if (geneve->cfg.df == GENEVE_DF_INHERIT) { +- struct ethhdr *eth = eth_hdr(skb); ++ struct ethhdr *eth = skb_eth_hdr(skb); + + if (ntohs(eth->h_proto) == ETH_P_IPV6) { + df = htons(IP_DF); +diff --git a/drivers/net/phy/microchip.c b/drivers/net/phy/microchip.c +index d3273bc0da4a1f..691969a4910f2b 100644 +--- a/drivers/net/phy/microchip.c ++++ b/drivers/net/phy/microchip.c +@@ -351,6 +351,22 @@ static int lan88xx_config_aneg(struct phy_device *phydev) + static void lan88xx_link_change_notify(struct phy_device *phydev) + { + int temp; ++ int ret; ++ ++ /* Reset PHY to ensure MII_LPA provides up-to-date information. This ++ * issue is reproducible only after parallel detection, as described ++ * in IEEE 802.3-2022, Section 28.2.3.1 ("Parallel detection function"), ++ * where the link partner does not support auto-negotiation. ++ */ ++ if (phydev->state == PHY_NOLINK) { ++ ret = phy_init_hw(phydev); ++ if (ret < 0) ++ goto link_change_notify_failed; ++ ++ ret = _phy_start_aneg(phydev); ++ if (ret < 0) ++ goto link_change_notify_failed; ++ } + + /* At forced 100 F/H mode, chip may fail to set mode correctly + * when cable is switched between long(~50+m) and short one. +@@ -377,6 +393,11 @@ static void lan88xx_link_change_notify(struct phy_device *phydev) + temp |= LAN88XX_INT_MASK_MDINTPIN_EN_; + phy_write(phydev, LAN88XX_INT_MASK, temp); + } ++ ++ return; ++ ++link_change_notify_failed: ++ phydev_err(phydev, "Link change process failed %pe\n", ERR_PTR(ret)); + } + + /** +diff --git a/drivers/net/phy/sfp.c b/drivers/net/phy/sfp.c +index a5684ef5884bda..dcec92625cf651 100644 +--- a/drivers/net/phy/sfp.c ++++ b/drivers/net/phy/sfp.c +@@ -466,7 +466,8 @@ static void sfp_quirk_ubnt_uf_instant(const struct sfp_eeprom_id *id, + static const struct sfp_quirk sfp_quirks[] = { + // Alcatel Lucent G-010S-P can operate at 2500base-X, but incorrectly + // report 2500MBd NRZ in their EEPROM +- SFP_QUIRK_M("ALCATELLUCENT", "G010SP", sfp_quirk_2500basex), ++ SFP_QUIRK("ALCATELLUCENT", "G010SP", sfp_quirk_2500basex, ++ sfp_fixup_ignore_tx_fault), + + // Alcatel Lucent G-010S-A can operate at 2500base-X, but report 3.2GBd + // NRZ in their EEPROM +diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c +index 53a038fcbe991d..c897afef0b414c 100644 +--- a/drivers/net/virtio_net.c ++++ b/drivers/net/virtio_net.c +@@ -946,9 +946,6 @@ static void *virtnet_rq_alloc(struct receive_queue *rq, u32 size, gfp_t gfp) + void *buf, *head; + dma_addr_t addr; + +- if (unlikely(!skb_page_frag_refill(size, alloc_frag, gfp))) +- return NULL; +- + head = page_address(alloc_frag->page); + + if (rq->do_dma) { +@@ -2443,6 +2440,9 @@ static int add_recvbuf_small(struct virtnet_info *vi, struct receive_queue *rq, + len = SKB_DATA_ALIGN(len) + + SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); + ++ if (unlikely(!skb_page_frag_refill(len, &rq->alloc_frag, gfp))) ++ return -ENOMEM; ++ + buf = virtnet_rq_alloc(rq, len, gfp); + if (unlikely(!buf)) + return -ENOMEM; +@@ -2545,6 +2545,12 @@ static int add_recvbuf_mergeable(struct virtnet_info *vi, + */ + len = get_mergeable_buf_len(rq, &rq->mrg_avg_pkt_len, room); + ++ if (unlikely(!skb_page_frag_refill(len + room, alloc_frag, gfp))) ++ return -ENOMEM; ++ ++ if (!alloc_frag->offset && len + room + sizeof(struct virtnet_rq_dma) > alloc_frag->size) ++ len -= sizeof(struct virtnet_rq_dma); ++ + buf = virtnet_rq_alloc(rq, len + room, gfp); + if (unlikely(!buf)) + return -ENOMEM; +diff --git a/drivers/net/wireless/ath/ath10k/sdio.c b/drivers/net/wireless/ath/ath10k/sdio.c +index 08a6f36a6be9cb..6805357ee29e6d 100644 +--- a/drivers/net/wireless/ath/ath10k/sdio.c ++++ b/drivers/net/wireless/ath/ath10k/sdio.c +@@ -3,7 +3,7 @@ + * Copyright (c) 2004-2011 Atheros Communications Inc. + * Copyright (c) 2011-2012,2017 Qualcomm Atheros, Inc. + * Copyright (c) 2016-2017 Erik Stromdahl +- * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +@@ -2648,9 +2648,9 @@ static void ath10k_sdio_remove(struct sdio_func *func) + + netif_napi_del(&ar->napi); + +- ath10k_core_destroy(ar); +- + destroy_workqueue(ar_sdio->workqueue); ++ ++ ath10k_core_destroy(ar); + } + + static const struct sdio_device_id ath10k_sdio_devices[] = { +diff --git a/drivers/net/wireless/ath/ath12k/mac.c b/drivers/net/wireless/ath/ath12k/mac.c +index 6d0784a21558ea..8946141aa0dce6 100644 +--- a/drivers/net/wireless/ath/ath12k/mac.c ++++ b/drivers/net/wireless/ath/ath12k/mac.c +@@ -8186,9 +8186,9 @@ ath12k_mac_op_set_bitrate_mask(struct ieee80211_hw *hw, + arvif->vdev_id, ret); + goto out; + } +- ieee80211_iterate_stations_atomic(hw, +- ath12k_mac_disable_peer_fixed_rate, +- arvif); ++ ieee80211_iterate_stations_mtx(hw, ++ ath12k_mac_disable_peer_fixed_rate, ++ arvif); + } else if (ath12k_mac_bitrate_mask_get_single_nss(ar, band, mask, + &single_nss)) { + rate = WMI_FIXED_RATE_NONE; +@@ -8233,16 +8233,16 @@ ath12k_mac_op_set_bitrate_mask(struct ieee80211_hw *hw, + goto out; + } + +- ieee80211_iterate_stations_atomic(hw, +- ath12k_mac_disable_peer_fixed_rate, +- arvif); ++ ieee80211_iterate_stations_mtx(hw, ++ ath12k_mac_disable_peer_fixed_rate, ++ arvif); + + mutex_lock(&ar->conf_mutex); + + arvif->bitrate_mask = *mask; +- ieee80211_iterate_stations_atomic(hw, +- ath12k_mac_set_bitrate_mask_iter, +- arvif); ++ ieee80211_iterate_stations_mtx(hw, ++ ath12k_mac_set_bitrate_mask_iter, ++ arvif); + + mutex_unlock(&ar->conf_mutex); + } +diff --git a/drivers/net/wireless/ath/ath5k/pci.c b/drivers/net/wireless/ath/ath5k/pci.c +index b51fce5ae26020..f5ca2fe0d07490 100644 +--- a/drivers/net/wireless/ath/ath5k/pci.c ++++ b/drivers/net/wireless/ath/ath5k/pci.c +@@ -46,6 +46,8 @@ static const struct pci_device_id ath5k_pci_id_table[] = { + { PCI_VDEVICE(ATHEROS, 0x001b) }, /* 5413 Eagle */ + { PCI_VDEVICE(ATHEROS, 0x001c) }, /* PCI-E cards */ + { PCI_VDEVICE(ATHEROS, 0x001d) }, /* 2417 Nala */ ++ { PCI_VDEVICE(ATHEROS, 0xff16) }, /* Gigaset SX76[23] AR241[34]A */ ++ { PCI_VDEVICE(ATHEROS, 0xff1a) }, /* Arcadyan ARV45XX AR2417 */ + { PCI_VDEVICE(ATHEROS, 0xff1b) }, /* AR5BXB63 */ + { 0 } + }; +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c +index d35262335eaf79..8a1e3376424487 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c +@@ -770,7 +770,7 @@ void brcmf_sdiod_sgtable_alloc(struct brcmf_sdio_dev *sdiodev) + + nents = max_t(uint, BRCMF_DEFAULT_RXGLOM_SIZE, + sdiodev->settings->bus.sdio.txglomsz); +- nents += (nents >> 4) + 1; ++ nents *= 2; + + WARN_ON(nents > sdiodev->max_segment_count); + +diff --git a/drivers/net/wireless/intel/ipw2x00/libipw_rx.c b/drivers/net/wireless/intel/ipw2x00/libipw_rx.c +index 48d6870bbf4e25..9a97ab9b89ae8b 100644 +--- a/drivers/net/wireless/intel/ipw2x00/libipw_rx.c ++++ b/drivers/net/wireless/intel/ipw2x00/libipw_rx.c +@@ -870,8 +870,8 @@ void libipw_rx_any(struct libipw_device *ieee, + switch (ieee->iw_mode) { + case IW_MODE_ADHOC: + /* our BSS and not from/to DS */ +- if (ether_addr_equal(hdr->addr3, ieee->bssid)) +- if ((fc & (IEEE80211_FCTL_TODS+IEEE80211_FCTL_FROMDS)) == 0) { ++ if (ether_addr_equal(hdr->addr3, ieee->bssid) && ++ ((fc & (IEEE80211_FCTL_TODS + IEEE80211_FCTL_FROMDS)) == 0)) { + /* promisc: get all */ + if (ieee->dev->flags & IFF_PROMISC) + is_packet_for_us = 1; +@@ -885,8 +885,8 @@ void libipw_rx_any(struct libipw_device *ieee, + break; + case IW_MODE_INFRA: + /* our BSS (== from our AP) and from DS */ +- if (ether_addr_equal(hdr->addr2, ieee->bssid)) +- if ((fc & (IEEE80211_FCTL_TODS+IEEE80211_FCTL_FROMDS)) == IEEE80211_FCTL_FROMDS) { ++ if (ether_addr_equal(hdr->addr2, ieee->bssid) && ++ ((fc & (IEEE80211_FCTL_TODS + IEEE80211_FCTL_FROMDS)) == IEEE80211_FCTL_FROMDS)) { + /* promisc: get all */ + if (ieee->dev->flags & IFF_PROMISC) + is_packet_for_us = 1; +diff --git a/drivers/net/wireless/realtek/rtw88/sdio.c b/drivers/net/wireless/realtek/rtw88/sdio.c +index 21d0754dd7f6ac..b67e551fcee3ef 100644 +--- a/drivers/net/wireless/realtek/rtw88/sdio.c ++++ b/drivers/net/wireless/realtek/rtw88/sdio.c +@@ -1297,12 +1297,12 @@ static void rtw_sdio_deinit_tx(struct rtw_dev *rtwdev) + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + int i; + +- for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) +- skb_queue_purge(&rtwsdio->tx_queue[i]); +- + flush_workqueue(rtwsdio->txwq); + destroy_workqueue(rtwsdio->txwq); + kfree(rtwsdio->tx_handler_data); ++ ++ for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) ++ ieee80211_purge_tx_queue(rtwdev->hw, &rtwsdio->tx_queue[i]); + } + + int rtw_sdio_probe(struct sdio_func *sdio_func, +diff --git a/drivers/net/wireless/realtek/rtw88/usb.c b/drivers/net/wireless/realtek/rtw88/usb.c +index b17a429bcd2994..07695294767acb 100644 +--- a/drivers/net/wireless/realtek/rtw88/usb.c ++++ b/drivers/net/wireless/realtek/rtw88/usb.c +@@ -423,10 +423,11 @@ static void rtw_usb_tx_handler(struct work_struct *work) + + static void rtw_usb_tx_queue_purge(struct rtw_usb *rtwusb) + { ++ struct rtw_dev *rtwdev = rtwusb->rtwdev; + int i; + + for (i = 0; i < ARRAY_SIZE(rtwusb->tx_queue); i++) +- skb_queue_purge(&rtwusb->tx_queue[i]); ++ ieee80211_purge_tx_queue(rtwdev->hw, &rtwusb->tx_queue[i]); + } + + static void rtw_usb_write_port_complete(struct urb *urb) +@@ -888,9 +889,9 @@ static void rtw_usb_deinit_tx(struct rtw_dev *rtwdev) + { + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + +- rtw_usb_tx_queue_purge(rtwusb); + flush_workqueue(rtwusb->txwq); + destroy_workqueue(rtwusb->txwq); ++ rtw_usb_tx_queue_purge(rtwusb); + } + + static int rtw_usb_intf_init(struct rtw_dev *rtwdev, +diff --git a/drivers/net/wireless/realtek/rtw89/fw.c b/drivers/net/wireless/realtek/rtw89/fw.c +index 13a7c39ceb6f55..e6bceef691e9be 100644 +--- a/drivers/net/wireless/realtek/rtw89/fw.c ++++ b/drivers/net/wireless/realtek/rtw89/fw.c +@@ -6074,6 +6074,9 @@ static int rtw89_update_6ghz_rnr_chan(struct rtw89_dev *rtwdev, + + skb = ieee80211_probereq_get(rtwdev->hw, rtwvif_link->mac_addr, + NULL, 0, req->ie_len); ++ if (!skb) ++ return -ENOMEM; ++ + skb_put_data(skb, ies->ies[NL80211_BAND_6GHZ], ies->len[NL80211_BAND_6GHZ]); + skb_put_data(skb, ies->common_ies, ies->common_ie_len); + hdr = (struct ieee80211_hdr *)skb->data; +diff --git a/drivers/nvdimm/dax_devs.c b/drivers/nvdimm/dax_devs.c +index 6b4922de30477e..37b743acbb7bad 100644 +--- a/drivers/nvdimm/dax_devs.c ++++ b/drivers/nvdimm/dax_devs.c +@@ -106,12 +106,12 @@ int nd_dax_probe(struct device *dev, struct nd_namespace_common *ndns) + + nvdimm_bus_lock(&ndns->dev); + nd_dax = nd_dax_alloc(nd_region); +- nd_pfn = &nd_dax->nd_pfn; +- dax_dev = nd_pfn_devinit(nd_pfn, ndns); ++ dax_dev = nd_dax_devinit(nd_dax, ndns); + nvdimm_bus_unlock(&ndns->dev); + if (!dax_dev) + return -ENOMEM; + pfn_sb = devm_kmalloc(dev, sizeof(*pfn_sb), GFP_KERNEL); ++ nd_pfn = &nd_dax->nd_pfn; + nd_pfn->pfn_sb = pfn_sb; + rc = nd_pfn_validate(nd_pfn, DAX_SIG); + dev_dbg(dev, "dax: %s\n", rc == 0 ? dev_name(dax_dev) : ""); +diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h +index 2dbb1dca17b534..5ca06e9a2d2925 100644 +--- a/drivers/nvdimm/nd.h ++++ b/drivers/nvdimm/nd.h +@@ -600,6 +600,13 @@ struct nd_dax *to_nd_dax(struct device *dev); + int nd_dax_probe(struct device *dev, struct nd_namespace_common *ndns); + bool is_nd_dax(const struct device *dev); + struct device *nd_dax_create(struct nd_region *nd_region); ++static inline struct device *nd_dax_devinit(struct nd_dax *nd_dax, ++ struct nd_namespace_common *ndns) ++{ ++ if (!nd_dax) ++ return NULL; ++ return nd_pfn_devinit(&nd_dax->nd_pfn, ndns); ++} + #else + static inline int nd_dax_probe(struct device *dev, + struct nd_namespace_common *ndns) +diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c +index f0d4c6f3cb0555..249914b90dbfa7 100644 +--- a/drivers/nvme/host/core.c ++++ b/drivers/nvme/host/core.c +@@ -1303,9 +1303,10 @@ static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) + queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); + } + +-static void nvme_keep_alive_finish(struct request *rq, +- blk_status_t status, struct nvme_ctrl *ctrl) ++static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, ++ blk_status_t status) + { ++ struct nvme_ctrl *ctrl = rq->end_io_data; + unsigned long rtt = jiffies - (rq->deadline - rq->timeout); + unsigned long delay = nvme_keep_alive_work_period(ctrl); + enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); +@@ -1322,17 +1323,20 @@ static void nvme_keep_alive_finish(struct request *rq, + delay = 0; + } + ++ blk_mq_free_request(rq); ++ + if (status) { + dev_err(ctrl->device, + "failed nvme_keep_alive_end_io error=%d\n", + status); +- return; ++ return RQ_END_IO_NONE; + } + + ctrl->ka_last_check_time = jiffies; + ctrl->comp_seen = false; + if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING) + queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); ++ return RQ_END_IO_NONE; + } + + static void nvme_keep_alive_work(struct work_struct *work) +@@ -1341,7 +1345,6 @@ static void nvme_keep_alive_work(struct work_struct *work) + struct nvme_ctrl, ka_work); + bool comp_seen = ctrl->comp_seen; + struct request *rq; +- blk_status_t status; + + ctrl->ka_last_check_time = jiffies; + +@@ -1364,9 +1367,9 @@ static void nvme_keep_alive_work(struct work_struct *work) + nvme_init_request(rq, &ctrl->ka_cmd); + + rq->timeout = ctrl->kato * HZ; +- status = blk_execute_rq(rq, false); +- nvme_keep_alive_finish(rq, status, ctrl); +- blk_mq_free_request(rq); ++ rq->end_io = nvme_keep_alive_end_io; ++ rq->end_io_data = ctrl; ++ blk_execute_rq_nowait(rq, false); + } + + static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) +@@ -2064,7 +2067,8 @@ static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id, + lim->physical_block_size = min(phys_bs, atomic_bs); + lim->io_min = phys_bs; + lim->io_opt = io_opt; +- if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) ++ if ((ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) && ++ (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)) + lim->max_write_zeroes_sectors = UINT_MAX; + else + lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors; +@@ -3250,8 +3254,9 @@ static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ct + } + + if (!ctrl->maxcmd) { +- dev_err(ctrl->device, "Maximum outstanding commands is 0\n"); +- return -EINVAL; ++ dev_warn(ctrl->device, ++ "Firmware bug: maximum outstanding commands is 0\n"); ++ ctrl->maxcmd = ctrl->sqsize + 1; + } + + return 0; +diff --git a/drivers/nvme/host/rdma.c b/drivers/nvme/host/rdma.c +index 24a2759798d01e..913e6e5a80705f 100644 +--- a/drivers/nvme/host/rdma.c ++++ b/drivers/nvme/host/rdma.c +@@ -1091,13 +1091,7 @@ static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) + } + destroy_admin: + nvme_stop_keep_alive(&ctrl->ctrl); +- nvme_quiesce_admin_queue(&ctrl->ctrl); +- blk_sync_queue(ctrl->ctrl.admin_q); +- nvme_rdma_stop_queue(&ctrl->queues[0]); +- nvme_cancel_admin_tagset(&ctrl->ctrl); +- if (new) +- nvme_remove_admin_tag_set(&ctrl->ctrl); +- nvme_rdma_destroy_admin_queue(ctrl); ++ nvme_rdma_teardown_admin_queue(ctrl, new); + return ret; + } + +diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c +index 3e416af2659f19..55abfe5e1d2548 100644 +--- a/drivers/nvme/host/tcp.c ++++ b/drivers/nvme/host/tcp.c +@@ -2278,7 +2278,7 @@ static int nvme_tcp_setup_ctrl(struct nvme_ctrl *ctrl, bool new) + } + destroy_admin: + nvme_stop_keep_alive(ctrl); +- nvme_tcp_teardown_admin_queue(ctrl, false); ++ nvme_tcp_teardown_admin_queue(ctrl, new); + return ret; + } + +diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c +index b5447228696dc4..6483e1874477ef 100644 +--- a/drivers/pci/controller/dwc/pcie-qcom.c ++++ b/drivers/pci/controller/dwc/pcie-qcom.c +@@ -1830,6 +1830,7 @@ static const struct of_device_id qcom_pcie_match[] = { + { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, + { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, + { .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 }, ++ { .compatible = "qcom,pcie-ipq9574", .data = &cfg_2_9_0 }, + { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, + { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, + { .compatible = "qcom,pcie-sa8540p", .data = &cfg_sc8280xp }, +diff --git a/drivers/pci/controller/plda/pcie-starfive.c b/drivers/pci/controller/plda/pcie-starfive.c +index c9933ecf683382..0564fdce47c2a3 100644 +--- a/drivers/pci/controller/plda/pcie-starfive.c ++++ b/drivers/pci/controller/plda/pcie-starfive.c +@@ -404,6 +404,9 @@ static int starfive_pcie_probe(struct platform_device *pdev) + if (ret) + return ret; + ++ pm_runtime_enable(&pdev->dev); ++ pm_runtime_get_sync(&pdev->dev); ++ + plda->host_ops = &sf_host_ops; + plda->num_events = PLDA_MAX_EVENT_NUM; + /* mask doorbell event */ +@@ -413,11 +416,12 @@ static int starfive_pcie_probe(struct platform_device *pdev) + plda->events_bitmap <<= PLDA_NUM_DMA_EVENTS; + ret = plda_pcie_host_init(&pcie->plda, &starfive_pcie_ops, + &stf_pcie_event); +- if (ret) ++ if (ret) { ++ pm_runtime_put_sync(&pdev->dev); ++ pm_runtime_disable(&pdev->dev); + return ret; ++ } + +- pm_runtime_enable(&pdev->dev); +- pm_runtime_get_sync(&pdev->dev); + platform_set_drvdata(pdev, pcie); + + return 0; +diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c +index 264a180403a0ec..9d9596947350f5 100644 +--- a/drivers/pci/controller/vmd.c ++++ b/drivers/pci/controller/vmd.c +@@ -740,11 +740,9 @@ static int vmd_pm_enable_quirk(struct pci_dev *pdev, void *userdata) + if (!(features & VMD_FEAT_BIOS_PM_QUIRK)) + return 0; + +- pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL); +- + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR); + if (!pos) +- return 0; ++ goto out_state_change; + + /* + * Skip if the max snoop LTR is non-zero, indicating BIOS has set it +@@ -752,7 +750,7 @@ static int vmd_pm_enable_quirk(struct pci_dev *pdev, void *userdata) + */ + pci_read_config_dword(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, <r_reg); + if (!!(ltr_reg & (PCI_LTR_VALUE_MASK | PCI_LTR_SCALE_MASK))) +- return 0; ++ goto out_state_change; + + /* + * Set the default values to the maximum required by the platform to +@@ -764,6 +762,13 @@ static int vmd_pm_enable_quirk(struct pci_dev *pdev, void *userdata) + pci_write_config_dword(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, ltr_reg); + pci_info(pdev, "VMD: Default LTR value set by driver\n"); + ++out_state_change: ++ /* ++ * Ensure devices are in D0 before enabling PCI-PM L1 PM Substates, per ++ * PCIe r6.0, sec 5.5.4. ++ */ ++ pci_set_power_state_locked(pdev, PCI_D0); ++ pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL); + return 0; + } + +@@ -1100,6 +1105,10 @@ static const struct pci_device_id vmd_ids[] = { + .driver_data = VMD_FEATS_CLIENT,}, + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_VMD_9A0B), + .driver_data = VMD_FEATS_CLIENT,}, ++ {PCI_VDEVICE(INTEL, 0xb60b), ++ .driver_data = VMD_FEATS_CLIENT,}, ++ {PCI_VDEVICE(INTEL, 0xb06f), ++ .driver_data = VMD_FEATS_CLIENT,}, + {0,} + }; + MODULE_DEVICE_TABLE(pci, vmd_ids); +diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c +index 5d0f4db1cab786..3e5a117f5b5d60 100644 +--- a/drivers/pci/pci-sysfs.c ++++ b/drivers/pci/pci-sysfs.c +@@ -521,6 +521,31 @@ static ssize_t bus_rescan_store(struct device *dev, + static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL, + bus_rescan_store); + ++static ssize_t reset_subordinate_store(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct pci_dev *pdev = to_pci_dev(dev); ++ struct pci_bus *bus = pdev->subordinate; ++ unsigned long val; ++ ++ if (!capable(CAP_SYS_ADMIN)) ++ return -EPERM; ++ ++ if (kstrtoul(buf, 0, &val) < 0) ++ return -EINVAL; ++ ++ if (val) { ++ int ret = __pci_reset_bus(bus); ++ ++ if (ret) ++ return ret; ++ } ++ ++ return count; ++} ++static DEVICE_ATTR_WO(reset_subordinate); ++ + #if defined(CONFIG_PM) && defined(CONFIG_ACPI) + static ssize_t d3cold_allowed_store(struct device *dev, + struct device_attribute *attr, +@@ -625,6 +650,7 @@ static struct attribute *pci_dev_attrs[] = { + static struct attribute *pci_bridge_attrs[] = { + &dev_attr_subordinate_bus_number.attr, + &dev_attr_secondary_bus_number.attr, ++ &dev_attr_reset_subordinate.attr, + NULL, + }; + +diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c +index 08f170fd3efb3e..dd3c6dcb47ae4a 100644 +--- a/drivers/pci/pci.c ++++ b/drivers/pci/pci.c +@@ -5885,7 +5885,7 @@ EXPORT_SYMBOL_GPL(pci_probe_reset_bus); + * + * Same as above except return -EAGAIN if the bus cannot be locked + */ +-static int __pci_reset_bus(struct pci_bus *bus) ++int __pci_reset_bus(struct pci_bus *bus) + { + int rc; + +diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h +index 14d00ce45bfa95..1cdc2c9547a7e1 100644 +--- a/drivers/pci/pci.h ++++ b/drivers/pci/pci.h +@@ -104,6 +104,7 @@ bool pci_reset_supported(struct pci_dev *dev); + void pci_init_reset_methods(struct pci_dev *dev); + int pci_bridge_secondary_bus_reset(struct pci_dev *dev); + int pci_bus_error_reset(struct pci_dev *dev); ++int __pci_reset_bus(struct pci_bus *bus); + + struct pci_cap_saved_data { + u16 cap_nr; +diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c +index f1615805f5b078..ebb0c1d5cae255 100644 +--- a/drivers/pci/probe.c ++++ b/drivers/pci/probe.c +@@ -1633,23 +1633,33 @@ static void set_pcie_thunderbolt(struct pci_dev *dev) + + static void set_pcie_untrusted(struct pci_dev *dev) + { +- struct pci_dev *parent; ++ struct pci_dev *parent = pci_upstream_bridge(dev); + ++ if (!parent) ++ return; + /* +- * If the upstream bridge is untrusted we treat this device ++ * If the upstream bridge is untrusted we treat this device as + * untrusted as well. + */ +- parent = pci_upstream_bridge(dev); +- if (parent && (parent->untrusted || parent->external_facing)) ++ if (parent->untrusted) { ++ dev->untrusted = true; ++ return; ++ } ++ ++ if (arch_pci_dev_is_removable(dev)) { ++ pci_dbg(dev, "marking as untrusted\n"); + dev->untrusted = true; ++ } + } + + static void pci_set_removable(struct pci_dev *dev) + { + struct pci_dev *parent = pci_upstream_bridge(dev); + ++ if (!parent) ++ return; + /* +- * We (only) consider everything downstream from an external_facing ++ * We (only) consider everything tunneled below an external_facing + * device to be removable by the user. We're mainly concerned with + * consumer platforms with user accessible thunderbolt ports that are + * vulnerable to DMA attacks, and we expect those ports to be marked by +@@ -1659,9 +1669,15 @@ static void pci_set_removable(struct pci_dev *dev) + * accessible to user / may not be removed by end user, and thus not + * exposed as "removable" to userspace. + */ +- if (parent && +- (parent->external_facing || dev_is_removable(&parent->dev))) ++ if (dev_is_removable(&parent->dev)) { ++ dev_set_removable(&dev->dev, DEVICE_REMOVABLE); ++ return; ++ } ++ ++ if (arch_pci_dev_is_removable(dev)) { ++ pci_dbg(dev, "marking as removable\n"); + dev_set_removable(&dev->dev, DEVICE_REMOVABLE); ++ } + } + + /** +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index dccb60c1d9cc3d..8103bc24a54ea4 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -4996,18 +4996,21 @@ static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags) + } + + /* +- * Wangxun 10G/1G NICs have no ACS capability, and on multi-function +- * devices, peer-to-peer transactions are not be used between the functions. +- * So add an ACS quirk for below devices to isolate functions. ++ * Wangxun 40G/25G/10G/1G NICs have no ACS capability, but on ++ * multi-function devices, the hardware isolates the functions by ++ * directing all peer-to-peer traffic upstream as though PCI_ACS_RR and ++ * PCI_ACS_CR were set. + * SFxxx 1G NICs(em). + * RP1000/RP2000 10G NICs(sp). ++ * FF5xxx 40G/25G/10G NICs(aml). + */ + static int pci_quirk_wangxun_nic_acs(struct pci_dev *dev, u16 acs_flags) + { + switch (dev->device) { +- case 0x0100 ... 0x010F: +- case 0x1001: +- case 0x2001: ++ case 0x0100 ... 0x010F: /* EM */ ++ case 0x1001: case 0x2001: /* SP */ ++ case 0x5010: case 0x5025: case 0x5040: /* AML */ ++ case 0x5110: case 0x5125: case 0x5140: /* AML */ + return pci_acs_ctrl_enabled(acs_flags, + PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); + } +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index 4061890a174835..b3eec63c00ba04 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -220,6 +220,9 @@ static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, + + /* Set owner */ + pindesc->pctldev = pctldev; ++#ifdef CONFIG_PINMUX ++ mutex_init(&pindesc->mux_lock); ++#endif + + /* Copy basic pin info */ + if (pin->name) { +diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h +index 4e07707d2435bd..d6c24978e7081a 100644 +--- a/drivers/pinctrl/core.h ++++ b/drivers/pinctrl/core.h +@@ -177,6 +177,7 @@ struct pin_desc { + const char *mux_owner; + const struct pinctrl_setting_mux *mux_setting; + const char *gpio_owner; ++ struct mutex mux_lock; + #endif + }; + +diff --git a/drivers/pinctrl/freescale/Kconfig b/drivers/pinctrl/freescale/Kconfig +index 3b59d71890045b..139bc0fb8a9dbf 100644 +--- a/drivers/pinctrl/freescale/Kconfig ++++ b/drivers/pinctrl/freescale/Kconfig +@@ -20,7 +20,7 @@ config PINCTRL_IMX_SCMI + + config PINCTRL_IMX_SCU + tristate +- depends on IMX_SCU ++ depends on IMX_SCU || COMPILE_TEST + select PINCTRL_IMX + + config PINCTRL_IMX1_CORE +diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c +index 02033ea1c64384..0743190da59e81 100644 +--- a/drivers/pinctrl/pinmux.c ++++ b/drivers/pinctrl/pinmux.c +@@ -14,6 +14,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -93,6 +94,7 @@ bool pinmux_can_be_used_for_gpio(struct pinctrl_dev *pctldev, unsigned int pin) + if (!desc || !ops) + return true; + ++ guard(mutex)(&desc->mux_lock); + if (ops->strict && desc->mux_usecount) + return false; + +@@ -127,29 +129,31 @@ static int pin_request(struct pinctrl_dev *pctldev, + dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n", + pin, desc->name, owner); + +- if ((!gpio_range || ops->strict) && +- desc->mux_usecount && strcmp(desc->mux_owner, owner)) { +- dev_err(pctldev->dev, +- "pin %s already requested by %s; cannot claim for %s\n", +- desc->name, desc->mux_owner, owner); +- goto out; +- } ++ scoped_guard(mutex, &desc->mux_lock) { ++ if ((!gpio_range || ops->strict) && ++ desc->mux_usecount && strcmp(desc->mux_owner, owner)) { ++ dev_err(pctldev->dev, ++ "pin %s already requested by %s; cannot claim for %s\n", ++ desc->name, desc->mux_owner, owner); ++ goto out; ++ } + +- if ((gpio_range || ops->strict) && desc->gpio_owner) { +- dev_err(pctldev->dev, +- "pin %s already requested by %s; cannot claim for %s\n", +- desc->name, desc->gpio_owner, owner); +- goto out; +- } ++ if ((gpio_range || ops->strict) && desc->gpio_owner) { ++ dev_err(pctldev->dev, ++ "pin %s already requested by %s; cannot claim for %s\n", ++ desc->name, desc->gpio_owner, owner); ++ goto out; ++ } + +- if (gpio_range) { +- desc->gpio_owner = owner; +- } else { +- desc->mux_usecount++; +- if (desc->mux_usecount > 1) +- return 0; ++ if (gpio_range) { ++ desc->gpio_owner = owner; ++ } else { ++ desc->mux_usecount++; ++ if (desc->mux_usecount > 1) ++ return 0; + +- desc->mux_owner = owner; ++ desc->mux_owner = owner; ++ } + } + + /* Let each pin increase references to this module */ +@@ -178,12 +182,14 @@ static int pin_request(struct pinctrl_dev *pctldev, + + out_free_pin: + if (status) { +- if (gpio_range) { +- desc->gpio_owner = NULL; +- } else { +- desc->mux_usecount--; +- if (!desc->mux_usecount) +- desc->mux_owner = NULL; ++ scoped_guard(mutex, &desc->mux_lock) { ++ if (gpio_range) { ++ desc->gpio_owner = NULL; ++ } else { ++ desc->mux_usecount--; ++ if (!desc->mux_usecount) ++ desc->mux_owner = NULL; ++ } + } + } + out: +@@ -219,15 +225,17 @@ static const char *pin_free(struct pinctrl_dev *pctldev, int pin, + return NULL; + } + +- if (!gpio_range) { +- /* +- * A pin should not be freed more times than allocated. +- */ +- if (WARN_ON(!desc->mux_usecount)) +- return NULL; +- desc->mux_usecount--; +- if (desc->mux_usecount) +- return NULL; ++ scoped_guard(mutex, &desc->mux_lock) { ++ if (!gpio_range) { ++ /* ++ * A pin should not be freed more times than allocated. ++ */ ++ if (WARN_ON(!desc->mux_usecount)) ++ return NULL; ++ desc->mux_usecount--; ++ if (desc->mux_usecount) ++ return NULL; ++ } + } + + /* +@@ -239,13 +247,15 @@ static const char *pin_free(struct pinctrl_dev *pctldev, int pin, + else if (ops->free) + ops->free(pctldev, pin); + +- if (gpio_range) { +- owner = desc->gpio_owner; +- desc->gpio_owner = NULL; +- } else { +- owner = desc->mux_owner; +- desc->mux_owner = NULL; +- desc->mux_setting = NULL; ++ scoped_guard(mutex, &desc->mux_lock) { ++ if (gpio_range) { ++ owner = desc->gpio_owner; ++ desc->gpio_owner = NULL; ++ } else { ++ owner = desc->mux_owner; ++ desc->mux_owner = NULL; ++ desc->mux_setting = NULL; ++ } + } + + module_put(pctldev->owner); +@@ -458,7 +468,8 @@ int pinmux_enable_setting(const struct pinctrl_setting *setting) + pins[i]); + continue; + } +- desc->mux_setting = &(setting->data.mux); ++ scoped_guard(mutex, &desc->mux_lock) ++ desc->mux_setting = &(setting->data.mux); + } + + ret = ops->set_mux(pctldev, setting->data.mux.func, +@@ -472,8 +483,10 @@ int pinmux_enable_setting(const struct pinctrl_setting *setting) + err_set_mux: + for (i = 0; i < num_pins; i++) { + desc = pin_desc_get(pctldev, pins[i]); +- if (desc) +- desc->mux_setting = NULL; ++ if (desc) { ++ scoped_guard(mutex, &desc->mux_lock) ++ desc->mux_setting = NULL; ++ } + } + err_pin_request: + /* On error release all taken pins */ +@@ -492,6 +505,7 @@ void pinmux_disable_setting(const struct pinctrl_setting *setting) + unsigned int num_pins = 0; + int i; + struct pin_desc *desc; ++ bool is_equal; + + if (pctlops->get_group_pins) + ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, +@@ -517,7 +531,10 @@ void pinmux_disable_setting(const struct pinctrl_setting *setting) + pins[i]); + continue; + } +- if (desc->mux_setting == &(setting->data.mux)) { ++ scoped_guard(mutex, &desc->mux_lock) ++ is_equal = (desc->mux_setting == &(setting->data.mux)); ++ ++ if (is_equal) { + pin_free(pctldev, pins[i], NULL); + } else { + const char *gname; +@@ -608,40 +625,42 @@ static int pinmux_pins_show(struct seq_file *s, void *what) + if (desc == NULL) + continue; + +- if (desc->mux_owner && +- !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) +- is_hog = true; +- +- if (pmxops->strict) { +- if (desc->mux_owner) +- seq_printf(s, "pin %d (%s): device %s%s", +- pin, desc->name, desc->mux_owner, ++ scoped_guard(mutex, &desc->mux_lock) { ++ if (desc->mux_owner && ++ !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) ++ is_hog = true; ++ ++ if (pmxops->strict) { ++ if (desc->mux_owner) ++ seq_printf(s, "pin %d (%s): device %s%s", ++ pin, desc->name, desc->mux_owner, ++ is_hog ? " (HOG)" : ""); ++ else if (desc->gpio_owner) ++ seq_printf(s, "pin %d (%s): GPIO %s", ++ pin, desc->name, desc->gpio_owner); ++ else ++ seq_printf(s, "pin %d (%s): UNCLAIMED", ++ pin, desc->name); ++ } else { ++ /* For non-strict controllers */ ++ seq_printf(s, "pin %d (%s): %s %s%s", pin, desc->name, ++ desc->mux_owner ? desc->mux_owner ++ : "(MUX UNCLAIMED)", ++ desc->gpio_owner ? desc->gpio_owner ++ : "(GPIO UNCLAIMED)", + is_hog ? " (HOG)" : ""); +- else if (desc->gpio_owner) +- seq_printf(s, "pin %d (%s): GPIO %s", +- pin, desc->name, desc->gpio_owner); ++ } ++ ++ /* If mux: print function+group claiming the pin */ ++ if (desc->mux_setting) ++ seq_printf(s, " function %s group %s\n", ++ pmxops->get_function_name(pctldev, ++ desc->mux_setting->func), ++ pctlops->get_group_name(pctldev, ++ desc->mux_setting->group)); + else +- seq_printf(s, "pin %d (%s): UNCLAIMED", +- pin, desc->name); +- } else { +- /* For non-strict controllers */ +- seq_printf(s, "pin %d (%s): %s %s%s", pin, desc->name, +- desc->mux_owner ? desc->mux_owner +- : "(MUX UNCLAIMED)", +- desc->gpio_owner ? desc->gpio_owner +- : "(GPIO UNCLAIMED)", +- is_hog ? " (HOG)" : ""); ++ seq_putc(s, '\n'); + } +- +- /* If mux: print function+group claiming the pin */ +- if (desc->mux_setting) +- seq_printf(s, " function %s group %s\n", +- pmxops->get_function_name(pctldev, +- desc->mux_setting->func), +- pctlops->get_group_name(pctldev, +- desc->mux_setting->group)); +- else +- seq_putc(s, '\n'); + } + + mutex_unlock(&pctldev->mutex); +diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +index a0eb4e01b3a755..1b7eecff3ffa43 100644 +--- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c ++++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +@@ -1226,6 +1226,8 @@ static const struct of_device_id pmic_gpio_of_match[] = { + { .compatible = "qcom,pm8550ve-gpio", .data = (void *) 8 }, + { .compatible = "qcom,pm8550vs-gpio", .data = (void *) 6 }, + { .compatible = "qcom,pm8916-gpio", .data = (void *) 4 }, ++ /* pm8937 has 8 GPIOs with holes on 3, 4 and 6 */ ++ { .compatible = "qcom,pm8937-gpio", .data = (void *) 8 }, + { .compatible = "qcom,pm8941-gpio", .data = (void *) 36 }, + /* pm8950 has 8 GPIOs with holes on 3 */ + { .compatible = "qcom,pm8950-gpio", .data = (void *) 8 }, +diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c +index d16ece90d926cf..5fa04e7c1d5c4d 100644 +--- a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c ++++ b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c +@@ -983,6 +983,7 @@ static const struct of_device_id pmic_mpp_of_match[] = { + { .compatible = "qcom,pm8226-mpp", .data = (void *) 8 }, + { .compatible = "qcom,pm8841-mpp", .data = (void *) 4 }, + { .compatible = "qcom,pm8916-mpp", .data = (void *) 4 }, ++ { .compatible = "qcom,pm8937-mpp", .data = (void *) 4 }, + { .compatible = "qcom,pm8941-mpp", .data = (void *) 8 }, + { .compatible = "qcom,pm8950-mpp", .data = (void *) 4 }, + { .compatible = "qcom,pmi8950-mpp", .data = (void *) 4 }, +diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wmi.c +index 89f5f44857d555..1101e5b2488e52 100644 +--- a/drivers/platform/x86/asus-wmi.c ++++ b/drivers/platform/x86/asus-wmi.c +@@ -3696,7 +3696,6 @@ static int asus_wmi_custom_fan_curve_init(struct asus_wmi *asus) + /* Throttle thermal policy ****************************************************/ + static int throttle_thermal_policy_write(struct asus_wmi *asus) + { +- u32 retval; + u8 value; + int err; + +@@ -3718,8 +3717,8 @@ static int throttle_thermal_policy_write(struct asus_wmi *asus) + value = asus->throttle_thermal_policy_mode; + } + +- err = asus_wmi_set_devstate(asus->throttle_thermal_policy_dev, +- value, &retval); ++ /* Some machines do not return an error code as a result, so we ignore it */ ++ err = asus_wmi_set_devstate(asus->throttle_thermal_policy_dev, value, NULL); + + sysfs_notify(&asus->platform_device->dev.kobj, NULL, + "throttle_thermal_policy"); +@@ -3729,12 +3728,6 @@ static int throttle_thermal_policy_write(struct asus_wmi *asus) + return err; + } + +- if (retval != 1) { +- pr_warn("Failed to set throttle thermal policy (retval): 0x%x\n", +- retval); +- return -EIO; +- } +- + /* Must set to disabled if mode is toggled */ + if (asus->cpu_fan_curve_available) + asus->custom_fan_curves[FAN_CURVE_DEV_CPU].enabled = false; +diff --git a/drivers/pmdomain/core.c b/drivers/pmdomain/core.c +index 29ad510e881c39..778ff187ac59e6 100644 +--- a/drivers/pmdomain/core.c ++++ b/drivers/pmdomain/core.c +@@ -2171,8 +2171,24 @@ static int genpd_alloc_data(struct generic_pm_domain *genpd) + } + + genpd->gd = gd; +- return 0; ++ device_initialize(&genpd->dev); ++ ++ if (!genpd_is_dev_name_fw(genpd)) { ++ dev_set_name(&genpd->dev, "%s", genpd->name); ++ } else { ++ ret = ida_alloc(&genpd_ida, GFP_KERNEL); ++ if (ret < 0) ++ goto put; + ++ genpd->device_id = ret; ++ dev_set_name(&genpd->dev, "%s_%u", genpd->name, genpd->device_id); ++ } ++ ++ return 0; ++put: ++ put_device(&genpd->dev); ++ if (genpd->free_states == genpd_free_default_power_state) ++ kfree(genpd->states); + free: + if (genpd_is_cpu_domain(genpd)) + free_cpumask_var(genpd->cpus); +@@ -2182,6 +2198,9 @@ static int genpd_alloc_data(struct generic_pm_domain *genpd) + + static void genpd_free_data(struct generic_pm_domain *genpd) + { ++ put_device(&genpd->dev); ++ if (genpd->device_id != -ENXIO) ++ ida_free(&genpd_ida, genpd->device_id); + if (genpd_is_cpu_domain(genpd)) + free_cpumask_var(genpd->cpus); + if (genpd->free_states) +@@ -2270,20 +2289,6 @@ int pm_genpd_init(struct generic_pm_domain *genpd, + if (ret) + return ret; + +- device_initialize(&genpd->dev); +- +- if (!genpd_is_dev_name_fw(genpd)) { +- dev_set_name(&genpd->dev, "%s", genpd->name); +- } else { +- ret = ida_alloc(&genpd_ida, GFP_KERNEL); +- if (ret < 0) { +- put_device(&genpd->dev); +- return ret; +- } +- genpd->device_id = ret; +- dev_set_name(&genpd->dev, "%s_%u", genpd->name, genpd->device_id); +- } +- + mutex_lock(&gpd_list_lock); + list_add(&genpd->gpd_list_node, &gpd_list); + mutex_unlock(&gpd_list_lock); +@@ -2324,8 +2329,6 @@ static int genpd_remove(struct generic_pm_domain *genpd) + genpd_unlock(genpd); + genpd_debug_remove(genpd); + cancel_work_sync(&genpd->power_off_work); +- if (genpd->device_id != -ENXIO) +- ida_free(&genpd_ida, genpd->device_id); + genpd_free_data(genpd); + + pr_debug("%s: removed %s\n", __func__, dev_name(&genpd->dev)); +diff --git a/drivers/pmdomain/imx/gpcv2.c b/drivers/pmdomain/imx/gpcv2.c +index 963d61c5af6d5e..3f0e6960f47fc2 100644 +--- a/drivers/pmdomain/imx/gpcv2.c ++++ b/drivers/pmdomain/imx/gpcv2.c +@@ -403,7 +403,7 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) + * already reaches target before udelay() + */ + regmap_read_bypassed(domain->regmap, domain->regs->hsk, ®_val); +- udelay(5); ++ udelay(10); + } + + /* Disable reset clocks for all devices in the domain */ +diff --git a/drivers/ptp/ptp_clock.c b/drivers/ptp/ptp_clock.c +index c56cd0f63909a2..77a36e7bddd54e 100644 +--- a/drivers/ptp/ptp_clock.c ++++ b/drivers/ptp/ptp_clock.c +@@ -150,7 +150,8 @@ static int ptp_clock_adjtime(struct posix_clock *pc, struct __kernel_timex *tx) + if (ppb > ops->max_adj || ppb < -ops->max_adj) + return -ERANGE; + err = ops->adjfine(ops, tx->freq); +- ptp->dialed_frequency = tx->freq; ++ if (!err) ++ ptp->dialed_frequency = tx->freq; + } else if (tx->modes & ADJ_OFFSET) { + if (ops->adjphase) { + s32 max_phase_adj = ops->getmaxphase(ops); +diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c +index 6c343b4b9d15a8..7870722b6ee21c 100644 +--- a/drivers/regulator/qcom-rpmh-regulator.c ++++ b/drivers/regulator/qcom-rpmh-regulator.c +@@ -843,26 +843,15 @@ static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = { + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, + }; + +-static const struct rpmh_vreg_hw_data pmic5_ftsmps525_lv = { ++static const struct rpmh_vreg_hw_data pmic5_ftsmps525 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_ranges = (struct linear_range[]) { + REGULATOR_LINEAR_RANGE(300000, 0, 267, 4000), ++ REGULATOR_LINEAR_RANGE(1376000, 268, 438, 8000), + }, +- .n_linear_ranges = 1, +- .n_voltages = 268, +- .pmic_mode_map = pmic_mode_map_pmic5_smps, +- .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +-}; +- +-static const struct rpmh_vreg_hw_data pmic5_ftsmps525_mv = { +- .regulator_type = VRM, +- .ops = &rpmh_regulator_vrm_ops, +- .voltage_ranges = (struct linear_range[]) { +- REGULATOR_LINEAR_RANGE(600000, 0, 267, 8000), +- }, +- .n_linear_ranges = 1, +- .n_voltages = 268, ++ .n_linear_ranges = 2, ++ .n_voltages = 439, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, + }; +@@ -1190,12 +1179,12 @@ static const struct rpmh_vreg_init_data pm8550_vreg_data[] = { + }; + + static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = { +- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), +- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), +- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), +- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_lv, "vdd-s4"), +- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), +- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_mv, "vdd-s6"), ++ RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"), ++ RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"), ++ RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"), ++ RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"), ++ RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"), ++ RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), +@@ -1203,14 +1192,14 @@ static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = { + }; + + static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = { +- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), +- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), +- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), +- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), +- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), +- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), +- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), +- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), ++ RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"), ++ RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"), ++ RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"), ++ RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"), ++ RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"), ++ RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"), ++ RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"), ++ RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), +@@ -1218,14 +1207,14 @@ static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = { + }; + + static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = { +- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), +- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), +- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), +- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), +- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), +- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), +- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), +- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), ++ RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"), ++ RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"), ++ RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"), ++ RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"), ++ RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"), ++ RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"), ++ RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"), ++ RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), +@@ -1409,16 +1398,16 @@ static const struct rpmh_vreg_init_data pmx65_vreg_data[] = { + }; + + static const struct rpmh_vreg_init_data pmx75_vreg_data[] = { +- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), +- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), +- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), +- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), +- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), +- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), +- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), +- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), +- RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps525_lv, "vdd-s9"), +- RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps525_lv, "vdd-s10"), ++ RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"), ++ RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"), ++ RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"), ++ RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"), ++ RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"), ++ RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"), ++ RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"), ++ RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"), ++ RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps525, "vdd-s9"), ++ RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps525, "vdd-s10"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-18"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), +diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c +index 793b1d274be33a..1a2d08ec9de9ef 100644 +--- a/drivers/remoteproc/qcom_q6v5_pas.c ++++ b/drivers/remoteproc/qcom_q6v5_pas.c +@@ -1433,6 +1433,7 @@ static const struct of_device_id adsp_of_match[] = { + { .compatible = "qcom,sa8775p-cdsp1-pas", .data = &sa8775p_cdsp1_resource}, + { .compatible = "qcom,sa8775p-gpdsp0-pas", .data = &sa8775p_gpdsp0_resource}, + { .compatible = "qcom,sa8775p-gpdsp1-pas", .data = &sa8775p_gpdsp1_resource}, ++ { .compatible = "qcom,sar2130p-adsp-pas", .data = &sm8350_adsp_resource}, + { .compatible = "qcom,sc7180-adsp-pas", .data = &sm8250_adsp_resource}, + { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init}, + { .compatible = "qcom,sc7280-adsp-pas", .data = &sm8350_adsp_resource}, +diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c +index 35dca2accbb8df..5849d2970bba45 100644 +--- a/drivers/rtc/rtc-cmos.c ++++ b/drivers/rtc/rtc-cmos.c +@@ -645,18 +645,17 @@ static int cmos_nvram_read(void *priv, unsigned int off, void *val, + unsigned char *buf = val; + + off += NVRAM_OFFSET; +- spin_lock_irq(&rtc_lock); +- for (; count; count--, off++) { ++ for (; count; count--, off++, buf++) { ++ guard(spinlock_irq)(&rtc_lock); + if (off < 128) +- *buf++ = CMOS_READ(off); ++ *buf = CMOS_READ(off); + else if (can_bank2) +- *buf++ = cmos_read_bank2(off); ++ *buf = cmos_read_bank2(off); + else +- break; ++ return -EIO; + } +- spin_unlock_irq(&rtc_lock); + +- return count ? -EIO : 0; ++ return 0; + } + + static int cmos_nvram_write(void *priv, unsigned int off, void *val, +@@ -671,23 +670,23 @@ static int cmos_nvram_write(void *priv, unsigned int off, void *val, + * NVRAM to update, updating checksums is also part of its job. + */ + off += NVRAM_OFFSET; +- spin_lock_irq(&rtc_lock); +- for (; count; count--, off++) { ++ for (; count; count--, off++, buf++) { + /* don't trash RTC registers */ + if (off == cmos->day_alrm + || off == cmos->mon_alrm + || off == cmos->century) +- buf++; +- else if (off < 128) +- CMOS_WRITE(*buf++, off); ++ continue; ++ ++ guard(spinlock_irq)(&rtc_lock); ++ if (off < 128) ++ CMOS_WRITE(*buf, off); + else if (can_bank2) +- cmos_write_bank2(*buf++, off); ++ cmos_write_bank2(*buf, off); + else +- break; ++ return -EIO; + } +- spin_unlock_irq(&rtc_lock); + +- return count ? -EIO : 0; ++ return 0; + } + + /*----------------------------------------------------------------*/ +diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +index 4cd3a3eab6f1c4..cd394d8c9f07f0 100644 +--- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c ++++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +@@ -2493,6 +2493,7 @@ static int complete_v3_hw(struct hisi_sas_cq *cq) + /* update rd_point */ + cq->rd_point = rd_point; + hisi_sas_write32(hisi_hba, COMPL_Q_0_RD_PTR + (0x14 * queue), rd_point); ++ cond_resched(); + + return completed; + } +@@ -3550,6 +3551,11 @@ debugfs_to_reg_name_v3_hw(int off, int base_off, + return NULL; + } + ++static bool debugfs_dump_is_generated_v3_hw(void *p) ++{ ++ return p ? true : false; ++} ++ + static void debugfs_print_reg_v3_hw(u32 *regs_val, struct seq_file *s, + const struct hisi_sas_debugfs_reg *reg) + { +@@ -3575,6 +3581,9 @@ static int debugfs_global_v3_hw_show(struct seq_file *s, void *p) + { + struct hisi_sas_debugfs_regs *global = s->private; + ++ if (!debugfs_dump_is_generated_v3_hw(global->data)) ++ return -EPERM; ++ + debugfs_print_reg_v3_hw(global->data, s, + &debugfs_global_reg); + +@@ -3586,6 +3595,9 @@ static int debugfs_axi_v3_hw_show(struct seq_file *s, void *p) + { + struct hisi_sas_debugfs_regs *axi = s->private; + ++ if (!debugfs_dump_is_generated_v3_hw(axi->data)) ++ return -EPERM; ++ + debugfs_print_reg_v3_hw(axi->data, s, + &debugfs_axi_reg); + +@@ -3597,6 +3609,9 @@ static int debugfs_ras_v3_hw_show(struct seq_file *s, void *p) + { + struct hisi_sas_debugfs_regs *ras = s->private; + ++ if (!debugfs_dump_is_generated_v3_hw(ras->data)) ++ return -EPERM; ++ + debugfs_print_reg_v3_hw(ras->data, s, + &debugfs_ras_reg); + +@@ -3609,6 +3624,9 @@ static int debugfs_port_v3_hw_show(struct seq_file *s, void *p) + struct hisi_sas_debugfs_port *port = s->private; + const struct hisi_sas_debugfs_reg *reg_port = &debugfs_port_reg; + ++ if (!debugfs_dump_is_generated_v3_hw(port->data)) ++ return -EPERM; ++ + debugfs_print_reg_v3_hw(port->data, s, reg_port); + + return 0; +@@ -3664,6 +3682,9 @@ static int debugfs_cq_v3_hw_show(struct seq_file *s, void *p) + struct hisi_sas_debugfs_cq *debugfs_cq = s->private; + int slot; + ++ if (!debugfs_dump_is_generated_v3_hw(debugfs_cq->complete_hdr)) ++ return -EPERM; ++ + for (slot = 0; slot < HISI_SAS_QUEUE_SLOTS; slot++) + debugfs_cq_show_slot_v3_hw(s, slot, debugfs_cq); + +@@ -3685,8 +3706,12 @@ static void debugfs_dq_show_slot_v3_hw(struct seq_file *s, int slot, + + static int debugfs_dq_v3_hw_show(struct seq_file *s, void *p) + { ++ struct hisi_sas_debugfs_dq *debugfs_dq = s->private; + int slot; + ++ if (!debugfs_dump_is_generated_v3_hw(debugfs_dq->hdr)) ++ return -EPERM; ++ + for (slot = 0; slot < HISI_SAS_QUEUE_SLOTS; slot++) + debugfs_dq_show_slot_v3_hw(s, slot, s->private); + +@@ -3700,6 +3725,9 @@ static int debugfs_iost_v3_hw_show(struct seq_file *s, void *p) + struct hisi_sas_iost *iost = debugfs_iost->iost; + int i, max_command_entries = HISI_SAS_MAX_COMMANDS; + ++ if (!debugfs_dump_is_generated_v3_hw(iost)) ++ return -EPERM; ++ + for (i = 0; i < max_command_entries; i++, iost++) { + __le64 *data = &iost->qw0; + +@@ -3719,6 +3747,9 @@ static int debugfs_iost_cache_v3_hw_show(struct seq_file *s, void *p) + int i, tab_idx; + __le64 *iost; + ++ if (!debugfs_dump_is_generated_v3_hw(iost_cache)) ++ return -EPERM; ++ + for (i = 0; i < HISI_SAS_IOST_ITCT_CACHE_NUM; i++, iost_cache++) { + /* + * Data struct of IOST cache: +@@ -3742,6 +3773,9 @@ static int debugfs_itct_v3_hw_show(struct seq_file *s, void *p) + struct hisi_sas_debugfs_itct *debugfs_itct = s->private; + struct hisi_sas_itct *itct = debugfs_itct->itct; + ++ if (!debugfs_dump_is_generated_v3_hw(itct)) ++ return -EPERM; ++ + for (i = 0; i < HISI_SAS_MAX_ITCT_ENTRIES; i++, itct++) { + __le64 *data = &itct->qw0; + +@@ -3761,6 +3795,9 @@ static int debugfs_itct_cache_v3_hw_show(struct seq_file *s, void *p) + int i, tab_idx; + __le64 *itct; + ++ if (!debugfs_dump_is_generated_v3_hw(itct_cache)) ++ return -EPERM; ++ + for (i = 0; i < HISI_SAS_IOST_ITCT_CACHE_NUM; i++, itct_cache++) { + /* + * Data struct of ITCT cache: +@@ -3778,10 +3815,9 @@ static int debugfs_itct_cache_v3_hw_show(struct seq_file *s, void *p) + } + DEFINE_SHOW_ATTRIBUTE(debugfs_itct_cache_v3_hw); + +-static void debugfs_create_files_v3_hw(struct hisi_hba *hisi_hba) ++static void debugfs_create_files_v3_hw(struct hisi_hba *hisi_hba, int index) + { + u64 *debugfs_timestamp; +- int dump_index = hisi_hba->debugfs_dump_index; + struct dentry *dump_dentry; + struct dentry *dentry; + char name[256]; +@@ -3789,17 +3825,17 @@ static void debugfs_create_files_v3_hw(struct hisi_hba *hisi_hba) + int c; + int d; + +- snprintf(name, 256, "%d", dump_index); ++ snprintf(name, 256, "%d", index); + + dump_dentry = debugfs_create_dir(name, hisi_hba->debugfs_dump_dentry); + +- debugfs_timestamp = &hisi_hba->debugfs_timestamp[dump_index]; ++ debugfs_timestamp = &hisi_hba->debugfs_timestamp[index]; + + debugfs_create_u64("timestamp", 0400, dump_dentry, + debugfs_timestamp); + + debugfs_create_file("global", 0400, dump_dentry, +- &hisi_hba->debugfs_regs[dump_index][DEBUGFS_GLOBAL], ++ &hisi_hba->debugfs_regs[index][DEBUGFS_GLOBAL], + &debugfs_global_v3_hw_fops); + + /* Create port dir and files */ +@@ -3808,7 +3844,7 @@ static void debugfs_create_files_v3_hw(struct hisi_hba *hisi_hba) + snprintf(name, 256, "%d", p); + + debugfs_create_file(name, 0400, dentry, +- &hisi_hba->debugfs_port_reg[dump_index][p], ++ &hisi_hba->debugfs_port_reg[index][p], + &debugfs_port_v3_hw_fops); + } + +@@ -3818,7 +3854,7 @@ static void debugfs_create_files_v3_hw(struct hisi_hba *hisi_hba) + snprintf(name, 256, "%d", c); + + debugfs_create_file(name, 0400, dentry, +- &hisi_hba->debugfs_cq[dump_index][c], ++ &hisi_hba->debugfs_cq[index][c], + &debugfs_cq_v3_hw_fops); + } + +@@ -3828,32 +3864,32 @@ static void debugfs_create_files_v3_hw(struct hisi_hba *hisi_hba) + snprintf(name, 256, "%d", d); + + debugfs_create_file(name, 0400, dentry, +- &hisi_hba->debugfs_dq[dump_index][d], ++ &hisi_hba->debugfs_dq[index][d], + &debugfs_dq_v3_hw_fops); + } + + debugfs_create_file("iost", 0400, dump_dentry, +- &hisi_hba->debugfs_iost[dump_index], ++ &hisi_hba->debugfs_iost[index], + &debugfs_iost_v3_hw_fops); + + debugfs_create_file("iost_cache", 0400, dump_dentry, +- &hisi_hba->debugfs_iost_cache[dump_index], ++ &hisi_hba->debugfs_iost_cache[index], + &debugfs_iost_cache_v3_hw_fops); + + debugfs_create_file("itct", 0400, dump_dentry, +- &hisi_hba->debugfs_itct[dump_index], ++ &hisi_hba->debugfs_itct[index], + &debugfs_itct_v3_hw_fops); + + debugfs_create_file("itct_cache", 0400, dump_dentry, +- &hisi_hba->debugfs_itct_cache[dump_index], ++ &hisi_hba->debugfs_itct_cache[index], + &debugfs_itct_cache_v3_hw_fops); + + debugfs_create_file("axi", 0400, dump_dentry, +- &hisi_hba->debugfs_regs[dump_index][DEBUGFS_AXI], ++ &hisi_hba->debugfs_regs[index][DEBUGFS_AXI], + &debugfs_axi_v3_hw_fops); + + debugfs_create_file("ras", 0400, dump_dentry, +- &hisi_hba->debugfs_regs[dump_index][DEBUGFS_RAS], ++ &hisi_hba->debugfs_regs[index][DEBUGFS_RAS], + &debugfs_ras_v3_hw_fops); + } + +@@ -4516,22 +4552,34 @@ static void debugfs_release_v3_hw(struct hisi_hba *hisi_hba, int dump_index) + int i; + + devm_kfree(dev, hisi_hba->debugfs_iost_cache[dump_index].cache); ++ hisi_hba->debugfs_iost_cache[dump_index].cache = NULL; + devm_kfree(dev, hisi_hba->debugfs_itct_cache[dump_index].cache); ++ hisi_hba->debugfs_itct_cache[dump_index].cache = NULL; + devm_kfree(dev, hisi_hba->debugfs_iost[dump_index].iost); ++ hisi_hba->debugfs_iost[dump_index].iost = NULL; + devm_kfree(dev, hisi_hba->debugfs_itct[dump_index].itct); ++ hisi_hba->debugfs_itct[dump_index].itct = NULL; + +- for (i = 0; i < hisi_hba->queue_count; i++) ++ for (i = 0; i < hisi_hba->queue_count; i++) { + devm_kfree(dev, hisi_hba->debugfs_dq[dump_index][i].hdr); ++ hisi_hba->debugfs_dq[dump_index][i].hdr = NULL; ++ } + +- for (i = 0; i < hisi_hba->queue_count; i++) ++ for (i = 0; i < hisi_hba->queue_count; i++) { + devm_kfree(dev, + hisi_hba->debugfs_cq[dump_index][i].complete_hdr); ++ hisi_hba->debugfs_cq[dump_index][i].complete_hdr = NULL; ++ } + +- for (i = 0; i < DEBUGFS_REGS_NUM; i++) ++ for (i = 0; i < DEBUGFS_REGS_NUM; i++) { + devm_kfree(dev, hisi_hba->debugfs_regs[dump_index][i].data); ++ hisi_hba->debugfs_regs[dump_index][i].data = NULL; ++ } + +- for (i = 0; i < hisi_hba->n_phy; i++) ++ for (i = 0; i < hisi_hba->n_phy; i++) { + devm_kfree(dev, hisi_hba->debugfs_port_reg[dump_index][i].data); ++ hisi_hba->debugfs_port_reg[dump_index][i].data = NULL; ++ } + } + + static const struct hisi_sas_debugfs_reg *debugfs_reg_array_v3_hw[DEBUGFS_REGS_NUM] = { +@@ -4658,8 +4706,6 @@ static int debugfs_snapshot_regs_v3_hw(struct hisi_hba *hisi_hba) + debugfs_snapshot_itct_reg_v3_hw(hisi_hba); + debugfs_snapshot_iost_reg_v3_hw(hisi_hba); + +- debugfs_create_files_v3_hw(hisi_hba); +- + debugfs_snapshot_restore_v3_hw(hisi_hba); + hisi_hba->debugfs_dump_index++; + +@@ -4743,6 +4789,17 @@ static void debugfs_bist_init_v3_hw(struct hisi_hba *hisi_hba) + hisi_hba->debugfs_bist_linkrate = SAS_LINK_RATE_1_5_GBPS; + } + ++static void debugfs_dump_init_v3_hw(struct hisi_hba *hisi_hba) ++{ ++ int i; ++ ++ hisi_hba->debugfs_dump_dentry = ++ debugfs_create_dir("dump", hisi_hba->debugfs_dir); ++ ++ for (i = 0; i < hisi_sas_debugfs_dump_count; i++) ++ debugfs_create_files_v3_hw(hisi_hba, i); ++} ++ + static void debugfs_exit_v3_hw(struct hisi_hba *hisi_hba) + { + debugfs_remove_recursive(hisi_hba->debugfs_dir); +@@ -4763,8 +4820,7 @@ static void debugfs_init_v3_hw(struct hisi_hba *hisi_hba) + /* create bist structures */ + debugfs_bist_init_v3_hw(hisi_hba); + +- hisi_hba->debugfs_dump_dentry = +- debugfs_create_dir("dump", hisi_hba->debugfs_dir); ++ debugfs_dump_init_v3_hw(hisi_hba); + + debugfs_phy_down_cnt_init_v3_hw(hisi_hba); + debugfs_fifo_init_v3_hw(hisi_hba); +diff --git a/drivers/scsi/lpfc/lpfc_ct.c b/drivers/scsi/lpfc/lpfc_ct.c +index 134bc96dd13400..ce3a1f42713dd8 100644 +--- a/drivers/scsi/lpfc/lpfc_ct.c ++++ b/drivers/scsi/lpfc/lpfc_ct.c +@@ -2226,6 +2226,11 @@ lpfc_cmpl_ct_disc_fdmi(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb, + ulp_status, ulp_word4, latt); + + if (latt || ulp_status) { ++ lpfc_printf_vlog(vport, KERN_WARNING, LOG_DISCOVERY, ++ "0229 FDMI cmd %04x failed, latt = %d " ++ "ulp_status: (x%x/x%x), sli_flag x%x\n", ++ be16_to_cpu(fdmi_cmd), latt, ulp_status, ++ ulp_word4, phba->sli.sli_flag); + + /* Look for a retryable error */ + if (ulp_status == IOSTAT_LOCAL_REJECT) { +@@ -2234,8 +2239,16 @@ lpfc_cmpl_ct_disc_fdmi(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb, + case IOERR_SLI_DOWN: + /* Driver aborted this IO. No retry as error + * is likely Offline->Online or some adapter +- * error. Recovery will try again. ++ * error. Recovery will try again, but if port ++ * is not active there's no point to continue ++ * issuing follow up FDMI commands. + */ ++ if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { ++ free_ndlp = cmdiocb->ndlp; ++ lpfc_ct_free_iocb(phba, cmdiocb); ++ lpfc_nlp_put(free_ndlp); ++ return; ++ } + break; + case IOERR_ABORT_IN_PROGRESS: + case IOERR_SEQUENCE_TIMEOUT: +@@ -2256,12 +2269,6 @@ lpfc_cmpl_ct_disc_fdmi(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb, + break; + } + } +- +- lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, +- "0229 FDMI cmd %04x latt = %d " +- "ulp_status: x%x, rid x%x\n", +- be16_to_cpu(fdmi_cmd), latt, ulp_status, +- ulp_word4); + } + + free_ndlp = cmdiocb->ndlp; +diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c +index 9241075f72fa4b..6e8d8a96c54fb3 100644 +--- a/drivers/scsi/lpfc/lpfc_hbadisc.c ++++ b/drivers/scsi/lpfc/lpfc_hbadisc.c +@@ -155,6 +155,7 @@ lpfc_dev_loss_tmo_callbk(struct fc_rport *rport) + struct lpfc_hba *phba; + struct lpfc_work_evt *evtp; + unsigned long iflags; ++ bool nvme_reg = false; + + ndlp = ((struct lpfc_rport_data *)rport->dd_data)->pnode; + if (!ndlp) +@@ -177,38 +178,49 @@ lpfc_dev_loss_tmo_callbk(struct fc_rport *rport) + /* Don't schedule a worker thread event if the vport is going down. */ + if (test_bit(FC_UNLOADING, &vport->load_flag) || + !test_bit(HBA_SETUP, &phba->hba_flag)) { ++ + spin_lock_irqsave(&ndlp->lock, iflags); + ndlp->rport = NULL; + ++ if (ndlp->fc4_xpt_flags & NVME_XPT_REGD) ++ nvme_reg = true; ++ + /* The scsi_transport is done with the rport so lpfc cannot +- * call to unregister. Remove the scsi transport reference +- * and clean up the SCSI transport node details. ++ * call to unregister. + */ +- if (ndlp->fc4_xpt_flags & (NLP_XPT_REGD | SCSI_XPT_REGD)) { ++ if (ndlp->fc4_xpt_flags & SCSI_XPT_REGD) { + ndlp->fc4_xpt_flags &= ~SCSI_XPT_REGD; + +- /* NVME transport-registered rports need the +- * NLP_XPT_REGD flag to complete an unregister. ++ /* If NLP_XPT_REGD was cleared in lpfc_nlp_unreg_node, ++ * unregister calls were made to the scsi and nvme ++ * transports and refcnt was already decremented. Clear ++ * the NLP_XPT_REGD flag only if the NVME Rport is ++ * confirmed unregistered. + */ +- if (!(ndlp->fc4_xpt_flags & NVME_XPT_REGD)) ++ if (!nvme_reg && ndlp->fc4_xpt_flags & NLP_XPT_REGD) { + ndlp->fc4_xpt_flags &= ~NLP_XPT_REGD; ++ spin_unlock_irqrestore(&ndlp->lock, iflags); ++ lpfc_nlp_put(ndlp); /* may free ndlp */ ++ } else { ++ spin_unlock_irqrestore(&ndlp->lock, iflags); ++ } ++ } else { + spin_unlock_irqrestore(&ndlp->lock, iflags); +- lpfc_nlp_put(ndlp); +- spin_lock_irqsave(&ndlp->lock, iflags); + } + ++ spin_lock_irqsave(&ndlp->lock, iflags); ++ + /* Only 1 thread can drop the initial node reference. If + * another thread has set NLP_DROPPED, this thread is done. + */ +- if (!(ndlp->fc4_xpt_flags & NVME_XPT_REGD) && +- !(ndlp->nlp_flag & NLP_DROPPED)) { +- ndlp->nlp_flag |= NLP_DROPPED; ++ if (nvme_reg || (ndlp->nlp_flag & NLP_DROPPED)) { + spin_unlock_irqrestore(&ndlp->lock, iflags); +- lpfc_nlp_put(ndlp); + return; + } + ++ ndlp->nlp_flag |= NLP_DROPPED; + spin_unlock_irqrestore(&ndlp->lock, iflags); ++ lpfc_nlp_put(ndlp); + return; + } + +diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c +index 0dd451009b0791..a3658ef1141b26 100644 +--- a/drivers/scsi/lpfc/lpfc_init.c ++++ b/drivers/scsi/lpfc/lpfc_init.c +@@ -13518,6 +13518,8 @@ lpfc_sli4_hba_unset(struct lpfc_hba *phba) + /* Disable FW logging to host memory */ + lpfc_ras_stop_fwlog(phba); + ++ lpfc_sli4_queue_unset(phba); ++ + /* Reset SLI4 HBA FCoE function */ + lpfc_pci_function_reset(phba); + +diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c +index 2ec6e55771b45a..6748fba48a07ed 100644 +--- a/drivers/scsi/lpfc/lpfc_sli.c ++++ b/drivers/scsi/lpfc/lpfc_sli.c +@@ -5291,6 +5291,8 @@ lpfc_sli_brdrestart_s4(struct lpfc_hba *phba) + "0296 Restart HBA Data: x%x x%x\n", + phba->pport->port_state, psli->sli_flag); + ++ lpfc_sli4_queue_unset(phba); ++ + rc = lpfc_sli4_brdreset(phba); + if (rc) { + phba->link_state = LPFC_HBA_ERROR; +@@ -17625,6 +17627,9 @@ lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq) + if (!eq) + return -ENODEV; + ++ if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) ++ goto list_remove; ++ + mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL); + if (!mbox) + return -ENOMEM; +@@ -17651,10 +17656,12 @@ lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq) + shdr_status, shdr_add_status, rc); + status = -ENXIO; + } ++ mempool_free(mbox, eq->phba->mbox_mem_pool); + ++list_remove: + /* Remove eq from any list */ + list_del_init(&eq->list); +- mempool_free(mbox, eq->phba->mbox_mem_pool); ++ + return status; + } + +@@ -17682,6 +17689,10 @@ lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq) + /* sanity check on queue memory */ + if (!cq) + return -ENODEV; ++ ++ if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) ++ goto list_remove; ++ + mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL); + if (!mbox) + return -ENOMEM; +@@ -17707,9 +17718,11 @@ lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq) + shdr_status, shdr_add_status, rc); + status = -ENXIO; + } ++ mempool_free(mbox, cq->phba->mbox_mem_pool); ++ ++list_remove: + /* Remove cq from any list */ + list_del_init(&cq->list); +- mempool_free(mbox, cq->phba->mbox_mem_pool); + return status; + } + +@@ -17737,6 +17750,10 @@ lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq) + /* sanity check on queue memory */ + if (!mq) + return -ENODEV; ++ ++ if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) ++ goto list_remove; ++ + mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL); + if (!mbox) + return -ENOMEM; +@@ -17762,9 +17779,11 @@ lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq) + shdr_status, shdr_add_status, rc); + status = -ENXIO; + } ++ mempool_free(mbox, mq->phba->mbox_mem_pool); ++ ++list_remove: + /* Remove mq from any list */ + list_del_init(&mq->list); +- mempool_free(mbox, mq->phba->mbox_mem_pool); + return status; + } + +@@ -17792,6 +17811,10 @@ lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq) + /* sanity check on queue memory */ + if (!wq) + return -ENODEV; ++ ++ if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) ++ goto list_remove; ++ + mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL); + if (!mbox) + return -ENOMEM; +@@ -17816,11 +17839,13 @@ lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq) + shdr_status, shdr_add_status, rc); + status = -ENXIO; + } ++ mempool_free(mbox, wq->phba->mbox_mem_pool); ++ ++list_remove: + /* Remove wq from any list */ + list_del_init(&wq->list); + kfree(wq->pring); + wq->pring = NULL; +- mempool_free(mbox, wq->phba->mbox_mem_pool); + return status; + } + +@@ -17850,6 +17875,10 @@ lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq, + /* sanity check on queue memory */ + if (!hrq || !drq) + return -ENODEV; ++ ++ if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) ++ goto list_remove; ++ + mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL); + if (!mbox) + return -ENOMEM; +@@ -17890,9 +17919,11 @@ lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq, + shdr_status, shdr_add_status, rc); + status = -ENXIO; + } ++ mempool_free(mbox, hrq->phba->mbox_mem_pool); ++ ++list_remove: + list_del_init(&hrq->list); + list_del_init(&drq->list); +- mempool_free(mbox, hrq->phba->mbox_mem_pool); + return status; + } + +diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c +index 2810608acd963a..e6ece30c43486c 100644 +--- a/drivers/scsi/qla2xxx/qla_attr.c ++++ b/drivers/scsi/qla2xxx/qla_attr.c +@@ -3304,6 +3304,7 @@ struct fc_function_template qla2xxx_transport_vport_functions = { + .show_host_node_name = 1, + .show_host_port_name = 1, + .show_host_supported_classes = 1, ++ .show_host_supported_speeds = 1, + + .get_host_port_id = qla2x00_get_host_port_id, + .show_host_port_id = 1, +diff --git a/drivers/scsi/qla2xxx/qla_bsg.c b/drivers/scsi/qla2xxx/qla_bsg.c +index 52dc9604f56746..10431a67d202bb 100644 +--- a/drivers/scsi/qla2xxx/qla_bsg.c ++++ b/drivers/scsi/qla2xxx/qla_bsg.c +@@ -24,6 +24,7 @@ void qla2x00_bsg_job_done(srb_t *sp, int res) + { + struct bsg_job *bsg_job = sp->u.bsg_job; + struct fc_bsg_reply *bsg_reply = bsg_job->reply; ++ struct completion *comp = sp->comp; + + ql_dbg(ql_dbg_user, sp->vha, 0x7009, + "%s: sp hdl %x, result=%x bsg ptr %p\n", +@@ -35,6 +36,9 @@ void qla2x00_bsg_job_done(srb_t *sp, int res) + bsg_reply->result = res; + bsg_job_done(bsg_job, bsg_reply->result, + bsg_reply->reply_payload_rcv_len); ++ ++ if (comp) ++ complete(comp); + } + + void qla2x00_bsg_sp_free(srb_t *sp) +@@ -490,16 +494,6 @@ qla2x00_process_ct(struct bsg_job *bsg_job) + goto done; + } + +- if ((req_sg_cnt != bsg_job->request_payload.sg_cnt) || +- (rsp_sg_cnt != bsg_job->reply_payload.sg_cnt)) { +- ql_log(ql_log_warn, vha, 0x7011, +- "request_sg_cnt: %x dma_request_sg_cnt: %x reply_sg_cnt:%x " +- "dma_reply_sg_cnt: %x\n", bsg_job->request_payload.sg_cnt, +- req_sg_cnt, bsg_job->reply_payload.sg_cnt, rsp_sg_cnt); +- rval = -EAGAIN; +- goto done_unmap_sg; +- } +- + if (!vha->flags.online) { + ql_log(ql_log_warn, vha, 0x7012, + "Host is not online.\n"); +@@ -3061,7 +3055,7 @@ qla24xx_bsg_request(struct bsg_job *bsg_job) + + static bool qla_bsg_found(struct qla_qpair *qpair, struct bsg_job *bsg_job) + { +- bool found = false; ++ bool found, do_bsg_done; + struct fc_bsg_reply *bsg_reply = bsg_job->reply; + scsi_qla_host_t *vha = shost_priv(fc_bsg_to_shost(bsg_job)); + struct qla_hw_data *ha = vha->hw; +@@ -3069,6 +3063,11 @@ static bool qla_bsg_found(struct qla_qpair *qpair, struct bsg_job *bsg_job) + int cnt; + unsigned long flags; + struct req_que *req; ++ int rval; ++ DECLARE_COMPLETION_ONSTACK(comp); ++ uint32_t ratov_j; ++ ++ found = do_bsg_done = false; + + spin_lock_irqsave(qpair->qp_lock_ptr, flags); + req = qpair->req; +@@ -3080,42 +3079,104 @@ static bool qla_bsg_found(struct qla_qpair *qpair, struct bsg_job *bsg_job) + sp->type == SRB_ELS_CMD_HST || + sp->type == SRB_ELS_CMD_HST_NOLOGIN) && + sp->u.bsg_job == bsg_job) { +- req->outstanding_cmds[cnt] = NULL; +- spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); +- +- if (!ha->flags.eeh_busy && ha->isp_ops->abort_command(sp)) { +- ql_log(ql_log_warn, vha, 0x7089, +- "mbx abort_command failed.\n"); +- bsg_reply->result = -EIO; +- } else { +- ql_dbg(ql_dbg_user, vha, 0x708a, +- "mbx abort_command success.\n"); +- bsg_reply->result = 0; +- } +- /* ref: INIT */ +- kref_put(&sp->cmd_kref, qla2x00_sp_release); + + found = true; +- goto done; ++ sp->comp = ∁ ++ break; + } + } + spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); + +-done: +- return found; ++ if (!found) ++ return false; ++ ++ if (ha->flags.eeh_busy) { ++ /* skip over abort. EEH handling will return the bsg. Wait for it */ ++ rval = QLA_SUCCESS; ++ ql_dbg(ql_dbg_user, vha, 0x802c, ++ "eeh encounter. bsg %p sp=%p handle=%x \n", ++ bsg_job, sp, sp->handle); ++ } else { ++ rval = ha->isp_ops->abort_command(sp); ++ ql_dbg(ql_dbg_user, vha, 0x802c, ++ "Aborting bsg %p sp=%p handle=%x rval=%x\n", ++ bsg_job, sp, sp->handle, rval); ++ } ++ ++ switch (rval) { ++ case QLA_SUCCESS: ++ /* Wait for the command completion. */ ++ ratov_j = ha->r_a_tov / 10 * 4 * 1000; ++ ratov_j = msecs_to_jiffies(ratov_j); ++ ++ if (!wait_for_completion_timeout(&comp, ratov_j)) { ++ ql_log(ql_log_info, vha, 0x7089, ++ "bsg abort timeout. bsg=%p sp=%p handle %#x .\n", ++ bsg_job, sp, sp->handle); ++ ++ do_bsg_done = true; ++ } else { ++ /* fw had returned the bsg */ ++ ql_dbg(ql_dbg_user, vha, 0x708a, ++ "bsg abort success. bsg %p sp=%p handle=%#x\n", ++ bsg_job, sp, sp->handle); ++ do_bsg_done = false; ++ } ++ break; ++ default: ++ ql_log(ql_log_info, vha, 0x704f, ++ "bsg abort fail. bsg=%p sp=%p rval=%x.\n", ++ bsg_job, sp, rval); ++ ++ do_bsg_done = true; ++ break; ++ } ++ ++ if (!do_bsg_done) ++ return true; ++ ++ spin_lock_irqsave(qpair->qp_lock_ptr, flags); ++ /* ++ * recheck to make sure it's still the same bsg_job due to ++ * qp_lock_ptr was released earlier. ++ */ ++ if (req->outstanding_cmds[cnt] && ++ req->outstanding_cmds[cnt]->u.bsg_job != bsg_job) { ++ /* fw had returned the bsg */ ++ spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); ++ return true; ++ } ++ req->outstanding_cmds[cnt] = NULL; ++ spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); ++ ++ /* ref: INIT */ ++ sp->comp = NULL; ++ kref_put(&sp->cmd_kref, qla2x00_sp_release); ++ bsg_reply->result = -ENXIO; ++ bsg_reply->reply_payload_rcv_len = 0; ++ ++ ql_dbg(ql_dbg_user, vha, 0x7051, ++ "%s bsg_job_done : bsg %p result %#x sp %p.\n", ++ __func__, bsg_job, bsg_reply->result, sp); ++ ++ bsg_job_done(bsg_job, bsg_reply->result, bsg_reply->reply_payload_rcv_len); ++ ++ return true; + } + + int + qla24xx_bsg_timeout(struct bsg_job *bsg_job) + { +- struct fc_bsg_reply *bsg_reply = bsg_job->reply; ++ struct fc_bsg_request *bsg_request = bsg_job->request; + scsi_qla_host_t *vha = shost_priv(fc_bsg_to_shost(bsg_job)); + struct qla_hw_data *ha = vha->hw; + int i; + struct qla_qpair *qpair; + +- ql_log(ql_log_info, vha, 0x708b, "%s CMD timeout. bsg ptr %p.\n", +- __func__, bsg_job); ++ ql_log(ql_log_info, vha, 0x708b, ++ "%s CMD timeout. bsg ptr %p msgcode %x vendor cmd %x\n", ++ __func__, bsg_job, bsg_request->msgcode, ++ bsg_request->rqst_data.h_vendor.vendor_cmd[0]); + + if (qla2x00_isp_reg_stat(ha)) { + ql_log(ql_log_info, vha, 0x9007, +@@ -3136,7 +3197,6 @@ qla24xx_bsg_timeout(struct bsg_job *bsg_job) + } + + ql_log(ql_log_info, vha, 0x708b, "SRB not found to abort.\n"); +- bsg_reply->result = -ENXIO; + + done: + return 0; +diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c +index 76703f2706b8e3..79879c4743e6dc 100644 +--- a/drivers/scsi/qla2xxx/qla_mid.c ++++ b/drivers/scsi/qla2xxx/qla_mid.c +@@ -506,6 +506,7 @@ qla24xx_create_vhost(struct fc_vport *fc_vport) + return(NULL); + } + ++ vha->irq_offset = QLA_BASE_VECTORS; + host = vha->host; + fc_vport->dd_data = vha; + /* New host info */ +diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c +index 7f980e6141c282..7ab717ed72327e 100644 +--- a/drivers/scsi/qla2xxx/qla_os.c ++++ b/drivers/scsi/qla2xxx/qla_os.c +@@ -6902,12 +6902,15 @@ qla2x00_do_dpc(void *data) + set_user_nice(current, MIN_NICE); + + set_current_state(TASK_INTERRUPTIBLE); +- while (!kthread_should_stop()) { ++ while (1) { + ql_dbg(ql_dbg_dpc, base_vha, 0x4000, + "DPC handler sleeping.\n"); + + schedule(); + ++ if (kthread_should_stop()) ++ break; ++ + if (test_and_clear_bit(DO_EEH_RECOVERY, &base_vha->dpc_flags)) + qla_pci_set_eeh_busy(base_vha); + +@@ -6920,15 +6923,16 @@ qla2x00_do_dpc(void *data) + goto end_loop; + } + ++ if (test_bit(UNLOADING, &base_vha->dpc_flags)) ++ /* don't do any work. Wait to be terminated by kthread_stop */ ++ goto end_loop; ++ + ha->dpc_active = 1; + + ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001, + "DPC handler waking up, dpc_flags=0x%lx.\n", + base_vha->dpc_flags); + +- if (test_bit(UNLOADING, &base_vha->dpc_flags)) +- break; +- + if (IS_P3P_TYPE(ha)) { + if (IS_QLA8044(ha)) { + if (test_and_clear_bit(ISP_UNRECOVERABLE, +@@ -7241,9 +7245,6 @@ qla2x00_do_dpc(void *data) + */ + ha->dpc_active = 0; + +- /* Cleanup any residual CTX SRBs. */ +- qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); +- + return 0; + } + +diff --git a/drivers/scsi/scsi_debug.c b/drivers/scsi/scsi_debug.c +index b52513eeeafa75..680ba180a67252 100644 +--- a/drivers/scsi/scsi_debug.c ++++ b/drivers/scsi/scsi_debug.c +@@ -6447,7 +6447,7 @@ static int schedule_resp(struct scsi_cmnd *cmnd, struct sdebug_dev_info *devip, + } + sd_dp = &sqcp->sd_dp; + +- if (polled) ++ if (polled || (ndelay > 0 && ndelay < INCLUSIVE_TIMING_MAX_NS)) + ns_from_boot = ktime_get_boottime_ns(); + + /* one of the resp_*() response functions is called here */ +diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c +index 84334ab39c8107..94127868bedf8a 100644 +--- a/drivers/scsi/sg.c ++++ b/drivers/scsi/sg.c +@@ -386,7 +386,6 @@ sg_release(struct inode *inode, struct file *filp) + SCSI_LOG_TIMEOUT(3, sg_printk(KERN_INFO, sdp, "sg_release\n")); + + mutex_lock(&sdp->open_rel_lock); +- kref_put(&sfp->f_ref, sg_remove_sfp); + sdp->open_cnt--; + + /* possibly many open()s waiting on exlude clearing, start many; +@@ -398,6 +397,7 @@ sg_release(struct inode *inode, struct file *filp) + wake_up_interruptible(&sdp->open_wait); + } + mutex_unlock(&sdp->open_rel_lock); ++ kref_put(&sfp->f_ref, sg_remove_sfp); + return 0; + } + +diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c +index beb88f25dbb993..c9038284bc893d 100644 +--- a/drivers/scsi/st.c ++++ b/drivers/scsi/st.c +@@ -3506,6 +3506,7 @@ static long st_ioctl(struct file *file, unsigned int cmd_in, unsigned long arg) + int i, cmd_nr, cmd_type, bt; + int retval = 0; + unsigned int blk; ++ bool cmd_mtiocget; + struct scsi_tape *STp = file->private_data; + struct st_modedef *STm; + struct st_partstat *STps; +@@ -3619,6 +3620,7 @@ static long st_ioctl(struct file *file, unsigned int cmd_in, unsigned long arg) + */ + if (mtc.mt_op != MTREW && + mtc.mt_op != MTOFFL && ++ mtc.mt_op != MTLOAD && + mtc.mt_op != MTRETEN && + mtc.mt_op != MTERASE && + mtc.mt_op != MTSEEK && +@@ -3732,17 +3734,28 @@ static long st_ioctl(struct file *file, unsigned int cmd_in, unsigned long arg) + goto out; + } + ++ cmd_mtiocget = cmd_type == _IOC_TYPE(MTIOCGET) && cmd_nr == _IOC_NR(MTIOCGET); ++ + if ((i = flush_buffer(STp, 0)) < 0) { +- retval = i; +- goto out; +- } +- if (STp->can_partitions && +- (i = switch_partition(STp)) < 0) { +- retval = i; +- goto out; ++ if (cmd_mtiocget && STp->pos_unknown) { ++ /* flush fails -> modify status accordingly */ ++ reset_state(STp); ++ STp->pos_unknown = 1; ++ } else { /* return error */ ++ retval = i; ++ goto out; ++ } ++ } else { /* flush_buffer succeeds */ ++ if (STp->can_partitions) { ++ i = switch_partition(STp); ++ if (i < 0) { ++ retval = i; ++ goto out; ++ } ++ } + } + +- if (cmd_type == _IOC_TYPE(MTIOCGET) && cmd_nr == _IOC_NR(MTIOCGET)) { ++ if (cmd_mtiocget) { + struct mtget mt_status; + + if (_IOC_SIZE(cmd_in) != sizeof(struct mtget)) { +@@ -3756,7 +3769,7 @@ static long st_ioctl(struct file *file, unsigned int cmd_in, unsigned long arg) + ((STp->density << MT_ST_DENSITY_SHIFT) & MT_ST_DENSITY_MASK); + mt_status.mt_blkno = STps->drv_block; + mt_status.mt_fileno = STps->drv_file; +- if (STp->block_size != 0) { ++ if (STp->block_size != 0 && mt_status.mt_blkno >= 0) { + if (STps->rw == ST_WRITING) + mt_status.mt_blkno += + (STp->buffer)->buffer_bytes / STp->block_size; +diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c +index fe111bae38c8e1..5ea8887828c064 100644 +--- a/drivers/soc/imx/soc-imx8m.c ++++ b/drivers/soc/imx/soc-imx8m.c +@@ -30,7 +30,7 @@ + + struct imx8_soc_data { + char *name; +- u32 (*soc_revision)(void); ++ int (*soc_revision)(u32 *socrev); + }; + + static u64 soc_uid; +@@ -51,24 +51,29 @@ static u32 imx8mq_soc_revision_from_atf(void) + static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; }; + #endif + +-static u32 __init imx8mq_soc_revision(void) ++static int imx8mq_soc_revision(u32 *socrev) + { + struct device_node *np; + void __iomem *ocotp_base; + u32 magic; + u32 rev; + struct clk *clk; ++ int ret; + + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp"); + if (!np) +- return 0; ++ return -EINVAL; + + ocotp_base = of_iomap(np, 0); +- WARN_ON(!ocotp_base); ++ if (!ocotp_base) { ++ ret = -EINVAL; ++ goto err_iomap; ++ } ++ + clk = of_clk_get_by_name(np, NULL); + if (IS_ERR(clk)) { +- WARN_ON(IS_ERR(clk)); +- return 0; ++ ret = PTR_ERR(clk); ++ goto err_clk; + } + + clk_prepare_enable(clk); +@@ -88,32 +93,45 @@ static u32 __init imx8mq_soc_revision(void) + soc_uid <<= 32; + soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW); + ++ *socrev = rev; ++ + clk_disable_unprepare(clk); + clk_put(clk); + iounmap(ocotp_base); + of_node_put(np); + +- return rev; ++ return 0; ++ ++err_clk: ++ iounmap(ocotp_base); ++err_iomap: ++ of_node_put(np); ++ return ret; + } + +-static void __init imx8mm_soc_uid(void) ++static int imx8mm_soc_uid(void) + { + void __iomem *ocotp_base; + struct device_node *np; + struct clk *clk; ++ int ret = 0; + u32 offset = of_machine_is_compatible("fsl,imx8mp") ? + IMX8MP_OCOTP_UID_OFFSET : 0; + + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp"); + if (!np) +- return; ++ return -EINVAL; + + ocotp_base = of_iomap(np, 0); +- WARN_ON(!ocotp_base); ++ if (!ocotp_base) { ++ ret = -EINVAL; ++ goto err_iomap; ++ } ++ + clk = of_clk_get_by_name(np, NULL); + if (IS_ERR(clk)) { +- WARN_ON(IS_ERR(clk)); +- return; ++ ret = PTR_ERR(clk); ++ goto err_clk; + } + + clk_prepare_enable(clk); +@@ -124,31 +142,41 @@ static void __init imx8mm_soc_uid(void) + + clk_disable_unprepare(clk); + clk_put(clk); ++ ++err_clk: + iounmap(ocotp_base); ++err_iomap: + of_node_put(np); ++ ++ return ret; + } + +-static u32 __init imx8mm_soc_revision(void) ++static int imx8mm_soc_revision(u32 *socrev) + { + struct device_node *np; + void __iomem *anatop_base; +- u32 rev; ++ int ret; + + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop"); + if (!np) +- return 0; ++ return -EINVAL; + + anatop_base = of_iomap(np, 0); +- WARN_ON(!anatop_base); ++ if (!anatop_base) { ++ ret = -EINVAL; ++ goto err_iomap; ++ } + +- rev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM); ++ *socrev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM); + + iounmap(anatop_base); + of_node_put(np); + +- imx8mm_soc_uid(); ++ return imx8mm_soc_uid(); + +- return rev; ++err_iomap: ++ of_node_put(np); ++ return ret; + } + + static const struct imx8_soc_data imx8mq_soc_data = { +@@ -184,7 +212,7 @@ static __maybe_unused const struct of_device_id imx8_soc_match[] = { + kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \ + "unknown" + +-static int __init imx8_soc_init(void) ++static int imx8m_soc_probe(struct platform_device *pdev) + { + struct soc_device_attribute *soc_dev_attr; + struct soc_device *soc_dev; +@@ -212,8 +240,11 @@ static int __init imx8_soc_init(void) + data = id->data; + if (data) { + soc_dev_attr->soc_id = data->name; +- if (data->soc_revision) +- soc_rev = data->soc_revision(); ++ if (data->soc_revision) { ++ ret = data->soc_revision(&soc_rev); ++ if (ret) ++ goto free_soc; ++ } + } + + soc_dev_attr->revision = imx8_revision(soc_rev); +@@ -251,6 +282,38 @@ static int __init imx8_soc_init(void) + kfree(soc_dev_attr); + return ret; + } ++ ++static struct platform_driver imx8m_soc_driver = { ++ .probe = imx8m_soc_probe, ++ .driver = { ++ .name = "imx8m-soc", ++ }, ++}; ++ ++static int __init imx8_soc_init(void) ++{ ++ struct platform_device *pdev; ++ int ret; ++ ++ /* No match means this is non-i.MX8M hardware, do nothing. */ ++ if (!of_match_node(imx8_soc_match, of_root)) ++ return 0; ++ ++ ret = platform_driver_register(&imx8m_soc_driver); ++ if (ret) { ++ pr_err("Failed to register imx8m-soc platform driver: %d\n", ret); ++ return ret; ++ } ++ ++ pdev = platform_device_register_simple("imx8m-soc", -1, NULL, 0); ++ if (IS_ERR(pdev)) { ++ pr_err("Failed to register imx8m-soc platform device: %ld\n", PTR_ERR(pdev)); ++ platform_driver_unregister(&imx8m_soc_driver); ++ return PTR_ERR(pdev); ++ } ++ ++ return 0; ++} + device_initcall(imx8_soc_init); + MODULE_DESCRIPTION("NXP i.MX8M SoC driver"); + MODULE_LICENSE("GPL"); +diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c +index 28bcc65e91beb3..a470285f54a875 100644 +--- a/drivers/soc/qcom/llcc-qcom.c ++++ b/drivers/soc/qcom/llcc-qcom.c +@@ -153,325 +153,2431 @@ enum llcc_reg_offset { + }; + + static const struct llcc_slice_config sa8775p_data[] = { +- {LLCC_CPUSS, 1, 2048, 1, 0, 0x00FF, 0x0, 0, 0, 0, 1, 1, 0, 0}, +- {LLCC_VIDSC0, 2, 512, 3, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_CPUSS1, 3, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_CPUHWT, 5, 512, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_AUDIO, 6, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CMPT, 10, 4096, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_GPUHTW, 11, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_GPU, 12, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 1, 0}, +- {LLCC_MMUHWT, 13, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 1, 0, 0}, +- {LLCC_CMPTDMA, 15, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_DISP, 16, 4096, 2, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_VIDFW, 17, 3072, 1, 0, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_AUDHW, 22, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CVP, 28, 256, 3, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xF0, 1, 0, 0, 1, 0, 0, 0}, +- {LLCC_WRCACHE, 31, 512, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 1, 0, 0}, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 2048, ++ .priority = 1, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CPUSS1, ++ .slice_id = 3, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CPUHWT, ++ .slice_id = 5, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 4096, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .write_scid_en = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 13, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CMPTDMA, ++ .slice_id = 15, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 4096, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_VIDFW, ++ .slice_id = 17, ++ .max_cap = 3072, ++ .priority = 1, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CVP, ++ .slice_id = 28, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 1024, ++ .priority = 3, ++ .fixed_size = true, ++ .res_ways = 0xf0, ++ .cache_mode = 1, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, + }; + + static const struct llcc_slice_config sc7180_data[] = { +- { LLCC_CPUSS, 1, 256, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 1 }, +- { LLCC_MDM, 8, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_GPUHTW, 11, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_GPU, 12, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 256, ++ .priority = 1, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MDM, ++ .slice_id = 8, ++ .max_cap = 128, ++ .priority = 1, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 128, ++ .priority = 1, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 128, ++ .priority = 1, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, + }; + + static const struct llcc_slice_config sc7280_data[] = { +- { LLCC_CPUSS, 1, 768, 1, 0, 0x3f, 0x0, 0, 0, 0, 1, 1, 0}, +- { LLCC_MDMHPGRW, 7, 512, 2, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0}, +- { LLCC_CMPT, 10, 768, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0}, +- { LLCC_GPUHTW, 11, 256, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0}, +- { LLCC_GPU, 12, 512, 1, 0, 0x3f, 0x0, 0, 0, 0, 1, 0, 0}, +- { LLCC_MMUHWT, 13, 256, 1, 1, 0x3f, 0x0, 0, 0, 0, 0, 1, 0}, +- { LLCC_MDMPNG, 21, 768, 0, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0}, +- { LLCC_WLHW, 24, 256, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0}, +- { LLCC_MODPE, 29, 64, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0}, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 768, ++ .priority = 1, ++ .bonus_ways = 0x3f, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 7, ++ .max_cap = 512, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0x3f, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 768, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0x3f, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0x3f, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 512, ++ .priority = 1, ++ .bonus_ways = 0x3f, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 13, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0x3f, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 21, ++ .max_cap = 768, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0x3f, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WLHW, ++ .slice_id = 24, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0x3f, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 64, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0x3f, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, + }; + + static const struct llcc_slice_config sc8180x_data[] = { +- { LLCC_CPUSS, 1, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1 }, +- { LLCC_VIDSC0, 2, 512, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_VIDSC1, 3, 512, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MDMHPGRW, 7, 3072, 1, 1, 0x3ff, 0xc00, 0, 0, 0, 1, 0 }, +- { LLCC_MDM, 8, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_CMPT, 10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_GPU, 12, 5120, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1 }, +- { LLCC_CMPTDMA, 15, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_VIDFW, 17, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MDMHPFX, 20, 1024, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MDMPNG, 21, 1024, 0, 1, 0xc, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_NPU, 23, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_WLHW, 24, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MODPE, 29, 512, 1, 1, 0xc, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_APTCM, 30, 512, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0 }, +- { LLCC_WRCACHE, 31, 128, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0 }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_VIDSC1, ++ .slice_id = 3, ++ .max_cap = 512, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 7, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0x3ff, ++ .res_ways = 0xc00, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDM, ++ .slice_id = 8, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODHW, ++ .slice_id = 9, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 5120, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 13, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CMPTDMA, ++ .slice_id = 15, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_VIDFW, ++ .slice_id = 17, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMHPFX, ++ .slice_id = 20, ++ .max_cap = 1024, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 21, ++ .max_cap = 1024, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0xc, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_NPU, ++ .slice_id = 23, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WLHW, ++ .slice_id = 24, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xc, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .res_ways = 0x1, ++ .cache_mode = 1, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 128, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, + }; + + static const struct llcc_slice_config sc8280xp_data[] = { +- { LLCC_CPUSS, 1, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 }, +- { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 }, +- { LLCC_CMPT, 10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 }, +- { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_GPU, 12, 4096, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 }, +- { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_AUDHW, 22, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_ECC, 26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 }, +- { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 4096, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .write_scid_en = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 13, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 2048, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_ECC, ++ .slice_id = 26, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CVP, ++ .slice_id = 28, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 1024, ++ .priority = 3, ++ .fixed_size = true, ++ .res_ways = 0x1, ++ .cache_mode = 1, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CVPFW, ++ .slice_id = 17, ++ .max_cap = 512, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CPUSS1, ++ .slice_id = 3, ++ .max_cap = 2048, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CPUHWT, ++ .slice_id = 5, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, + }; + +-static const struct llcc_slice_config sdm845_data[] = { +- { LLCC_CPUSS, 1, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 1 }, +- { LLCC_VIDSC0, 2, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 }, +- { LLCC_VIDSC1, 3, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 }, +- { LLCC_ROTATOR, 4, 563, 2, 1, 0x0, 0x00e, 2, 0, 1, 1, 0 }, +- { LLCC_VOICE, 5, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, +- { LLCC_AUDIO, 6, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, +- { LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xfc, 0xf00, 0, 0, 1, 1, 0 }, +- { LLCC_MDM, 8, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, +- { LLCC_CMPT, 10, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, +- { LLCC_GPUHTW, 11, 512, 1, 1, 0xc, 0x0, 0, 0, 1, 1, 0 }, +- { LLCC_GPU, 12, 2304, 1, 0, 0xff0, 0x2, 0, 0, 1, 1, 0 }, +- { LLCC_MMUHWT, 13, 256, 2, 0, 0x0, 0x1, 0, 0, 1, 0, 1 }, +- { LLCC_CMPTDMA, 15, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, +- { LLCC_DISP, 16, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, +- { LLCC_VIDFW, 17, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 }, +- { LLCC_MDMHPFX, 20, 1024, 2, 1, 0x0, 0xf00, 0, 0, 1, 1, 0 }, +- { LLCC_MDMPNG, 21, 1024, 0, 1, 0x1e, 0x0, 0, 0, 1, 1, 0 }, +- { LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0 }, ++static const struct llcc_slice_config sdm845_data[] = {{ ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 2816, ++ .priority = 1, ++ .bonus_ways = 0xffc, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 2, ++ .fixed_size = true, ++ .res_ways = 0xf0, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_VIDSC1, ++ .slice_id = 3, ++ .max_cap = 512, ++ .priority = 2, ++ .fixed_size = true, ++ .res_ways = 0xf0, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_ROTATOR, ++ .slice_id = 4, ++ .max_cap = 563, ++ .priority = 2, ++ .fixed_size = true, ++ .res_ways = 0xe, ++ .cache_mode = 2, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_VOICE, ++ .slice_id = 5, ++ .max_cap = 2816, ++ .priority = 1, ++ .bonus_ways = 0xffc, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 2816, ++ .priority = 1, ++ .bonus_ways = 0xffc, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 7, ++ .max_cap = 1024, ++ .priority = 2, ++ .bonus_ways = 0xfc, ++ .res_ways = 0xf00, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDM, ++ .slice_id = 8, ++ .max_cap = 2816, ++ .priority = 1, ++ .bonus_ways = 0xffc, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 2816, ++ .priority = 1, ++ .bonus_ways = 0xffc, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xc, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 2304, ++ .priority = 1, ++ .bonus_ways = 0xff0, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 13, ++ .max_cap = 256, ++ .priority = 2, ++ .res_ways = 0x1, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CMPTDMA, ++ .slice_id = 15, ++ .max_cap = 2816, ++ .priority = 1, ++ .bonus_ways = 0xffc, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 2816, ++ .priority = 1, ++ .bonus_ways = 0xffc, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_VIDFW, ++ .slice_id = 17, ++ .max_cap = 2816, ++ .priority = 1, ++ .bonus_ways = 0xffc, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMHPFX, ++ .slice_id = 20, ++ .max_cap = 1024, ++ .priority = 2, ++ .fixed_size = true, ++ .res_ways = 0xf00, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 21, ++ .max_cap = 1024, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0x1e, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffc, ++ .res_ways = 0x2, ++ .cache_mode = 0, ++ .dis_cap_alloc = true, ++ .retain_on_pc = true, ++ }, + }; + + static const struct llcc_slice_config sm6350_data[] = { +- { LLCC_CPUSS, 1, 768, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 1 }, +- { LLCC_MDM, 8, 512, 2, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_GPUHTW, 11, 256, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_GPU, 12, 512, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_MDMPNG, 21, 768, 0, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_NPU, 23, 768, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_MODPE, 29, 64, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 768, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ .write_scid_en = true, ++ }, { ++ .usecase_id = LLCC_MDM, ++ .slice_id = 8, ++ .max_cap = 512, ++ .priority = 2, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 256, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 512, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 21, ++ .max_cap = 768, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_NPU, ++ .slice_id = 23, ++ .max_cap = 768, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 64, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, + }; + + static const struct llcc_slice_config sm7150_data[] = { +- { LLCC_CPUSS, 1, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 1 }, +- { LLCC_MDM, 8, 128, 2, 0, 0xF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_GPUHTW, 11, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_GPU, 12, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_NPU, 23, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 0 }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 512, ++ .priority = 1, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MDM, ++ .slice_id = 8, ++ .max_cap = 128, ++ .priority = 2, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_NPU, ++ .slice_id = 23, ++ .max_cap = 512, ++ .priority = 1, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, + }; + + static const struct llcc_slice_config sm8150_data[] = { +- { LLCC_CPUSS, 1, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 1 }, +- { LLCC_VIDSC0, 2, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_VIDSC1, 3, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_AUDIO, 6, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MDMHPGRW, 7, 3072, 1, 0, 0xFF, 0xF00, 0, 0, 0, 1, 0 }, +- { LLCC_MDM, 8, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MODHW, 9, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_CMPT, 10, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_GPUHTW , 11, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_GPU, 12, 2560, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MMUHWT, 13, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1 }, +- { LLCC_CMPTDMA, 15, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_DISP, 16, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MDMHPFX, 20, 1024, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MDMHPFX, 21, 1024, 0, 1, 0xF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_AUDHW, 22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_NPU, 23, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_WLHW, 24, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_MODPE, 29, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 }, +- { LLCC_APTCM, 30, 256, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0 }, +- { LLCC_WRCACHE, 31, 128, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0 }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_VIDSC1, ++ .slice_id = 3, ++ .max_cap = 512, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 7, ++ .max_cap = 3072, ++ .priority = 1, ++ .bonus_ways = 0xff, ++ .res_ways = 0xf00, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDM, ++ .slice_id = 8, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODHW, ++ .slice_id = 9, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 2560, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 13, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CMPTDMA, ++ .slice_id = 15, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMHPFX, ++ .slice_id = 20, ++ .max_cap = 1024, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMHPFX, ++ .slice_id = 21, ++ .max_cap = 1024, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_NPU, ++ .slice_id = 23, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WLHW, ++ .slice_id = 24, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .res_ways = 0x1, ++ .cache_mode = 1, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 128, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, + }; + + static const struct llcc_slice_config sm8250_data[] = { +- { LLCC_CPUSS, 1, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 }, +- { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_AUDIO, 6, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 }, +- { LLCC_CMPT, 10, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 }, +- { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_GPU, 12, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 }, +- { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_CMPTDMA, 15, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_DISP, 16, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_VIDFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_NPU, 23, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_WLHW, 24, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_CVP, 28, 256, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_APTCM, 30, 128, 3, 0, 0x0, 0x3, 1, 0, 0, 1, 0, 0 }, +- { LLCC_WRCACHE, 31, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 1024, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 1024, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 1024, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .write_scid_en = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 13, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CMPTDMA, ++ .slice_id = 15, ++ .max_cap = 1024, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_VIDFW, ++ .slice_id = 17, ++ .max_cap = 512, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_NPU, ++ .slice_id = 23, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WLHW, ++ .slice_id = 24, ++ .max_cap = 1024, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CVP, ++ .slice_id = 28, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 128, ++ .priority = 3, ++ .res_ways = 0x3, ++ .cache_mode = 1, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, + }; + + static const struct llcc_slice_config sm8350_data[] = { +- { LLCC_CPUSS, 1, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 1 }, +- { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 }, +- { LLCC_MDMHPGRW, 7, 1024, 3, 0, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_CMPT, 10, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_GPU, 12, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 }, +- { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 }, +- { LLCC_DISP, 16, 3072, 2, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_MDMPNG, 21, 1024, 0, 1, 0xf, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_MODPE, 29, 256, 1, 1, 0xf, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 0, 1, 0 }, +- { LLCC_WRCACHE, 31, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 }, +- { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_CPUSS1, 3, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, +- { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ .write_scid_en = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 7, ++ .max_cap = 1024, ++ .priority = 3, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MODHW, ++ .slice_id = 9, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 1024, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 13, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .write_scid_en = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 3072, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 21, ++ .max_cap = 1024, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CVP, ++ .slice_id = 28, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 1024, ++ .priority = 3, ++ .fixed_size = true, ++ .res_ways = 0x1, ++ .cache_mode = 1, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .write_scid_en = true, ++ }, { ++ .usecase_id = LLCC_CVPFW, ++ .slice_id = 17, ++ .max_cap = 512, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CPUSS1, ++ .slice_id = 3, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CPUHWT, ++ .slice_id = 5, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .write_scid_en = true, ++ }, + }; + + static const struct llcc_slice_config sm8450_data[] = { +- {LLCC_CPUSS, 1, 3072, 1, 0, 0xFFFF, 0x0, 0, 0, 0, 1, 1, 0, 0 }, +- {LLCC_VIDSC0, 2, 512, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_AUDIO, 6, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0 }, +- {LLCC_MDMHPGRW, 7, 1024, 3, 0, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_MODHW, 9, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_CMPT, 10, 4096, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_GPU, 12, 2048, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 1, 0 }, +- {LLCC_MMUHWT, 13, 768, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0 }, +- {LLCC_DISP, 16, 4096, 2, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_MDMPNG, 21, 1024, 1, 1, 0xF000, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0 }, +- {LLCC_CVP, 28, 256, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_MODPE, 29, 64, 1, 1, 0xF000, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xF0, 1, 0, 0, 1, 0, 0, 0 }, +- {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0 }, +- {LLCC_CVPFW, 17, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_CPUSS1, 3, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_CAMEXP0, 4, 256, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_CPUMTE, 23, 256, 1, 1, 0x0FFF, 0x0, 0, 0, 0, 0, 1, 0, 0 }, +- {LLCC_CPUHWT, 5, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 1, 0, 0 }, +- {LLCC_CAMEXP1, 27, 256, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- {LLCC_AENPU, 8, 2048, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0 }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 3072, ++ .priority = 1, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 7, ++ .max_cap = 1024, ++ .priority = 3, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODHW, ++ .slice_id = 9, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 4096, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 12, ++ .max_cap = 2048, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .write_scid_en = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 13, ++ .max_cap = 768, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 4096, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 21, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xf000, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CVP, ++ .slice_id = 28, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 64, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xf000, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 1024, ++ .priority = 3, ++ .fixed_size = true, ++ .res_ways = 0xf0, ++ .cache_mode = 1, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CVPFW, ++ .slice_id = 17, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CPUSS1, ++ .slice_id = 3, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CAMEXP0, ++ .slice_id = 4, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_CPUMTE, ++ .slice_id = 23, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CPUHWT, ++ .slice_id = 5, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CAMEXP1, ++ .slice_id = 27, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_AENPU, ++ .slice_id = 8, ++ .max_cap = 2048, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffff, ++ .cache_mode = 0, ++ }, + }; + + static const struct llcc_slice_config sm8550_data[] = { +- {LLCC_CPUSS, 1, 5120, 1, 0, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_VIDSC0, 2, 512, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_AUDIO, 6, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_MDMHPGRW, 25, 1024, 4, 0, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_MODHW, 26, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_CMPT, 10, 4096, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_GPU, 9, 3096, 1, 0, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_MMUHWT, 18, 768, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_DISP, 16, 6144, 1, 1, 0xFFFFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_MDMPNG, 27, 1024, 0, 1, 0xF00000, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_CVP, 8, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_MODPE, 29, 64, 1, 1, 0xF00000, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, }, +- {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_CAMEXP0, 4, 256, 4, 1, 0xF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_CPUHWT, 5, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_CAMEXP1, 7, 3200, 3, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_CMPTHCP, 17, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_LCPDARE, 30, 128, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, }, +- {LLCC_AENPU, 3, 3072, 1, 1, 0xFE01FF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_ISLAND1, 12, 1792, 7, 1, 0xFE00, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_ISLAND4, 15, 256, 7, 1, 0x10000, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_CAMEXP2, 19, 3200, 3, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_CAMEXP3, 20, 3200, 2, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_CAMEXP4, 21, 3200, 2, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_DISP_WB, 23, 1024, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_DISP_1, 24, 6144, 1, 1, 0xFFFFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, +- {LLCC_VIDVSP, 28, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 5120, ++ .priority = 1, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ .write_scid_en = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 25, ++ .max_cap = 1024, ++ .priority = 4, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_MODHW, ++ .slice_id = 26, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 4096, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 9, ++ .max_cap = 3096, ++ .priority = 1, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .write_scid_en = true, ++ .write_scid_cacheable_en = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 18, ++ .max_cap = 768, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 27, ++ .max_cap = 1024, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0xf00000, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CVP, ++ .slice_id = 8, ++ .max_cap = 256, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 64, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xf00000, ++ .cache_mode = 0, ++ .alloc_oneway_en = true, ++ .vict_prio = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CAMEXP0, ++ .slice_id = 4, ++ .max_cap = 256, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CPUHWT, ++ .slice_id = 5, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CAMEXP1, ++ .slice_id = 7, ++ .max_cap = 3200, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfffff0, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_CMPTHCP, ++ .slice_id = 17, ++ .max_cap = 256, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_LCPDARE, ++ .slice_id = 30, ++ .max_cap = 128, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ .alloc_oneway_en = true, ++ .vict_prio = true, ++ }, { ++ .usecase_id = LLCC_AENPU, ++ .slice_id = 3, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfe01ff, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_ISLAND1, ++ .slice_id = 12, ++ .max_cap = 1792, ++ .priority = 7, ++ .fixed_size = true, ++ .bonus_ways = 0xfe00, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_ISLAND4, ++ .slice_id = 15, ++ .max_cap = 256, ++ .priority = 7, ++ .fixed_size = true, ++ .bonus_ways = 0x10000, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CAMEXP2, ++ .slice_id = 19, ++ .max_cap = 3200, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfffff0, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_CAMEXP3, ++ .slice_id = 20, ++ .max_cap = 3200, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xfffff0, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_CAMEXP4, ++ .slice_id = 21, ++ .max_cap = 3200, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xfffff0, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_DISP_WB, ++ .slice_id = 23, ++ .max_cap = 1024, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_DISP_1, ++ .slice_id = 24, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_VIDVSP, ++ .slice_id = 28, ++ .max_cap = 256, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, + }; + + static const struct llcc_slice_config sm8650_data[] = { +- {LLCC_CPUSS, 1, 5120, 1, 0, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_VIDSC0, 2, 512, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_AUDIO, 6, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_MDMHPGRW, 25, 1024, 3, 0, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_MODHW, 26, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CMPT, 10, 4096, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_GPU, 9, 3096, 1, 0, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_MMUHWT, 18, 768, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_DISP, 16, 6144, 1, 1, 0xFFFFFF, 0x0, 2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_MDMHPFX, 24, 1024, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_MDMPNG, 27, 1024, 0, 1, 0x000000, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CVP, 8, 256, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_MODPE, 29, 128, 1, 1, 0xF00000, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CAMEXP0, 4, 256, 3, 1, 0xF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CAMEXP1, 7, 3200, 3, 1, 0xFFFFF0, 0x0, 2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CMPTHCP, 17, 256, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_LCPDARE, 30, 128, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_AENPU, 3, 3072, 1, 1, 0xFFFFFF, 0x0, 2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_ISLAND1, 12, 5888, 7, 1, 0x0, 0x7FFFFF, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_DISP_WB, 23, 1024, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_VIDVSP, 28, 256, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 5120, ++ .priority = 1, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ .stale_en = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 25, ++ .max_cap = 1024, ++ .priority = 3, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_MODHW, ++ .slice_id = 26, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 4096, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 9, ++ .max_cap = 3096, ++ .priority = 1, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .write_scid_en = true, ++ .write_scid_cacheable_en = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 18, ++ .max_cap = 768, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_DISP, ++ .slice_id = 16, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_MDMHPFX, ++ .slice_id = 24, ++ .max_cap = 1024, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 27, ++ .max_cap = 1024, ++ .priority = 0, ++ .fixed_size = true, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CVP, ++ .slice_id = 8, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 128, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xf00000, ++ .cache_mode = 0, ++ .alloc_oneway_en = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_CAMEXP0, ++ .slice_id = 4, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xf, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CAMEXP1, ++ .slice_id = 7, ++ .max_cap = 3200, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfffff0, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_CMPTHCP, ++ .slice_id = 17, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_LCPDARE, ++ .slice_id = 30, ++ .max_cap = 128, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ .alloc_oneway_en = true, ++ }, { ++ .usecase_id = LLCC_AENPU, ++ .slice_id = 3, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_ISLAND1, ++ .slice_id = 12, ++ .max_cap = 5888, ++ .priority = 7, ++ .fixed_size = true, ++ .res_ways = 0x7fffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_DISP_WB, ++ .slice_id = 23, ++ .max_cap = 1024, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_VIDVSP, ++ .slice_id = 28, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffffff, ++ .cache_mode = 0, ++ }, + }; + + static const struct llcc_slice_config qdu1000_data_2ch[] = { +- { LLCC_MDMHPGRW, 7, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_MODHW, 9, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_MDMPNG, 21, 256, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_ECC, 26, 512, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_MODPE, 29, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_APTCM, 30, 256, 3, 1, 0x0, 0xc, 1, 0, 0, 1, 0, 0, 0 }, +- { LLCC_WRCACHE, 31, 128, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 }, ++ { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 7, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODHW, ++ .slice_id = 9, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 21, ++ .max_cap = 256, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0x3, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_ECC, ++ .slice_id = 26, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffc, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 256, ++ .priority = 3, ++ .fixed_size = true, ++ .res_ways = 0xc, ++ .cache_mode = 1, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 128, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0x3, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, + }; + + static const struct llcc_slice_config qdu1000_data_4ch[] = { +- { LLCC_MDMHPGRW, 7, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_MODHW, 9, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_MDMPNG, 21, 512, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_ECC, 26, 1024, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_MODPE, 29, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_APTCM, 30, 512, 3, 1, 0x0, 0xc, 1, 0, 0, 1, 0, 0, 0 }, +- { LLCC_WRCACHE, 31, 256, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 }, ++ { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 7, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODHW, ++ .slice_id = 9, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 21, ++ .max_cap = 512, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0x3, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_ECC, ++ .slice_id = 26, ++ .max_cap = 1024, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffc, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .res_ways = 0xc, ++ .cache_mode = 1, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 256, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0x3, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, + }; + + static const struct llcc_slice_config qdu1000_data_8ch[] = { +- { LLCC_MDMHPGRW, 7, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_MDMPNG, 21, 1024, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_ECC, 26, 2048, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 }, +- { LLCC_MODPE, 29, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, +- { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xc, 1, 0, 0, 1, 0, 0, 0 }, +- { LLCC_WRCACHE, 31, 512, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 }, ++ { ++ .usecase_id = LLCC_MDMHPGRW, ++ .slice_id = 7, ++ .max_cap = 2048, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MODHW, ++ .slice_id = 9, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_MDMPNG, ++ .slice_id = 21, ++ .max_cap = 1024, ++ .priority = 0, ++ .fixed_size = true, ++ .bonus_ways = 0x3, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_ECC, ++ .slice_id = 26, ++ .max_cap = 2048, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffc, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_MODPE, ++ .slice_id = 29, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_APTCM, ++ .slice_id = 30, ++ .max_cap = 1024, ++ .priority = 3, ++ .fixed_size = true, ++ .res_ways = 0xc, ++ .cache_mode = 1, ++ .retain_on_pc = true, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0x3, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, + }; + + static const struct llcc_slice_config x1e80100_data[] = { +- {LLCC_CPUSS, 1, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_VIDSC0, 2, 512, 4, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_AUDIO, 6, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CMPT, 10, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_GPU, 9, 4608, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_MMUHWT, 18, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CVP, 8, 512, 4, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_WRCACHE, 31, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CAMEXP0, 4, 256, 4, 1, 0x3, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CAMEXP1, 7, 3072, 3, 1, 0xFFC, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_LCPDARE, 30, 512, 3, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0}, +- {LLCC_AENPU, 3, 3072, 1, 1, 0xFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_ISLAND1, 12, 2048, 7, 1, 0x0, 0xF, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CAMEXP2, 19, 3072, 3, 1, 0xFFC, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CAMEXP3, 20, 3072, 2, 1, 0xFFC, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, +- {LLCC_CAMEXP4, 21, 3072, 2, 1, 0xFFC, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, ++ { ++ .usecase_id = LLCC_CPUSS, ++ .slice_id = 1, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_VIDSC0, ++ .slice_id = 2, ++ .max_cap = 512, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_AUDIO, ++ .slice_id = 6, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CMPT, ++ .slice_id = 10, ++ .max_cap = 6144, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_GPUHTW, ++ .slice_id = 11, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_GPU, ++ .slice_id = 9, ++ .max_cap = 4608, ++ .priority = 1, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .write_scid_en = true, ++ .write_scid_cacheable_en = true, ++ .stale_en = true, ++ }, { ++ .usecase_id = LLCC_MMUHWT, ++ .slice_id = 18, ++ .max_cap = 512, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ }, { ++ .usecase_id = LLCC_AUDHW, ++ .slice_id = 22, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CVP, ++ .slice_id = 8, ++ .max_cap = 512, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_WRCACHE, ++ .slice_id = 31, ++ .max_cap = 1024, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CAMEXP0, ++ .slice_id = 4, ++ .max_cap = 256, ++ .priority = 4, ++ .fixed_size = true, ++ .bonus_ways = 0x3, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CAMEXP1, ++ .slice_id = 7, ++ .max_cap = 3072, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffc, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_LCPDARE, ++ .slice_id = 30, ++ .max_cap = 512, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 0, ++ .activate_on_init = true, ++ .alloc_oneway_en = true, ++ }, { ++ .usecase_id = LLCC_AENPU, ++ .slice_id = 3, ++ .max_cap = 3072, ++ .priority = 1, ++ .fixed_size = true, ++ .bonus_ways = 0xfff, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_ISLAND1, ++ .slice_id = 12, ++ .max_cap = 2048, ++ .priority = 7, ++ .fixed_size = true, ++ .res_ways = 0xf, ++ .cache_mode = 0, ++ }, { ++ .usecase_id = LLCC_CAMEXP2, ++ .slice_id = 19, ++ .max_cap = 3072, ++ .priority = 3, ++ .fixed_size = true, ++ .bonus_ways = 0xffc, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_CAMEXP3, ++ .slice_id = 20, ++ .max_cap = 3072, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xffc, ++ .cache_mode = 2, ++ }, { ++ .usecase_id = LLCC_CAMEXP4, ++ .slice_id = 21, ++ .max_cap = 3072, ++ .priority = 2, ++ .fixed_size = true, ++ .bonus_ways = 0xffc, ++ .cache_mode = 2, ++ }, + }; + + static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = { +diff --git a/drivers/soc/qcom/qcom_pd_mapper.c b/drivers/soc/qcom/qcom_pd_mapper.c +index c940f4da28ed5c..6e30f08761aa43 100644 +--- a/drivers/soc/qcom/qcom_pd_mapper.c ++++ b/drivers/soc/qcom/qcom_pd_mapper.c +@@ -540,6 +540,7 @@ static const struct of_device_id qcom_pdm_domains[] __maybe_unused = { + { .compatible = "qcom,msm8996", .data = msm8996_domains, }, + { .compatible = "qcom,msm8998", .data = msm8998_domains, }, + { .compatible = "qcom,qcm2290", .data = qcm2290_domains, }, ++ { .compatible = "qcom,qcm6490", .data = sc7280_domains, }, + { .compatible = "qcom,qcs404", .data = qcs404_domains, }, + { .compatible = "qcom,sc7180", .data = sc7180_domains, }, + { .compatible = "qcom,sc7280", .data = sc7280_domains, }, +diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c +index 9573b8fa4fbfc6..29b9676fe43d89 100644 +--- a/drivers/spi/spi-fsl-lpspi.c ++++ b/drivers/spi/spi-fsl-lpspi.c +@@ -315,9 +315,10 @@ static void fsl_lpspi_set_watermark(struct fsl_lpspi_data *fsl_lpspi) + static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi) + { + struct lpspi_config config = fsl_lpspi->config; +- unsigned int perclk_rate, scldiv, div; ++ unsigned int perclk_rate, div; + u8 prescale_max; + u8 prescale; ++ int scldiv; + + perclk_rate = clk_get_rate(fsl_lpspi->clk_per); + prescale_max = fsl_lpspi->devtype_data->prescale_max; +@@ -338,13 +339,13 @@ static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi) + + for (prescale = 0; prescale <= prescale_max; prescale++) { + scldiv = div / (1 << prescale) - 2; +- if (scldiv < 256) { ++ if (scldiv >= 0 && scldiv < 256) { + fsl_lpspi->config.prescale = prescale; + break; + } + } + +- if (scldiv >= 256) ++ if (scldiv < 0 || scldiv >= 256) + return -EINVAL; + + writel(scldiv | (scldiv << 8) | ((scldiv >> 1) << 16), +diff --git a/drivers/spi/spi-mpc52xx.c b/drivers/spi/spi-mpc52xx.c +index d5ac60c135c20a..159f359d7501aa 100644 +--- a/drivers/spi/spi-mpc52xx.c ++++ b/drivers/spi/spi-mpc52xx.c +@@ -520,6 +520,7 @@ static void mpc52xx_spi_remove(struct platform_device *op) + struct mpc52xx_spi *ms = spi_controller_get_devdata(host); + int i; + ++ cancel_work_sync(&ms->work); + free_irq(ms->irq0, ms); + free_irq(ms->irq1, ms); + +diff --git a/drivers/thermal/qcom/tsens-v1.c b/drivers/thermal/qcom/tsens-v1.c +index dc1c4ae2d8b01b..1a7874676f68e4 100644 +--- a/drivers/thermal/qcom/tsens-v1.c ++++ b/drivers/thermal/qcom/tsens-v1.c +@@ -162,28 +162,35 @@ struct tsens_plat_data data_tsens_v1 = { + .fields = tsens_v1_regfields, + }; + +-static const struct tsens_ops ops_8956 = { +- .init = init_8956, ++static const struct tsens_ops ops_common = { ++ .init = init_common, + .calibrate = tsens_calibrate_common, + .get_temp = get_temp_tsens_valid, + }; + +-struct tsens_plat_data data_8956 = { ++struct tsens_plat_data data_8937 = { + .num_sensors = 11, +- .ops = &ops_8956, ++ .ops = &ops_common, + .feat = &tsens_v1_feat, + .fields = tsens_v1_regfields, + }; + +-static const struct tsens_ops ops_8976 = { +- .init = init_common, ++static const struct tsens_ops ops_8956 = { ++ .init = init_8956, + .calibrate = tsens_calibrate_common, + .get_temp = get_temp_tsens_valid, + }; + ++struct tsens_plat_data data_8956 = { ++ .num_sensors = 11, ++ .ops = &ops_8956, ++ .feat = &tsens_v1_feat, ++ .fields = tsens_v1_regfields, ++}; ++ + struct tsens_plat_data data_8976 = { + .num_sensors = 11, +- .ops = &ops_8976, ++ .ops = &ops_common, + .feat = &tsens_v1_feat, + .fields = tsens_v1_regfields, + }; +diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c +index 0b4421bf478544..d2db804692f01d 100644 +--- a/drivers/thermal/qcom/tsens.c ++++ b/drivers/thermal/qcom/tsens.c +@@ -1119,6 +1119,9 @@ static const struct of_device_id tsens_table[] = { + }, { + .compatible = "qcom,msm8916-tsens", + .data = &data_8916, ++ }, { ++ .compatible = "qcom,msm8937-tsens", ++ .data = &data_8937, + }, { + .compatible = "qcom,msm8939-tsens", + .data = &data_8939, +diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h +index cab39de045b100..7b36a0318fa6a0 100644 +--- a/drivers/thermal/qcom/tsens.h ++++ b/drivers/thermal/qcom/tsens.h +@@ -647,7 +647,7 @@ extern struct tsens_plat_data data_8960; + extern struct tsens_plat_data data_8226, data_8909, data_8916, data_8939, data_8974, data_9607; + + /* TSENS v1 targets */ +-extern struct tsens_plat_data data_tsens_v1, data_8976, data_8956; ++extern struct tsens_plat_data data_tsens_v1, data_8937, data_8976, data_8956; + + /* TSENS v2 targets */ + extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2; +diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c +index ab9e7f20426025..51894c93c8a313 100644 +--- a/drivers/tty/serial/8250/8250_dw.c ++++ b/drivers/tty/serial/8250/8250_dw.c +@@ -750,7 +750,7 @@ static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { + .quirks = DW_UART_QUIRK_CPR_VALUE | DW_UART_QUIRK_IS_DMA_FC, + }; + +-static const struct dw8250_platform_data dw8250_starfive_jh7100_data = { ++static const struct dw8250_platform_data dw8250_skip_set_rate_data = { + .usr_reg = DW_UART_USR, + .quirks = DW_UART_QUIRK_SKIP_SET_RATE, + }; +@@ -760,7 +760,8 @@ static const struct of_device_id dw8250_of_match[] = { + { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data }, + { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data }, + { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data }, +- { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data }, ++ { .compatible = "sophgo,sg2044-uart", .data = &dw8250_skip_set_rate_data }, ++ { .compatible = "starfive,jh7100-uart", .data = &dw8250_skip_set_rate_data }, + { /* Sentinel */ } + }; + MODULE_DEVICE_TABLE(of, dw8250_of_match); +diff --git a/drivers/ufs/core/ufs-sysfs.c b/drivers/ufs/core/ufs-sysfs.c +index 265f21133b633e..796e37a1d859f2 100644 +--- a/drivers/ufs/core/ufs-sysfs.c ++++ b/drivers/ufs/core/ufs-sysfs.c +@@ -670,6 +670,9 @@ static ssize_t read_req_latency_avg_show(struct device *dev, + struct ufs_hba *hba = dev_get_drvdata(dev); + struct ufs_hba_monitor *m = &hba->monitor; + ++ if (!m->nr_req[READ]) ++ return sysfs_emit(buf, "0\n"); ++ + return sysfs_emit(buf, "%llu\n", div_u64(ktime_to_us(m->lat_sum[READ]), + m->nr_req[READ])); + } +@@ -737,6 +740,9 @@ static ssize_t write_req_latency_avg_show(struct device *dev, + struct ufs_hba *hba = dev_get_drvdata(dev); + struct ufs_hba_monitor *m = &hba->monitor; + ++ if (!m->nr_req[WRITE]) ++ return sysfs_emit(buf, "0\n"); ++ + return sysfs_emit(buf, "%llu\n", div_u64(ktime_to_us(m->lat_sum[WRITE]), + m->nr_req[WRITE])); + } +diff --git a/drivers/ufs/core/ufs_bsg.c b/drivers/ufs/core/ufs_bsg.c +index 433d0480391ea6..6c09d97ae00658 100644 +--- a/drivers/ufs/core/ufs_bsg.c ++++ b/drivers/ufs/core/ufs_bsg.c +@@ -170,7 +170,7 @@ static int ufs_bsg_request(struct bsg_job *job) + break; + case UPIU_TRANSACTION_UIC_CMD: + memcpy(&uc, &bsg_request->upiu_req.uc, UIC_CMD_SIZE); +- ret = ufshcd_send_uic_cmd(hba, &uc); ++ ret = ufshcd_send_bsg_uic_cmd(hba, &uc); + if (ret) + dev_err(hba->dev, "send uic cmd: error code %d\n", ret); + +diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h +index 7aea8fbaeee882..9ffd94ddf8c7ce 100644 +--- a/drivers/ufs/core/ufshcd-priv.h ++++ b/drivers/ufs/core/ufshcd-priv.h +@@ -84,6 +84,7 @@ int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index, + u8 **buf, bool ascii); + + int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd); ++int ufshcd_send_bsg_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd); + + int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba, + struct utp_upiu_req *req_upiu, +diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c +index abbe7135a97787..cfebe4a1af9e84 100644 +--- a/drivers/ufs/core/ufshcd.c ++++ b/drivers/ufs/core/ufshcd.c +@@ -2411,8 +2411,6 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba) + int err; + + hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES); +- if (hba->quirks & UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS) +- hba->capabilities &= ~MASK_64_ADDRESSING_SUPPORT; + + /* nutrs and nutmrs are 0 based values */ + hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS_SDB) + 1; +@@ -2551,13 +2549,11 @@ ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) + * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result + * @hba: per adapter instance + * @uic_cmd: UIC command +- * @completion: initialize the completion only if this is set to true + * + * Return: 0 only if success. + */ + static int +-__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd, +- bool completion) ++__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) + { + lockdep_assert_held(&hba->uic_cmd_mutex); + +@@ -2567,8 +2563,7 @@ __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd, + return -EIO; + } + +- if (completion) +- init_completion(&uic_cmd->done); ++ init_completion(&uic_cmd->done); + + uic_cmd->cmd_active = 1; + ufshcd_dispatch_uic_cmd(hba, uic_cmd); +@@ -2594,7 +2589,7 @@ int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) + mutex_lock(&hba->uic_cmd_mutex); + ufshcd_add_delay_before_dme_cmd(hba); + +- ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true); ++ ret = __ufshcd_send_uic_cmd(hba, uic_cmd); + if (!ret) + ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd); + +@@ -4288,7 +4283,7 @@ static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd) + reenable_intr = true; + } + spin_unlock_irqrestore(hba->host->host_lock, flags); +- ret = __ufshcd_send_uic_cmd(hba, cmd, false); ++ ret = __ufshcd_send_uic_cmd(hba, cmd); + if (ret) { + dev_err(hba->dev, + "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n", +@@ -4343,6 +4338,42 @@ static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd) + return ret; + } + ++/** ++ * ufshcd_send_bsg_uic_cmd - Send UIC commands requested via BSG layer and retrieve the result ++ * @hba: per adapter instance ++ * @uic_cmd: UIC command ++ * ++ * Return: 0 only if success. ++ */ ++int ufshcd_send_bsg_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) ++{ ++ int ret; ++ ++ if (hba->quirks & UFSHCD_QUIRK_BROKEN_UIC_CMD) ++ return 0; ++ ++ ufshcd_hold(hba); ++ ++ if (uic_cmd->argument1 == UIC_ARG_MIB(PA_PWRMODE) && ++ uic_cmd->command == UIC_CMD_DME_SET) { ++ ret = ufshcd_uic_pwr_ctrl(hba, uic_cmd); ++ goto out; ++ } ++ ++ mutex_lock(&hba->uic_cmd_mutex); ++ ufshcd_add_delay_before_dme_cmd(hba); ++ ++ ret = __ufshcd_send_uic_cmd(hba, uic_cmd); ++ if (!ret) ++ ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd); ++ ++ mutex_unlock(&hba->uic_cmd_mutex); ++ ++out: ++ ufshcd_release(hba); ++ return ret; ++} ++ + /** + * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage + * using DME_SET primitives. +@@ -4651,9 +4682,6 @@ static int ufshcd_change_power_mode(struct ufs_hba *hba, + dev_err(hba->dev, + "%s: power mode change failed %d\n", __func__, ret); + } else { +- ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL, +- pwr_mode); +- + memcpy(&hba->pwr_info, pwr_mode, + sizeof(struct ufs_pa_layer_attr)); + } +@@ -4682,6 +4710,10 @@ int ufshcd_config_pwr_mode(struct ufs_hba *hba, + + ret = ufshcd_change_power_mode(hba, &final_params); + ++ if (!ret) ++ ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL, ++ &final_params); ++ + return ret; + } + EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode); +@@ -10231,6 +10263,7 @@ void ufshcd_remove(struct ufs_hba *hba) + ufs_hwmon_remove(hba); + ufs_bsg_remove(hba); + ufs_sysfs_remove_nodes(hba->dev); ++ cancel_delayed_work_sync(&hba->ufs_rtc_update_work); + blk_mq_destroy_queue(hba->tmf_queue); + blk_put_queue(hba->tmf_queue); + blk_mq_free_tag_set(&hba->tmf_tag_set); +@@ -10309,6 +10342,8 @@ EXPORT_SYMBOL_GPL(ufshcd_dealloc_host); + */ + static int ufshcd_set_dma_mask(struct ufs_hba *hba) + { ++ if (hba->vops && hba->vops->set_dma_mask) ++ return hba->vops->set_dma_mask(hba); + if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) { + if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64))) + return 0; +diff --git a/drivers/ufs/host/cdns-pltfrm.c b/drivers/ufs/host/cdns-pltfrm.c +index 66811d8d1929c1..b31aa84111511b 100644 +--- a/drivers/ufs/host/cdns-pltfrm.c ++++ b/drivers/ufs/host/cdns-pltfrm.c +@@ -307,9 +307,7 @@ static int cdns_ufs_pltfrm_probe(struct platform_device *pdev) + */ + static void cdns_ufs_pltfrm_remove(struct platform_device *pdev) + { +- struct ufs_hba *hba = platform_get_drvdata(pdev); +- +- ufshcd_remove(hba); ++ ufshcd_pltfrm_remove(pdev); + } + + static const struct dev_pm_ops cdns_ufs_dev_pm_ops = { +diff --git a/drivers/ufs/host/tc-dwc-g210-pltfrm.c b/drivers/ufs/host/tc-dwc-g210-pltfrm.c +index a3877592604d5d..c6f8565ede21a1 100644 +--- a/drivers/ufs/host/tc-dwc-g210-pltfrm.c ++++ b/drivers/ufs/host/tc-dwc-g210-pltfrm.c +@@ -76,10 +76,7 @@ static int tc_dwc_g210_pltfm_probe(struct platform_device *pdev) + */ + static void tc_dwc_g210_pltfm_remove(struct platform_device *pdev) + { +- struct ufs_hba *hba = platform_get_drvdata(pdev); +- +- pm_runtime_get_sync(&(pdev)->dev); +- ufshcd_remove(hba); ++ ufshcd_pltfrm_remove(pdev); + } + + static const struct dev_pm_ops tc_dwc_g210_pltfm_pm_ops = { +diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c +index fb550a7c16b34b..98505c68103d0e 100644 +--- a/drivers/ufs/host/ufs-exynos.c ++++ b/drivers/ufs/host/ufs-exynos.c +@@ -1963,8 +1963,7 @@ static void exynos_ufs_remove(struct platform_device *pdev) + struct ufs_hba *hba = platform_get_drvdata(pdev); + struct exynos_ufs *ufs = ufshcd_get_variant(hba); + +- pm_runtime_get_sync(&(pdev)->dev); +- ufshcd_remove(hba); ++ ufshcd_pltfrm_remove(pdev); + + phy_power_off(ufs->phy); + phy_exit(ufs->phy); +diff --git a/drivers/ufs/host/ufs-hisi.c b/drivers/ufs/host/ufs-hisi.c +index 5ee73ff052512b..501609521b2609 100644 +--- a/drivers/ufs/host/ufs-hisi.c ++++ b/drivers/ufs/host/ufs-hisi.c +@@ -576,9 +576,7 @@ static int ufs_hisi_probe(struct platform_device *pdev) + + static void ufs_hisi_remove(struct platform_device *pdev) + { +- struct ufs_hba *hba = platform_get_drvdata(pdev); +- +- ufshcd_remove(hba); ++ ufshcd_pltfrm_remove(pdev); + } + + static const struct dev_pm_ops ufs_hisi_pm_ops = { +diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c +index 9a5919434c4e0d..c834d38921b6cb 100644 +--- a/drivers/ufs/host/ufs-mediatek.c ++++ b/drivers/ufs/host/ufs-mediatek.c +@@ -1869,10 +1869,7 @@ static int ufs_mtk_probe(struct platform_device *pdev) + */ + static void ufs_mtk_remove(struct platform_device *pdev) + { +- struct ufs_hba *hba = platform_get_drvdata(pdev); +- +- pm_runtime_get_sync(&(pdev)->dev); +- ufshcd_remove(hba); ++ ufshcd_pltfrm_remove(pdev); + } + + #ifdef CONFIG_PM_SLEEP +diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c +index ecdfff2456e31d..91127fb171864f 100644 +--- a/drivers/ufs/host/ufs-qcom.c ++++ b/drivers/ufs/host/ufs-qcom.c +@@ -1843,10 +1843,11 @@ static int ufs_qcom_probe(struct platform_device *pdev) + static void ufs_qcom_remove(struct platform_device *pdev) + { + struct ufs_hba *hba = platform_get_drvdata(pdev); ++ struct ufs_qcom_host *host = ufshcd_get_variant(hba); + +- pm_runtime_get_sync(&(pdev)->dev); +- ufshcd_remove(hba); +- platform_device_msi_free_irqs_all(hba->dev); ++ ufshcd_pltfrm_remove(pdev); ++ if (host->esi_enabled) ++ platform_device_msi_free_irqs_all(hba->dev); + } + + static const struct of_device_id ufs_qcom_of_match[] __maybe_unused = { +diff --git a/drivers/ufs/host/ufs-renesas.c b/drivers/ufs/host/ufs-renesas.c +index 8711e5cbc9680a..21a64b34397d8c 100644 +--- a/drivers/ufs/host/ufs-renesas.c ++++ b/drivers/ufs/host/ufs-renesas.c +@@ -7,6 +7,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -364,14 +365,20 @@ static int ufs_renesas_init(struct ufs_hba *hba) + return -ENOMEM; + ufshcd_set_variant(hba, priv); + +- hba->quirks |= UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS | UFSHCD_QUIRK_HIBERN_FASTAUTO; ++ hba->quirks |= UFSHCD_QUIRK_HIBERN_FASTAUTO; + + return 0; + } + ++static int ufs_renesas_set_dma_mask(struct ufs_hba *hba) ++{ ++ return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32)); ++} ++ + static const struct ufs_hba_variant_ops ufs_renesas_vops = { + .name = "renesas", + .init = ufs_renesas_init, ++ .set_dma_mask = ufs_renesas_set_dma_mask, + .setup_clocks = ufs_renesas_setup_clocks, + .hce_enable_notify = ufs_renesas_hce_enable_notify, + .dbg_register_dump = ufs_renesas_dbg_register_dump, +@@ -390,9 +397,7 @@ static int ufs_renesas_probe(struct platform_device *pdev) + + static void ufs_renesas_remove(struct platform_device *pdev) + { +- struct ufs_hba *hba = platform_get_drvdata(pdev); +- +- ufshcd_remove(hba); ++ ufshcd_pltfrm_remove(pdev); + } + + static struct platform_driver ufs_renesas_platform = { +diff --git a/drivers/ufs/host/ufs-sprd.c b/drivers/ufs/host/ufs-sprd.c +index d8b165908809d6..d220978c2d8c8a 100644 +--- a/drivers/ufs/host/ufs-sprd.c ++++ b/drivers/ufs/host/ufs-sprd.c +@@ -427,10 +427,7 @@ static int ufs_sprd_probe(struct platform_device *pdev) + + static void ufs_sprd_remove(struct platform_device *pdev) + { +- struct ufs_hba *hba = platform_get_drvdata(pdev); +- +- pm_runtime_get_sync(&(pdev)->dev); +- ufshcd_remove(hba); ++ ufshcd_pltfrm_remove(pdev); + } + + static const struct dev_pm_ops ufs_sprd_pm_ops = { +diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c +index 1f4f30d6cb4234..505572d4fa878c 100644 +--- a/drivers/ufs/host/ufshcd-pltfrm.c ++++ b/drivers/ufs/host/ufshcd-pltfrm.c +@@ -524,6 +524,22 @@ int ufshcd_pltfrm_init(struct platform_device *pdev, + } + EXPORT_SYMBOL_GPL(ufshcd_pltfrm_init); + ++/** ++ * ufshcd_pltfrm_remove - Remove ufshcd platform ++ * @pdev: pointer to Platform device handle ++ */ ++void ufshcd_pltfrm_remove(struct platform_device *pdev) ++{ ++ struct ufs_hba *hba = platform_get_drvdata(pdev); ++ ++ pm_runtime_get_sync(&pdev->dev); ++ ufshcd_remove(hba); ++ ufshcd_dealloc_host(hba); ++ pm_runtime_disable(&pdev->dev); ++ pm_runtime_put_noidle(&pdev->dev); ++} ++EXPORT_SYMBOL_GPL(ufshcd_pltfrm_remove); ++ + MODULE_AUTHOR("Santosh Yaragnavi "); + MODULE_AUTHOR("Vinayak Holikatti "); + MODULE_DESCRIPTION("UFS host controller Platform bus based glue driver"); +diff --git a/drivers/ufs/host/ufshcd-pltfrm.h b/drivers/ufs/host/ufshcd-pltfrm.h +index df387be5216bd4..3017f8e8f93c67 100644 +--- a/drivers/ufs/host/ufshcd-pltfrm.h ++++ b/drivers/ufs/host/ufshcd-pltfrm.h +@@ -31,6 +31,7 @@ int ufshcd_negotiate_pwr_params(const struct ufs_host_params *host_params, + void ufshcd_init_host_params(struct ufs_host_params *host_params); + int ufshcd_pltfrm_init(struct platform_device *pdev, + const struct ufs_hba_variant_ops *vops); ++void ufshcd_pltfrm_remove(struct platform_device *pdev); + int ufshcd_populate_vreg(struct device *dev, const char *name, + struct ufs_vreg **out_vreg, bool skip_current); + +diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h +index 2a38e1eb65466c..97437de52ef681 100644 +--- a/drivers/usb/chipidea/ci.h ++++ b/drivers/usb/chipidea/ci.h +@@ -25,6 +25,7 @@ + #define TD_PAGE_COUNT 5 + #define CI_HDRC_PAGE_SIZE 4096ul /* page size for TD's */ + #define ENDPT_MAX 32 ++#define CI_MAX_REQ_SIZE (4 * CI_HDRC_PAGE_SIZE) + #define CI_MAX_BUF_SIZE (TD_PAGE_COUNT * CI_HDRC_PAGE_SIZE) + + /****************************************************************************** +@@ -260,6 +261,7 @@ struct ci_hdrc { + bool b_sess_valid_event; + bool imx28_write_fix; + bool has_portsc_pec_bug; ++ bool has_short_pkt_limit; + bool supports_runtime_pm; + bool in_lpm; + bool wakeup_int; +diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c +index c64ab0e07ea030..17b3ac2ac8a1e8 100644 +--- a/drivers/usb/chipidea/ci_hdrc_imx.c ++++ b/drivers/usb/chipidea/ci_hdrc_imx.c +@@ -342,6 +342,7 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev) + struct ci_hdrc_platform_data pdata = { + .name = dev_name(&pdev->dev), + .capoffset = DEF_CAPOFFSET, ++ .flags = CI_HDRC_HAS_SHORT_PKT_LIMIT, + .notify_event = ci_hdrc_imx_notify_event, + }; + int ret; +diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c +index 835bf2428dc6ec..5aa16dbfc289ce 100644 +--- a/drivers/usb/chipidea/core.c ++++ b/drivers/usb/chipidea/core.c +@@ -1076,6 +1076,8 @@ static int ci_hdrc_probe(struct platform_device *pdev) + CI_HDRC_SUPPORTS_RUNTIME_PM); + ci->has_portsc_pec_bug = !!(ci->platdata->flags & + CI_HDRC_HAS_PORTSC_PEC_MISSED); ++ ci->has_short_pkt_limit = !!(ci->platdata->flags & ++ CI_HDRC_HAS_SHORT_PKT_LIMIT); + platform_set_drvdata(pdev, ci); + + ret = hw_device_init(ci, base); +diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c +index 69ef3cd8d4f836..fd6032874bf33a 100644 +--- a/drivers/usb/chipidea/udc.c ++++ b/drivers/usb/chipidea/udc.c +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -540,6 +541,126 @@ static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) + return ret; + } + ++/* ++ * Verify if the scatterlist is valid by iterating each sg entry. ++ * Return invalid sg entry index which is less than num_sgs. ++ */ ++static int sglist_get_invalid_entry(struct device *dma_dev, u8 dir, ++ struct usb_request *req) ++{ ++ int i; ++ struct scatterlist *s = req->sg; ++ ++ if (req->num_sgs == 1) ++ return 1; ++ ++ dir = dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE; ++ ++ for (i = 0; i < req->num_sgs; i++, s = sg_next(s)) { ++ /* Only small sg (generally last sg) may be bounced. If ++ * that happens. we can't ensure the addr is page-aligned ++ * after dma map. ++ */ ++ if (dma_kmalloc_needs_bounce(dma_dev, s->length, dir)) ++ break; ++ ++ /* Make sure each sg start address (except first sg) is ++ * page-aligned and end address (except last sg) is also ++ * page-aligned. ++ */ ++ if (i == 0) { ++ if (!IS_ALIGNED(s->offset + s->length, ++ CI_HDRC_PAGE_SIZE)) ++ break; ++ } else { ++ if (s->offset) ++ break; ++ if (!sg_is_last(s) && !IS_ALIGNED(s->length, ++ CI_HDRC_PAGE_SIZE)) ++ break; ++ } ++ } ++ ++ return i; ++} ++ ++static int sglist_do_bounce(struct ci_hw_req *hwreq, int index, ++ bool copy, unsigned int *bounced) ++{ ++ void *buf; ++ int i, ret, nents, num_sgs; ++ unsigned int rest, rounded; ++ struct scatterlist *sg, *src, *dst; ++ ++ nents = index + 1; ++ ret = sg_alloc_table(&hwreq->sgt, nents, GFP_KERNEL); ++ if (ret) ++ return ret; ++ ++ sg = src = hwreq->req.sg; ++ num_sgs = hwreq->req.num_sgs; ++ rest = hwreq->req.length; ++ dst = hwreq->sgt.sgl; ++ ++ for (i = 0; i < index; i++) { ++ memcpy(dst, src, sizeof(*src)); ++ rest -= src->length; ++ src = sg_next(src); ++ dst = sg_next(dst); ++ } ++ ++ /* create one bounce buffer */ ++ rounded = round_up(rest, CI_HDRC_PAGE_SIZE); ++ buf = kmalloc(rounded, GFP_KERNEL); ++ if (!buf) { ++ sg_free_table(&hwreq->sgt); ++ return -ENOMEM; ++ } ++ ++ sg_set_buf(dst, buf, rounded); ++ ++ hwreq->req.sg = hwreq->sgt.sgl; ++ hwreq->req.num_sgs = nents; ++ hwreq->sgt.sgl = sg; ++ hwreq->sgt.nents = num_sgs; ++ ++ if (copy) ++ sg_copy_to_buffer(src, num_sgs - index, buf, rest); ++ ++ *bounced = rest; ++ ++ return 0; ++} ++ ++static void sglist_do_debounce(struct ci_hw_req *hwreq, bool copy) ++{ ++ void *buf; ++ int i, nents, num_sgs; ++ struct scatterlist *sg, *src, *dst; ++ ++ sg = hwreq->req.sg; ++ num_sgs = hwreq->req.num_sgs; ++ src = sg_last(sg, num_sgs); ++ buf = sg_virt(src); ++ ++ if (copy) { ++ dst = hwreq->sgt.sgl; ++ for (i = 0; i < num_sgs - 1; i++) ++ dst = sg_next(dst); ++ ++ nents = hwreq->sgt.nents - num_sgs + 1; ++ sg_copy_from_buffer(dst, nents, buf, sg_dma_len(src)); ++ } ++ ++ hwreq->req.sg = hwreq->sgt.sgl; ++ hwreq->req.num_sgs = hwreq->sgt.nents; ++ hwreq->sgt.sgl = sg; ++ hwreq->sgt.nents = num_sgs; ++ ++ kfree(buf); ++ sg_free_table(&hwreq->sgt); ++} ++ + /** + * _hardware_enqueue: configures a request at hardware level + * @hwep: endpoint +@@ -552,6 +673,8 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) + struct ci_hdrc *ci = hwep->ci; + int ret = 0; + struct td_node *firstnode, *lastnode; ++ unsigned int bounced_size; ++ struct scatterlist *sg; + + /* don't queue twice */ + if (hwreq->req.status == -EALREADY) +@@ -559,11 +682,29 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) + + hwreq->req.status = -EALREADY; + ++ if (hwreq->req.num_sgs && hwreq->req.length && ++ ci->has_short_pkt_limit) { ++ ret = sglist_get_invalid_entry(ci->dev->parent, hwep->dir, ++ &hwreq->req); ++ if (ret < hwreq->req.num_sgs) { ++ ret = sglist_do_bounce(hwreq, ret, hwep->dir == TX, ++ &bounced_size); ++ if (ret) ++ return ret; ++ } ++ } ++ + ret = usb_gadget_map_request_by_dev(ci->dev->parent, + &hwreq->req, hwep->dir); + if (ret) + return ret; + ++ if (hwreq->sgt.sgl) { ++ /* We've mapped a bigger buffer, now recover the actual size */ ++ sg = sg_last(hwreq->req.sg, hwreq->req.num_sgs); ++ sg_dma_len(sg) = min(sg_dma_len(sg), bounced_size); ++ } ++ + if (hwreq->req.num_mapped_sgs) + ret = prepare_td_for_sg(hwep, hwreq); + else +@@ -733,6 +874,10 @@ static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) + usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent, + &hwreq->req, hwep->dir); + ++ /* sglist bounced */ ++ if (hwreq->sgt.sgl) ++ sglist_do_debounce(hwreq, hwep->dir == RX); ++ + hwreq->req.actual += actual; + + if (hwreq->req.status) +@@ -960,6 +1105,12 @@ static int _ep_queue(struct usb_ep *ep, struct usb_request *req, + return -EMSGSIZE; + } + ++ if (ci->has_short_pkt_limit && ++ hwreq->req.length > CI_MAX_REQ_SIZE) { ++ dev_err(hwep->ci->dev, "request length too big (max 16KB)\n"); ++ return -EMSGSIZE; ++ } ++ + /* first nuke then test link, e.g. previous status has not sent */ + if (!list_empty(&hwreq->queue)) { + dev_err(hwep->ci->dev, "request already in queue\n"); +@@ -1574,6 +1725,9 @@ static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) + + usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); + ++ if (hwreq->sgt.sgl) ++ sglist_do_debounce(hwreq, false); ++ + req->status = -ECONNRESET; + + if (hwreq->req.complete != NULL) { +@@ -2063,7 +2217,7 @@ static irqreturn_t udc_irq(struct ci_hdrc *ci) + } + } + +- if (USBi_UI & intr) ++ if ((USBi_UI | USBi_UEI) & intr) + isr_tr_complete_handler(ci); + + if ((USBi_SLI & intr) && !(ci->suspended)) { +diff --git a/drivers/usb/chipidea/udc.h b/drivers/usb/chipidea/udc.h +index 5193df1e18c75b..c8a47389a46bbb 100644 +--- a/drivers/usb/chipidea/udc.h ++++ b/drivers/usb/chipidea/udc.h +@@ -69,11 +69,13 @@ struct td_node { + * @req: request structure for gadget drivers + * @queue: link to QH list + * @tds: link to TD list ++ * @sgt: hold original sglist when bounce sglist + */ + struct ci_hw_req { + struct usb_request req; + struct list_head queue; + struct list_head tds; ++ struct sg_table sgt; + }; + + #ifdef CONFIG_USB_CHIPIDEA_UDC +diff --git a/drivers/usb/typec/ucsi/ucsi_acpi.c b/drivers/usb/typec/ucsi/ucsi_acpi.c +index 7a5dff8d9cc6c3..accf15ff1306a2 100644 +--- a/drivers/usb/typec/ucsi/ucsi_acpi.c ++++ b/drivers/usb/typec/ucsi/ucsi_acpi.c +@@ -61,9 +61,11 @@ static int ucsi_acpi_read_cci(struct ucsi *ucsi, u32 *cci) + struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi); + int ret; + +- ret = ucsi_acpi_dsm(ua, UCSI_DSM_FUNC_READ); +- if (ret) +- return ret; ++ if (UCSI_COMMAND(ua->cmd) == UCSI_PPM_RESET) { ++ ret = ucsi_acpi_dsm(ua, UCSI_DSM_FUNC_READ); ++ if (ret) ++ return ret; ++ } + + memcpy(cci, ua->base + UCSI_CCI, sizeof(*cci)); + +@@ -73,11 +75,6 @@ static int ucsi_acpi_read_cci(struct ucsi *ucsi, u32 *cci) + static int ucsi_acpi_read_message_in(struct ucsi *ucsi, void *val, size_t val_len) + { + struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi); +- int ret; +- +- ret = ucsi_acpi_dsm(ua, UCSI_DSM_FUNC_READ); +- if (ret) +- return ret; + + memcpy(val, ua->base + UCSI_MESSAGE_IN, val_len); + +@@ -102,42 +99,6 @@ static const struct ucsi_operations ucsi_acpi_ops = { + .async_control = ucsi_acpi_async_control + }; + +-static int +-ucsi_zenbook_read_cci(struct ucsi *ucsi, u32 *cci) +-{ +- struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi); +- int ret; +- +- if (UCSI_COMMAND(ua->cmd) == UCSI_PPM_RESET) { +- ret = ucsi_acpi_dsm(ua, UCSI_DSM_FUNC_READ); +- if (ret) +- return ret; +- } +- +- memcpy(cci, ua->base + UCSI_CCI, sizeof(*cci)); +- +- return 0; +-} +- +-static int +-ucsi_zenbook_read_message_in(struct ucsi *ucsi, void *val, size_t val_len) +-{ +- struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi); +- +- /* UCSI_MESSAGE_IN is never read for PPM_RESET, return stored data */ +- memcpy(val, ua->base + UCSI_MESSAGE_IN, val_len); +- +- return 0; +-} +- +-static const struct ucsi_operations ucsi_zenbook_ops = { +- .read_version = ucsi_acpi_read_version, +- .read_cci = ucsi_zenbook_read_cci, +- .read_message_in = ucsi_zenbook_read_message_in, +- .sync_control = ucsi_sync_control_common, +- .async_control = ucsi_acpi_async_control +-}; +- + static int ucsi_gram_read_message_in(struct ucsi *ucsi, void *val, size_t val_len) + { + u16 bogus_change = UCSI_CONSTAT_POWER_LEVEL_CHANGE | +@@ -190,13 +151,6 @@ static const struct ucsi_operations ucsi_gram_ops = { + }; + + static const struct dmi_system_id ucsi_acpi_quirks[] = { +- { +- .matches = { +- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), +- DMI_MATCH(DMI_PRODUCT_NAME, "ZenBook UX325UA_UM325UA"), +- }, +- .driver_data = (void *)&ucsi_zenbook_ops, +- }, + { + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LG Electronics"), +diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c +index f7000d383a4e62..9b6cb76e632807 100644 +--- a/drivers/usb/typec/ucsi/ucsi_glink.c ++++ b/drivers/usb/typec/ucsi/ucsi_glink.c +@@ -172,12 +172,12 @@ static int pmic_glink_ucsi_async_control(struct ucsi *__ucsi, u64 command) + static void pmic_glink_ucsi_update_connector(struct ucsi_connector *con) + { + struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(con->ucsi); +- int i; + +- for (i = 0; i < PMIC_GLINK_MAX_PORTS; i++) { +- if (ucsi->port_orientation[i]) +- con->typec_cap.orientation_aware = true; +- } ++ if (con->num > PMIC_GLINK_MAX_PORTS || ++ !ucsi->port_orientation[con->num - 1]) ++ return; ++ ++ con->typec_cap.orientation_aware = true; + } + + static void pmic_glink_ucsi_connector_status(struct ucsi_connector *con) +diff --git a/drivers/vfio/pci/mlx5/cmd.c b/drivers/vfio/pci/mlx5/cmd.c +index 7527e277c89897..eb7387ee6ebd10 100644 +--- a/drivers/vfio/pci/mlx5/cmd.c ++++ b/drivers/vfio/pci/mlx5/cmd.c +@@ -1517,7 +1517,8 @@ int mlx5vf_start_page_tracker(struct vfio_device *vdev, + struct mlx5_vhca_qp *host_qp; + struct mlx5_vhca_qp *fw_qp; + struct mlx5_core_dev *mdev; +- u32 max_msg_size = PAGE_SIZE; ++ u32 log_max_msg_size; ++ u32 max_msg_size; + u64 rq_size = SZ_2M; + u32 max_recv_wr; + int err; +@@ -1534,6 +1535,12 @@ int mlx5vf_start_page_tracker(struct vfio_device *vdev, + } + + mdev = mvdev->mdev; ++ log_max_msg_size = MLX5_CAP_ADV_VIRTUALIZATION(mdev, pg_track_log_max_msg_size); ++ max_msg_size = (1ULL << log_max_msg_size); ++ /* The RQ must hold at least 4 WQEs/messages for successful QP creation */ ++ if (rq_size < 4 * max_msg_size) ++ rq_size = 4 * max_msg_size; ++ + memset(tracker, 0, sizeof(*tracker)); + tracker->uar = mlx5_get_uars_page(mdev); + if (IS_ERR(tracker->uar)) { +@@ -1623,25 +1630,41 @@ set_report_output(u32 size, int index, struct mlx5_vhca_qp *qp, + { + u32 entry_size = MLX5_ST_SZ_BYTES(page_track_report_entry); + u32 nent = size / entry_size; ++ u32 nent_in_page; ++ u32 nent_to_set; + struct page *page; ++ u32 page_offset; ++ u32 page_index; ++ u32 buf_offset; ++ void *kaddr; + u64 addr; + u64 *buf; + int i; + +- if (WARN_ON(index >= qp->recv_buf.npages || ++ buf_offset = index * qp->max_msg_size; ++ if (WARN_ON(buf_offset + size >= qp->recv_buf.npages * PAGE_SIZE || + (nent > qp->max_msg_size / entry_size))) + return; + +- page = qp->recv_buf.page_list[index]; +- buf = kmap_local_page(page); +- for (i = 0; i < nent; i++) { +- addr = MLX5_GET(page_track_report_entry, buf + i, +- dirty_address_low); +- addr |= (u64)MLX5_GET(page_track_report_entry, buf + i, +- dirty_address_high) << 32; +- iova_bitmap_set(dirty, addr, qp->tracked_page_size); +- } +- kunmap_local(buf); ++ do { ++ page_index = buf_offset / PAGE_SIZE; ++ page_offset = buf_offset % PAGE_SIZE; ++ nent_in_page = (PAGE_SIZE - page_offset) / entry_size; ++ page = qp->recv_buf.page_list[page_index]; ++ kaddr = kmap_local_page(page); ++ buf = kaddr + page_offset; ++ nent_to_set = min(nent, nent_in_page); ++ for (i = 0; i < nent_to_set; i++) { ++ addr = MLX5_GET(page_track_report_entry, buf + i, ++ dirty_address_low); ++ addr |= (u64)MLX5_GET(page_track_report_entry, buf + i, ++ dirty_address_high) << 32; ++ iova_bitmap_set(dirty, addr, qp->tracked_page_size); ++ } ++ kunmap_local(kaddr); ++ buf_offset += (nent_to_set * entry_size); ++ nent -= nent_to_set; ++ } while (nent); + } + + static void +diff --git a/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c b/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c +index 56a3859dda8a15..4230b817a80bd8 100644 +--- a/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c ++++ b/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c +@@ -87,12 +87,8 @@ static int mmio_guard_ioremap_hook(phys_addr_t phys, size_t size, + + while (phys < end) { + const int func_id = ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_FUNC_ID; +- int err; +- +- err = arm_smccc_do_one_page(func_id, phys); +- if (err) +- return err; + ++ WARN_ON_ONCE(arm_smccc_do_one_page(func_id, phys)); + phys += PAGE_SIZE; + } + +diff --git a/drivers/watchdog/apple_wdt.c b/drivers/watchdog/apple_wdt.c +index d4f739932f0be8..62dabf223d9096 100644 +--- a/drivers/watchdog/apple_wdt.c ++++ b/drivers/watchdog/apple_wdt.c +@@ -130,7 +130,7 @@ static int apple_wdt_restart(struct watchdog_device *wdd, unsigned long mode, + * can take up to ~20-25ms until the SoC is actually reset. Just wait + * 50ms here to be safe. + */ +- (void)readl_relaxed(wdt->regs + APPLE_WDT_WD1_CUR_TIME); ++ (void)readl(wdt->regs + APPLE_WDT_WD1_CUR_TIME); + mdelay(50); + + return 0; +diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c +index 35b358bcf94ce6..f01ed38aba6751 100644 +--- a/drivers/watchdog/iTCO_wdt.c ++++ b/drivers/watchdog/iTCO_wdt.c +@@ -82,6 +82,13 @@ + #define TCO2_CNT(p) (TCOBASE(p) + 0x0a) /* TCO2 Control Register */ + #define TCOv2_TMR(p) (TCOBASE(p) + 0x12) /* TCOv2 Timer Initial Value*/ + ++/* ++ * NMI_NOW is bit 8 of TCO1_CNT register ++ * Read/Write ++ * This bit is implemented as RW but has no effect on HW. ++ */ ++#define NMI_NOW BIT(8) ++ + /* internal variables */ + struct iTCO_wdt_private { + struct watchdog_device wddev; +@@ -219,13 +226,23 @@ static int update_no_reboot_bit_cnt(void *priv, bool set) + struct iTCO_wdt_private *p = priv; + u16 val, newval; + +- val = inw(TCO1_CNT(p)); ++ /* ++ * writing back 1b1 to NMI_NOW of TCO1_CNT register ++ * causes NMI_NOW bit inversion what consequently does ++ * not allow to perform the register's value comparison ++ * properly. ++ * ++ * NMI_NOW bit masking for TCO1_CNT register values ++ * helps to avoid possible NMI_NOW bit inversions on ++ * following write operation. ++ */ ++ val = inw(TCO1_CNT(p)) & ~NMI_NOW; + if (set) + val |= BIT(0); + else + val &= ~BIT(0); + outw(val, TCO1_CNT(p)); +- newval = inw(TCO1_CNT(p)); ++ newval = inw(TCO1_CNT(p)) & ~NMI_NOW; + + /* make sure the update is successful */ + return val != newval ? -EIO : 0; +diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c +index c35f85ce8d69cc..e2d7a57d6ea2e7 100644 +--- a/drivers/watchdog/mtk_wdt.c ++++ b/drivers/watchdog/mtk_wdt.c +@@ -225,9 +225,15 @@ static int mtk_wdt_restart(struct watchdog_device *wdt_dev, + { + struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev); + void __iomem *wdt_base; ++ u32 reg; + + wdt_base = mtk_wdt->wdt_base; + ++ /* Enable reset in order to issue a system reset instead of an IRQ */ ++ reg = readl(wdt_base + WDT_MODE); ++ reg &= ~WDT_MODE_IRQ_EN; ++ writel(reg | WDT_MODE_KEY, wdt_base + WDT_MODE); ++ + while (1) { + writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST); + mdelay(5); +diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c +index 4895a69015a8ea..563d842014dfba 100644 +--- a/drivers/watchdog/rti_wdt.c ++++ b/drivers/watchdog/rti_wdt.c +@@ -61,7 +61,7 @@ + + #define MAX_HW_ERROR 250 + +-static int heartbeat = DEFAULT_HEARTBEAT; ++static int heartbeat; + + /* + * struct to hold data for each WDT device +@@ -252,6 +252,7 @@ static int rti_wdt_probe(struct platform_device *pdev) + wdd->min_timeout = 1; + wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) / + wdt->freq * 1000; ++ wdd->timeout = DEFAULT_HEARTBEAT; + wdd->parent = dev; + + watchdog_set_drvdata(wdd, wdt); +diff --git a/drivers/watchdog/xilinx_wwdt.c b/drivers/watchdog/xilinx_wwdt.c +index d271e2e8d6e271..3d2a156f718009 100644 +--- a/drivers/watchdog/xilinx_wwdt.c ++++ b/drivers/watchdog/xilinx_wwdt.c +@@ -2,7 +2,7 @@ + /* + * Window watchdog device driver for Xilinx Versal WWDT + * +- * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. ++ * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc. + */ + + #include +@@ -36,6 +36,12 @@ + + #define XWWDT_CLOSE_WINDOW_PERCENT 50 + ++/* Maximum count value of each 32 bit window */ ++#define XWWDT_MAX_COUNT_WINDOW GENMASK(31, 0) ++ ++/* Maximum count value of closed and open window combined */ ++#define XWWDT_MAX_COUNT_WINDOW_COMBINED GENMASK_ULL(32, 1) ++ + static int wwdt_timeout; + static int closed_window_percent; + +@@ -54,6 +60,8 @@ MODULE_PARM_DESC(closed_window_percent, + * @xilinx_wwdt_wdd: watchdog device structure + * @freq: source clock frequency of WWDT + * @close_percent: Closed window percent ++ * @closed_timeout: Closed window timeout in ticks ++ * @open_timeout: Open window timeout in ticks + */ + struct xwwdt_device { + void __iomem *base; +@@ -61,27 +69,22 @@ struct xwwdt_device { + struct watchdog_device xilinx_wwdt_wdd; + unsigned long freq; + u32 close_percent; ++ u64 closed_timeout; ++ u64 open_timeout; + }; + + static int xilinx_wwdt_start(struct watchdog_device *wdd) + { + struct xwwdt_device *xdev = watchdog_get_drvdata(wdd); + struct watchdog_device *xilinx_wwdt_wdd = &xdev->xilinx_wwdt_wdd; +- u64 time_out, closed_timeout, open_timeout; + u32 control_status_reg; + +- /* Calculate timeout count */ +- time_out = xdev->freq * wdd->timeout; +- closed_timeout = div_u64(time_out * xdev->close_percent, 100); +- open_timeout = time_out - closed_timeout; +- wdd->min_hw_heartbeat_ms = xdev->close_percent * 10 * wdd->timeout; +- + spin_lock(&xdev->spinlock); + + iowrite32(XWWDT_MWR_MASK, xdev->base + XWWDT_MWR_OFFSET); + iowrite32(~(u32)XWWDT_ESR_WEN_MASK, xdev->base + XWWDT_ESR_OFFSET); +- iowrite32((u32)closed_timeout, xdev->base + XWWDT_FWR_OFFSET); +- iowrite32((u32)open_timeout, xdev->base + XWWDT_SWR_OFFSET); ++ iowrite32((u32)xdev->closed_timeout, xdev->base + XWWDT_FWR_OFFSET); ++ iowrite32((u32)xdev->open_timeout, xdev->base + XWWDT_SWR_OFFSET); + + /* Enable the window watchdog timer */ + control_status_reg = ioread32(xdev->base + XWWDT_ESR_OFFSET); +@@ -133,7 +136,12 @@ static int xwwdt_probe(struct platform_device *pdev) + struct watchdog_device *xilinx_wwdt_wdd; + struct device *dev = &pdev->dev; + struct xwwdt_device *xdev; ++ u64 max_per_window_ms; ++ u64 min_per_window_ms; ++ u64 timeout_count; + struct clk *clk; ++ u32 timeout_ms; ++ u64 ms_count; + int ret; + + xdev = devm_kzalloc(dev, sizeof(*xdev), GFP_KERNEL); +@@ -154,12 +162,13 @@ static int xwwdt_probe(struct platform_device *pdev) + return PTR_ERR(clk); + + xdev->freq = clk_get_rate(clk); +- if (!xdev->freq) ++ if (xdev->freq < 1000000) + return -EINVAL; + + xilinx_wwdt_wdd->min_timeout = XWWDT_MIN_TIMEOUT; + xilinx_wwdt_wdd->timeout = XWWDT_DEFAULT_TIMEOUT; +- xilinx_wwdt_wdd->max_hw_heartbeat_ms = 1000 * xilinx_wwdt_wdd->timeout; ++ xilinx_wwdt_wdd->max_hw_heartbeat_ms = ++ div64_u64(XWWDT_MAX_COUNT_WINDOW_COMBINED, xdev->freq) * 1000; + + if (closed_window_percent == 0 || closed_window_percent >= 100) + xdev->close_percent = XWWDT_CLOSE_WINDOW_PERCENT; +@@ -167,6 +176,48 @@ static int xwwdt_probe(struct platform_device *pdev) + xdev->close_percent = closed_window_percent; + + watchdog_init_timeout(xilinx_wwdt_wdd, wwdt_timeout, &pdev->dev); ++ ++ /* Calculate ticks for 1 milli-second */ ++ ms_count = div_u64(xdev->freq, 1000); ++ timeout_ms = xilinx_wwdt_wdd->timeout * 1000; ++ timeout_count = timeout_ms * ms_count; ++ ++ if (timeout_ms > xilinx_wwdt_wdd->max_hw_heartbeat_ms) { ++ /* ++ * To avoid ping restrictions until the minimum hardware heartbeat, ++ * we will solely rely on the open window and ++ * adjust the minimum hardware heartbeat to 0. ++ */ ++ xdev->closed_timeout = 0; ++ xdev->open_timeout = XWWDT_MAX_COUNT_WINDOW; ++ xilinx_wwdt_wdd->min_hw_heartbeat_ms = 0; ++ xilinx_wwdt_wdd->max_hw_heartbeat_ms = xilinx_wwdt_wdd->max_hw_heartbeat_ms / 2; ++ } else { ++ xdev->closed_timeout = div64_u64(timeout_count * xdev->close_percent, 100); ++ xilinx_wwdt_wdd->min_hw_heartbeat_ms = ++ div64_u64(timeout_ms * xdev->close_percent, 100); ++ ++ if (timeout_ms > xilinx_wwdt_wdd->max_hw_heartbeat_ms / 2) { ++ max_per_window_ms = xilinx_wwdt_wdd->max_hw_heartbeat_ms / 2; ++ min_per_window_ms = timeout_ms - max_per_window_ms; ++ ++ if (xilinx_wwdt_wdd->min_hw_heartbeat_ms > max_per_window_ms) { ++ dev_info(xilinx_wwdt_wdd->parent, ++ "Closed window cannot be set to %d%%. Using maximum supported value.\n", ++ xdev->close_percent); ++ xdev->closed_timeout = max_per_window_ms * ms_count; ++ xilinx_wwdt_wdd->min_hw_heartbeat_ms = max_per_window_ms; ++ } else if (xilinx_wwdt_wdd->min_hw_heartbeat_ms < min_per_window_ms) { ++ dev_info(xilinx_wwdt_wdd->parent, ++ "Closed window cannot be set to %d%%. Using minimum supported value.\n", ++ xdev->close_percent); ++ xdev->closed_timeout = min_per_window_ms * ms_count; ++ xilinx_wwdt_wdd->min_hw_heartbeat_ms = min_per_window_ms; ++ } ++ } ++ xdev->open_timeout = timeout_count - xdev->closed_timeout; ++ } ++ + spin_lock_init(&xdev->spinlock); + watchdog_set_drvdata(xilinx_wwdt_wdd, xdev); + watchdog_set_nowayout(xilinx_wwdt_wdd, 1); +diff --git a/fs/btrfs/dev-replace.c b/fs/btrfs/dev-replace.c +index 83d5cdd77f293e..604399e59a3d10 100644 +--- a/fs/btrfs/dev-replace.c ++++ b/fs/btrfs/dev-replace.c +@@ -641,6 +641,7 @@ static int btrfs_dev_replace_start(struct btrfs_fs_info *fs_info, + return ret; + + down_write(&dev_replace->rwsem); ++ dev_replace->replace_task = current; + switch (dev_replace->replace_state) { + case BTRFS_IOCTL_DEV_REPLACE_STATE_NEVER_STARTED: + case BTRFS_IOCTL_DEV_REPLACE_STATE_FINISHED: +@@ -994,6 +995,7 @@ static int btrfs_dev_replace_finishing(struct btrfs_fs_info *fs_info, + list_add(&tgt_device->dev_alloc_list, &fs_devices->alloc_list); + fs_devices->rw_devices++; + ++ dev_replace->replace_task = NULL; + up_write(&dev_replace->rwsem); + btrfs_rm_dev_replace_blocked(fs_info); + +diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c +index b11bfe68dd65fb..43b7b331b2da36 100644 +--- a/fs/btrfs/disk-io.c ++++ b/fs/btrfs/disk-io.c +@@ -3202,8 +3202,7 @@ int btrfs_check_features(struct btrfs_fs_info *fs_info, bool is_rw_mount) + return 0; + } + +-int __cold open_ctree(struct super_block *sb, struct btrfs_fs_devices *fs_devices, +- const char *options) ++int __cold open_ctree(struct super_block *sb, struct btrfs_fs_devices *fs_devices) + { + u32 sectorsize; + u32 nodesize; +diff --git a/fs/btrfs/disk-io.h b/fs/btrfs/disk-io.h +index 99af64d3f27781..127e31e0834709 100644 +--- a/fs/btrfs/disk-io.h ++++ b/fs/btrfs/disk-io.h +@@ -52,8 +52,7 @@ struct extent_buffer *btrfs_find_create_tree_block( + int btrfs_start_pre_rw_mount(struct btrfs_fs_info *fs_info); + int btrfs_check_super_csum(struct btrfs_fs_info *fs_info, + const struct btrfs_super_block *disk_sb); +-int __cold open_ctree(struct super_block *sb, struct btrfs_fs_devices *fs_devices, +- const char *options); ++int __cold open_ctree(struct super_block *sb, struct btrfs_fs_devices *fs_devices); + void __cold close_ctree(struct btrfs_fs_info *fs_info); + int btrfs_validate_super(const struct btrfs_fs_info *fs_info, + const struct btrfs_super_block *sb, int mirror_num); +diff --git a/fs/btrfs/fs.h b/fs/btrfs/fs.h +index 79f64e383eddf8..cbfb225858a59f 100644 +--- a/fs/btrfs/fs.h ++++ b/fs/btrfs/fs.h +@@ -317,6 +317,8 @@ struct btrfs_dev_replace { + + struct percpu_counter bio_counter; + wait_queue_head_t replace_wait; ++ ++ struct task_struct *replace_task; + }; + + /* +diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c +index d067db2619713f..58ffe78132d9d6 100644 +--- a/fs/btrfs/inode.c ++++ b/fs/btrfs/inode.c +@@ -9857,6 +9857,7 @@ static int btrfs_swap_activate(struct swap_info_struct *sis, struct file *file, + if (btrfs_root_dead(root)) { + spin_unlock(&root->root_item_lock); + ++ btrfs_drew_write_unlock(&root->snapshot_lock); + btrfs_exclop_finish(fs_info); + btrfs_warn(fs_info, + "cannot activate swapfile because subvolume %llu is being deleted", +diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c +index c64d0713412231..8292e488d3d777 100644 +--- a/fs/btrfs/super.c ++++ b/fs/btrfs/super.c +@@ -946,8 +946,7 @@ static int get_default_subvol_objectid(struct btrfs_fs_info *fs_info, u64 *objec + } + + static int btrfs_fill_super(struct super_block *sb, +- struct btrfs_fs_devices *fs_devices, +- void *data) ++ struct btrfs_fs_devices *fs_devices) + { + struct inode *inode; + struct btrfs_fs_info *fs_info = btrfs_sb(sb); +@@ -971,7 +970,7 @@ static int btrfs_fill_super(struct super_block *sb, + return err; + } + +- err = open_ctree(sb, fs_devices, (char *)data); ++ err = open_ctree(sb, fs_devices); + if (err) { + btrfs_err(fs_info, "open_ctree failed"); + return err; +@@ -1887,18 +1886,21 @@ static int btrfs_get_tree_super(struct fs_context *fc) + + if (sb->s_root) { + btrfs_close_devices(fs_devices); +- if ((fc->sb_flags ^ sb->s_flags) & SB_RDONLY) +- ret = -EBUSY; ++ /* ++ * At this stage we may have RO flag mismatch between ++ * fc->sb_flags and sb->s_flags. Caller should detect such ++ * mismatch and reconfigure with sb->s_umount rwsem held if ++ * needed. ++ */ + } else { + snprintf(sb->s_id, sizeof(sb->s_id), "%pg", bdev); + shrinker_debugfs_rename(sb->s_shrink, "sb-btrfs:%s", sb->s_id); + btrfs_sb(sb)->bdev_holder = &btrfs_fs_type; +- ret = btrfs_fill_super(sb, fs_devices, NULL); +- } +- +- if (ret) { +- deactivate_locked_super(sb); +- return ret; ++ ret = btrfs_fill_super(sb, fs_devices); ++ if (ret) { ++ deactivate_locked_super(sb); ++ return ret; ++ } + } + + btrfs_clear_oneshot_options(fs_info); +@@ -1984,39 +1986,18 @@ static int btrfs_get_tree_super(struct fs_context *fc) + * btrfs or not, setting the whole super block RO. To make per-subvolume mounting + * work with different options work we need to keep backward compatibility. + */ +-static struct vfsmount *btrfs_reconfigure_for_mount(struct fs_context *fc) ++static int btrfs_reconfigure_for_mount(struct fs_context *fc, struct vfsmount *mnt) + { +- struct vfsmount *mnt; +- int ret; +- const bool ro2rw = !(fc->sb_flags & SB_RDONLY); +- +- /* +- * We got an EBUSY because our SB_RDONLY flag didn't match the existing +- * super block, so invert our setting here and retry the mount so we +- * can get our vfsmount. +- */ +- if (ro2rw) +- fc->sb_flags |= SB_RDONLY; +- else +- fc->sb_flags &= ~SB_RDONLY; +- +- mnt = fc_mount(fc); +- if (IS_ERR(mnt)) +- return mnt; ++ int ret = 0; + +- if (!ro2rw) +- return mnt; ++ if (fc->sb_flags & SB_RDONLY) ++ return ret; + +- /* We need to convert to rw, call reconfigure. */ +- fc->sb_flags &= ~SB_RDONLY; + down_write(&mnt->mnt_sb->s_umount); +- ret = btrfs_reconfigure(fc); ++ if (!(fc->sb_flags & SB_RDONLY) && (mnt->mnt_sb->s_flags & SB_RDONLY)) ++ ret = btrfs_reconfigure(fc); + up_write(&mnt->mnt_sb->s_umount); +- if (ret) { +- mntput(mnt); +- return ERR_PTR(ret); +- } +- return mnt; ++ return ret; + } + + static int btrfs_get_tree_subvol(struct fs_context *fc) +@@ -2026,6 +2007,7 @@ static int btrfs_get_tree_subvol(struct fs_context *fc) + struct fs_context *dup_fc; + struct dentry *dentry; + struct vfsmount *mnt; ++ int ret = 0; + + /* + * Setup a dummy root and fs_info for test/set super. This is because +@@ -2068,11 +2050,16 @@ static int btrfs_get_tree_subvol(struct fs_context *fc) + fc->security = NULL; + + mnt = fc_mount(dup_fc); +- if (PTR_ERR_OR_ZERO(mnt) == -EBUSY) +- mnt = btrfs_reconfigure_for_mount(dup_fc); +- put_fs_context(dup_fc); +- if (IS_ERR(mnt)) ++ if (IS_ERR(mnt)) { ++ put_fs_context(dup_fc); + return PTR_ERR(mnt); ++ } ++ ret = btrfs_reconfigure_for_mount(dup_fc, mnt); ++ put_fs_context(dup_fc); ++ if (ret) { ++ mntput(mnt); ++ return ret; ++ } + + /* + * This free's ->subvol_name, because if it isn't set we have to +diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c +index eb51b609190fb5..0c4d14c59ebec5 100644 +--- a/fs/btrfs/volumes.c ++++ b/fs/btrfs/volumes.c +@@ -732,6 +732,114 @@ const u8 *btrfs_sb_fsid_ptr(const struct btrfs_super_block *sb) + return has_metadata_uuid ? sb->metadata_uuid : sb->fsid; + } + ++/* ++ * We can have very weird soft links passed in. ++ * One example is "/proc/self/fd/", which can be a soft link to ++ * a block device. ++ * ++ * But it's never a good idea to use those weird names. ++ * Here we check if the path (not following symlinks) is a good one inside ++ * "/dev/". ++ */ ++static bool is_good_dev_path(const char *dev_path) ++{ ++ struct path path = { .mnt = NULL, .dentry = NULL }; ++ char *path_buf = NULL; ++ char *resolved_path; ++ bool is_good = false; ++ int ret; ++ ++ if (!dev_path) ++ goto out; ++ ++ path_buf = kmalloc(PATH_MAX, GFP_KERNEL); ++ if (!path_buf) ++ goto out; ++ ++ /* ++ * Do not follow soft link, just check if the original path is inside ++ * "/dev/". ++ */ ++ ret = kern_path(dev_path, 0, &path); ++ if (ret) ++ goto out; ++ resolved_path = d_path(&path, path_buf, PATH_MAX); ++ if (IS_ERR(resolved_path)) ++ goto out; ++ if (strncmp(resolved_path, "/dev/", strlen("/dev/"))) ++ goto out; ++ is_good = true; ++out: ++ kfree(path_buf); ++ path_put(&path); ++ return is_good; ++} ++ ++static int get_canonical_dev_path(const char *dev_path, char *canonical) ++{ ++ struct path path = { .mnt = NULL, .dentry = NULL }; ++ char *path_buf = NULL; ++ char *resolved_path; ++ int ret; ++ ++ if (!dev_path) { ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ path_buf = kmalloc(PATH_MAX, GFP_KERNEL); ++ if (!path_buf) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ ret = kern_path(dev_path, LOOKUP_FOLLOW, &path); ++ if (ret) ++ goto out; ++ resolved_path = d_path(&path, path_buf, PATH_MAX); ++ ret = strscpy(canonical, resolved_path, PATH_MAX); ++out: ++ kfree(path_buf); ++ path_put(&path); ++ return ret; ++} ++ ++static bool is_same_device(struct btrfs_device *device, const char *new_path) ++{ ++ struct path old = { .mnt = NULL, .dentry = NULL }; ++ struct path new = { .mnt = NULL, .dentry = NULL }; ++ char *old_path = NULL; ++ bool is_same = false; ++ int ret; ++ ++ if (!device->name) ++ goto out; ++ ++ old_path = kzalloc(PATH_MAX, GFP_NOFS); ++ if (!old_path) ++ goto out; ++ ++ rcu_read_lock(); ++ ret = strscpy(old_path, rcu_str_deref(device->name), PATH_MAX); ++ rcu_read_unlock(); ++ if (ret < 0) ++ goto out; ++ ++ ret = kern_path(old_path, LOOKUP_FOLLOW, &old); ++ if (ret) ++ goto out; ++ ret = kern_path(new_path, LOOKUP_FOLLOW, &new); ++ if (ret) ++ goto out; ++ if (path_equal(&old, &new)) ++ is_same = true; ++out: ++ kfree(old_path); ++ path_put(&old); ++ path_put(&new); ++ return is_same; ++} ++ + /* + * Add new device to list of registered devices + * +@@ -852,7 +960,7 @@ static noinline struct btrfs_device *device_list_add(const char *path, + MAJOR(path_devt), MINOR(path_devt), + current->comm, task_pid_nr(current)); + +- } else if (!device->name || strcmp(device->name->str, path)) { ++ } else if (!device->name || !is_same_device(device, path)) { + /* + * When FS is already mounted. + * 1. If you are here and if the device->name is NULL that +@@ -1383,12 +1491,23 @@ struct btrfs_device *btrfs_scan_one_device(const char *path, blk_mode_t flags, + bool new_device_added = false; + struct btrfs_device *device = NULL; + struct file *bdev_file; ++ char *canonical_path = NULL; + u64 bytenr; + dev_t devt; + int ret; + + lockdep_assert_held(&uuid_mutex); + ++ if (!is_good_dev_path(path)) { ++ canonical_path = kmalloc(PATH_MAX, GFP_KERNEL); ++ if (canonical_path) { ++ ret = get_canonical_dev_path(path, canonical_path); ++ if (ret < 0) { ++ kfree(canonical_path); ++ canonical_path = NULL; ++ } ++ } ++ } + /* + * Avoid an exclusive open here, as the systemd-udev may initiate the + * device scan which may race with the user's mount or mkfs command, +@@ -1433,7 +1552,8 @@ struct btrfs_device *btrfs_scan_one_device(const char *path, blk_mode_t flags, + goto free_disk_super; + } + +- device = device_list_add(path, disk_super, &new_device_added); ++ device = device_list_add(canonical_path ? : path, disk_super, ++ &new_device_added); + if (!IS_ERR(device) && new_device_added) + btrfs_free_stale_devices(device->devt, device); + +@@ -1442,6 +1562,7 @@ struct btrfs_device *btrfs_scan_one_device(const char *path, blk_mode_t flags, + + error_bdev_put: + fput(bdev_file); ++ kfree(canonical_path); + + return device; + } +@@ -2721,8 +2842,6 @@ int btrfs_init_new_device(struct btrfs_fs_info *fs_info, const char *device_path + set_blocksize(device->bdev_file, BTRFS_BDEV_BLOCKSIZE); + + if (seeding_dev) { +- btrfs_clear_sb_rdonly(sb); +- + /* GFP_KERNEL allocation must not be under device_list_mutex */ + seed_devices = btrfs_init_sprout(fs_info); + if (IS_ERR(seed_devices)) { +@@ -2865,8 +2984,6 @@ int btrfs_init_new_device(struct btrfs_fs_info *fs_info, const char *device_path + mutex_unlock(&fs_info->chunk_mutex); + mutex_unlock(&fs_info->fs_devices->device_list_mutex); + error_trans: +- if (seeding_dev) +- btrfs_set_sb_rdonly(sb); + if (trans) + btrfs_end_transaction(trans); + error_free_zone: +@@ -6481,13 +6598,15 @@ int btrfs_map_block(struct btrfs_fs_info *fs_info, enum btrfs_map_op op, + max_len = btrfs_max_io_len(map, map_offset, &io_geom); + *length = min_t(u64, map->chunk_len - map_offset, max_len); + +- down_read(&dev_replace->rwsem); ++ if (dev_replace->replace_task != current) ++ down_read(&dev_replace->rwsem); ++ + dev_replace_is_ongoing = btrfs_dev_replace_is_ongoing(dev_replace); + /* + * Hold the semaphore for read during the whole operation, write is + * requested at commit time but must wait. + */ +- if (!dev_replace_is_ongoing) ++ if (!dev_replace_is_ongoing && dev_replace->replace_task != current) + up_read(&dev_replace->rwsem); + + switch (map->type & BTRFS_BLOCK_GROUP_PROFILE_MASK) { +@@ -6627,7 +6746,7 @@ int btrfs_map_block(struct btrfs_fs_info *fs_info, enum btrfs_map_op op, + bioc->mirror_num = io_geom.mirror_num; + + out: +- if (dev_replace_is_ongoing) { ++ if (dev_replace_is_ongoing && dev_replace->replace_task != current) { + lockdep_assert_held(&dev_replace->rwsem); + /* Unlock and let waiting writers proceed */ + up_read(&dev_replace->rwsem); +diff --git a/fs/dlm/lock.c b/fs/dlm/lock.c +index 865dc70a9dfc47..dddedaef5e93dd 100644 +--- a/fs/dlm/lock.c ++++ b/fs/dlm/lock.c +@@ -2861,16 +2861,14 @@ static int validate_lock_args(struct dlm_ls *ls, struct dlm_lkb *lkb, + case -EINVAL: + /* annoy the user because dlm usage is wrong */ + WARN_ON(1); +- log_error(ls, "%s %d %x %x %x %d %d %s", __func__, ++ log_error(ls, "%s %d %x %x %x %d %d", __func__, + rv, lkb->lkb_id, dlm_iflags_val(lkb), args->flags, +- lkb->lkb_status, lkb->lkb_wait_type, +- lkb->lkb_resource->res_name); ++ lkb->lkb_status, lkb->lkb_wait_type); + break; + default: +- log_debug(ls, "%s %d %x %x %x %d %d %s", __func__, ++ log_debug(ls, "%s %d %x %x %x %d %d", __func__, + rv, lkb->lkb_id, dlm_iflags_val(lkb), args->flags, +- lkb->lkb_status, lkb->lkb_wait_type, +- lkb->lkb_resource->res_name); ++ lkb->lkb_status, lkb->lkb_wait_type); + break; + } + +diff --git a/fs/eventpoll.c b/fs/eventpoll.c +index 1ae4542f0bd88b..90fbab6b6f0363 100644 +--- a/fs/eventpoll.c ++++ b/fs/eventpoll.c +@@ -823,7 +823,8 @@ static bool __ep_remove(struct eventpoll *ep, struct epitem *epi, bool force) + to_free = NULL; + head = file->f_ep; + if (head->first == &epi->fllink && !epi->fllink.next) { +- file->f_ep = NULL; ++ /* See eventpoll_release() for details. */ ++ WRITE_ONCE(file->f_ep, NULL); + if (!is_file_epoll(file)) { + struct epitems_head *v; + v = container_of(head, struct epitems_head, epitems); +@@ -1603,7 +1604,8 @@ static int attach_epitem(struct file *file, struct epitem *epi) + spin_unlock(&file->f_lock); + goto allocate; + } +- file->f_ep = head; ++ /* See eventpoll_release() for details. */ ++ WRITE_ONCE(file->f_ep, head); + to_free = NULL; + } + hlist_add_head_rcu(&epi->fllink, file->f_ep); +diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c +index 88f98dc4402753..60909af2d4a537 100644 +--- a/fs/ext4/extents.c ++++ b/fs/ext4/extents.c +@@ -4482,7 +4482,7 @@ static int ext4_alloc_file_blocks(struct file *file, ext4_lblk_t offset, + int depth = 0; + struct ext4_map_blocks map; + unsigned int credits; +- loff_t epos; ++ loff_t epos, old_size = i_size_read(inode); + + BUG_ON(!ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)); + map.m_lblk = offset; +@@ -4541,6 +4541,11 @@ static int ext4_alloc_file_blocks(struct file *file, ext4_lblk_t offset, + if (ext4_update_inode_size(inode, epos) & 0x1) + inode_set_mtime_to_ts(inode, + inode_get_ctime(inode)); ++ if (epos > old_size) { ++ pagecache_isize_extended(inode, old_size, epos); ++ ext4_zero_partial_blocks(handle, inode, ++ old_size, epos - old_size); ++ } + } + ret2 = ext4_mark_inode_dirty(handle, inode); + ext4_update_inode_fsync_trans(handle, inode, 1); +diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c +index 99d09cd9c6a37e..67a5b937f5a92d 100644 +--- a/fs/ext4/inode.c ++++ b/fs/ext4/inode.c +@@ -1307,8 +1307,10 @@ static int ext4_write_end(struct file *file, + folio_unlock(folio); + folio_put(folio); + +- if (old_size < pos && !verity) ++ if (old_size < pos && !verity) { + pagecache_isize_extended(inode, old_size, pos); ++ ext4_zero_partial_blocks(handle, inode, old_size, pos - old_size); ++ } + /* + * Don't mark the inode dirty under folio lock. First, it unnecessarily + * makes the holding time of folio lock longer. Second, it forces lock +@@ -1423,8 +1425,10 @@ static int ext4_journalled_write_end(struct file *file, + folio_unlock(folio); + folio_put(folio); + +- if (old_size < pos && !verity) ++ if (old_size < pos && !verity) { + pagecache_isize_extended(inode, old_size, pos); ++ ext4_zero_partial_blocks(handle, inode, old_size, pos - old_size); ++ } + + if (size_changed) { + ret2 = ext4_mark_inode_dirty(handle, inode); +@@ -2985,7 +2989,8 @@ static int ext4_da_do_write_end(struct address_space *mapping, + struct inode *inode = mapping->host; + loff_t old_size = inode->i_size; + bool disksize_changed = false; +- loff_t new_i_size; ++ loff_t new_i_size, zero_len = 0; ++ handle_t *handle; + + if (unlikely(!folio_buffers(folio))) { + folio_unlock(folio); +@@ -3029,18 +3034,21 @@ static int ext4_da_do_write_end(struct address_space *mapping, + folio_unlock(folio); + folio_put(folio); + +- if (old_size < pos) ++ if (pos > old_size) { + pagecache_isize_extended(inode, old_size, pos); ++ zero_len = pos - old_size; ++ } + +- if (disksize_changed) { +- handle_t *handle; ++ if (!disksize_changed && !zero_len) ++ return copied; + +- handle = ext4_journal_start(inode, EXT4_HT_INODE, 2); +- if (IS_ERR(handle)) +- return PTR_ERR(handle); +- ext4_mark_inode_dirty(handle, inode); +- ext4_journal_stop(handle); +- } ++ handle = ext4_journal_start(inode, EXT4_HT_INODE, 2); ++ if (IS_ERR(handle)) ++ return PTR_ERR(handle); ++ if (zero_len) ++ ext4_zero_partial_blocks(handle, inode, old_size, zero_len); ++ ext4_mark_inode_dirty(handle, inode); ++ ext4_journal_stop(handle); + + return copied; + } +@@ -5426,6 +5434,14 @@ int ext4_setattr(struct mnt_idmap *idmap, struct dentry *dentry, + } + + if (attr->ia_size != inode->i_size) { ++ /* attach jbd2 jinode for EOF folio tail zeroing */ ++ if (attr->ia_size & (inode->i_sb->s_blocksize - 1) || ++ oldsize & (inode->i_sb->s_blocksize - 1)) { ++ error = ext4_inode_attach_jinode(inode); ++ if (error) ++ goto err_out; ++ } ++ + handle = ext4_journal_start(inode, EXT4_HT_INODE, 3); + if (IS_ERR(handle)) { + error = PTR_ERR(handle); +@@ -5436,12 +5452,17 @@ int ext4_setattr(struct mnt_idmap *idmap, struct dentry *dentry, + orphan = 1; + } + /* +- * Update c/mtime on truncate up, ext4_truncate() will +- * update c/mtime in shrink case below ++ * Update c/mtime and tail zero the EOF folio on ++ * truncate up. ext4_truncate() handles the shrink case ++ * below. + */ +- if (!shrink) ++ if (!shrink) { + inode_set_mtime_to_ts(inode, + inode_set_ctime_current(inode)); ++ if (oldsize & (inode->i_sb->s_blocksize - 1)) ++ ext4_block_truncate_page(handle, ++ inode->i_mapping, oldsize); ++ } + + if (shrink) + ext4_fc_track_range(handle, inode, +diff --git a/fs/f2fs/data.c b/fs/f2fs/data.c +index 9efe4c00d75bb3..da0960d496ae09 100644 +--- a/fs/f2fs/data.c ++++ b/fs/f2fs/data.c +@@ -1819,16 +1819,6 @@ bool f2fs_overwrite_io(struct inode *inode, loff_t pos, size_t len) + return true; + } + +-static inline u64 bytes_to_blks(struct inode *inode, u64 bytes) +-{ +- return (bytes >> inode->i_blkbits); +-} +- +-static inline u64 blks_to_bytes(struct inode *inode, u64 blks) +-{ +- return (blks << inode->i_blkbits); +-} +- + static int f2fs_xattr_fiemap(struct inode *inode, + struct fiemap_extent_info *fieinfo) + { +@@ -1854,7 +1844,7 @@ static int f2fs_xattr_fiemap(struct inode *inode, + return err; + } + +- phys = blks_to_bytes(inode, ni.blk_addr); ++ phys = F2FS_BLK_TO_BYTES(ni.blk_addr); + offset = offsetof(struct f2fs_inode, i_addr) + + sizeof(__le32) * (DEF_ADDRS_PER_INODE - + get_inline_xattr_addrs(inode)); +@@ -1886,7 +1876,7 @@ static int f2fs_xattr_fiemap(struct inode *inode, + return err; + } + +- phys = blks_to_bytes(inode, ni.blk_addr); ++ phys = F2FS_BLK_TO_BYTES(ni.blk_addr); + len = inode->i_sb->s_blocksize; + + f2fs_put_page(page, 1); +@@ -1906,7 +1896,7 @@ int f2fs_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, + u64 start, u64 len) + { + struct f2fs_map_blocks map; +- sector_t start_blk, last_blk; ++ sector_t start_blk, last_blk, blk_len, max_len; + pgoff_t next_pgofs; + u64 logical = 0, phys = 0, size = 0; + u32 flags = 0; +@@ -1948,16 +1938,15 @@ int f2fs_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, + goto out; + } + +- if (bytes_to_blks(inode, len) == 0) +- len = blks_to_bytes(inode, 1); +- +- start_blk = bytes_to_blks(inode, start); +- last_blk = bytes_to_blks(inode, start + len - 1); ++ start_blk = F2FS_BYTES_TO_BLK(start); ++ last_blk = F2FS_BYTES_TO_BLK(start + len - 1); ++ blk_len = last_blk - start_blk + 1; ++ max_len = F2FS_BYTES_TO_BLK(maxbytes) - start_blk; + + next: + memset(&map, 0, sizeof(map)); + map.m_lblk = start_blk; +- map.m_len = bytes_to_blks(inode, len); ++ map.m_len = blk_len; + map.m_next_pgofs = &next_pgofs; + map.m_seg_type = NO_CHECK_TYPE; + +@@ -1974,12 +1963,23 @@ int f2fs_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, + if (!compr_cluster && !(map.m_flags & F2FS_MAP_FLAGS)) { + start_blk = next_pgofs; + +- if (blks_to_bytes(inode, start_blk) < maxbytes) ++ if (F2FS_BLK_TO_BYTES(start_blk) < maxbytes) + goto prep_next; + + flags |= FIEMAP_EXTENT_LAST; + } + ++ /* ++ * current extent may cross boundary of inquiry, increase len to ++ * requery. ++ */ ++ if (!compr_cluster && (map.m_flags & F2FS_MAP_MAPPED) && ++ map.m_lblk + map.m_len - 1 == last_blk && ++ blk_len != max_len) { ++ blk_len = max_len; ++ goto next; ++ } ++ + compr_appended = false; + /* In a case of compressed cluster, append this to the last extent */ + if (compr_cluster && ((map.m_flags & F2FS_MAP_DELALLOC) || +@@ -2011,14 +2011,14 @@ int f2fs_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, + } else if (compr_appended) { + unsigned int appended_blks = cluster_size - + count_in_cluster + 1; +- size += blks_to_bytes(inode, appended_blks); ++ size += F2FS_BLK_TO_BYTES(appended_blks); + start_blk += appended_blks; + compr_cluster = false; + } else { +- logical = blks_to_bytes(inode, start_blk); ++ logical = F2FS_BLK_TO_BYTES(start_blk); + phys = __is_valid_data_blkaddr(map.m_pblk) ? +- blks_to_bytes(inode, map.m_pblk) : 0; +- size = blks_to_bytes(inode, map.m_len); ++ F2FS_BLK_TO_BYTES(map.m_pblk) : 0; ++ size = F2FS_BLK_TO_BYTES(map.m_len); + flags = 0; + + if (compr_cluster) { +@@ -2026,13 +2026,13 @@ int f2fs_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, + count_in_cluster += map.m_len; + if (count_in_cluster == cluster_size) { + compr_cluster = false; +- size += blks_to_bytes(inode, 1); ++ size += F2FS_BLKSIZE; + } + } else if (map.m_flags & F2FS_MAP_DELALLOC) { + flags = FIEMAP_EXTENT_UNWRITTEN; + } + +- start_blk += bytes_to_blks(inode, size); ++ start_blk += F2FS_BYTES_TO_BLK(size); + } + + prep_next: +@@ -2070,7 +2070,7 @@ static int f2fs_read_single_page(struct inode *inode, struct folio *folio, + struct readahead_control *rac) + { + struct bio *bio = *bio_ret; +- const unsigned blocksize = blks_to_bytes(inode, 1); ++ const unsigned int blocksize = F2FS_BLKSIZE; + sector_t block_in_file; + sector_t last_block; + sector_t last_block_in_file; +@@ -2080,8 +2080,8 @@ static int f2fs_read_single_page(struct inode *inode, struct folio *folio, + + block_in_file = (sector_t)index; + last_block = block_in_file + nr_pages; +- last_block_in_file = bytes_to_blks(inode, +- f2fs_readpage_limit(inode) + blocksize - 1); ++ last_block_in_file = F2FS_BYTES_TO_BLK(f2fs_readpage_limit(inode) + ++ blocksize - 1); + if (last_block > last_block_in_file) + last_block = last_block_in_file; + +@@ -2181,7 +2181,7 @@ int f2fs_read_multi_pages(struct compress_ctx *cc, struct bio **bio_ret, + struct bio *bio = *bio_ret; + unsigned int start_idx = cc->cluster_idx << cc->log_cluster_size; + sector_t last_block_in_file; +- const unsigned blocksize = blks_to_bytes(inode, 1); ++ const unsigned int blocksize = F2FS_BLKSIZE; + struct decompress_io_ctx *dic = NULL; + struct extent_info ei = {}; + bool from_dnode = true; +@@ -2190,8 +2190,8 @@ int f2fs_read_multi_pages(struct compress_ctx *cc, struct bio **bio_ret, + + f2fs_bug_on(sbi, f2fs_cluster_is_empty(cc)); + +- last_block_in_file = bytes_to_blks(inode, +- f2fs_readpage_limit(inode) + blocksize - 1); ++ last_block_in_file = F2FS_BYTES_TO_BLK(f2fs_readpage_limit(inode) + ++ blocksize - 1); + + /* get rid of pages beyond EOF */ + for (i = 0; i < cc->cluster_size; i++) { +@@ -3952,7 +3952,7 @@ static int check_swap_activate(struct swap_info_struct *sis, + * to be very smart. + */ + cur_lblock = 0; +- last_lblock = bytes_to_blks(inode, i_size_read(inode)); ++ last_lblock = F2FS_BYTES_TO_BLK(i_size_read(inode)); + + while (cur_lblock < last_lblock && cur_lblock < sis->max) { + struct f2fs_map_blocks map; +@@ -4195,8 +4195,8 @@ static int f2fs_iomap_begin(struct inode *inode, loff_t offset, loff_t length, + pgoff_t next_pgofs = 0; + int err; + +- map.m_lblk = bytes_to_blks(inode, offset); +- map.m_len = bytes_to_blks(inode, offset + length - 1) - map.m_lblk + 1; ++ map.m_lblk = F2FS_BYTES_TO_BLK(offset); ++ map.m_len = F2FS_BYTES_TO_BLK(offset + length - 1) - map.m_lblk + 1; + map.m_next_pgofs = &next_pgofs; + map.m_seg_type = f2fs_rw_hint_to_seg_type(F2FS_I_SB(inode), + inode->i_write_hint); +@@ -4207,7 +4207,7 @@ static int f2fs_iomap_begin(struct inode *inode, loff_t offset, loff_t length, + if (err) + return err; + +- iomap->offset = blks_to_bytes(inode, map.m_lblk); ++ iomap->offset = F2FS_BLK_TO_BYTES(map.m_lblk); + + /* + * When inline encryption is enabled, sometimes I/O to an encrypted file +@@ -4227,21 +4227,21 @@ static int f2fs_iomap_begin(struct inode *inode, loff_t offset, loff_t length, + if (WARN_ON_ONCE(map.m_pblk == NEW_ADDR)) + return -EINVAL; + +- iomap->length = blks_to_bytes(inode, map.m_len); ++ iomap->length = F2FS_BLK_TO_BYTES(map.m_len); + iomap->type = IOMAP_MAPPED; + iomap->flags |= IOMAP_F_MERGED; + iomap->bdev = map.m_bdev; +- iomap->addr = blks_to_bytes(inode, map.m_pblk); ++ iomap->addr = F2FS_BLK_TO_BYTES(map.m_pblk); + } else { + if (flags & IOMAP_WRITE) + return -ENOTBLK; + + if (map.m_pblk == NULL_ADDR) { +- iomap->length = blks_to_bytes(inode, next_pgofs) - +- iomap->offset; ++ iomap->length = F2FS_BLK_TO_BYTES(next_pgofs) - ++ iomap->offset; + iomap->type = IOMAP_HOLE; + } else if (map.m_pblk == NEW_ADDR) { +- iomap->length = blks_to_bytes(inode, map.m_len); ++ iomap->length = F2FS_BLK_TO_BYTES(map.m_len); + iomap->type = IOMAP_UNWRITTEN; + } else { + f2fs_bug_on(F2FS_I_SB(inode), 1); +diff --git a/fs/f2fs/extent_cache.c b/fs/f2fs/extent_cache.c +index 62ac440d94168a..fb09c8e9bc5732 100644 +--- a/fs/f2fs/extent_cache.c ++++ b/fs/f2fs/extent_cache.c +@@ -346,21 +346,22 @@ static struct extent_tree *__grab_extent_tree(struct inode *inode, + } + + static unsigned int __free_extent_tree(struct f2fs_sb_info *sbi, +- struct extent_tree *et) ++ struct extent_tree *et, unsigned int nr_shrink) + { + struct rb_node *node, *next; + struct extent_node *en; +- unsigned int count = atomic_read(&et->node_cnt); ++ unsigned int count; + + node = rb_first_cached(&et->root); +- while (node) { ++ ++ for (count = 0; node && count < nr_shrink; count++) { + next = rb_next(node); + en = rb_entry(node, struct extent_node, rb_node); + __release_extent_node(sbi, et, en); + node = next; + } + +- return count - atomic_read(&et->node_cnt); ++ return count; + } + + static void __drop_largest_extent(struct extent_tree *et, +@@ -579,6 +580,30 @@ static struct extent_node *__insert_extent_tree(struct f2fs_sb_info *sbi, + return en; + } + ++static unsigned int __destroy_extent_node(struct inode *inode, ++ enum extent_type type) ++{ ++ struct f2fs_sb_info *sbi = F2FS_I_SB(inode); ++ struct extent_tree *et = F2FS_I(inode)->extent_tree[type]; ++ unsigned int nr_shrink = type == EX_READ ? ++ READ_EXTENT_CACHE_SHRINK_NUMBER : ++ AGE_EXTENT_CACHE_SHRINK_NUMBER; ++ unsigned int node_cnt = 0; ++ ++ if (!et || !atomic_read(&et->node_cnt)) ++ return 0; ++ ++ while (atomic_read(&et->node_cnt)) { ++ write_lock(&et->lock); ++ node_cnt += __free_extent_tree(sbi, et, nr_shrink); ++ write_unlock(&et->lock); ++ } ++ ++ f2fs_bug_on(sbi, atomic_read(&et->node_cnt)); ++ ++ return node_cnt; ++} ++ + static void __update_extent_tree_range(struct inode *inode, + struct extent_info *tei, enum extent_type type) + { +@@ -649,7 +674,9 @@ static void __update_extent_tree_range(struct inode *inode, + } + + if (end < org_end && (type != EX_READ || +- org_end - end >= F2FS_MIN_EXTENT_LEN)) { ++ (org_end - end >= F2FS_MIN_EXTENT_LEN && ++ atomic_read(&et->node_cnt) < ++ sbi->max_read_extent_count))) { + if (parts) { + __set_extent_info(&ei, + end, org_end - end, +@@ -717,9 +744,6 @@ static void __update_extent_tree_range(struct inode *inode, + } + } + +- if (is_inode_flag_set(inode, FI_NO_EXTENT)) +- __free_extent_tree(sbi, et); +- + if (et->largest_updated) { + et->largest_updated = false; + updated = true; +@@ -737,6 +761,9 @@ static void __update_extent_tree_range(struct inode *inode, + out_read_extent_cache: + write_unlock(&et->lock); + ++ if (is_inode_flag_set(inode, FI_NO_EXTENT)) ++ __destroy_extent_node(inode, EX_READ); ++ + if (updated) + f2fs_mark_inode_dirty_sync(inode, true); + } +@@ -899,10 +926,14 @@ static unsigned int __shrink_extent_tree(struct f2fs_sb_info *sbi, int nr_shrink + list_for_each_entry_safe(et, next, &eti->zombie_list, list) { + if (atomic_read(&et->node_cnt)) { + write_lock(&et->lock); +- node_cnt += __free_extent_tree(sbi, et); ++ node_cnt += __free_extent_tree(sbi, et, ++ nr_shrink - node_cnt - tree_cnt); + write_unlock(&et->lock); + } +- f2fs_bug_on(sbi, atomic_read(&et->node_cnt)); ++ ++ if (atomic_read(&et->node_cnt)) ++ goto unlock_out; ++ + list_del_init(&et->list); + radix_tree_delete(&eti->extent_tree_root, et->ino); + kmem_cache_free(extent_tree_slab, et); +@@ -1041,23 +1072,6 @@ unsigned int f2fs_shrink_age_extent_tree(struct f2fs_sb_info *sbi, int nr_shrink + return __shrink_extent_tree(sbi, nr_shrink, EX_BLOCK_AGE); + } + +-static unsigned int __destroy_extent_node(struct inode *inode, +- enum extent_type type) +-{ +- struct f2fs_sb_info *sbi = F2FS_I_SB(inode); +- struct extent_tree *et = F2FS_I(inode)->extent_tree[type]; +- unsigned int node_cnt = 0; +- +- if (!et || !atomic_read(&et->node_cnt)) +- return 0; +- +- write_lock(&et->lock); +- node_cnt = __free_extent_tree(sbi, et); +- write_unlock(&et->lock); +- +- return node_cnt; +-} +- + void f2fs_destroy_extent_node(struct inode *inode) + { + __destroy_extent_node(inode, EX_READ); +@@ -1066,7 +1080,6 @@ void f2fs_destroy_extent_node(struct inode *inode) + + static void __drop_extent_tree(struct inode *inode, enum extent_type type) + { +- struct f2fs_sb_info *sbi = F2FS_I_SB(inode); + struct extent_tree *et = F2FS_I(inode)->extent_tree[type]; + bool updated = false; + +@@ -1074,7 +1087,6 @@ static void __drop_extent_tree(struct inode *inode, enum extent_type type) + return; + + write_lock(&et->lock); +- __free_extent_tree(sbi, et); + if (type == EX_READ) { + set_inode_flag(inode, FI_NO_EXTENT); + if (et->largest.len) { +@@ -1083,6 +1095,9 @@ static void __drop_extent_tree(struct inode *inode, enum extent_type type) + } + } + write_unlock(&et->lock); ++ ++ __destroy_extent_node(inode, type); ++ + if (updated) + f2fs_mark_inode_dirty_sync(inode, true); + } +@@ -1156,6 +1171,7 @@ void f2fs_init_extent_cache_info(struct f2fs_sb_info *sbi) + sbi->hot_data_age_threshold = DEF_HOT_DATA_AGE_THRESHOLD; + sbi->warm_data_age_threshold = DEF_WARM_DATA_AGE_THRESHOLD; + sbi->last_age_weight = LAST_AGE_WEIGHT; ++ sbi->max_read_extent_count = DEF_MAX_READ_EXTENT_COUNT; + } + + int __init f2fs_create_extent_cache(void) +diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h +index 93a5e1c24e566e..cec3dd205b3df8 100644 +--- a/fs/f2fs/f2fs.h ++++ b/fs/f2fs/f2fs.h +@@ -634,6 +634,9 @@ enum { + #define DEF_HOT_DATA_AGE_THRESHOLD 262144 + #define DEF_WARM_DATA_AGE_THRESHOLD 2621440 + ++/* default max read extent count per inode */ ++#define DEF_MAX_READ_EXTENT_COUNT 10240 ++ + /* extent cache type */ + enum extent_type { + EX_READ, +@@ -1619,6 +1622,7 @@ struct f2fs_sb_info { + /* for extent tree cache */ + struct extent_tree_info extent_tree[NR_EXTENT_CACHES]; + atomic64_t allocated_data_blocks; /* for block age extent_cache */ ++ unsigned int max_read_extent_count; /* max read extent count per inode */ + + /* The threshold used for hot and warm data seperation*/ + unsigned int hot_data_age_threshold; +diff --git a/fs/f2fs/inode.c b/fs/f2fs/inode.c +index 1ed86df343a5d1..10780e37fc7b68 100644 +--- a/fs/f2fs/inode.c ++++ b/fs/f2fs/inode.c +@@ -775,8 +775,10 @@ int f2fs_write_inode(struct inode *inode, struct writeback_control *wbc) + !is_inode_flag_set(inode, FI_DIRTY_INODE)) + return 0; + +- if (!f2fs_is_checkpoint_ready(sbi)) ++ if (!f2fs_is_checkpoint_ready(sbi)) { ++ f2fs_mark_inode_dirty_sync(inode, true); + return -ENOSPC; ++ } + + /* + * We need to balance fs here to prevent from producing dirty node pages +diff --git a/fs/f2fs/node.c b/fs/f2fs/node.c +index af36c6d6542b8c..4d7b9fd6ef31ab 100644 +--- a/fs/f2fs/node.c ++++ b/fs/f2fs/node.c +@@ -1341,7 +1341,12 @@ struct page *f2fs_new_node_page(struct dnode_of_data *dn, unsigned int ofs) + err = -EFSCORRUPTED; + dec_valid_node_count(sbi, dn->inode, !ofs); + set_sbi_flag(sbi, SBI_NEED_FSCK); +- f2fs_handle_error(sbi, ERROR_INVALID_BLKADDR); ++ f2fs_warn_ratelimited(sbi, ++ "f2fs_new_node_page: inconsistent nat entry, " ++ "ino:%u, nid:%u, blkaddr:%u, ver:%u, flag:%u", ++ new_ni.ino, new_ni.nid, new_ni.blk_addr, ++ new_ni.version, new_ni.flag); ++ f2fs_handle_error(sbi, ERROR_INCONSISTENT_NAT); + goto fail; + } + #endif +diff --git a/fs/f2fs/sysfs.c b/fs/f2fs/sysfs.c +index c56e8c87393523..d9a44f03e558bf 100644 +--- a/fs/f2fs/sysfs.c ++++ b/fs/f2fs/sysfs.c +@@ -789,6 +789,13 @@ static ssize_t __sbi_store(struct f2fs_attr *a, + return count; + } + ++ if (!strcmp(a->attr.name, "max_read_extent_count")) { ++ if (t > UINT_MAX) ++ return -EINVAL; ++ *ui = (unsigned int)t; ++ return count; ++ } ++ + if (!strcmp(a->attr.name, "ipu_policy")) { + if (t >= BIT(F2FS_IPU_MAX)) + return -EINVAL; +@@ -1054,6 +1061,8 @@ F2FS_SBI_GENERAL_RW_ATTR(revoked_atomic_block); + F2FS_SBI_GENERAL_RW_ATTR(hot_data_age_threshold); + F2FS_SBI_GENERAL_RW_ATTR(warm_data_age_threshold); + F2FS_SBI_GENERAL_RW_ATTR(last_age_weight); ++/* read extent cache */ ++F2FS_SBI_GENERAL_RW_ATTR(max_read_extent_count); + #ifdef CONFIG_BLK_DEV_ZONED + F2FS_SBI_GENERAL_RO_ATTR(unusable_blocks_per_sec); + F2FS_SBI_GENERAL_RW_ATTR(blkzone_alloc_policy); +@@ -1244,6 +1253,7 @@ static struct attribute *f2fs_attrs[] = { + ATTR_LIST(hot_data_age_threshold), + ATTR_LIST(warm_data_age_threshold), + ATTR_LIST(last_age_weight), ++ ATTR_LIST(max_read_extent_count), + NULL, + }; + ATTRIBUTE_GROUPS(f2fs); +diff --git a/fs/gfs2/super.c b/fs/gfs2/super.c +index e22c1edc32b39e..b9cef63c78717f 100644 +--- a/fs/gfs2/super.c ++++ b/fs/gfs2/super.c +@@ -1537,11 +1537,13 @@ static struct inode *gfs2_alloc_inode(struct super_block *sb) + if (!ip) + return NULL; + ip->i_no_addr = 0; ++ ip->i_no_formal_ino = 0; + ip->i_flags = 0; + ip->i_gl = NULL; + gfs2_holder_mark_uninitialized(&ip->i_iopen_gh); + memset(&ip->i_res, 0, sizeof(ip->i_res)); + RB_CLEAR_NODE(&ip->i_res.rs_node); ++ ip->i_diskflags = 0; + ip->i_rahead = 0; + return &ip->i_inode; + } +diff --git a/fs/jffs2/compr_rtime.c b/fs/jffs2/compr_rtime.c +index 79e771ab624f47..3bd9d2f3bece20 100644 +--- a/fs/jffs2/compr_rtime.c ++++ b/fs/jffs2/compr_rtime.c +@@ -95,6 +95,9 @@ static int jffs2_rtime_decompress(unsigned char *data_in, + + positions[value]=outpos; + if (repeat) { ++ if ((outpos + repeat) > destlen) { ++ return 1; ++ } + if (backoffs + repeat >= outpos) { + while(repeat) { + cpage_out[outpos++] = cpage_out[backoffs++]; +diff --git a/fs/jfs/jfs_dmap.c b/fs/jfs/jfs_dmap.c +index 3ab410059dc202..f9009e4f9ffd89 100644 +--- a/fs/jfs/jfs_dmap.c ++++ b/fs/jfs/jfs_dmap.c +@@ -1820,6 +1820,9 @@ dbAllocCtl(struct bmap * bmp, s64 nblocks, int l2nb, s64 blkno, s64 * results) + return -EIO; + dp = (struct dmap *) mp->data; + ++ if (dp->tree.budmin < 0) ++ return -EIO; ++ + /* try to allocate the blocks. + */ + rc = dbAllocDmapLev(bmp, dp, (int) nblocks, l2nb, results); +@@ -2888,6 +2891,9 @@ static void dbAdjTree(dmtree_t *tp, int leafno, int newval, bool is_ctl) + /* bubble the new value up the tree as required. + */ + for (k = 0; k < le32_to_cpu(tp->dmt_height); k++) { ++ if (lp == 0) ++ break; ++ + /* get the index of the first leaf of the 4 leaf + * group containing the specified leaf (leafno). + */ +diff --git a/fs/jfs/jfs_dtree.c b/fs/jfs/jfs_dtree.c +index 5d3127ca68a42d..8f85177f284b5a 100644 +--- a/fs/jfs/jfs_dtree.c ++++ b/fs/jfs/jfs_dtree.c +@@ -2891,6 +2891,14 @@ int jfs_readdir(struct file *file, struct dir_context *ctx) + stbl = DT_GETSTBL(p); + + for (i = index; i < p->header.nextindex; i++) { ++ if (stbl[i] < 0 || stbl[i] > 127) { ++ jfs_err("JFS: Invalid stbl[%d] = %d for inode %ld, block = %lld", ++ i, stbl[i], (long)ip->i_ino, (long long)bn); ++ free_page(dirent_buf); ++ DT_PUTPAGE(mp); ++ return -EIO; ++ } ++ + d = (struct ldtentry *) & p->slot[stbl[i]]; + + if (((long) jfs_dirent + d->namlen + 1) > +@@ -3086,6 +3094,13 @@ static int dtReadFirst(struct inode *ip, struct btstack * btstack) + + /* get the leftmost entry */ + stbl = DT_GETSTBL(p); ++ ++ if (stbl[0] < 0 || stbl[0] > 127) { ++ DT_PUTPAGE(mp); ++ jfs_error(ip->i_sb, "stbl[0] out of bound\n"); ++ return -EIO; ++ } ++ + xd = (pxd_t *) & p->slot[stbl[0]]; + + /* get the child page block address */ +diff --git a/fs/nilfs2/dir.c b/fs/nilfs2/dir.c +index a8602729586ab7..f61c58fbf117d3 100644 +--- a/fs/nilfs2/dir.c ++++ b/fs/nilfs2/dir.c +@@ -70,7 +70,7 @@ static inline unsigned int nilfs_chunk_size(struct inode *inode) + */ + static unsigned int nilfs_last_byte(struct inode *inode, unsigned long page_nr) + { +- unsigned int last_byte = inode->i_size; ++ u64 last_byte = inode->i_size; + + last_byte -= page_nr << PAGE_SHIFT; + if (last_byte > PAGE_SIZE) +diff --git a/fs/notify/fanotify/fanotify_user.c b/fs/notify/fanotify/fanotify_user.c +index 9644bc72e4573b..8e2d43fc6f7c1f 100644 +--- a/fs/notify/fanotify/fanotify_user.c ++++ b/fs/notify/fanotify/fanotify_user.c +@@ -266,13 +266,6 @@ static int create_fd(struct fsnotify_group *group, const struct path *path, + group->fanotify_data.f_flags | __FMODE_NONOTIFY, + current_cred()); + if (IS_ERR(new_file)) { +- /* +- * we still send an event even if we can't open the file. this +- * can happen when say tasks are gone and we try to open their +- * /proc files or we try to open a WRONLY file like in sysfs +- * we just send the errno to userspace since there isn't much +- * else we can do. +- */ + put_unused_fd(client_fd); + client_fd = PTR_ERR(new_file); + } else { +@@ -663,7 +656,7 @@ static ssize_t copy_event_to_user(struct fsnotify_group *group, + unsigned int info_mode = FAN_GROUP_FLAG(group, FANOTIFY_INFO_MODES); + unsigned int pidfd_mode = info_mode & FAN_REPORT_PIDFD; + struct file *f = NULL, *pidfd_file = NULL; +- int ret, pidfd = FAN_NOPIDFD, fd = FAN_NOFD; ++ int ret, pidfd = -ESRCH, fd = -EBADF; + + pr_debug("%s: group=%p event=%p\n", __func__, group, event); + +@@ -691,10 +684,39 @@ static ssize_t copy_event_to_user(struct fsnotify_group *group, + if (!FAN_GROUP_FLAG(group, FANOTIFY_UNPRIV) && + path && path->mnt && path->dentry) { + fd = create_fd(group, path, &f); +- if (fd < 0) +- return fd; ++ /* ++ * Opening an fd from dentry can fail for several reasons. ++ * For example, when tasks are gone and we try to open their ++ * /proc files or we try to open a WRONLY file like in sysfs ++ * or when trying to open a file that was deleted on the ++ * remote network server. ++ * ++ * For a group with FAN_REPORT_FD_ERROR, we will send the ++ * event with the error instead of the open fd, otherwise ++ * Userspace may not get the error at all. ++ * In any case, userspace will not know which file failed to ++ * open, so add a debug print for further investigation. ++ */ ++ if (fd < 0) { ++ pr_debug("fanotify: create_fd(%pd2) failed err=%d\n", ++ path->dentry, fd); ++ if (!FAN_GROUP_FLAG(group, FAN_REPORT_FD_ERROR)) { ++ /* ++ * Historically, we've handled EOPENSTALE in a ++ * special way and silently dropped such ++ * events. Now we have to keep it to maintain ++ * backward compatibility... ++ */ ++ if (fd == -EOPENSTALE) ++ fd = 0; ++ return fd; ++ } ++ } + } +- metadata.fd = fd; ++ if (FAN_GROUP_FLAG(group, FAN_REPORT_FD_ERROR)) ++ metadata.fd = fd; ++ else ++ metadata.fd = fd >= 0 ? fd : FAN_NOFD; + + if (pidfd_mode) { + /* +@@ -709,18 +731,16 @@ static ssize_t copy_event_to_user(struct fsnotify_group *group, + * The PIDTYPE_TGID check for an event->pid is performed + * preemptively in an attempt to catch out cases where the event + * listener reads events after the event generating process has +- * already terminated. Report FAN_NOPIDFD to the event listener +- * in those cases, with all other pidfd creation errors being +- * reported as FAN_EPIDFD. ++ * already terminated. Depending on flag FAN_REPORT_FD_ERROR, ++ * report either -ESRCH or FAN_NOPIDFD to the event listener in ++ * those cases with all other pidfd creation errors reported as ++ * the error code itself or as FAN_EPIDFD. + */ +- if (metadata.pid == 0 || +- !pid_has_task(event->pid, PIDTYPE_TGID)) { +- pidfd = FAN_NOPIDFD; +- } else { ++ if (metadata.pid && pid_has_task(event->pid, PIDTYPE_TGID)) + pidfd = pidfd_prepare(event->pid, 0, &pidfd_file); +- if (pidfd < 0) +- pidfd = FAN_EPIDFD; +- } ++ ++ if (!FAN_GROUP_FLAG(group, FAN_REPORT_FD_ERROR) && pidfd < 0) ++ pidfd = pidfd == -ESRCH ? FAN_NOPIDFD : FAN_EPIDFD; + } + + ret = -EFAULT; +@@ -737,9 +757,6 @@ static ssize_t copy_event_to_user(struct fsnotify_group *group, + buf += FAN_EVENT_METADATA_LEN; + count -= FAN_EVENT_METADATA_LEN; + +- if (fanotify_is_perm_event(event->mask)) +- FANOTIFY_PERM(event)->fd = fd; +- + if (info_mode) { + ret = copy_info_records_to_user(event, info, info_mode, pidfd, + buf, count); +@@ -753,15 +770,18 @@ static ssize_t copy_event_to_user(struct fsnotify_group *group, + if (pidfd_file) + fd_install(pidfd, pidfd_file); + ++ if (fanotify_is_perm_event(event->mask)) ++ FANOTIFY_PERM(event)->fd = fd; ++ + return metadata.event_len; + + out_close_fd: +- if (fd != FAN_NOFD) { ++ if (f) { + put_unused_fd(fd); + fput(f); + } + +- if (pidfd >= 0) { ++ if (pidfd_file) { + put_unused_fd(pidfd); + fput(pidfd_file); + } +@@ -828,15 +848,6 @@ static ssize_t fanotify_read(struct file *file, char __user *buf, + } + + ret = copy_event_to_user(group, event, buf, count); +- if (unlikely(ret == -EOPENSTALE)) { +- /* +- * We cannot report events with stale fd so drop it. +- * Setting ret to 0 will continue the event loop and +- * do the right thing if there are no more events to +- * read (i.e. return bytes read, -EAGAIN or wait). +- */ +- ret = 0; +- } + + /* + * Permission events get queued to wait for response. Other +@@ -845,7 +856,7 @@ static ssize_t fanotify_read(struct file *file, char __user *buf, + if (!fanotify_is_perm_event(event->mask)) { + fsnotify_destroy_event(group, &event->fse); + } else { +- if (ret <= 0) { ++ if (ret <= 0 || FANOTIFY_PERM(event)->fd < 0) { + spin_lock(&group->notification_lock); + finish_permission_event(group, + FANOTIFY_PERM(event), FAN_DENY, NULL); +@@ -1954,7 +1965,7 @@ static int __init fanotify_user_setup(void) + FANOTIFY_DEFAULT_MAX_USER_MARKS); + + BUILD_BUG_ON(FANOTIFY_INIT_FLAGS & FANOTIFY_INTERNAL_GROUP_FLAGS); +- BUILD_BUG_ON(HWEIGHT32(FANOTIFY_INIT_FLAGS) != 12); ++ BUILD_BUG_ON(HWEIGHT32(FANOTIFY_INIT_FLAGS) != 13); + BUILD_BUG_ON(HWEIGHT32(FANOTIFY_MARK_FLAGS) != 11); + + fanotify_mark_cache = KMEM_CACHE(fanotify_mark, +diff --git a/fs/ntfs3/attrib.c b/fs/ntfs3/attrib.c +index 0763202d00c992..8d789b017fa9b6 100644 +--- a/fs/ntfs3/attrib.c ++++ b/fs/ntfs3/attrib.c +@@ -977,7 +977,7 @@ int attr_data_get_block(struct ntfs_inode *ni, CLST vcn, CLST clen, CLST *lcn, + + /* Check for compressed frame. */ + err = attr_is_frame_compressed(ni, attr_b, vcn >> NTFS_LZNT_CUNIT, +- &hint); ++ &hint, run); + if (err) + goto out; + +@@ -1521,16 +1521,16 @@ int attr_wof_frame_info(struct ntfs_inode *ni, struct ATTRIB *attr, + * attr_is_frame_compressed - Used to detect compressed frame. + * + * attr - base (primary) attribute segment. ++ * run - run to use, usually == &ni->file.run. + * Only base segments contains valid 'attr->nres.c_unit' + */ + int attr_is_frame_compressed(struct ntfs_inode *ni, struct ATTRIB *attr, +- CLST frame, CLST *clst_data) ++ CLST frame, CLST *clst_data, struct runs_tree *run) + { + int err; + u32 clst_frame; + CLST clen, lcn, vcn, alen, slen, vcn_next; + size_t idx; +- struct runs_tree *run; + + *clst_data = 0; + +@@ -1542,7 +1542,6 @@ int attr_is_frame_compressed(struct ntfs_inode *ni, struct ATTRIB *attr, + + clst_frame = 1u << attr->nres.c_unit; + vcn = frame * clst_frame; +- run = &ni->file.run; + + if (!run_lookup_entry(run, vcn, &lcn, &clen, &idx)) { + err = attr_load_runs_vcn(ni, attr->type, attr_name(attr), +@@ -1678,7 +1677,7 @@ int attr_allocate_frame(struct ntfs_inode *ni, CLST frame, size_t compr_size, + if (err) + goto out; + +- err = attr_is_frame_compressed(ni, attr_b, frame, &clst_data); ++ err = attr_is_frame_compressed(ni, attr_b, frame, &clst_data, run); + if (err) + goto out; + +diff --git a/fs/ntfs3/frecord.c b/fs/ntfs3/frecord.c +index 41c7ffad279016..c33e818b3164cd 100644 +--- a/fs/ntfs3/frecord.c ++++ b/fs/ntfs3/frecord.c +@@ -1900,46 +1900,6 @@ enum REPARSE_SIGN ni_parse_reparse(struct ntfs_inode *ni, struct ATTRIB *attr, + return REPARSE_LINK; + } + +-/* +- * fiemap_fill_next_extent_k - a copy of fiemap_fill_next_extent +- * but it uses 'fe_k' instead of fieinfo->fi_extents_start +- */ +-static int fiemap_fill_next_extent_k(struct fiemap_extent_info *fieinfo, +- struct fiemap_extent *fe_k, u64 logical, +- u64 phys, u64 len, u32 flags) +-{ +- struct fiemap_extent extent; +- +- /* only count the extents */ +- if (fieinfo->fi_extents_max == 0) { +- fieinfo->fi_extents_mapped++; +- return (flags & FIEMAP_EXTENT_LAST) ? 1 : 0; +- } +- +- if (fieinfo->fi_extents_mapped >= fieinfo->fi_extents_max) +- return 1; +- +- if (flags & FIEMAP_EXTENT_DELALLOC) +- flags |= FIEMAP_EXTENT_UNKNOWN; +- if (flags & FIEMAP_EXTENT_DATA_ENCRYPTED) +- flags |= FIEMAP_EXTENT_ENCODED; +- if (flags & (FIEMAP_EXTENT_DATA_TAIL | FIEMAP_EXTENT_DATA_INLINE)) +- flags |= FIEMAP_EXTENT_NOT_ALIGNED; +- +- memset(&extent, 0, sizeof(extent)); +- extent.fe_logical = logical; +- extent.fe_physical = phys; +- extent.fe_length = len; +- extent.fe_flags = flags; +- +- memcpy(fe_k + fieinfo->fi_extents_mapped, &extent, sizeof(extent)); +- +- fieinfo->fi_extents_mapped++; +- if (fieinfo->fi_extents_mapped == fieinfo->fi_extents_max) +- return 1; +- return (flags & FIEMAP_EXTENT_LAST) ? 1 : 0; +-} +- + /* + * ni_fiemap - Helper for file_fiemap(). + * +@@ -1950,11 +1910,9 @@ int ni_fiemap(struct ntfs_inode *ni, struct fiemap_extent_info *fieinfo, + __u64 vbo, __u64 len) + { + int err = 0; +- struct fiemap_extent *fe_k = NULL; + struct ntfs_sb_info *sbi = ni->mi.sbi; + u8 cluster_bits = sbi->cluster_bits; +- struct runs_tree *run; +- struct rw_semaphore *run_lock; ++ struct runs_tree run; + struct ATTRIB *attr; + CLST vcn = vbo >> cluster_bits; + CLST lcn, clen; +@@ -1965,13 +1923,11 @@ int ni_fiemap(struct ntfs_inode *ni, struct fiemap_extent_info *fieinfo, + u32 flags; + bool ok; + ++ run_init(&run); + if (S_ISDIR(ni->vfs_inode.i_mode)) { +- run = &ni->dir.alloc_run; + attr = ni_find_attr(ni, NULL, NULL, ATTR_ALLOC, I30_NAME, + ARRAY_SIZE(I30_NAME), NULL, NULL); +- run_lock = &ni->dir.run_lock; + } else { +- run = &ni->file.run; + attr = ni_find_attr(ni, NULL, NULL, ATTR_DATA, NULL, 0, NULL, + NULL); + if (!attr) { +@@ -1986,7 +1942,6 @@ int ni_fiemap(struct ntfs_inode *ni, struct fiemap_extent_info *fieinfo, + "fiemap is not supported for compressed file (cp -r)"); + goto out; + } +- run_lock = &ni->file.run_lock; + } + + if (!attr || !attr->non_res) { +@@ -1998,51 +1953,33 @@ int ni_fiemap(struct ntfs_inode *ni, struct fiemap_extent_info *fieinfo, + goto out; + } + +- /* +- * To avoid lock problems replace pointer to user memory by pointer to kernel memory. +- */ +- fe_k = kmalloc_array(fieinfo->fi_extents_max, +- sizeof(struct fiemap_extent), +- GFP_NOFS | __GFP_ZERO); +- if (!fe_k) { +- err = -ENOMEM; +- goto out; +- } +- + end = vbo + len; + alloc_size = le64_to_cpu(attr->nres.alloc_size); + if (end > alloc_size) + end = alloc_size; + +- down_read(run_lock); + + while (vbo < end) { + if (idx == -1) { +- ok = run_lookup_entry(run, vcn, &lcn, &clen, &idx); ++ ok = run_lookup_entry(&run, vcn, &lcn, &clen, &idx); + } else { + CLST vcn_next = vcn; + +- ok = run_get_entry(run, ++idx, &vcn, &lcn, &clen) && ++ ok = run_get_entry(&run, ++idx, &vcn, &lcn, &clen) && + vcn == vcn_next; + if (!ok) + vcn = vcn_next; + } + + if (!ok) { +- up_read(run_lock); +- down_write(run_lock); +- + err = attr_load_runs_vcn(ni, attr->type, + attr_name(attr), +- attr->name_len, run, vcn); +- +- up_write(run_lock); +- down_read(run_lock); ++ attr->name_len, &run, vcn); + + if (err) + break; + +- ok = run_lookup_entry(run, vcn, &lcn, &clen, &idx); ++ ok = run_lookup_entry(&run, vcn, &lcn, &clen, &idx); + + if (!ok) { + err = -EINVAL; +@@ -2067,8 +2004,9 @@ int ni_fiemap(struct ntfs_inode *ni, struct fiemap_extent_info *fieinfo, + } else if (is_attr_compressed(attr)) { + CLST clst_data; + +- err = attr_is_frame_compressed( +- ni, attr, vcn >> attr->nres.c_unit, &clst_data); ++ err = attr_is_frame_compressed(ni, attr, ++ vcn >> attr->nres.c_unit, ++ &clst_data, &run); + if (err) + break; + if (clst_data < NTFS_LZNT_CLUSTERS) +@@ -2097,8 +2035,8 @@ int ni_fiemap(struct ntfs_inode *ni, struct fiemap_extent_info *fieinfo, + if (vbo + dlen >= end) + flags |= FIEMAP_EXTENT_LAST; + +- err = fiemap_fill_next_extent_k(fieinfo, fe_k, vbo, lbo, +- dlen, flags); ++ err = fiemap_fill_next_extent(fieinfo, vbo, lbo, dlen, ++ flags); + + if (err < 0) + break; +@@ -2119,8 +2057,7 @@ int ni_fiemap(struct ntfs_inode *ni, struct fiemap_extent_info *fieinfo, + if (vbo + bytes >= end) + flags |= FIEMAP_EXTENT_LAST; + +- err = fiemap_fill_next_extent_k(fieinfo, fe_k, vbo, lbo, bytes, +- flags); ++ err = fiemap_fill_next_extent(fieinfo, vbo, lbo, bytes, flags); + if (err < 0) + break; + if (err == 1) { +@@ -2131,19 +2068,8 @@ int ni_fiemap(struct ntfs_inode *ni, struct fiemap_extent_info *fieinfo, + vbo += bytes; + } + +- up_read(run_lock); +- +- /* +- * Copy to user memory out of lock +- */ +- if (copy_to_user(fieinfo->fi_extents_start, fe_k, +- fieinfo->fi_extents_max * +- sizeof(struct fiemap_extent))) { +- err = -EFAULT; +- } +- + out: +- kfree(fe_k); ++ run_close(&run); + return err; + } + +@@ -2672,7 +2598,8 @@ int ni_read_frame(struct ntfs_inode *ni, u64 frame_vbo, struct page **pages, + down_write(&ni->file.run_lock); + run_truncate_around(run, le64_to_cpu(attr->nres.svcn)); + frame = frame_vbo >> (cluster_bits + NTFS_LZNT_CUNIT); +- err = attr_is_frame_compressed(ni, attr, frame, &clst_data); ++ err = attr_is_frame_compressed(ni, attr, frame, &clst_data, ++ run); + up_write(&ni->file.run_lock); + if (err) + goto out1; +diff --git a/fs/ntfs3/ntfs_fs.h b/fs/ntfs3/ntfs_fs.h +index 26e1e1379c04e2..cd8e8374bb5a0a 100644 +--- a/fs/ntfs3/ntfs_fs.h ++++ b/fs/ntfs3/ntfs_fs.h +@@ -446,7 +446,8 @@ int attr_wof_frame_info(struct ntfs_inode *ni, struct ATTRIB *attr, + struct runs_tree *run, u64 frame, u64 frames, + u8 frame_bits, u32 *ondisk_size, u64 *vbo_data); + int attr_is_frame_compressed(struct ntfs_inode *ni, struct ATTRIB *attr, +- CLST frame, CLST *clst_data); ++ CLST frame, CLST *clst_data, ++ struct runs_tree *run); + int attr_allocate_frame(struct ntfs_inode *ni, CLST frame, size_t compr_size, + u64 new_valid); + int attr_collapse_range(struct ntfs_inode *ni, u64 vbo, u64 bytes); +diff --git a/fs/ntfs3/run.c b/fs/ntfs3/run.c +index 58e988cd80490d..48566dff0dc92b 100644 +--- a/fs/ntfs3/run.c ++++ b/fs/ntfs3/run.c +@@ -1055,8 +1055,8 @@ int run_unpack_ex(struct runs_tree *run, struct ntfs_sb_info *sbi, CLST ino, + { + int ret, err; + CLST next_vcn, lcn, len; +- size_t index; +- bool ok; ++ size_t index, done; ++ bool ok, zone; + struct wnd_bitmap *wnd; + + ret = run_unpack(run, sbi, ino, svcn, evcn, vcn, run_buf, run_buf_size); +@@ -1087,8 +1087,9 @@ int run_unpack_ex(struct runs_tree *run, struct ntfs_sb_info *sbi, CLST ino, + continue; + + down_read_nested(&wnd->rw_lock, BITMAP_MUTEX_CLUSTERS); ++ zone = max(wnd->zone_bit, lcn) < min(wnd->zone_end, lcn + len); + /* Check for free blocks. */ +- ok = wnd_is_used(wnd, lcn, len); ++ ok = !zone && wnd_is_used(wnd, lcn, len); + up_read(&wnd->rw_lock); + if (ok) + continue; +@@ -1096,14 +1097,33 @@ int run_unpack_ex(struct runs_tree *run, struct ntfs_sb_info *sbi, CLST ino, + /* Looks like volume is corrupted. */ + ntfs_set_state(sbi, NTFS_DIRTY_ERROR); + +- if (down_write_trylock(&wnd->rw_lock)) { +- /* Mark all zero bits as used in range [lcn, lcn+len). */ +- size_t done; +- err = wnd_set_used_safe(wnd, lcn, len, &done); +- up_write(&wnd->rw_lock); +- if (err) +- return err; ++ if (!down_write_trylock(&wnd->rw_lock)) ++ continue; ++ ++ if (zone) { ++ /* ++ * Range [lcn, lcn + len) intersects with zone. ++ * To avoid complex with zone just turn it off. ++ */ ++ wnd_zone_set(wnd, 0, 0); ++ } ++ ++ /* Mark all zero bits as used in range [lcn, lcn+len). */ ++ err = wnd_set_used_safe(wnd, lcn, len, &done); ++ if (zone) { ++ /* Restore zone. Lock mft run. */ ++ struct rw_semaphore *lock; ++ lock = is_mounted(sbi) ? &sbi->mft.ni->file.run_lock : ++ NULL; ++ if (lock) ++ down_read(lock); ++ ntfs_refresh_zone(sbi); ++ if (lock) ++ up_read(lock); + } ++ up_write(&wnd->rw_lock); ++ if (err) ++ return err; + } + + return ret; +diff --git a/fs/ocfs2/dlmglue.c b/fs/ocfs2/dlmglue.c +index 60df52e4c1f878..764ecbd5ad41dd 100644 +--- a/fs/ocfs2/dlmglue.c ++++ b/fs/ocfs2/dlmglue.c +@@ -3110,6 +3110,7 @@ static void *ocfs2_dlm_seq_next(struct seq_file *m, void *v, loff_t *pos) + struct ocfs2_lock_res *iter = v; + struct ocfs2_lock_res *dummy = &priv->p_iter_res; + ++ (*pos)++; + spin_lock(&ocfs2_dlm_tracking_lock); + iter = ocfs2_dlm_next_res(iter, priv); + list_del_init(&dummy->l_debug_list); +diff --git a/fs/ocfs2/localalloc.c b/fs/ocfs2/localalloc.c +index 8ac42ea81a17bd..5df34561c551c6 100644 +--- a/fs/ocfs2/localalloc.c ++++ b/fs/ocfs2/localalloc.c +@@ -1002,25 +1002,6 @@ static int ocfs2_sync_local_to_main(struct ocfs2_super *osb, + start = bit_off + 1; + } + +- /* clear the contiguous bits until the end boundary */ +- if (count) { +- blkno = la_start_blk + +- ocfs2_clusters_to_blocks(osb->sb, +- start - count); +- +- trace_ocfs2_sync_local_to_main_free( +- count, start - count, +- (unsigned long long)la_start_blk, +- (unsigned long long)blkno); +- +- status = ocfs2_release_clusters(handle, +- main_bm_inode, +- main_bm_bh, blkno, +- count); +- if (status < 0) +- mlog_errno(status); +- } +- + bail: + if (status) + mlog_errno(status); +diff --git a/fs/ocfs2/namei.c b/fs/ocfs2/namei.c +index 59c92353151a85..5550f8afa43802 100644 +--- a/fs/ocfs2/namei.c ++++ b/fs/ocfs2/namei.c +@@ -200,8 +200,10 @@ static struct inode *ocfs2_get_init_inode(struct inode *dir, umode_t mode) + mode = mode_strip_sgid(&nop_mnt_idmap, dir, mode); + inode_init_owner(&nop_mnt_idmap, inode, dir, mode); + status = dquot_initialize(inode); +- if (status) ++ if (status) { ++ iput(inode); + return ERR_PTR(status); ++ } + + return inode; + } +diff --git a/fs/smb/client/cifsproto.h b/fs/smb/client/cifsproto.h +index 0c6468844c4b54..a697e53ccee2be 100644 +--- a/fs/smb/client/cifsproto.h ++++ b/fs/smb/client/cifsproto.h +@@ -677,6 +677,7 @@ int __cifs_sfu_make_node(unsigned int xid, struct inode *inode, + int cifs_sfu_make_node(unsigned int xid, struct inode *inode, + struct dentry *dentry, struct cifs_tcon *tcon, + const char *full_path, umode_t mode, dev_t dev); ++umode_t wire_mode_to_posix(u32 wire, bool is_dir); + + #ifdef CONFIG_CIFS_DFS_UPCALL + static inline int get_dfs_path(const unsigned int xid, struct cifs_ses *ses, +diff --git a/fs/smb/client/cifssmb.c b/fs/smb/client/cifssmb.c +index c6f15dbe860a41..0eae60731c20c0 100644 +--- a/fs/smb/client/cifssmb.c ++++ b/fs/smb/client/cifssmb.c +@@ -5406,7 +5406,7 @@ CIFSSMBSetPathInfo(const unsigned int xid, struct cifs_tcon *tcon, + param_offset = offsetof(struct smb_com_transaction2_spi_req, + InformationLevel) - 4; + offset = param_offset + params; +- data_offset = (char *) (&pSMB->hdr.Protocol) + offset; ++ data_offset = (char *)pSMB + offsetof(typeof(*pSMB), hdr.Protocol) + offset; + pSMB->ParameterOffset = cpu_to_le16(param_offset); + pSMB->DataOffset = cpu_to_le16(offset); + pSMB->SetupCount = 1; +diff --git a/fs/smb/client/connect.c b/fs/smb/client/connect.c +index a94c538ff86368..feff3324d39c6d 100644 +--- a/fs/smb/client/connect.c ++++ b/fs/smb/client/connect.c +@@ -2512,9 +2512,6 @@ cifs_put_tcon(struct cifs_tcon *tcon, enum smb3_tcon_ref_trace trace) + + list_del_init(&tcon->tcon_list); + tcon->status = TID_EXITING; +-#ifdef CONFIG_CIFS_DFS_UPCALL +- list_replace_init(&tcon->dfs_ses_list, &ses_list); +-#endif + spin_unlock(&tcon->tc_lock); + spin_unlock(&cifs_tcp_ses_lock); + +@@ -2522,6 +2519,7 @@ cifs_put_tcon(struct cifs_tcon *tcon, enum smb3_tcon_ref_trace trace) + cancel_delayed_work_sync(&tcon->query_interfaces); + #ifdef CONFIG_CIFS_DFS_UPCALL + cancel_delayed_work_sync(&tcon->dfs_cache_work); ++ list_replace_init(&tcon->dfs_ses_list, &ses_list); + #endif + + if (tcon->use_witness) { +diff --git a/fs/smb/client/dfs.c b/fs/smb/client/dfs.c +index 3f6077c68d68aa..c35953843373ea 100644 +--- a/fs/smb/client/dfs.c ++++ b/fs/smb/client/dfs.c +@@ -321,49 +321,6 @@ int dfs_mount_share(struct cifs_mount_ctx *mnt_ctx) + return rc; + } + +-/* Update dfs referral path of superblock */ +-static int update_server_fullpath(struct TCP_Server_Info *server, struct cifs_sb_info *cifs_sb, +- const char *target) +-{ +- int rc = 0; +- size_t len = strlen(target); +- char *refpath, *npath; +- +- if (unlikely(len < 2 || *target != '\\')) +- return -EINVAL; +- +- if (target[1] == '\\') { +- len += 1; +- refpath = kmalloc(len, GFP_KERNEL); +- if (!refpath) +- return -ENOMEM; +- +- scnprintf(refpath, len, "%s", target); +- } else { +- len += sizeof("\\"); +- refpath = kmalloc(len, GFP_KERNEL); +- if (!refpath) +- return -ENOMEM; +- +- scnprintf(refpath, len, "\\%s", target); +- } +- +- npath = dfs_cache_canonical_path(refpath, cifs_sb->local_nls, cifs_remap(cifs_sb)); +- kfree(refpath); +- +- if (IS_ERR(npath)) { +- rc = PTR_ERR(npath); +- } else { +- mutex_lock(&server->refpath_lock); +- spin_lock(&server->srv_lock); +- kfree(server->leaf_fullpath); +- server->leaf_fullpath = npath; +- spin_unlock(&server->srv_lock); +- mutex_unlock(&server->refpath_lock); +- } +- return rc; +-} +- + static int target_share_matches_server(struct TCP_Server_Info *server, char *share, + bool *target_match) + { +@@ -388,77 +345,22 @@ static int target_share_matches_server(struct TCP_Server_Info *server, char *sha + return rc; + } + +-static void __tree_connect_ipc(const unsigned int xid, char *tree, +- struct cifs_sb_info *cifs_sb, +- struct cifs_ses *ses) +-{ +- struct TCP_Server_Info *server = ses->server; +- struct cifs_tcon *tcon = ses->tcon_ipc; +- int rc; +- +- spin_lock(&ses->ses_lock); +- spin_lock(&ses->chan_lock); +- if (cifs_chan_needs_reconnect(ses, server) || +- ses->ses_status != SES_GOOD) { +- spin_unlock(&ses->chan_lock); +- spin_unlock(&ses->ses_lock); +- cifs_server_dbg(FYI, "%s: skipping ipc reconnect due to disconnected ses\n", +- __func__); +- return; +- } +- spin_unlock(&ses->chan_lock); +- spin_unlock(&ses->ses_lock); +- +- cifs_server_lock(server); +- scnprintf(tree, MAX_TREE_SIZE, "\\\\%s\\IPC$", server->hostname); +- cifs_server_unlock(server); +- +- rc = server->ops->tree_connect(xid, ses, tree, tcon, +- cifs_sb->local_nls); +- cifs_server_dbg(FYI, "%s: tree_reconnect %s: %d\n", __func__, tree, rc); +- spin_lock(&tcon->tc_lock); +- if (rc) { +- tcon->status = TID_NEED_TCON; +- } else { +- tcon->status = TID_GOOD; +- tcon->need_reconnect = false; +- } +- spin_unlock(&tcon->tc_lock); +-} +- +-static void tree_connect_ipc(const unsigned int xid, char *tree, +- struct cifs_sb_info *cifs_sb, +- struct cifs_tcon *tcon) +-{ +- struct cifs_ses *ses = tcon->ses; +- +- __tree_connect_ipc(xid, tree, cifs_sb, ses); +- __tree_connect_ipc(xid, tree, cifs_sb, CIFS_DFS_ROOT_SES(ses)); +-} +- +-static int __tree_connect_dfs_target(const unsigned int xid, struct cifs_tcon *tcon, +- struct cifs_sb_info *cifs_sb, char *tree, bool islink, +- struct dfs_cache_tgt_list *tl) ++static int tree_connect_dfs_target(const unsigned int xid, ++ struct cifs_tcon *tcon, ++ struct cifs_sb_info *cifs_sb, ++ char *tree, bool islink, ++ struct dfs_cache_tgt_list *tl) + { +- int rc; ++ const struct smb_version_operations *ops = tcon->ses->server->ops; + struct TCP_Server_Info *server = tcon->ses->server; +- const struct smb_version_operations *ops = server->ops; +- struct cifs_ses *root_ses = CIFS_DFS_ROOT_SES(tcon->ses); +- char *share = NULL, *prefix = NULL; + struct dfs_cache_tgt_iterator *tit; ++ char *share = NULL, *prefix = NULL; + bool target_match; +- +- tit = dfs_cache_get_tgt_iterator(tl); +- if (!tit) { +- rc = -ENOENT; +- goto out; +- } ++ int rc = -ENOENT; + + /* Try to tree connect to all dfs targets */ +- for (; tit; tit = dfs_cache_get_next_tgt(tl, tit)) { +- const char *target = dfs_cache_get_tgt_name(tit); +- DFS_CACHE_TGT_LIST(ntl); +- ++ for (tit = dfs_cache_get_tgt_iterator(tl); ++ tit; tit = dfs_cache_get_next_tgt(tl, tit)) { + kfree(share); + kfree(prefix); + share = prefix = NULL; +@@ -479,69 +381,16 @@ static int __tree_connect_dfs_target(const unsigned int xid, struct cifs_tcon *t + } + + dfs_cache_noreq_update_tgthint(server->leaf_fullpath + 1, tit); +- tree_connect_ipc(xid, tree, cifs_sb, tcon); +- + scnprintf(tree, MAX_TREE_SIZE, "\\%s", share); +- if (!islink) { +- rc = ops->tree_connect(xid, tcon->ses, tree, tcon, cifs_sb->local_nls); +- break; +- } +- +- /* +- * If no dfs referrals were returned from link target, then just do a TREE_CONNECT +- * to it. Otherwise, cache the dfs referral and then mark current tcp ses for +- * reconnect so either the demultiplex thread or the echo worker will reconnect to +- * newly resolved target. +- */ +- if (dfs_cache_find(xid, root_ses, cifs_sb->local_nls, cifs_remap(cifs_sb), target, +- NULL, &ntl)) { +- rc = ops->tree_connect(xid, tcon->ses, tree, tcon, cifs_sb->local_nls); +- if (rc) +- continue; +- ++ rc = ops->tree_connect(xid, tcon->ses, tree, ++ tcon, tcon->ses->local_nls); ++ if (islink && !rc && cifs_sb) + rc = cifs_update_super_prepath(cifs_sb, prefix); +- } else { +- /* Target is another dfs share */ +- rc = update_server_fullpath(server, cifs_sb, target); +- dfs_cache_free_tgts(tl); +- +- if (!rc) { +- rc = -EREMOTE; +- list_replace_init(&ntl.tl_list, &tl->tl_list); +- } else +- dfs_cache_free_tgts(&ntl); +- } + break; + } + +-out: + kfree(share); + kfree(prefix); +- +- return rc; +-} +- +-static int tree_connect_dfs_target(const unsigned int xid, struct cifs_tcon *tcon, +- struct cifs_sb_info *cifs_sb, char *tree, bool islink, +- struct dfs_cache_tgt_list *tl) +-{ +- int rc; +- int num_links = 0; +- struct TCP_Server_Info *server = tcon->ses->server; +- char *old_fullpath = server->leaf_fullpath; +- +- do { +- rc = __tree_connect_dfs_target(xid, tcon, cifs_sb, tree, islink, tl); +- if (!rc || rc != -EREMOTE) +- break; +- } while (rc = -ELOOP, ++num_links < MAX_NESTED_LINKS); +- /* +- * If we couldn't tree connect to any targets from last referral path, then +- * retry it from newly resolved dfs referral. +- */ +- if (rc && server->leaf_fullpath != old_fullpath) +- cifs_signal_cifsd_for_reconnect(server, true); +- + dfs_cache_free_tgts(tl); + return rc; + } +@@ -596,14 +445,11 @@ int cifs_tree_connect(const unsigned int xid, struct cifs_tcon *tcon, const stru + if (!IS_ERR(sb)) + cifs_sb = CIFS_SB(sb); + +- /* +- * Tree connect to last share in @tcon->tree_name whether dfs super or +- * cached dfs referral was not found. +- */ +- if (!cifs_sb || !server->leaf_fullpath || ++ /* Tree connect to last share in @tcon->tree_name if no DFS referral */ ++ if (!server->leaf_fullpath || + dfs_cache_noreq_find(server->leaf_fullpath + 1, &ref, &tl)) { +- rc = ops->tree_connect(xid, tcon->ses, tcon->tree_name, tcon, +- cifs_sb ? cifs_sb->local_nls : nlsc); ++ rc = ops->tree_connect(xid, tcon->ses, tcon->tree_name, ++ tcon, tcon->ses->local_nls); + goto out; + } + +diff --git a/fs/smb/client/inode.c b/fs/smb/client/inode.c +index 6d567b16998119..b35fe1075503e1 100644 +--- a/fs/smb/client/inode.c ++++ b/fs/smb/client/inode.c +@@ -724,6 +724,88 @@ static int cifs_sfu_mode(struct cifs_fattr *fattr, const unsigned char *path, + #endif + } + ++#define POSIX_TYPE_FILE 0 ++#define POSIX_TYPE_DIR 1 ++#define POSIX_TYPE_SYMLINK 2 ++#define POSIX_TYPE_CHARDEV 3 ++#define POSIX_TYPE_BLKDEV 4 ++#define POSIX_TYPE_FIFO 5 ++#define POSIX_TYPE_SOCKET 6 ++ ++#define POSIX_X_OTH 0000001 ++#define POSIX_W_OTH 0000002 ++#define POSIX_R_OTH 0000004 ++#define POSIX_X_GRP 0000010 ++#define POSIX_W_GRP 0000020 ++#define POSIX_R_GRP 0000040 ++#define POSIX_X_USR 0000100 ++#define POSIX_W_USR 0000200 ++#define POSIX_R_USR 0000400 ++#define POSIX_STICKY 0001000 ++#define POSIX_SET_GID 0002000 ++#define POSIX_SET_UID 0004000 ++ ++#define POSIX_OTH_MASK 0000007 ++#define POSIX_GRP_MASK 0000070 ++#define POSIX_USR_MASK 0000700 ++#define POSIX_PERM_MASK 0000777 ++#define POSIX_FILETYPE_MASK 0070000 ++ ++#define POSIX_FILETYPE_SHIFT 12 ++ ++static u32 wire_perms_to_posix(u32 wire) ++{ ++ u32 mode = 0; ++ ++ mode |= (wire & POSIX_X_OTH) ? S_IXOTH : 0; ++ mode |= (wire & POSIX_W_OTH) ? S_IWOTH : 0; ++ mode |= (wire & POSIX_R_OTH) ? S_IROTH : 0; ++ mode |= (wire & POSIX_X_GRP) ? S_IXGRP : 0; ++ mode |= (wire & POSIX_W_GRP) ? S_IWGRP : 0; ++ mode |= (wire & POSIX_R_GRP) ? S_IRGRP : 0; ++ mode |= (wire & POSIX_X_USR) ? S_IXUSR : 0; ++ mode |= (wire & POSIX_W_USR) ? S_IWUSR : 0; ++ mode |= (wire & POSIX_R_USR) ? S_IRUSR : 0; ++ mode |= (wire & POSIX_STICKY) ? S_ISVTX : 0; ++ mode |= (wire & POSIX_SET_GID) ? S_ISGID : 0; ++ mode |= (wire & POSIX_SET_UID) ? S_ISUID : 0; ++ ++ return mode; ++} ++ ++static u32 posix_filetypes[] = { ++ S_IFREG, ++ S_IFDIR, ++ S_IFLNK, ++ S_IFCHR, ++ S_IFBLK, ++ S_IFIFO, ++ S_IFSOCK ++}; ++ ++static u32 wire_filetype_to_posix(u32 wire_type) ++{ ++ if (wire_type >= ARRAY_SIZE(posix_filetypes)) { ++ pr_warn("Unexpected type %u", wire_type); ++ return 0; ++ } ++ return posix_filetypes[wire_type]; ++} ++ ++umode_t wire_mode_to_posix(u32 wire, bool is_dir) ++{ ++ u32 wire_type; ++ u32 mode; ++ ++ wire_type = (wire & POSIX_FILETYPE_MASK) >> POSIX_FILETYPE_SHIFT; ++ /* older servers do not set POSIX file type in the mode field in the response */ ++ if ((wire_type == 0) && is_dir) ++ mode = wire_perms_to_posix(wire) | S_IFDIR; ++ else ++ mode = (wire_perms_to_posix(wire) | wire_filetype_to_posix(wire_type)); ++ return (umode_t)mode; ++} ++ + /* Fill a cifs_fattr struct with info from POSIX info struct */ + static void smb311_posix_info_to_fattr(struct cifs_fattr *fattr, + struct cifs_open_info_data *data, +@@ -760,20 +842,14 @@ static void smb311_posix_info_to_fattr(struct cifs_fattr *fattr, + fattr->cf_bytes = le64_to_cpu(info->AllocationSize); + fattr->cf_createtime = le64_to_cpu(info->CreationTime); + fattr->cf_nlink = le32_to_cpu(info->HardLinks); +- fattr->cf_mode = (umode_t) le32_to_cpu(info->Mode); ++ fattr->cf_mode = wire_mode_to_posix(le32_to_cpu(info->Mode), ++ fattr->cf_cifsattrs & ATTR_DIRECTORY); + + if (cifs_open_data_reparse(data) && + cifs_reparse_point_to_fattr(cifs_sb, fattr, data)) + goto out_reparse; + +- fattr->cf_mode &= ~S_IFMT; +- if (fattr->cf_cifsattrs & ATTR_DIRECTORY) { +- fattr->cf_mode |= S_IFDIR; +- fattr->cf_dtype = DT_DIR; +- } else { /* file */ +- fattr->cf_mode |= S_IFREG; +- fattr->cf_dtype = DT_REG; +- } ++ fattr->cf_dtype = S_DT(fattr->cf_mode); + + out_reparse: + if (S_ISLNK(fattr->cf_mode)) { +diff --git a/fs/smb/client/readdir.c b/fs/smb/client/readdir.c +index b3a8f9c6fcff6f..273358d20a46c9 100644 +--- a/fs/smb/client/readdir.c ++++ b/fs/smb/client/readdir.c +@@ -71,6 +71,8 @@ cifs_prime_dcache(struct dentry *parent, struct qstr *name, + struct inode *inode; + struct super_block *sb = parent->d_sb; + struct cifs_sb_info *cifs_sb = CIFS_SB(sb); ++ bool posix = cifs_sb_master_tcon(cifs_sb)->posix_extensions; ++ bool reparse_need_reval = false; + DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); + int rc; + +@@ -85,7 +87,21 @@ cifs_prime_dcache(struct dentry *parent, struct qstr *name, + * this spares us an invalidation. + */ + retry: +- if ((fattr->cf_cifsattrs & ATTR_REPARSE) || ++ if (posix) { ++ switch (fattr->cf_mode & S_IFMT) { ++ case S_IFLNK: ++ case S_IFBLK: ++ case S_IFCHR: ++ reparse_need_reval = true; ++ break; ++ default: ++ break; ++ } ++ } else if (fattr->cf_cifsattrs & ATTR_REPARSE) { ++ reparse_need_reval = true; ++ } ++ ++ if (reparse_need_reval || + (fattr->cf_flags & CIFS_FATTR_NEED_REVAL)) + return; + +@@ -241,31 +257,29 @@ cifs_posix_to_fattr(struct cifs_fattr *fattr, struct smb2_posix_info *info, + fattr->cf_nlink = le32_to_cpu(info->HardLinks); + fattr->cf_cifsattrs = le32_to_cpu(info->DosAttributes); + +- /* +- * Since we set the inode type below we need to mask off +- * to avoid strange results if bits set above. +- * XXX: why not make server&client use the type bits? +- */ +- fattr->cf_mode = le32_to_cpu(info->Mode) & ~S_IFMT; ++ if (fattr->cf_cifsattrs & ATTR_REPARSE) ++ fattr->cf_cifstag = le32_to_cpu(info->ReparseTag); ++ ++ /* The Mode field in the response can now include the file type as well */ ++ fattr->cf_mode = wire_mode_to_posix(le32_to_cpu(info->Mode), ++ fattr->cf_cifsattrs & ATTR_DIRECTORY); ++ fattr->cf_dtype = S_DT(le32_to_cpu(info->Mode)); ++ ++ switch (fattr->cf_mode & S_IFMT) { ++ case S_IFLNK: ++ case S_IFBLK: ++ case S_IFCHR: ++ fattr->cf_flags |= CIFS_FATTR_NEED_REVAL; ++ break; ++ default: ++ break; ++ } + + cifs_dbg(FYI, "posix fattr: dev %d, reparse %d, mode %o\n", + le32_to_cpu(info->DeviceId), + le32_to_cpu(info->ReparseTag), + le32_to_cpu(info->Mode)); + +- if (fattr->cf_cifsattrs & ATTR_DIRECTORY) { +- fattr->cf_mode |= S_IFDIR; +- fattr->cf_dtype = DT_DIR; +- } else { +- /* +- * mark anything that is not a dir as regular +- * file. special files should have the REPARSE +- * attribute and will be marked as needing revaluation +- */ +- fattr->cf_mode |= S_IFREG; +- fattr->cf_dtype = DT_REG; +- } +- + sid_to_id(cifs_sb, &parsed.owner, fattr, SIDOWNER); + sid_to_id(cifs_sb, &parsed.group, fattr, SIDGROUP); + } +diff --git a/fs/smb/client/reparse.c b/fs/smb/client/reparse.c +index f74d0a86f44a4e..d3abb99cc99094 100644 +--- a/fs/smb/client/reparse.c ++++ b/fs/smb/client/reparse.c +@@ -730,44 +730,60 @@ static void wsl_to_fattr(struct cifs_open_info_data *data, + fattr->cf_dtype = S_DT(fattr->cf_mode); + } + +-bool cifs_reparse_point_to_fattr(struct cifs_sb_info *cifs_sb, +- struct cifs_fattr *fattr, +- struct cifs_open_info_data *data) ++static bool posix_reparse_to_fattr(struct cifs_sb_info *cifs_sb, ++ struct cifs_fattr *fattr, ++ struct cifs_open_info_data *data) + { + struct reparse_posix_data *buf = data->reparse.posix; +- u32 tag = data->reparse.tag; + +- if (tag == IO_REPARSE_TAG_NFS && buf) { +- if (le16_to_cpu(buf->ReparseDataLength) < sizeof(buf->InodeType)) ++ ++ if (buf == NULL) ++ return true; ++ ++ if (le16_to_cpu(buf->ReparseDataLength) < sizeof(buf->InodeType)) { ++ WARN_ON_ONCE(1); ++ return false; ++ } ++ ++ switch (le64_to_cpu(buf->InodeType)) { ++ case NFS_SPECFILE_CHR: ++ if (le16_to_cpu(buf->ReparseDataLength) != sizeof(buf->InodeType) + 8) { ++ WARN_ON_ONCE(1); + return false; +- switch (le64_to_cpu(buf->InodeType)) { +- case NFS_SPECFILE_CHR: +- if (le16_to_cpu(buf->ReparseDataLength) != sizeof(buf->InodeType) + 8) +- return false; +- fattr->cf_mode |= S_IFCHR; +- fattr->cf_rdev = reparse_mkdev(buf->DataBuffer); +- break; +- case NFS_SPECFILE_BLK: +- if (le16_to_cpu(buf->ReparseDataLength) != sizeof(buf->InodeType) + 8) +- return false; +- fattr->cf_mode |= S_IFBLK; +- fattr->cf_rdev = reparse_mkdev(buf->DataBuffer); +- break; +- case NFS_SPECFILE_FIFO: +- fattr->cf_mode |= S_IFIFO; +- break; +- case NFS_SPECFILE_SOCK: +- fattr->cf_mode |= S_IFSOCK; +- break; +- case NFS_SPECFILE_LNK: +- fattr->cf_mode |= S_IFLNK; +- break; +- default: ++ } ++ fattr->cf_mode |= S_IFCHR; ++ fattr->cf_rdev = reparse_mkdev(buf->DataBuffer); ++ break; ++ case NFS_SPECFILE_BLK: ++ if (le16_to_cpu(buf->ReparseDataLength) != sizeof(buf->InodeType) + 8) { + WARN_ON_ONCE(1); + return false; + } +- goto out; ++ fattr->cf_mode |= S_IFBLK; ++ fattr->cf_rdev = reparse_mkdev(buf->DataBuffer); ++ break; ++ case NFS_SPECFILE_FIFO: ++ fattr->cf_mode |= S_IFIFO; ++ break; ++ case NFS_SPECFILE_SOCK: ++ fattr->cf_mode |= S_IFSOCK; ++ break; ++ case NFS_SPECFILE_LNK: ++ fattr->cf_mode |= S_IFLNK; ++ break; ++ default: ++ WARN_ON_ONCE(1); ++ return false; + } ++ return true; ++} ++ ++bool cifs_reparse_point_to_fattr(struct cifs_sb_info *cifs_sb, ++ struct cifs_fattr *fattr, ++ struct cifs_open_info_data *data) ++{ ++ u32 tag = data->reparse.tag; ++ bool ok; + + switch (tag) { + case IO_REPARSE_TAG_INTERNAL: +@@ -787,15 +803,19 @@ bool cifs_reparse_point_to_fattr(struct cifs_sb_info *cifs_sb, + case IO_REPARSE_TAG_LX_BLK: + wsl_to_fattr(data, cifs_sb, tag, fattr); + break; ++ case IO_REPARSE_TAG_NFS: ++ ok = posix_reparse_to_fattr(cifs_sb, fattr, data); ++ if (!ok) ++ return false; ++ break; + case 0: /* SMB1 symlink */ + case IO_REPARSE_TAG_SYMLINK: +- case IO_REPARSE_TAG_NFS: + fattr->cf_mode |= S_IFLNK; + break; + default: + return false; + } +-out: ++ + fattr->cf_dtype = S_DT(fattr->cf_mode); + return true; + } +diff --git a/fs/smb/client/smb2inode.c b/fs/smb/client/smb2inode.c +index a188908914fe8f..a55f0044d30bde 100644 +--- a/fs/smb/client/smb2inode.c ++++ b/fs/smb/client/smb2inode.c +@@ -943,7 +943,8 @@ int smb2_query_path_info(const unsigned int xid, + if (rc || !data->reparse_point) + goto out; + +- cmds[num_cmds++] = SMB2_OP_QUERY_WSL_EA; ++ if (!tcon->posix_extensions) ++ cmds[num_cmds++] = SMB2_OP_QUERY_WSL_EA; + /* + * Skip SMB2_OP_GET_REPARSE if symlink already parsed in create + * response. +diff --git a/fs/smb/server/smb2pdu.c b/fs/smb/server/smb2pdu.c +index 599118aed20539..d0836d710f1814 100644 +--- a/fs/smb/server/smb2pdu.c ++++ b/fs/smb/server/smb2pdu.c +@@ -6651,6 +6651,10 @@ int smb2_read(struct ksmbd_work *work) + } + + offset = le64_to_cpu(req->Offset); ++ if (offset < 0) { ++ err = -EINVAL; ++ goto out; ++ } + length = le32_to_cpu(req->Length); + mincount = le32_to_cpu(req->MinimumCount); + +@@ -6864,6 +6868,8 @@ int smb2_write(struct ksmbd_work *work) + } + + offset = le64_to_cpu(req->Offset); ++ if (offset < 0) ++ return -EINVAL; + length = le32_to_cpu(req->Length); + + if (req->Channel == SMB2_CHANNEL_RDMA_V1 || +diff --git a/fs/unicode/mkutf8data.c b/fs/unicode/mkutf8data.c +index b2bd08250c7a09..77b685db827511 100644 +--- a/fs/unicode/mkutf8data.c ++++ b/fs/unicode/mkutf8data.c +@@ -2230,6 +2230,75 @@ static void nfdicf_init(void) + file_fail(fold_name); + } + ++static void ignore_init(void) ++{ ++ FILE *file; ++ unsigned int unichar; ++ unsigned int first; ++ unsigned int last; ++ unsigned int *um; ++ int count; ++ int ret; ++ ++ if (verbose > 0) ++ printf("Parsing %s\n", prop_name); ++ file = fopen(prop_name, "r"); ++ if (!file) ++ open_fail(prop_name, errno); ++ assert(file); ++ count = 0; ++ while (fgets(line, LINESIZE, file)) { ++ ret = sscanf(line, "%X..%X ; %s # ", &first, &last, buf0); ++ if (ret == 3) { ++ if (strcmp(buf0, "Default_Ignorable_Code_Point")) ++ continue; ++ if (!utf32valid(first) || !utf32valid(last)) ++ line_fail(prop_name, line); ++ for (unichar = first; unichar <= last; unichar++) { ++ free(unicode_data[unichar].utf32nfdi); ++ um = malloc(sizeof(unsigned int)); ++ *um = 0; ++ unicode_data[unichar].utf32nfdi = um; ++ free(unicode_data[unichar].utf32nfdicf); ++ um = malloc(sizeof(unsigned int)); ++ *um = 0; ++ unicode_data[unichar].utf32nfdicf = um; ++ count++; ++ } ++ if (verbose > 1) ++ printf(" %X..%X Default_Ignorable_Code_Point\n", ++ first, last); ++ continue; ++ } ++ ret = sscanf(line, "%X ; %s # ", &unichar, buf0); ++ if (ret == 2) { ++ if (strcmp(buf0, "Default_Ignorable_Code_Point")) ++ continue; ++ if (!utf32valid(unichar)) ++ line_fail(prop_name, line); ++ free(unicode_data[unichar].utf32nfdi); ++ um = malloc(sizeof(unsigned int)); ++ *um = 0; ++ unicode_data[unichar].utf32nfdi = um; ++ free(unicode_data[unichar].utf32nfdicf); ++ um = malloc(sizeof(unsigned int)); ++ *um = 0; ++ unicode_data[unichar].utf32nfdicf = um; ++ if (verbose > 1) ++ printf(" %X Default_Ignorable_Code_Point\n", ++ unichar); ++ count++; ++ continue; ++ } ++ } ++ fclose(file); ++ ++ if (verbose > 0) ++ printf("Found %d entries\n", count); ++ if (count == 0) ++ file_fail(prop_name); ++} ++ + static void corrections_init(void) + { + FILE *file; +@@ -3342,6 +3411,7 @@ int main(int argc, char *argv[]) + ccc_init(); + nfdi_init(); + nfdicf_init(); ++ ignore_init(); + corrections_init(); + hangul_decompose(); + nfdi_decompose(); +diff --git a/fs/unicode/utf8data.c_shipped b/fs/unicode/utf8data.c_shipped +index ac2da4ba2dc0f9..dafa5fed761d83 100644 +--- a/fs/unicode/utf8data.c_shipped ++++ b/fs/unicode/utf8data.c_shipped +@@ -82,58 +82,58 @@ static const struct utf8data utf8nfdidata[] = { + { 0xc0100, 20736 } + }; + +-static const unsigned char utf8data[64080] = { ++static const unsigned char utf8data[64256] = { + /* nfdicf_30100 */ +- 0xd7,0x07,0x66,0x84,0x0c,0x01,0x00,0xc6,0xd5,0x16,0xe4,0x96,0x1a,0xe3,0x60,0x15, +- 0xe2,0x49,0x0e,0xc1,0xe0,0x4b,0x0d,0xcf,0x86,0x65,0x2d,0x0d,0x01,0x00,0xd4,0xb8, +- 0xd3,0x27,0xe2,0x03,0xa3,0xe1,0xcb,0x35,0xe0,0x29,0x22,0xcf,0x86,0xc5,0xe4,0xfa, +- 0x6c,0xe3,0x45,0x68,0xe2,0xdb,0x65,0xe1,0x0e,0x65,0xe0,0xd3,0x64,0xcf,0x86,0xe5, +- 0x98,0x64,0x64,0x7b,0x64,0x0b,0x00,0xd2,0x0e,0xe1,0xb3,0x3c,0xe0,0x34,0xa3,0xcf, +- 0x86,0xcf,0x06,0x01,0x00,0xd1,0x0c,0xe0,0x98,0xa8,0xcf,0x86,0xcf,0x06,0x02,0xff, ++ 0xd7,0x07,0x66,0x84,0x0c,0x01,0x00,0xc6,0xd5,0x16,0xe4,0x99,0x1a,0xe3,0x63,0x15, ++ 0xe2,0x4c,0x0e,0xc1,0xe0,0x4e,0x0d,0xcf,0x86,0x65,0x2d,0x0d,0x01,0x00,0xd4,0xb8, ++ 0xd3,0x27,0xe2,0x89,0xa3,0xe1,0xce,0x35,0xe0,0x2c,0x22,0xcf,0x86,0xc5,0xe4,0x15, ++ 0x6d,0xe3,0x60,0x68,0xe2,0xf6,0x65,0xe1,0x29,0x65,0xe0,0xee,0x64,0xcf,0x86,0xe5, ++ 0xb3,0x64,0x64,0x96,0x64,0x0b,0x00,0xd2,0x0e,0xe1,0xb5,0x3c,0xe0,0xba,0xa3,0xcf, ++ 0x86,0xcf,0x06,0x01,0x00,0xd1,0x0c,0xe0,0x1e,0xa9,0xcf,0x86,0xcf,0x06,0x02,0xff, + 0xff,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01, +- 0x00,0xe4,0xdf,0x45,0xe3,0x39,0x45,0xd2,0x06,0xcf,0x06,0x01,0x00,0xe1,0x01,0xad, +- 0xd0,0x21,0xcf,0x86,0xe5,0xfb,0xa9,0xe4,0x7a,0xa9,0xe3,0x39,0xa9,0xe2,0x18,0xa9, +- 0xe1,0x07,0xa9,0x10,0x08,0x01,0xff,0xe8,0xb1,0x88,0x00,0x01,0xff,0xe6,0x9b,0xb4, +- 0x00,0xcf,0x86,0xe5,0xdd,0xab,0xd4,0x19,0xe3,0x1c,0xab,0xe2,0xfb,0xaa,0xe1,0xea, +- 0xaa,0x10,0x08,0x01,0xff,0xe9,0xb9,0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0xe3, +- 0x83,0xab,0xe2,0x62,0xab,0xe1,0x51,0xab,0x10,0x08,0x01,0xff,0xe7,0xb8,0xb7,0x00, +- 0x01,0xff,0xe9,0x9b,0xbb,0x00,0x83,0xe2,0x68,0xf9,0xe1,0x52,0xf6,0xe0,0xcf,0xf4, +- 0xcf,0x86,0xd5,0x31,0xc4,0xe3,0x51,0x4e,0xe2,0xf2,0x4c,0xe1,0x09,0xcc,0xe0,0x99, +- 0x4b,0xcf,0x86,0xe5,0x8b,0x49,0xe4,0xac,0x46,0xe3,0x76,0xbc,0xe2,0xcd,0xbb,0xe1, +- 0xa8,0xbb,0xe0,0x81,0xbb,0xcf,0x86,0xe5,0x4e,0xbb,0x94,0x07,0x63,0x39,0xbb,0x07, +- 0x00,0x07,0x00,0xe4,0x3b,0xf4,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd2,0x0b, +- 0xe1,0x4a,0xe1,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0x39,0xe2,0xcf,0x86, +- 0xe5,0xfe,0xe1,0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0x39,0xe2,0xcf,0x06, +- 0x13,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0xd4,0xf3,0xe3,0xbd,0xf2, +- 0xd2,0xa0,0xe1,0x73,0xe6,0xd0,0x21,0xcf,0x86,0xe5,0x74,0xe3,0xe4,0xf0,0xe2,0xe3, +- 0xae,0xe2,0xe2,0x8d,0xe2,0xe1,0x7b,0xe2,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00, +- 0x05,0xff,0xe4,0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0xd0,0xe4,0xe3,0x8f,0xe4, +- 0xe2,0x6e,0xe4,0xe1,0x5d,0xe4,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff, +- 0xe5,0x93,0xb6,0x00,0xd4,0x34,0xd3,0x18,0xe2,0x57,0xe5,0xe1,0x46,0xe5,0x10,0x09, +- 0x05,0xff,0xf0,0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00,0xe2,0x77, +- 0xe5,0x91,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac, +- 0x88,0x00,0x05,0xff,0xe5,0xac,0xbe,0x00,0xe3,0xbd,0xe5,0xd2,0x14,0xe1,0x8c,0xe5, ++ 0x00,0xe4,0xe1,0x45,0xe3,0x3b,0x45,0xd2,0x06,0xcf,0x06,0x01,0x00,0xe1,0x87,0xad, ++ 0xd0,0x21,0xcf,0x86,0xe5,0x81,0xaa,0xe4,0x00,0xaa,0xe3,0xbf,0xa9,0xe2,0x9e,0xa9, ++ 0xe1,0x8d,0xa9,0x10,0x08,0x01,0xff,0xe8,0xb1,0x88,0x00,0x01,0xff,0xe6,0x9b,0xb4, ++ 0x00,0xcf,0x86,0xe5,0x63,0xac,0xd4,0x19,0xe3,0xa2,0xab,0xe2,0x81,0xab,0xe1,0x70, ++ 0xab,0x10,0x08,0x01,0xff,0xe9,0xb9,0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0xe3, ++ 0x09,0xac,0xe2,0xe8,0xab,0xe1,0xd7,0xab,0x10,0x08,0x01,0xff,0xe7,0xb8,0xb7,0x00, ++ 0x01,0xff,0xe9,0x9b,0xbb,0x00,0x83,0xe2,0x19,0xfa,0xe1,0xf2,0xf6,0xe0,0x6f,0xf5, ++ 0xcf,0x86,0xd5,0x31,0xc4,0xe3,0x54,0x4e,0xe2,0xf5,0x4c,0xe1,0xa4,0xcc,0xe0,0x9c, ++ 0x4b,0xcf,0x86,0xe5,0x8e,0x49,0xe4,0xaf,0x46,0xe3,0x11,0xbd,0xe2,0x68,0xbc,0xe1, ++ 0x43,0xbc,0xe0,0x1c,0xbc,0xcf,0x86,0xe5,0xe9,0xbb,0x94,0x07,0x63,0xd4,0xbb,0x07, ++ 0x00,0x07,0x00,0xe4,0xdb,0xf4,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd2,0x0b, ++ 0xe1,0xea,0xe1,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0xd9,0xe2,0xcf,0x86, ++ 0xe5,0x9e,0xe2,0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0xd9,0xe2,0xcf,0x06, ++ 0x13,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0x74,0xf4,0xe3,0x5d,0xf3, ++ 0xd2,0xa0,0xe1,0x13,0xe7,0xd0,0x21,0xcf,0x86,0xe5,0x14,0xe4,0xe4,0x90,0xe3,0xe3, ++ 0x4e,0xe3,0xe2,0x2d,0xe3,0xe1,0x1b,0xe3,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00, ++ 0x05,0xff,0xe4,0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0x70,0xe5,0xe3,0x2f,0xe5, ++ 0xe2,0x0e,0xe5,0xe1,0xfd,0xe4,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff, ++ 0xe5,0x93,0xb6,0x00,0xd4,0x34,0xd3,0x18,0xe2,0xf7,0xe5,0xe1,0xe6,0xe5,0x10,0x09, ++ 0x05,0xff,0xf0,0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00,0xe2,0x17, ++ 0xe6,0x91,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac, ++ 0x88,0x00,0x05,0xff,0xe5,0xac,0xbe,0x00,0xe3,0x5d,0xe6,0xd2,0x14,0xe1,0x2c,0xe6, + 0x10,0x08,0x05,0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0xe1, +- 0x98,0xe5,0x10,0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00, +- 0xd1,0xd5,0xd0,0x6a,0xcf,0x86,0xe5,0xed,0xea,0xd4,0x19,0xe3,0x26,0xea,0xe2,0x04, +- 0xea,0xe1,0xf3,0xe9,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5, +- 0xb7,0x00,0xd3,0x18,0xe2,0x70,0xea,0xe1,0x5f,0xea,0x10,0x09,0x05,0xff,0xf0,0xa3, +- 0xbd,0x9e,0x00,0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0x88,0xea,0x10, ++ 0x38,0xe6,0x10,0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00, ++ 0xd1,0xd5,0xd0,0x6a,0xcf,0x86,0xe5,0x8d,0xeb,0xd4,0x19,0xe3,0xc6,0xea,0xe2,0xa4, ++ 0xea,0xe1,0x93,0xea,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5, ++ 0xb7,0x00,0xd3,0x18,0xe2,0x10,0xeb,0xe1,0xff,0xea,0x10,0x09,0x05,0xff,0xf0,0xa3, ++ 0xbd,0x9e,0x00,0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0x28,0xeb,0x10, + 0x08,0x05,0xff,0xe7,0x81,0xbd,0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1,0x11,0x10, + 0x08,0x05,0xff,0xe7,0x85,0x85,0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00,0x10,0x08, +- 0x05,0xff,0xe7,0x86,0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86,0xe5,0x8a, +- 0xec,0xd4,0x1a,0xe3,0xc2,0xeb,0xe2,0xa8,0xeb,0xe1,0x95,0xeb,0x10,0x08,0x05,0xff, +- 0xe7,0x9b,0xb4,0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2,0x0a,0xec, +- 0xe1,0xf8,0xeb,0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3, +- 0x00,0xd2,0x13,0xe1,0x26,0xec,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00,0x05,0xff, ++ 0x05,0xff,0xe7,0x86,0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86,0xe5,0x2a, ++ 0xed,0xd4,0x1a,0xe3,0x62,0xec,0xe2,0x48,0xec,0xe1,0x35,0xec,0x10,0x08,0x05,0xff, ++ 0xe7,0x9b,0xb4,0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2,0xaa,0xec, ++ 0xe1,0x98,0xec,0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3, ++ 0x00,0xd2,0x13,0xe1,0xc6,0xec,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00,0x05,0xff, + 0xe7,0xa9,0x80,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc,0x00,0x05, + 0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x05, +- 0xff,0xe7,0xaa,0xae,0x00,0xe0,0x3c,0xef,0xcf,0x86,0xd5,0x1d,0xe4,0xb1,0xed,0xe3, +- 0x6d,0xed,0xe2,0x4b,0xed,0xe1,0x3a,0xed,0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f, +- 0x00,0x05,0xff,0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0x58,0xee,0xe2,0x34,0xee,0xe1, +- 0x23,0xee,0x10,0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f,0x8a,0x00, +- 0xd3,0x18,0xe2,0xa3,0xee,0xe1,0x92,0xee,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1, +- 0x00,0x05,0xff,0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0xbb,0xee,0x10,0x08,0x05, ++ 0xff,0xe7,0xaa,0xae,0x00,0xe0,0xdc,0xef,0xcf,0x86,0xd5,0x1d,0xe4,0x51,0xee,0xe3, ++ 0x0d,0xee,0xe2,0xeb,0xed,0xe1,0xda,0xed,0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f, ++ 0x00,0x05,0xff,0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0xf8,0xee,0xe2,0xd4,0xee,0xe1, ++ 0xc3,0xee,0x10,0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f,0x8a,0x00, ++ 0xd3,0x18,0xe2,0x43,0xef,0xe1,0x32,0xef,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1, ++ 0x00,0x05,0xff,0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0x5b,0xef,0x10,0x08,0x05, + 0xff,0xe8,0x9a,0x88,0x00,0x05,0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10,0x08,0x05, + 0xff,0xe8,0x9c,0xa8,0x00,0x05,0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05,0xff,0xe8, + 0x9e,0x86,0x00,0x05,0xff,0xe4,0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +@@ -141,152 +141,152 @@ static const unsigned char utf8data[64080] = { + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + /* nfdi_30100 */ +- 0x57,0x04,0x01,0x00,0xc6,0xd5,0x13,0xe4,0xa8,0x59,0xe3,0xe2,0x54,0xe2,0x5b,0x4f, +- 0xc1,0xe0,0x87,0x4d,0xcf,0x06,0x01,0x00,0xd4,0xb8,0xd3,0x27,0xe2,0x89,0x9f,0xe1, +- 0x91,0x8d,0xe0,0x21,0x71,0xcf,0x86,0xc5,0xe4,0x80,0x69,0xe3,0xcb,0x64,0xe2,0x61, +- 0x62,0xe1,0x94,0x61,0xe0,0x59,0x61,0xcf,0x86,0xe5,0x1e,0x61,0x64,0x01,0x61,0x0b, +- 0x00,0xd2,0x0e,0xe1,0x3f,0xa0,0xe0,0xba,0x9f,0xcf,0x86,0xcf,0x06,0x01,0x00,0xd1, +- 0x0c,0xe0,0x1e,0xa5,0xcf,0x86,0xcf,0x06,0x02,0xff,0xff,0xd0,0x08,0xcf,0x86,0xcf, +- 0x06,0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01,0x00,0xe4,0x1b,0xb6,0xe3,0x95, +- 0xad,0xd2,0x06,0xcf,0x06,0x01,0x00,0xe1,0x87,0xa9,0xd0,0x21,0xcf,0x86,0xe5,0x81, +- 0xa6,0xe4,0x00,0xa6,0xe3,0xbf,0xa5,0xe2,0x9e,0xa5,0xe1,0x8d,0xa5,0x10,0x08,0x01, +- 0xff,0xe8,0xb1,0x88,0x00,0x01,0xff,0xe6,0x9b,0xb4,0x00,0xcf,0x86,0xe5,0x63,0xa8, +- 0xd4,0x19,0xe3,0xa2,0xa7,0xe2,0x81,0xa7,0xe1,0x70,0xa7,0x10,0x08,0x01,0xff,0xe9, +- 0xb9,0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0xe3,0x09,0xa8,0xe2,0xe8,0xa7,0xe1, +- 0xd7,0xa7,0x10,0x08,0x01,0xff,0xe7,0xb8,0xb7,0x00,0x01,0xff,0xe9,0x9b,0xbb,0x00, +- 0x83,0xe2,0xee,0xf5,0xe1,0xd8,0xf2,0xe0,0x55,0xf1,0xcf,0x86,0xd5,0x31,0xc4,0xe3, +- 0xd5,0xcb,0xe2,0xae,0xc9,0xe1,0x8f,0xc8,0xe0,0x1f,0xbf,0xcf,0x86,0xe5,0x12,0xbb, +- 0xe4,0x0b,0xba,0xe3,0xfc,0xb8,0xe2,0x53,0xb8,0xe1,0x2e,0xb8,0xe0,0x07,0xb8,0xcf, +- 0x86,0xe5,0xd4,0xb7,0x94,0x07,0x63,0xbf,0xb7,0x07,0x00,0x07,0x00,0xe4,0xc1,0xf0, +- 0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd2,0x0b,0xe1,0xd0,0xdd,0xcf,0x86,0xcf, +- 0x06,0x05,0x00,0xd1,0x0e,0xe0,0xbf,0xde,0xcf,0x86,0xe5,0x84,0xde,0xcf,0x06,0x11, +- 0x00,0xd0,0x0b,0xcf,0x86,0xe5,0xbf,0xde,0xcf,0x06,0x13,0x00,0xcf,0x86,0xd5,0x06, +- 0xcf,0x06,0x00,0x00,0xe4,0x5a,0xf0,0xe3,0x43,0xef,0xd2,0xa0,0xe1,0xf9,0xe2,0xd0, +- 0x21,0xcf,0x86,0xe5,0xfa,0xdf,0xe4,0x76,0xdf,0xe3,0x34,0xdf,0xe2,0x13,0xdf,0xe1, +- 0x01,0xdf,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00,0x05,0xff,0xe4,0xb8,0xb8,0x00, +- 0xcf,0x86,0xd5,0x1c,0xe4,0x56,0xe1,0xe3,0x15,0xe1,0xe2,0xf4,0xe0,0xe1,0xe3,0xe0, +- 0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff,0xe5,0x93,0xb6,0x00,0xd4,0x34, +- 0xd3,0x18,0xe2,0xdd,0xe1,0xe1,0xcc,0xe1,0x10,0x09,0x05,0xff,0xf0,0xa1,0x9a,0xa8, +- 0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00,0xe2,0xfd,0xe1,0x91,0x11,0x10,0x09,0x05, +- 0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac,0x88,0x00,0x05,0xff,0xe5,0xac, +- 0xbe,0x00,0xe3,0x43,0xe2,0xd2,0x14,0xe1,0x12,0xe2,0x10,0x08,0x05,0xff,0xe5,0xaf, +- 0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0xe1,0x1e,0xe2,0x10,0x08,0x05,0xff, +- 0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00,0xd1,0xd5,0xd0,0x6a,0xcf,0x86, +- 0xe5,0x73,0xe7,0xd4,0x19,0xe3,0xac,0xe6,0xe2,0x8a,0xe6,0xe1,0x79,0xe6,0x10,0x08, +- 0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5,0xb7,0x00,0xd3,0x18,0xe2,0xf6, +- 0xe6,0xe1,0xe5,0xe6,0x10,0x09,0x05,0xff,0xf0,0xa3,0xbd,0x9e,0x00,0x05,0xff,0xf0, +- 0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0x0e,0xe7,0x10,0x08,0x05,0xff,0xe7,0x81,0xbd, +- 0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1,0x11,0x10,0x08,0x05,0xff,0xe7,0x85,0x85, +- 0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00,0x10,0x08,0x05,0xff,0xe7,0x86,0x9c,0x00, +- 0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86,0xe5,0x10,0xe9,0xd4,0x1a,0xe3,0x48,0xe8, +- 0xe2,0x2e,0xe8,0xe1,0x1b,0xe8,0x10,0x08,0x05,0xff,0xe7,0x9b,0xb4,0x00,0x05,0xff, +- 0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2,0x90,0xe8,0xe1,0x7e,0xe8,0x10,0x08,0x05, +- 0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3,0x00,0xd2,0x13,0xe1,0xac,0xe8, +- 0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00,0x05,0xff,0xe7,0xa9,0x80,0x00,0xd1,0x12, +- 0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc,0x00,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00, +- 0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x05,0xff,0xe7,0xaa,0xae,0x00,0xe0, +- 0xc2,0xeb,0xcf,0x86,0xd5,0x1d,0xe4,0x37,0xea,0xe3,0xf3,0xe9,0xe2,0xd1,0xe9,0xe1, +- 0xc0,0xe9,0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f,0x00,0x05,0xff,0xe4,0x8f,0x95, +- 0x00,0xd4,0x19,0xe3,0xde,0xea,0xe2,0xba,0xea,0xe1,0xa9,0xea,0x10,0x08,0x05,0xff, +- 0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f,0x8a,0x00,0xd3,0x18,0xe2,0x29,0xeb,0xe1, +- 0x18,0xeb,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1,0x00,0x05,0xff,0xf0,0xa7,0x83, +- 0x92,0x00,0xd2,0x13,0xe1,0x41,0xeb,0x10,0x08,0x05,0xff,0xe8,0x9a,0x88,0x00,0x05, +- 0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x9c,0xa8,0x00,0x05, +- 0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05,0xff,0xe8,0x9e,0x86,0x00,0x05,0xff,0xe4, +- 0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x57,0x04,0x01,0x00,0xc6,0xd5,0x16,0xe4,0xc2,0x59,0xe3,0xfb,0x54,0xe2,0x74,0x4f, ++ 0xc1,0xe0,0xa0,0x4d,0xcf,0x86,0x65,0x84,0x4d,0x01,0x00,0xd4,0xb8,0xd3,0x27,0xe2, ++ 0x0c,0xa0,0xe1,0xdf,0x8d,0xe0,0x39,0x71,0xcf,0x86,0xc5,0xe4,0x98,0x69,0xe3,0xe3, ++ 0x64,0xe2,0x79,0x62,0xe1,0xac,0x61,0xe0,0x71,0x61,0xcf,0x86,0xe5,0x36,0x61,0x64, ++ 0x19,0x61,0x0b,0x00,0xd2,0x0e,0xe1,0xc2,0xa0,0xe0,0x3d,0xa0,0xcf,0x86,0xcf,0x06, ++ 0x01,0x00,0xd1,0x0c,0xe0,0xa1,0xa5,0xcf,0x86,0xcf,0x06,0x02,0xff,0xff,0xd0,0x08, ++ 0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01,0x00,0xe4,0x9e, ++ 0xb6,0xe3,0x18,0xae,0xd2,0x06,0xcf,0x06,0x01,0x00,0xe1,0x0a,0xaa,0xd0,0x21,0xcf, ++ 0x86,0xe5,0x04,0xa7,0xe4,0x83,0xa6,0xe3,0x42,0xa6,0xe2,0x21,0xa6,0xe1,0x10,0xa6, ++ 0x10,0x08,0x01,0xff,0xe8,0xb1,0x88,0x00,0x01,0xff,0xe6,0x9b,0xb4,0x00,0xcf,0x86, ++ 0xe5,0xe6,0xa8,0xd4,0x19,0xe3,0x25,0xa8,0xe2,0x04,0xa8,0xe1,0xf3,0xa7,0x10,0x08, ++ 0x01,0xff,0xe9,0xb9,0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0xe3,0x8c,0xa8,0xe2, ++ 0x6b,0xa8,0xe1,0x5a,0xa8,0x10,0x08,0x01,0xff,0xe7,0xb8,0xb7,0x00,0x01,0xff,0xe9, ++ 0x9b,0xbb,0x00,0x83,0xe2,0x9c,0xf6,0xe1,0x75,0xf3,0xe0,0xf2,0xf1,0xcf,0x86,0xd5, ++ 0x31,0xc4,0xe3,0x6d,0xcc,0xe2,0x46,0xca,0xe1,0x27,0xc9,0xe0,0xb7,0xbf,0xcf,0x86, ++ 0xe5,0xaa,0xbb,0xe4,0xa3,0xba,0xe3,0x94,0xb9,0xe2,0xeb,0xb8,0xe1,0xc6,0xb8,0xe0, ++ 0x9f,0xb8,0xcf,0x86,0xe5,0x6c,0xb8,0x94,0x07,0x63,0x57,0xb8,0x07,0x00,0x07,0x00, ++ 0xe4,0x5e,0xf1,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd2,0x0b,0xe1,0x6d,0xde, ++ 0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0x5c,0xdf,0xcf,0x86,0xe5,0x21,0xdf, ++ 0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0x5c,0xdf,0xcf,0x06,0x13,0x00,0xcf, ++ 0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0xf7,0xf0,0xe3,0xe0,0xef,0xd2,0xa0,0xe1, ++ 0x96,0xe3,0xd0,0x21,0xcf,0x86,0xe5,0x97,0xe0,0xe4,0x13,0xe0,0xe3,0xd1,0xdf,0xe2, ++ 0xb0,0xdf,0xe1,0x9e,0xdf,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00,0x05,0xff,0xe4, ++ 0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0xf3,0xe1,0xe3,0xb2,0xe1,0xe2,0x91,0xe1, ++ 0xe1,0x80,0xe1,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff,0xe5,0x93,0xb6, ++ 0x00,0xd4,0x34,0xd3,0x18,0xe2,0x7a,0xe2,0xe1,0x69,0xe2,0x10,0x09,0x05,0xff,0xf0, ++ 0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00,0xe2,0x9a,0xe2,0x91,0x11, ++ 0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac,0x88,0x00,0x05, ++ 0xff,0xe5,0xac,0xbe,0x00,0xe3,0xe0,0xe2,0xd2,0x14,0xe1,0xaf,0xe2,0x10,0x08,0x05, ++ 0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0xe1,0xbb,0xe2,0x10, ++ 0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00,0xd1,0xd5,0xd0, ++ 0x6a,0xcf,0x86,0xe5,0x10,0xe8,0xd4,0x19,0xe3,0x49,0xe7,0xe2,0x27,0xe7,0xe1,0x16, ++ 0xe7,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5,0xb7,0x00,0xd3, ++ 0x18,0xe2,0x93,0xe7,0xe1,0x82,0xe7,0x10,0x09,0x05,0xff,0xf0,0xa3,0xbd,0x9e,0x00, ++ 0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0xab,0xe7,0x10,0x08,0x05,0xff, ++ 0xe7,0x81,0xbd,0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1,0x11,0x10,0x08,0x05,0xff, ++ 0xe7,0x85,0x85,0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00,0x10,0x08,0x05,0xff,0xe7, ++ 0x86,0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86,0xe5,0xad,0xe9,0xd4,0x1a, ++ 0xe3,0xe5,0xe8,0xe2,0xcb,0xe8,0xe1,0xb8,0xe8,0x10,0x08,0x05,0xff,0xe7,0x9b,0xb4, ++ 0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2,0x2d,0xe9,0xe1,0x1b,0xe9, ++ 0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3,0x00,0xd2,0x13, ++ 0xe1,0x49,0xe9,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00,0x05,0xff,0xe7,0xa9,0x80, ++ 0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc,0x00,0x05,0xff,0xf0,0xa5, ++ 0xaa,0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x05,0xff,0xe7,0xaa, ++ 0xae,0x00,0xe0,0x5f,0xec,0xcf,0x86,0xd5,0x1d,0xe4,0xd4,0xea,0xe3,0x90,0xea,0xe2, ++ 0x6e,0xea,0xe1,0x5d,0xea,0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f,0x00,0x05,0xff, ++ 0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0x7b,0xeb,0xe2,0x57,0xeb,0xe1,0x46,0xeb,0x10, ++ 0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f,0x8a,0x00,0xd3,0x18,0xe2, ++ 0xc6,0xeb,0xe1,0xb5,0xeb,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1,0x00,0x05,0xff, ++ 0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0xde,0xeb,0x10,0x08,0x05,0xff,0xe8,0x9a, ++ 0x88,0x00,0x05,0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x9c, ++ 0xa8,0x00,0x05,0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05,0xff,0xe8,0x9e,0x86,0x00, ++ 0x05,0xff,0xe4,0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + /* nfdicf_30200 */ +- 0xd7,0x07,0x66,0x84,0x05,0x01,0x00,0xc6,0xd5,0x16,0xe4,0x96,0x13,0xe3,0x60,0x0e, +- 0xe2,0x49,0x07,0xc1,0xe0,0x4b,0x06,0xcf,0x86,0x65,0x2d,0x06,0x01,0x00,0xd4,0x2a, +- 0xe3,0xce,0x35,0xe2,0x02,0x9c,0xe1,0xca,0x2e,0xe0,0x28,0x1b,0xcf,0x86,0xc5,0xe4, +- 0xf9,0x65,0xe3,0x44,0x61,0xe2,0xda,0x5e,0xe1,0x0d,0x5e,0xe0,0xd2,0x5d,0xcf,0x86, +- 0xe5,0x97,0x5d,0x64,0x7a,0x5d,0x0b,0x00,0x83,0xe2,0xf6,0xf2,0xe1,0xe0,0xef,0xe0, +- 0x5d,0xee,0xcf,0x86,0xd5,0x31,0xc4,0xe3,0xdf,0x47,0xe2,0x80,0x46,0xe1,0x97,0xc5, +- 0xe0,0x27,0x45,0xcf,0x86,0xe5,0x19,0x43,0xe4,0x3a,0x40,0xe3,0x04,0xb6,0xe2,0x5b, +- 0xb5,0xe1,0x36,0xb5,0xe0,0x0f,0xb5,0xcf,0x86,0xe5,0xdc,0xb4,0x94,0x07,0x63,0xc7, +- 0xb4,0x07,0x00,0x07,0x00,0xe4,0xc9,0xed,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00, +- 0xd2,0x0b,0xe1,0xd8,0xda,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0xc7,0xdb, +- 0xcf,0x86,0xe5,0x8c,0xdb,0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0xc7,0xdb, +- 0xcf,0x06,0x13,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0x62,0xed,0xe3, +- 0x4b,0xec,0xd2,0xa0,0xe1,0x01,0xe0,0xd0,0x21,0xcf,0x86,0xe5,0x02,0xdd,0xe4,0x7e, +- 0xdc,0xe3,0x3c,0xdc,0xe2,0x1b,0xdc,0xe1,0x09,0xdc,0x10,0x08,0x05,0xff,0xe4,0xb8, +- 0xbd,0x00,0x05,0xff,0xe4,0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0x5e,0xde,0xe3, +- 0x1d,0xde,0xe2,0xfc,0xdd,0xe1,0xeb,0xdd,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00, +- 0x05,0xff,0xe5,0x93,0xb6,0x00,0xd4,0x34,0xd3,0x18,0xe2,0xe5,0xde,0xe1,0xd4,0xde, ++ 0xd7,0x07,0x66,0x84,0x05,0x01,0x00,0xc6,0xd5,0x16,0xe4,0x99,0x13,0xe3,0x63,0x0e, ++ 0xe2,0x4c,0x07,0xc1,0xe0,0x4e,0x06,0xcf,0x86,0x65,0x2d,0x06,0x01,0x00,0xd4,0x2a, ++ 0xe3,0xd0,0x35,0xe2,0x88,0x9c,0xe1,0xcd,0x2e,0xe0,0x2b,0x1b,0xcf,0x86,0xc5,0xe4, ++ 0x14,0x66,0xe3,0x5f,0x61,0xe2,0xf5,0x5e,0xe1,0x28,0x5e,0xe0,0xed,0x5d,0xcf,0x86, ++ 0xe5,0xb2,0x5d,0x64,0x95,0x5d,0x0b,0x00,0x83,0xe2,0xa7,0xf3,0xe1,0x80,0xf0,0xe0, ++ 0xfd,0xee,0xcf,0x86,0xd5,0x31,0xc4,0xe3,0xe2,0x47,0xe2,0x83,0x46,0xe1,0x32,0xc6, ++ 0xe0,0x2a,0x45,0xcf,0x86,0xe5,0x1c,0x43,0xe4,0x3d,0x40,0xe3,0x9f,0xb6,0xe2,0xf6, ++ 0xb5,0xe1,0xd1,0xb5,0xe0,0xaa,0xb5,0xcf,0x86,0xe5,0x77,0xb5,0x94,0x07,0x63,0x62, ++ 0xb5,0x07,0x00,0x07,0x00,0xe4,0x69,0xee,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00, ++ 0xd2,0x0b,0xe1,0x78,0xdb,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0x67,0xdc, ++ 0xcf,0x86,0xe5,0x2c,0xdc,0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0x67,0xdc, ++ 0xcf,0x06,0x13,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0x02,0xee,0xe3, ++ 0xeb,0xec,0xd2,0xa0,0xe1,0xa1,0xe0,0xd0,0x21,0xcf,0x86,0xe5,0xa2,0xdd,0xe4,0x1e, ++ 0xdd,0xe3,0xdc,0xdc,0xe2,0xbb,0xdc,0xe1,0xa9,0xdc,0x10,0x08,0x05,0xff,0xe4,0xb8, ++ 0xbd,0x00,0x05,0xff,0xe4,0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0xfe,0xde,0xe3, ++ 0xbd,0xde,0xe2,0x9c,0xde,0xe1,0x8b,0xde,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00, ++ 0x05,0xff,0xe5,0x93,0xb6,0x00,0xd4,0x34,0xd3,0x18,0xe2,0x85,0xdf,0xe1,0x74,0xdf, + 0x10,0x09,0x05,0xff,0xf0,0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00, +- 0xe2,0x05,0xdf,0x91,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff, +- 0xe5,0xac,0x88,0x00,0x05,0xff,0xe5,0xac,0xbe,0x00,0xe3,0x4b,0xdf,0xd2,0x14,0xe1, +- 0x1a,0xdf,0x10,0x08,0x05,0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98, +- 0x00,0xe1,0x26,0xdf,0x10,0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0, +- 0xa2,0x00,0xd1,0xd5,0xd0,0x6a,0xcf,0x86,0xe5,0x7b,0xe4,0xd4,0x19,0xe3,0xb4,0xe3, +- 0xe2,0x92,0xe3,0xe1,0x81,0xe3,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff, +- 0xe6,0xb5,0xb7,0x00,0xd3,0x18,0xe2,0xfe,0xe3,0xe1,0xed,0xe3,0x10,0x09,0x05,0xff, +- 0xf0,0xa3,0xbd,0x9e,0x00,0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0x16, ++ 0xe2,0xa5,0xdf,0x91,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff, ++ 0xe5,0xac,0x88,0x00,0x05,0xff,0xe5,0xac,0xbe,0x00,0xe3,0xeb,0xdf,0xd2,0x14,0xe1, ++ 0xba,0xdf,0x10,0x08,0x05,0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98, ++ 0x00,0xe1,0xc6,0xdf,0x10,0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0, ++ 0xa2,0x00,0xd1,0xd5,0xd0,0x6a,0xcf,0x86,0xe5,0x1b,0xe5,0xd4,0x19,0xe3,0x54,0xe4, ++ 0xe2,0x32,0xe4,0xe1,0x21,0xe4,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff, ++ 0xe6,0xb5,0xb7,0x00,0xd3,0x18,0xe2,0x9e,0xe4,0xe1,0x8d,0xe4,0x10,0x09,0x05,0xff, ++ 0xf0,0xa3,0xbd,0x9e,0x00,0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0xb6, + 0xe4,0x10,0x08,0x05,0xff,0xe7,0x81,0xbd,0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1, + 0x11,0x10,0x08,0x05,0xff,0xe7,0x85,0x85,0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00, + 0x10,0x08,0x05,0xff,0xe7,0x86,0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86, +- 0xe5,0x18,0xe6,0xd4,0x1a,0xe3,0x50,0xe5,0xe2,0x36,0xe5,0xe1,0x23,0xe5,0x10,0x08, ++ 0xe5,0xb8,0xe6,0xd4,0x1a,0xe3,0xf0,0xe5,0xe2,0xd6,0xe5,0xe1,0xc3,0xe5,0x10,0x08, + 0x05,0xff,0xe7,0x9b,0xb4,0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2, +- 0x98,0xe5,0xe1,0x86,0xe5,0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4, +- 0x83,0xa3,0x00,0xd2,0x13,0xe1,0xb4,0xe5,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00, ++ 0x38,0xe6,0xe1,0x26,0xe6,0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4, ++ 0x83,0xa3,0x00,0xd2,0x13,0xe1,0x54,0xe6,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00, + 0x05,0xff,0xe7,0xa9,0x80,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc, + 0x00,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7, +- 0x00,0x05,0xff,0xe7,0xaa,0xae,0x00,0xe0,0xca,0xe8,0xcf,0x86,0xd5,0x1d,0xe4,0x3f, +- 0xe7,0xe3,0xfb,0xe6,0xe2,0xd9,0xe6,0xe1,0xc8,0xe6,0x10,0x09,0x05,0xff,0xf0,0xa3, +- 0x8d,0x9f,0x00,0x05,0xff,0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0xe6,0xe7,0xe2,0xc2, +- 0xe7,0xe1,0xb1,0xe7,0x10,0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f, +- 0x8a,0x00,0xd3,0x18,0xe2,0x31,0xe8,0xe1,0x20,0xe8,0x10,0x09,0x05,0xff,0xf0,0xa6, +- 0xbe,0xb1,0x00,0x05,0xff,0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0x49,0xe8,0x10, ++ 0x00,0x05,0xff,0xe7,0xaa,0xae,0x00,0xe0,0x6a,0xe9,0xcf,0x86,0xd5,0x1d,0xe4,0xdf, ++ 0xe7,0xe3,0x9b,0xe7,0xe2,0x79,0xe7,0xe1,0x68,0xe7,0x10,0x09,0x05,0xff,0xf0,0xa3, ++ 0x8d,0x9f,0x00,0x05,0xff,0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0x86,0xe8,0xe2,0x62, ++ 0xe8,0xe1,0x51,0xe8,0x10,0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f, ++ 0x8a,0x00,0xd3,0x18,0xe2,0xd1,0xe8,0xe1,0xc0,0xe8,0x10,0x09,0x05,0xff,0xf0,0xa6, ++ 0xbe,0xb1,0x00,0x05,0xff,0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0xe9,0xe8,0x10, + 0x08,0x05,0xff,0xe8,0x9a,0x88,0x00,0x05,0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10, + 0x08,0x05,0xff,0xe8,0x9c,0xa8,0x00,0x05,0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05, + 0xff,0xe8,0x9e,0x86,0x00,0x05,0xff,0xe4,0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00, + /* nfdi_30200 */ +- 0x57,0x04,0x01,0x00,0xc6,0xd5,0x13,0xe4,0x68,0x53,0xe3,0xa2,0x4e,0xe2,0x1b,0x49, +- 0xc1,0xe0,0x47,0x47,0xcf,0x06,0x01,0x00,0xd4,0x2a,0xe3,0x99,0x99,0xe2,0x48,0x99, +- 0xe1,0x50,0x87,0xe0,0xe0,0x6a,0xcf,0x86,0xc5,0xe4,0x3f,0x63,0xe3,0x8a,0x5e,0xe2, +- 0x20,0x5c,0xe1,0x53,0x5b,0xe0,0x18,0x5b,0xcf,0x86,0xe5,0xdd,0x5a,0x64,0xc0,0x5a, +- 0x0b,0x00,0x83,0xe2,0x3c,0xf0,0xe1,0x26,0xed,0xe0,0xa3,0xeb,0xcf,0x86,0xd5,0x31, +- 0xc4,0xe3,0x23,0xc6,0xe2,0xfc,0xc3,0xe1,0xdd,0xc2,0xe0,0x6d,0xb9,0xcf,0x86,0xe5, +- 0x60,0xb5,0xe4,0x59,0xb4,0xe3,0x4a,0xb3,0xe2,0xa1,0xb2,0xe1,0x7c,0xb2,0xe0,0x55, +- 0xb2,0xcf,0x86,0xe5,0x22,0xb2,0x94,0x07,0x63,0x0d,0xb2,0x07,0x00,0x07,0x00,0xe4, +- 0x0f,0xeb,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd2,0x0b,0xe1,0x1e,0xd8,0xcf, +- 0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0x0d,0xd9,0xcf,0x86,0xe5,0xd2,0xd8,0xcf, +- 0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0x0d,0xd9,0xcf,0x06,0x13,0x00,0xcf,0x86, +- 0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0xa8,0xea,0xe3,0x91,0xe9,0xd2,0xa0,0xe1,0x47, +- 0xdd,0xd0,0x21,0xcf,0x86,0xe5,0x48,0xda,0xe4,0xc4,0xd9,0xe3,0x82,0xd9,0xe2,0x61, +- 0xd9,0xe1,0x4f,0xd9,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00,0x05,0xff,0xe4,0xb8, +- 0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0xa4,0xdb,0xe3,0x63,0xdb,0xe2,0x42,0xdb,0xe1, +- 0x31,0xdb,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff,0xe5,0x93,0xb6,0x00, +- 0xd4,0x34,0xd3,0x18,0xe2,0x2b,0xdc,0xe1,0x1a,0xdc,0x10,0x09,0x05,0xff,0xf0,0xa1, +- 0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00,0xe2,0x4b,0xdc,0x91,0x11,0x10, +- 0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac,0x88,0x00,0x05,0xff, +- 0xe5,0xac,0xbe,0x00,0xe3,0x91,0xdc,0xd2,0x14,0xe1,0x60,0xdc,0x10,0x08,0x05,0xff, +- 0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0xe1,0x6c,0xdc,0x10,0x08, +- 0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00,0xd1,0xd5,0xd0,0x6a, +- 0xcf,0x86,0xe5,0xc1,0xe1,0xd4,0x19,0xe3,0xfa,0xe0,0xe2,0xd8,0xe0,0xe1,0xc7,0xe0, +- 0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5,0xb7,0x00,0xd3,0x18, +- 0xe2,0x44,0xe1,0xe1,0x33,0xe1,0x10,0x09,0x05,0xff,0xf0,0xa3,0xbd,0x9e,0x00,0x05, +- 0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0x5c,0xe1,0x10,0x08,0x05,0xff,0xe7, +- 0x81,0xbd,0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1,0x11,0x10,0x08,0x05,0xff,0xe7, +- 0x85,0x85,0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00,0x10,0x08,0x05,0xff,0xe7,0x86, +- 0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86,0xe5,0x5e,0xe3,0xd4,0x1a,0xe3, +- 0x96,0xe2,0xe2,0x7c,0xe2,0xe1,0x69,0xe2,0x10,0x08,0x05,0xff,0xe7,0x9b,0xb4,0x00, +- 0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2,0xde,0xe2,0xe1,0xcc,0xe2,0x10, +- 0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3,0x00,0xd2,0x13,0xe1, +- 0xfa,0xe2,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00,0x05,0xff,0xe7,0xa9,0x80,0x00, +- 0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc,0x00,0x05,0xff,0xf0,0xa5,0xaa, +- 0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x05,0xff,0xe7,0xaa,0xae, +- 0x00,0xe0,0x10,0xe6,0xcf,0x86,0xd5,0x1d,0xe4,0x85,0xe4,0xe3,0x41,0xe4,0xe2,0x1f, +- 0xe4,0xe1,0x0e,0xe4,0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f,0x00,0x05,0xff,0xe4, +- 0x8f,0x95,0x00,0xd4,0x19,0xe3,0x2c,0xe5,0xe2,0x08,0xe5,0xe1,0xf7,0xe4,0x10,0x08, +- 0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f,0x8a,0x00,0xd3,0x18,0xe2,0x77, +- 0xe5,0xe1,0x66,0xe5,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1,0x00,0x05,0xff,0xf0, +- 0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0x8f,0xe5,0x10,0x08,0x05,0xff,0xe8,0x9a,0x88, +- 0x00,0x05,0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x9c,0xa8, +- 0x00,0x05,0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05,0xff,0xe8,0x9e,0x86,0x00,0x05, +- 0xff,0xe4,0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x57,0x04,0x01,0x00,0xc6,0xd5,0x16,0xe4,0x82,0x53,0xe3,0xbb,0x4e,0xe2,0x34,0x49, ++ 0xc1,0xe0,0x60,0x47,0xcf,0x86,0x65,0x44,0x47,0x01,0x00,0xd4,0x2a,0xe3,0x1c,0x9a, ++ 0xe2,0xcb,0x99,0xe1,0x9e,0x87,0xe0,0xf8,0x6a,0xcf,0x86,0xc5,0xe4,0x57,0x63,0xe3, ++ 0xa2,0x5e,0xe2,0x38,0x5c,0xe1,0x6b,0x5b,0xe0,0x30,0x5b,0xcf,0x86,0xe5,0xf5,0x5a, ++ 0x64,0xd8,0x5a,0x0b,0x00,0x83,0xe2,0xea,0xf0,0xe1,0xc3,0xed,0xe0,0x40,0xec,0xcf, ++ 0x86,0xd5,0x31,0xc4,0xe3,0xbb,0xc6,0xe2,0x94,0xc4,0xe1,0x75,0xc3,0xe0,0x05,0xba, ++ 0xcf,0x86,0xe5,0xf8,0xb5,0xe4,0xf1,0xb4,0xe3,0xe2,0xb3,0xe2,0x39,0xb3,0xe1,0x14, ++ 0xb3,0xe0,0xed,0xb2,0xcf,0x86,0xe5,0xba,0xb2,0x94,0x07,0x63,0xa5,0xb2,0x07,0x00, ++ 0x07,0x00,0xe4,0xac,0xeb,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd2,0x0b,0xe1, ++ 0xbb,0xd8,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0xaa,0xd9,0xcf,0x86,0xe5, ++ 0x6f,0xd9,0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0xaa,0xd9,0xcf,0x06,0x13, ++ 0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0x45,0xeb,0xe3,0x2e,0xea,0xd2, ++ 0xa0,0xe1,0xe4,0xdd,0xd0,0x21,0xcf,0x86,0xe5,0xe5,0xda,0xe4,0x61,0xda,0xe3,0x1f, ++ 0xda,0xe2,0xfe,0xd9,0xe1,0xec,0xd9,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00,0x05, ++ 0xff,0xe4,0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0x41,0xdc,0xe3,0x00,0xdc,0xe2, ++ 0xdf,0xdb,0xe1,0xce,0xdb,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff,0xe5, ++ 0x93,0xb6,0x00,0xd4,0x34,0xd3,0x18,0xe2,0xc8,0xdc,0xe1,0xb7,0xdc,0x10,0x09,0x05, ++ 0xff,0xf0,0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00,0xe2,0xe8,0xdc, ++ 0x91,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac,0x88, ++ 0x00,0x05,0xff,0xe5,0xac,0xbe,0x00,0xe3,0x2e,0xdd,0xd2,0x14,0xe1,0xfd,0xdc,0x10, ++ 0x08,0x05,0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0xe1,0x09, ++ 0xdd,0x10,0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00,0xd1, ++ 0xd5,0xd0,0x6a,0xcf,0x86,0xe5,0x5e,0xe2,0xd4,0x19,0xe3,0x97,0xe1,0xe2,0x75,0xe1, ++ 0xe1,0x64,0xe1,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5,0xb7, ++ 0x00,0xd3,0x18,0xe2,0xe1,0xe1,0xe1,0xd0,0xe1,0x10,0x09,0x05,0xff,0xf0,0xa3,0xbd, ++ 0x9e,0x00,0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0xf9,0xe1,0x10,0x08, ++ 0x05,0xff,0xe7,0x81,0xbd,0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1,0x11,0x10,0x08, ++ 0x05,0xff,0xe7,0x85,0x85,0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00,0x10,0x08,0x05, ++ 0xff,0xe7,0x86,0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86,0xe5,0xfb,0xe3, ++ 0xd4,0x1a,0xe3,0x33,0xe3,0xe2,0x19,0xe3,0xe1,0x06,0xe3,0x10,0x08,0x05,0xff,0xe7, ++ 0x9b,0xb4,0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2,0x7b,0xe3,0xe1, ++ 0x69,0xe3,0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3,0x00, ++ 0xd2,0x13,0xe1,0x97,0xe3,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00,0x05,0xff,0xe7, ++ 0xa9,0x80,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc,0x00,0x05,0xff, ++ 0xf0,0xa5,0xaa,0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x05,0xff, ++ 0xe7,0xaa,0xae,0x00,0xe0,0xad,0xe6,0xcf,0x86,0xd5,0x1d,0xe4,0x22,0xe5,0xe3,0xde, ++ 0xe4,0xe2,0xbc,0xe4,0xe1,0xab,0xe4,0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f,0x00, ++ 0x05,0xff,0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0xc9,0xe5,0xe2,0xa5,0xe5,0xe1,0x94, ++ 0xe5,0x10,0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f,0x8a,0x00,0xd3, ++ 0x18,0xe2,0x14,0xe6,0xe1,0x03,0xe6,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1,0x00, ++ 0x05,0xff,0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0x2c,0xe6,0x10,0x08,0x05,0xff, ++ 0xe8,0x9a,0x88,0x00,0x05,0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10,0x08,0x05,0xff, ++ 0xe8,0x9c,0xa8,0x00,0x05,0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05,0xff,0xe8,0x9e, ++ 0x86,0x00,0x05,0xff,0xe4,0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + /* nfdicf_c0100 */ + 0xd7,0xb0,0x56,0x04,0x01,0x00,0x95,0xa8,0xd4,0x5e,0xd3,0x2e,0xd2,0x16,0xd1,0x0a, + 0x10,0x04,0x01,0x00,0x01,0xff,0x61,0x00,0x10,0x06,0x01,0xff,0x62,0x00,0x01,0xff, +@@ -299,3174 +299,3184 @@ static const unsigned char utf8data[64080] = { + 0xd1,0x0c,0x10,0x06,0x01,0xff,0x74,0x00,0x01,0xff,0x75,0x00,0x10,0x06,0x01,0xff, + 0x76,0x00,0x01,0xff,0x77,0x00,0x92,0x16,0xd1,0x0c,0x10,0x06,0x01,0xff,0x78,0x00, + 0x01,0xff,0x79,0x00,0x10,0x06,0x01,0xff,0x7a,0x00,0x01,0x00,0x01,0x00,0x01,0x00, +- 0xc6,0xe5,0xf6,0x14,0xe4,0x6c,0x0d,0xe3,0x36,0x08,0xe2,0x1f,0x01,0xc1,0xd0,0x21, +- 0xcf,0x86,0x55,0x04,0x01,0x00,0x54,0x04,0x01,0x00,0x93,0x13,0x52,0x04,0x01,0x00, +- 0x91,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xce,0xbc,0x00,0x01,0x00,0x01,0x00,0xcf, +- 0x86,0xe5,0x9d,0x44,0xd4,0x7f,0xd3,0x3f,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x61,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x61,0xcc, +- 0x82,0x00,0x01,0xff,0x61,0xcc,0x83,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc, +- 0x88,0x00,0x01,0xff,0x61,0xcc,0x8a,0x00,0x10,0x07,0x01,0xff,0xc3,0xa6,0x00,0x01, +- 0xff,0x63,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0x80, +- 0x00,0x01,0xff,0x65,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x82,0x00,0x01, +- 0xff,0x65,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x80,0x00,0x01, +- 0xff,0x69,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0x82,0x00,0x01,0xff,0x69, +- 0xcc,0x88,0x00,0xd3,0x3b,0xd2,0x1f,0xd1,0x0f,0x10,0x07,0x01,0xff,0xc3,0xb0,0x00, +- 0x01,0xff,0x6e,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x80,0x00,0x01,0xff, +- 0x6f,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x82,0x00,0x01,0xff, +- 0x6f,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x88,0x00,0x01,0x00,0xd2,0x1f, +- 0xd1,0x0f,0x10,0x07,0x01,0xff,0xc3,0xb8,0x00,0x01,0xff,0x75,0xcc,0x80,0x00,0x10, +- 0x08,0x01,0xff,0x75,0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x82,0x00,0xd1,0x10,0x10, +- 0x08,0x01,0xff,0x75,0xcc,0x88,0x00,0x01,0xff,0x79,0xcc,0x81,0x00,0x10,0x07,0x01, +- 0xff,0xc3,0xbe,0x00,0x01,0xff,0x73,0x73,0x00,0xe1,0xd4,0x03,0xe0,0xeb,0x01,0xcf, +- 0x86,0xd5,0xfb,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x61, +- 0xcc,0x84,0x00,0x01,0xff,0x61,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x61,0xcc,0x86, +- 0x00,0x01,0xff,0x61,0xcc,0x86,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc,0xa8, +- 0x00,0x01,0xff,0x61,0xcc,0xa8,0x00,0x10,0x08,0x01,0xff,0x63,0xcc,0x81,0x00,0x01, +- 0xff,0x63,0xcc,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x63,0xcc,0x82, +- 0x00,0x01,0xff,0x63,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x63,0xcc,0x87,0x00,0x01, +- 0xff,0x63,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x63,0xcc,0x8c,0x00,0x01, +- 0xff,0x63,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x64,0xcc,0x8c,0x00,0x01,0xff,0x64, +- 0xcc,0x8c,0x00,0xd3,0x3b,0xd2,0x1b,0xd1,0x0b,0x10,0x07,0x01,0xff,0xc4,0x91,0x00, +- 0x01,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x84,0x00,0x01,0xff,0x65,0xcc,0x84,0x00, +- 0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0x86,0x00,0x01,0xff,0x65,0xcc,0x86,0x00, +- 0x10,0x08,0x01,0xff,0x65,0xcc,0x87,0x00,0x01,0xff,0x65,0xcc,0x87,0x00,0xd2,0x20, +- 0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0xa8,0x00,0x01,0xff,0x65,0xcc,0xa8,0x00, +- 0x10,0x08,0x01,0xff,0x65,0xcc,0x8c,0x00,0x01,0xff,0x65,0xcc,0x8c,0x00,0xd1,0x10, +- 0x10,0x08,0x01,0xff,0x67,0xcc,0x82,0x00,0x01,0xff,0x67,0xcc,0x82,0x00,0x10,0x08, +- 0x01,0xff,0x67,0xcc,0x86,0x00,0x01,0xff,0x67,0xcc,0x86,0x00,0xd4,0x7b,0xd3,0x3b, +- 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x67,0xcc,0x87,0x00,0x01,0xff,0x67,0xcc, +- 0x87,0x00,0x10,0x08,0x01,0xff,0x67,0xcc,0xa7,0x00,0x01,0xff,0x67,0xcc,0xa7,0x00, +- 0xd1,0x10,0x10,0x08,0x01,0xff,0x68,0xcc,0x82,0x00,0x01,0xff,0x68,0xcc,0x82,0x00, +- 0x10,0x07,0x01,0xff,0xc4,0xa7,0x00,0x01,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, +- 0xff,0x69,0xcc,0x83,0x00,0x01,0xff,0x69,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x69, +- 0xcc,0x84,0x00,0x01,0xff,0x69,0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x69, +- 0xcc,0x86,0x00,0x01,0xff,0x69,0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0xa8, +- 0x00,0x01,0xff,0x69,0xcc,0xa8,0x00,0xd3,0x37,0xd2,0x17,0xd1,0x0c,0x10,0x08,0x01, +- 0xff,0x69,0xcc,0x87,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xc4,0xb3,0x00,0x01,0x00, +- 0xd1,0x10,0x10,0x08,0x01,0xff,0x6a,0xcc,0x82,0x00,0x01,0xff,0x6a,0xcc,0x82,0x00, +- 0x10,0x08,0x01,0xff,0x6b,0xcc,0xa7,0x00,0x01,0xff,0x6b,0xcc,0xa7,0x00,0xd2,0x1c, +- 0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x6c,0xcc,0x81,0x00,0x10,0x08,0x01,0xff, +- 0x6c,0xcc,0x81,0x00,0x01,0xff,0x6c,0xcc,0xa7,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x6c,0xcc,0xa7,0x00,0x01,0xff,0x6c,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x6c,0xcc, +- 0x8c,0x00,0x01,0xff,0xc5,0x80,0x00,0xcf,0x86,0xd5,0xed,0xd4,0x72,0xd3,0x37,0xd2, +- 0x17,0xd1,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xc5,0x82,0x00,0x10,0x04,0x01,0x00, +- 0x01,0xff,0x6e,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e,0xcc,0x81,0x00, +- 0x01,0xff,0x6e,0xcc,0xa7,0x00,0x10,0x08,0x01,0xff,0x6e,0xcc,0xa7,0x00,0x01,0xff, +- 0x6e,0xcc,0x8c,0x00,0xd2,0x1b,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e,0xcc,0x8c,0x00, +- 0x01,0xff,0xca,0xbc,0x6e,0x00,0x10,0x07,0x01,0xff,0xc5,0x8b,0x00,0x01,0x00,0xd1, +- 0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x84,0x00,0x01,0xff,0x6f,0xcc,0x84,0x00,0x10, +- 0x08,0x01,0xff,0x6f,0xcc,0x86,0x00,0x01,0xff,0x6f,0xcc,0x86,0x00,0xd3,0x3b,0xd2, +- 0x1b,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x8b,0x00,0x01,0xff,0x6f,0xcc,0x8b, +- 0x00,0x10,0x07,0x01,0xff,0xc5,0x93,0x00,0x01,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x72,0xcc,0x81,0x00,0x01,0xff,0x72,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x72,0xcc, +- 0xa7,0x00,0x01,0xff,0x72,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x72,0xcc,0x8c,0x00,0x01,0xff,0x72,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x73,0xcc, +- 0x81,0x00,0x01,0xff,0x73,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x73,0xcc, +- 0x82,0x00,0x01,0xff,0x73,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x73,0xcc,0xa7,0x00, +- 0x01,0xff,0x73,0xcc,0xa7,0x00,0xd4,0x7b,0xd3,0x3b,0xd2,0x20,0xd1,0x10,0x10,0x08, +- 0x01,0xff,0x73,0xcc,0x8c,0x00,0x01,0xff,0x73,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff, +- 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0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xaa,0x00,0x12,0xff,0xf0, +- 0x9e,0xa4,0xab,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xac,0x00,0x12,0xff,0xf0, +- 0x9e,0xa4,0xad,0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xae,0x00,0x12, +- 0xff,0xf0,0x9e,0xa4,0xaf,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xb0,0x00,0x12, +- 0xff,0xf0,0x9e,0xa4,0xb1,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff, +- 0xf0,0x9e,0xa4,0xb2,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb3,0x00,0x10,0x09,0x12,0xff, +- 0xf0,0x9e,0xa4,0xb4,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb5,0x00,0xd1,0x12,0x10,0x09, +- 0x12,0xff,0xf0,0x9e,0xa4,0xb6,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb7,0x00,0x10,0x09, +- 0x12,0xff,0xf0,0x9e,0xa4,0xb8,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb9,0x00,0xd2,0x24, +- 0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xba,0x00,0x12,0xff,0xf0,0x9e,0xa4, +- 0xbb,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xbc,0x00,0x12,0xff,0xf0,0x9e,0xa4, +- 0xbd,0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xbe,0x00,0x12,0xff,0xf0, +- 0x9e,0xa4,0xbf,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa5,0x80,0x00,0x12,0xff,0xf0, +- 0x9e,0xa5,0x81,0x00,0x94,0x1e,0x93,0x1a,0x92,0x16,0x91,0x12,0x10,0x09,0x12,0xff, +- 0xf0,0x9e,0xa5,0x82,0x00,0x12,0xff,0xf0,0x9e,0xa5,0x83,0x00,0x12,0x00,0x12,0x00, +- 0x12,0x00,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +- /* nfdi_c0100 */ +- 0x57,0x04,0x01,0x00,0xc6,0xe5,0x91,0x13,0xe4,0x27,0x0c,0xe3,0x61,0x07,0xe2,0xda, +- 0x01,0xc1,0xd0,0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0xe4,0xd4,0x7c,0xd3,0x3c, +- 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0x80,0x00,0x01,0xff,0x41,0xcc, +- 0x81,0x00,0x10,0x08,0x01,0xff,0x41,0xcc,0x82,0x00,0x01,0xff,0x41,0xcc,0x83,0x00, +- 0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0x88,0x00,0x01,0xff,0x41,0xcc,0x8a,0x00, +- 0x10,0x04,0x01,0x00,0x01,0xff,0x43,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, +- 0x01,0xff,0x45,0xcc,0x80,0x00,0x01,0xff,0x45,0xcc,0x81,0x00,0x10,0x08,0x01,0xff, +- 0x45,0xcc,0x82,0x00,0x01,0xff,0x45,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x49,0xcc,0x80,0x00,0x01,0xff,0x49,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x49,0xcc, +- 0x82,0x00,0x01,0xff,0x49,0xcc,0x88,0x00,0xd3,0x38,0xd2,0x1c,0xd1,0x0c,0x10,0x04, +- 0x01,0x00,0x01,0xff,0x4e,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0x80,0x00, +- 0x01,0xff,0x4f,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0x82,0x00, +- 0x01,0xff,0x4f,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0x88,0x00,0x01,0x00, +- 0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x55,0xcc,0x80,0x00,0x10,0x08, +- 0x01,0xff,0x55,0xcc,0x81,0x00,0x01,0xff,0x55,0xcc,0x82,0x00,0x91,0x10,0x10,0x08, +- 0x01,0xff,0x55,0xcc,0x88,0x00,0x01,0xff,0x59,0xcc,0x81,0x00,0x01,0x00,0xd4,0x7c, +- 0xd3,0x3c,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc,0x80,0x00,0x01,0xff, +- 0x61,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x61,0xcc,0x82,0x00,0x01,0xff,0x61,0xcc, +- 0x83,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc,0x88,0x00,0x01,0xff,0x61,0xcc, +- 0x8a,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0x63,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10, +- 0x10,0x08,0x01,0xff,0x65,0xcc,0x80,0x00,0x01,0xff,0x65,0xcc,0x81,0x00,0x10,0x08, +- 0x01,0xff,0x65,0xcc,0x82,0x00,0x01,0xff,0x65,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08, +- 0x01,0xff,0x69,0xcc,0x80,0x00,0x01,0xff,0x69,0xcc,0x81,0x00,0x10,0x08,0x01,0xff, +- 0x69,0xcc,0x82,0x00,0x01,0xff,0x69,0xcc,0x88,0x00,0xd3,0x38,0xd2,0x1c,0xd1,0x0c, +- 0x10,0x04,0x01,0x00,0x01,0xff,0x6e,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc, +- 0x80,0x00,0x01,0xff,0x6f,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc, +- 0x82,0x00,0x01,0xff,0x6f,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x88,0x00, +- 0x01,0x00,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x75,0xcc,0x80,0x00, +- 0x10,0x08,0x01,0xff,0x75,0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x82,0x00,0xd1,0x10, +- 0x10,0x08,0x01,0xff,0x75,0xcc,0x88,0x00,0x01,0xff,0x79,0xcc,0x81,0x00,0x10,0x04, +- 0x01,0x00,0x01,0xff,0x79,0xcc,0x88,0x00,0xe1,0x9a,0x03,0xe0,0xd3,0x01,0xcf,0x86, +- 0xd5,0xf4,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc, +- 0x84,0x00,0x01,0xff,0x61,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x41,0xcc,0x86,0x00, +- 0x01,0xff,0x61,0xcc,0x86,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0xa8,0x00, +- 0x01,0xff,0x61,0xcc,0xa8,0x00,0x10,0x08,0x01,0xff,0x43,0xcc,0x81,0x00,0x01,0xff, +- 0x63,0xcc,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x43,0xcc,0x82,0x00, +- 0x01,0xff,0x63,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x43,0xcc,0x87,0x00,0x01,0xff, +- 0x63,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x43,0xcc,0x8c,0x00,0x01,0xff, +- 0x63,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x44,0xcc,0x8c,0x00,0x01,0xff,0x64,0xcc, +- 0x8c,0x00,0xd3,0x34,0xd2,0x14,0x51,0x04,0x01,0x00,0x10,0x08,0x01,0xff,0x45,0xcc, +- 0x84,0x00,0x01,0xff,0x65,0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc, +- 0x86,0x00,0x01,0xff,0x65,0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x87,0x00, +- 0x01,0xff,0x65,0xcc,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc, +- 0xa8,0x00,0x01,0xff,0x65,0xcc,0xa8,0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x8c,0x00, +- 0x01,0xff,0x65,0xcc,0x8c,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x47,0xcc,0x82,0x00, +- 0x01,0xff,0x67,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x47,0xcc,0x86,0x00,0x01,0xff, +- 0x67,0xcc,0x86,0x00,0xd4,0x74,0xd3,0x34,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x47,0xcc,0x87,0x00,0x01,0xff,0x67,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x47,0xcc, +- 0xa7,0x00,0x01,0xff,0x67,0xcc,0xa7,0x00,0x91,0x10,0x10,0x08,0x01,0xff,0x48,0xcc, +- 0x82,0x00,0x01,0xff,0x68,0xcc,0x82,0x00,0x01,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, +- 0x01,0xff,0x49,0xcc,0x83,0x00,0x01,0xff,0x69,0xcc,0x83,0x00,0x10,0x08,0x01,0xff, +- 0x49,0xcc,0x84,0x00,0x01,0xff,0x69,0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x49,0xcc,0x86,0x00,0x01,0xff,0x69,0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x49,0xcc, +- 0xa8,0x00,0x01,0xff,0x69,0xcc,0xa8,0x00,0xd3,0x30,0xd2,0x10,0x91,0x0c,0x10,0x08, +- 0x01,0xff,0x49,0xcc,0x87,0x00,0x01,0x00,0x01,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x4a,0xcc,0x82,0x00,0x01,0xff,0x6a,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x4b,0xcc, +- 0xa7,0x00,0x01,0xff,0x6b,0xcc,0xa7,0x00,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00, +- 0x01,0xff,0x4c,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x6c,0xcc,0x81,0x00,0x01,0xff, +- 0x4c,0xcc,0xa7,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6c,0xcc,0xa7,0x00,0x01,0xff, +- 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0xff,0x46,0xcc,0x87,0x00,0x01,0xff,0x66,0xcc,0x87,0x00,0xd4,0x84,0xd3,0x40,0xd2, +- 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x47,0xcc,0x84,0x00,0x01,0xff,0x67,0xcc,0x84, +- 0x00,0x10,0x08,0x01,0xff,0x48,0xcc,0x87,0x00,0x01,0xff,0x68,0xcc,0x87,0x00,0xd1, +- 0x10,0x10,0x08,0x01,0xff,0x48,0xcc,0xa3,0x00,0x01,0xff,0x68,0xcc,0xa3,0x00,0x10, +- 0x08,0x01,0xff,0x48,0xcc,0x88,0x00,0x01,0xff,0x68,0xcc,0x88,0x00,0xd2,0x20,0xd1, +- 0x10,0x10,0x08,0x01,0xff,0x48,0xcc,0xa7,0x00,0x01,0xff,0x68,0xcc,0xa7,0x00,0x10, +- 0x08,0x01,0xff,0x48,0xcc,0xae,0x00,0x01,0xff,0x68,0xcc,0xae,0x00,0xd1,0x10,0x10, +- 0x08,0x01,0xff,0x49,0xcc,0xb0,0x00,0x01,0xff,0x69,0xcc,0xb0,0x00,0x10,0x0a,0x01, +- 0xff,0x49,0xcc,0x88,0xcc,0x81,0x00,0x01,0xff,0x69,0xcc,0x88,0xcc,0x81,0x00,0xd3, +- 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x4b,0xcc,0x81,0x00,0x01,0xff,0x6b, +- 0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x4b,0xcc,0xa3,0x00,0x01,0xff,0x6b,0xcc,0xa3, +- 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4b,0xcc,0xb1,0x00,0x01,0xff,0x6b,0xcc,0xb1, +- 0x00,0x10,0x08,0x01,0xff,0x4c,0xcc,0xa3,0x00,0x01,0xff,0x6c,0xcc,0xa3,0x00,0xd2, +- 0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4c,0xcc,0xa3,0xcc,0x84,0x00,0x01,0xff,0x6c, +- 0xcc,0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x4c,0xcc,0xb1,0x00,0x01,0xff,0x6c, +- 0xcc,0xb1,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4c,0xcc,0xad,0x00,0x01,0xff,0x6c, +- 0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x4d,0xcc,0x81,0x00,0x01,0xff,0x6d,0xcc,0x81, +- 0x00,0xcf,0x86,0xe5,0x15,0x01,0xd4,0x88,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, +- 0x01,0xff,0x4d,0xcc,0x87,0x00,0x01,0xff,0x6d,0xcc,0x87,0x00,0x10,0x08,0x01,0xff, +- 0x4d,0xcc,0xa3,0x00,0x01,0xff,0x6d,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x4e,0xcc,0x87,0x00,0x01,0xff,0x6e,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x4e,0xcc, +- 0xa3,0x00,0x01,0xff,0x6e,0xcc,0xa3,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x4e,0xcc,0xb1,0x00,0x01,0xff,0x6e,0xcc,0xb1,0x00,0x10,0x08,0x01,0xff,0x4e,0xcc, +- 0xad,0x00,0x01,0xff,0x6e,0xcc,0xad,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc, +- 0x83,0xcc,0x81,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff, +- 0x4f,0xcc,0x83,0xcc,0x88,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x88,0x00,0xd3,0x48, +- 0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x84,0xcc,0x80,0x00,0x01,0xff, +- 0x6f,0xcc,0x84,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x84,0xcc,0x81,0x00, +- 0x01,0xff,0x6f,0xcc,0x84,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x50,0xcc, +- 0x81,0x00,0x01,0xff,0x70,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x50,0xcc,0x87,0x00, +- 0x01,0xff,0x70,0xcc,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x52,0xcc, +- 0x87,0x00,0x01,0xff,0x72,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x52,0xcc,0xa3,0x00, +- 0x01,0xff,0x72,0xcc,0xa3,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x52,0xcc,0xa3,0xcc, +- 0x84,0x00,0x01,0xff,0x72,0xcc,0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x52,0xcc, +- 0xb1,0x00,0x01,0xff,0x72,0xcc,0xb1,0x00,0xd4,0x8c,0xd3,0x48,0xd2,0x20,0xd1,0x10, +- 0x10,0x08,0x01,0xff,0x53,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x87,0x00,0x10,0x08, +- 0x01,0xff,0x53,0xcc,0xa3,0x00,0x01,0xff,0x73,0xcc,0xa3,0x00,0xd1,0x14,0x10,0x0a, +- 0x01,0xff,0x53,0xcc,0x81,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x81,0xcc,0x87,0x00, +- 0x10,0x0a,0x01,0xff,0x53,0xcc,0x8c,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x8c,0xcc, +- 0x87,0x00,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x53,0xcc,0xa3,0xcc,0x87,0x00, +- 0x01,0xff,0x73,0xcc,0xa3,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x54,0xcc,0x87,0x00, +- 0x01,0xff,0x74,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x54,0xcc,0xa3,0x00, +- 0x01,0xff,0x74,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x54,0xcc,0xb1,0x00,0x01,0xff, +- 0x74,0xcc,0xb1,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x54,0xcc, +- 0xad,0x00,0x01,0xff,0x74,0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0xa4,0x00, +- 0x01,0xff,0x75,0xcc,0xa4,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0xb0,0x00, +- 0x01,0xff,0x75,0xcc,0xb0,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0xad,0x00,0x01,0xff, +- 0x75,0xcc,0xad,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x55,0xcc,0x83,0xcc, +- 0x81,0x00,0x01,0xff,0x75,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x55,0xcc, +- 0x84,0xcc,0x88,0x00,0x01,0xff,0x75,0xcc,0x84,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08, +- 0x01,0xff,0x56,0xcc,0x83,0x00,0x01,0xff,0x76,0xcc,0x83,0x00,0x10,0x08,0x01,0xff, +- 0x56,0xcc,0xa3,0x00,0x01,0xff,0x76,0xcc,0xa3,0x00,0xe0,0x10,0x02,0xcf,0x86,0xd5, +- 0xe1,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc,0x80, +- 0x00,0x01,0xff,0x77,0xcc,0x80,0x00,0x10,0x08,0x01,0xff,0x57,0xcc,0x81,0x00,0x01, +- 0xff,0x77,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc,0x88,0x00,0x01, +- 0xff,0x77,0xcc,0x88,0x00,0x10,0x08,0x01,0xff,0x57,0xcc,0x87,0x00,0x01,0xff,0x77, +- 0xcc,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc,0xa3,0x00,0x01, +- 0xff,0x77,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x58,0xcc,0x87,0x00,0x01,0xff,0x78, +- 0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x58,0xcc,0x88,0x00,0x01,0xff,0x78, +- 0xcc,0x88,0x00,0x10,0x08,0x01,0xff,0x59,0xcc,0x87,0x00,0x01,0xff,0x79,0xcc,0x87, +- 0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x5a,0xcc,0x82,0x00,0x01, +- 0xff,0x7a,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x5a,0xcc,0xa3,0x00,0x01,0xff,0x7a, +- 0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x5a,0xcc,0xb1,0x00,0x01,0xff,0x7a, +- 0xcc,0xb1,0x00,0x10,0x08,0x01,0xff,0x68,0xcc,0xb1,0x00,0x01,0xff,0x74,0xcc,0x88, +- 0x00,0x92,0x1d,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x8a,0x00,0x01,0xff,0x79, +- 0xcc,0x8a,0x00,0x10,0x04,0x01,0x00,0x02,0xff,0xc5,0xbf,0xcc,0x87,0x00,0x0a,0x00, +- 0xd4,0x98,0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0xa3,0x00, +- 0x01,0xff,0x61,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x41,0xcc,0x89,0x00,0x01,0xff, +- 0x61,0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0x82,0xcc,0x81,0x00, +- 0x01,0xff,0x61,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x82,0xcc, ++ 0xc6,0xe5,0xf9,0x14,0xe4,0x6f,0x0d,0xe3,0x39,0x08,0xe2,0x22,0x01,0xc1,0xd0,0x24, ++ 0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x07,0x63,0xd8,0x43,0x01,0x00,0x93,0x13,0x52, ++ 0x04,0x01,0x00,0x91,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xce,0xbc,0x00,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xe5,0xb3,0x44,0xd4,0x7f,0xd3,0x3f,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x61,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x81,0x00,0x10,0x08,0x01, ++ 0xff,0x61,0xcc,0x82,0x00,0x01,0xff,0x61,0xcc,0x83,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x61,0xcc,0x88,0x00,0x01,0xff,0x61,0xcc,0x8a,0x00,0x10,0x07,0x01,0xff,0xc3, ++ 0xa6,0x00,0x01,0xff,0x63,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x65,0xcc,0x80,0x00,0x01,0xff,0x65,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x65,0xcc, ++ 0x82,0x00,0x01,0xff,0x65,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc, ++ 0x80,0x00,0x01,0xff,0x69,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0x82,0x00, ++ 0x01,0xff,0x69,0xcc,0x88,0x00,0xd3,0x3b,0xd2,0x1f,0xd1,0x0f,0x10,0x07,0x01,0xff, ++ 0xc3,0xb0,0x00,0x01,0xff,0x6e,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x80, ++ 0x00,0x01,0xff,0x6f,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x82, ++ 0x00,0x01,0xff,0x6f,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x88,0x00,0x01, ++ 0x00,0xd2,0x1f,0xd1,0x0f,0x10,0x07,0x01,0xff,0xc3,0xb8,0x00,0x01,0xff,0x75,0xcc, ++ 0x80,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x82,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0x88,0x00,0x01,0xff,0x79,0xcc,0x81,0x00, ++ 0x10,0x07,0x01,0xff,0xc3,0xbe,0x00,0x01,0xff,0x73,0x73,0x00,0xe1,0xd4,0x03,0xe0, ++ 0xeb,0x01,0xcf,0x86,0xd5,0xfb,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x61,0xcc,0x84,0x00,0x01,0xff,0x61,0xcc,0x84,0x00,0x10,0x08,0x01,0xff, ++ 0x61,0xcc,0x86,0x00,0x01,0xff,0x61,0xcc,0x86,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x61,0xcc,0xa8,0x00,0x01,0xff,0x61,0xcc,0xa8,0x00,0x10,0x08,0x01,0xff,0x63,0xcc, ++ 0x81,0x00,0x01,0xff,0x63,0xcc,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x63,0xcc,0x82,0x00,0x01,0xff,0x63,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x63,0xcc, ++ 0x87,0x00,0x01,0xff,0x63,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x63,0xcc, ++ 0x8c,0x00,0x01,0xff,0x63,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x64,0xcc,0x8c,0x00, ++ 0x01,0xff,0x64,0xcc,0x8c,0x00,0xd3,0x3b,0xd2,0x1b,0xd1,0x0b,0x10,0x07,0x01,0xff, ++ 0xc4,0x91,0x00,0x01,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x84,0x00,0x01,0xff,0x65, ++ 0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0x86,0x00,0x01,0xff,0x65, ++ 0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x87,0x00,0x01,0xff,0x65,0xcc,0x87, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0xa8,0x00,0x01,0xff,0x65, ++ 0xcc,0xa8,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x8c,0x00,0x01,0xff,0x65,0xcc,0x8c, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x67,0xcc,0x82,0x00,0x01,0xff,0x67,0xcc,0x82, ++ 0x00,0x10,0x08,0x01,0xff,0x67,0xcc,0x86,0x00,0x01,0xff,0x67,0xcc,0x86,0x00,0xd4, ++ 0x7b,0xd3,0x3b,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x67,0xcc,0x87,0x00,0x01, ++ 0xff,0x67,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x67,0xcc,0xa7,0x00,0x01,0xff,0x67, ++ 0xcc,0xa7,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x68,0xcc,0x82,0x00,0x01,0xff,0x68, ++ 0xcc,0x82,0x00,0x10,0x07,0x01,0xff,0xc4,0xa7,0x00,0x01,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x69,0xcc,0x83,0x00,0x01,0xff,0x69,0xcc,0x83,0x00,0x10,0x08, ++ 0x01,0xff,0x69,0xcc,0x84,0x00,0x01,0xff,0x69,0xcc,0x84,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x69,0xcc,0x86,0x00,0x01,0xff,0x69,0xcc,0x86,0x00,0x10,0x08,0x01,0xff, ++ 0x69,0xcc,0xa8,0x00,0x01,0xff,0x69,0xcc,0xa8,0x00,0xd3,0x37,0xd2,0x17,0xd1,0x0c, ++ 0x10,0x08,0x01,0xff,0x69,0xcc,0x87,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xc4,0xb3, ++ 0x00,0x01,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6a,0xcc,0x82,0x00,0x01,0xff,0x6a, ++ 0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x6b,0xcc,0xa7,0x00,0x01,0xff,0x6b,0xcc,0xa7, ++ 0x00,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x6c,0xcc,0x81,0x00,0x10, ++ 0x08,0x01,0xff,0x6c,0xcc,0x81,0x00,0x01,0xff,0x6c,0xcc,0xa7,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x6c,0xcc,0xa7,0x00,0x01,0xff,0x6c,0xcc,0x8c,0x00,0x10,0x08,0x01, ++ 0xff,0x6c,0xcc,0x8c,0x00,0x01,0xff,0xc5,0x80,0x00,0xcf,0x86,0xd5,0xed,0xd4,0x72, ++ 0xd3,0x37,0xd2,0x17,0xd1,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xc5,0x82,0x00,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0x6e,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e, ++ 0xcc,0x81,0x00,0x01,0xff,0x6e,0xcc,0xa7,0x00,0x10,0x08,0x01,0xff,0x6e,0xcc,0xa7, ++ 0x00,0x01,0xff,0x6e,0xcc,0x8c,0x00,0xd2,0x1b,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e, ++ 0xcc,0x8c,0x00,0x01,0xff,0xca,0xbc,0x6e,0x00,0x10,0x07,0x01,0xff,0xc5,0x8b,0x00, ++ 0x01,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x84,0x00,0x01,0xff,0x6f,0xcc, ++ 0x84,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x86,0x00,0x01,0xff,0x6f,0xcc,0x86,0x00, ++ 0xd3,0x3b,0xd2,0x1b,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x8b,0x00,0x01,0xff, ++ 0x6f,0xcc,0x8b,0x00,0x10,0x07,0x01,0xff,0xc5,0x93,0x00,0x01,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x72,0xcc,0x81,0x00,0x01,0xff,0x72,0xcc,0x81,0x00,0x10,0x08,0x01, ++ 0xff,0x72,0xcc,0xa7,0x00,0x01,0xff,0x72,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x72,0xcc,0x8c,0x00,0x01,0xff,0x72,0xcc,0x8c,0x00,0x10,0x08,0x01, ++ 0xff,0x73,0xcc,0x81,0x00,0x01,0xff,0x73,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x73,0xcc,0x82,0x00,0x01,0xff,0x73,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x73, ++ 0xcc,0xa7,0x00,0x01,0xff,0x73,0xcc,0xa7,0x00,0xd4,0x7b,0xd3,0x3b,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x73,0xcc,0x8c,0x00,0x01,0xff,0x73,0xcc,0x8c,0x00,0x10, ++ 0x08,0x01,0xff,0x74,0xcc,0xa7,0x00,0x01,0xff,0x74,0xcc,0xa7,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x74,0xcc,0x8c,0x00,0x01,0xff,0x74,0xcc,0x8c,0x00,0x10,0x07,0x01, ++ 0xff,0xc5,0xa7,0x00,0x01,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc, ++ 0x83,0x00,0x01,0xff,0x75,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x84,0x00, ++ 0x01,0xff,0x75,0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0x86,0x00, ++ 0x01,0xff,0x75,0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x8a,0x00,0x01,0xff, ++ 0x75,0xcc,0x8a,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc, ++ 0x8b,0x00,0x01,0xff,0x75,0xcc,0x8b,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0xa8,0x00, ++ 0x01,0xff,0x75,0xcc,0xa8,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x82,0x00, ++ 0x01,0xff,0x77,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x79,0xcc,0x82,0x00,0x01,0xff, ++ 0x79,0xcc,0x82,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x79,0xcc,0x88,0x00, ++ 0x01,0xff,0x7a,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0x81,0x00,0x01,0xff, ++ 0x7a,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x7a,0xcc,0x87,0x00,0x01,0xff, ++ 0x7a,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0x8c,0x00,0x01,0xff,0x73,0x00, ++ 0xe0,0x65,0x01,0xcf,0x86,0xd5,0xb4,0xd4,0x5a,0xd3,0x2f,0xd2,0x16,0xd1,0x0b,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0xc9,0x93,0x00,0x10,0x07,0x01,0xff,0xc6,0x83,0x00,0x01, ++ 0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xc6,0x85,0x00,0x01,0x00,0x10,0x07,0x01,0xff, ++ 0xc9,0x94,0x00,0x01,0xff,0xc6,0x88,0x00,0xd2,0x19,0xd1,0x0b,0x10,0x04,0x01,0x00, ++ 0x01,0xff,0xc9,0x96,0x00,0x10,0x07,0x01,0xff,0xc9,0x97,0x00,0x01,0xff,0xc6,0x8c, ++ 0x00,0x51,0x04,0x01,0x00,0x10,0x07,0x01,0xff,0xc7,0x9d,0x00,0x01,0xff,0xc9,0x99, ++ 0x00,0xd3,0x32,0xd2,0x19,0xd1,0x0e,0x10,0x07,0x01,0xff,0xc9,0x9b,0x00,0x01,0xff, ++ 0xc6,0x92,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xc9,0xa0,0x00,0xd1,0x0b,0x10,0x07, ++ 0x01,0xff,0xc9,0xa3,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xc9,0xa9,0x00,0x01,0xff, ++ 0xc9,0xa8,0x00,0xd2,0x0f,0x91,0x0b,0x10,0x07,0x01,0xff,0xc6,0x99,0x00,0x01,0x00, ++ 0x01,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xc9,0xaf,0x00,0x01,0xff,0xc9,0xb2,0x00, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xc9,0xb5,0x00,0xd4,0x5d,0xd3,0x34,0xd2,0x1b,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x9b,0x00,0x01,0xff,0x6f,0xcc,0x9b,0x00,0x10, ++ 0x07,0x01,0xff,0xc6,0xa3,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xc6,0xa5, ++ 0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xca,0x80,0x00,0x01,0xff,0xc6,0xa8,0x00,0xd2, ++ 0x0f,0x91,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xca,0x83,0x00,0x01,0x00,0xd1,0x0b, ++ 0x10,0x07,0x01,0xff,0xc6,0xad,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xca,0x88,0x00, ++ 0x01,0xff,0x75,0xcc,0x9b,0x00,0xd3,0x33,0xd2,0x1d,0xd1,0x0f,0x10,0x08,0x01,0xff, ++ 0x75,0xcc,0x9b,0x00,0x01,0xff,0xca,0x8a,0x00,0x10,0x07,0x01,0xff,0xca,0x8b,0x00, ++ 0x01,0xff,0xc6,0xb4,0x00,0xd1,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xc6,0xb6,0x00, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xca,0x92,0x00,0xd2,0x0f,0x91,0x0b,0x10,0x07,0x01, ++ 0xff,0xc6,0xb9,0x00,0x01,0x00,0x01,0x00,0x91,0x0b,0x10,0x07,0x01,0xff,0xc6,0xbd, ++ 0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0xd4,0xd4,0x44,0xd3,0x16,0x52,0x04,0x01, ++ 0x00,0x51,0x07,0x01,0xff,0xc7,0x86,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xc7,0x89, ++ 0x00,0xd2,0x12,0x91,0x0b,0x10,0x07,0x01,0xff,0xc7,0x89,0x00,0x01,0x00,0x01,0xff, ++ 0xc7,0x8c,0x00,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x61,0xcc,0x8c,0x00,0x10, ++ 0x08,0x01,0xff,0x61,0xcc,0x8c,0x00,0x01,0xff,0x69,0xcc,0x8c,0x00,0xd3,0x46,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x8c,0x00,0x01,0xff,0x6f,0xcc,0x8c, ++ 0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x8c,0x00,0x01,0xff,0x75,0xcc,0x8c,0x00,0xd1, ++ 0x12,0x10,0x08,0x01,0xff,0x75,0xcc,0x8c,0x00,0x01,0xff,0x75,0xcc,0x88,0xcc,0x84, ++ 0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88,0xcc,0x84,0x00,0x01,0xff,0x75,0xcc,0x88, ++ 0xcc,0x81,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88,0xcc,0x81, ++ 0x00,0x01,0xff,0x75,0xcc,0x88,0xcc,0x8c,0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88, ++ 0xcc,0x8c,0x00,0x01,0xff,0x75,0xcc,0x88,0xcc,0x80,0x00,0xd1,0x0e,0x10,0x0a,0x01, ++ 0xff,0x75,0xcc,0x88,0xcc,0x80,0x00,0x01,0x00,0x10,0x0a,0x01,0xff,0x61,0xcc,0x88, ++ 0xcc,0x84,0x00,0x01,0xff,0x61,0xcc,0x88,0xcc,0x84,0x00,0xd4,0x87,0xd3,0x41,0xd2, ++ 0x26,0xd1,0x14,0x10,0x0a,0x01,0xff,0x61,0xcc,0x87,0xcc,0x84,0x00,0x01,0xff,0x61, ++ 0xcc,0x87,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xc3,0xa6,0xcc,0x84,0x00,0x01,0xff, ++ 0xc3,0xa6,0xcc,0x84,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xc7,0xa5,0x00,0x01,0x00, ++ 0x10,0x08,0x01,0xff,0x67,0xcc,0x8c,0x00,0x01,0xff,0x67,0xcc,0x8c,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x6b,0xcc,0x8c,0x00,0x01,0xff,0x6b,0xcc,0x8c,0x00, ++ 0x10,0x08,0x01,0xff,0x6f,0xcc,0xa8,0x00,0x01,0xff,0x6f,0xcc,0xa8,0x00,0xd1,0x14, ++ 0x10,0x0a,0x01,0xff,0x6f,0xcc,0xa8,0xcc,0x84,0x00,0x01,0xff,0x6f,0xcc,0xa8,0xcc, ++ 0x84,0x00,0x10,0x09,0x01,0xff,0xca,0x92,0xcc,0x8c,0x00,0x01,0xff,0xca,0x92,0xcc, ++ 0x8c,0x00,0xd3,0x38,0xd2,0x1a,0xd1,0x0f,0x10,0x08,0x01,0xff,0x6a,0xcc,0x8c,0x00, ++ 0x01,0xff,0xc7,0xb3,0x00,0x10,0x07,0x01,0xff,0xc7,0xb3,0x00,0x01,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x67,0xcc,0x81,0x00,0x01,0xff,0x67,0xcc,0x81,0x00,0x10,0x07, ++ 0x04,0xff,0xc6,0x95,0x00,0x04,0xff,0xc6,0xbf,0x00,0xd2,0x24,0xd1,0x10,0x10,0x08, ++ 0x04,0xff,0x6e,0xcc,0x80,0x00,0x04,0xff,0x6e,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff, ++ 0x61,0xcc,0x8a,0xcc,0x81,0x00,0x01,0xff,0x61,0xcc,0x8a,0xcc,0x81,0x00,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xc3,0xa6,0xcc,0x81,0x00,0x01,0xff,0xc3,0xa6,0xcc,0x81,0x00, ++ 0x10,0x09,0x01,0xff,0xc3,0xb8,0xcc,0x81,0x00,0x01,0xff,0xc3,0xb8,0xcc,0x81,0x00, ++ 0xe2,0x31,0x02,0xe1,0xc3,0x44,0xe0,0xc8,0x01,0xcf,0x86,0xd5,0xfb,0xd4,0x80,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc,0x8f,0x00,0x01,0xff,0x61, ++ 0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x61,0xcc,0x91,0x00,0x01,0xff,0x61,0xcc,0x91, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0x8f,0x00,0x01,0xff,0x65,0xcc,0x8f, ++ 0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x91,0x00,0x01,0xff,0x65,0xcc,0x91,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x8f,0x00,0x01,0xff,0x69,0xcc,0x8f, ++ 0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0x91,0x00,0x01,0xff,0x69,0xcc,0x91,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x8f,0x00,0x01,0xff,0x6f,0xcc,0x8f,0x00,0x10, ++ 0x08,0x01,0xff,0x6f,0xcc,0x91,0x00,0x01,0xff,0x6f,0xcc,0x91,0x00,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x72,0xcc,0x8f,0x00,0x01,0xff,0x72,0xcc,0x8f, ++ 0x00,0x10,0x08,0x01,0xff,0x72,0xcc,0x91,0x00,0x01,0xff,0x72,0xcc,0x91,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0x8f,0x00,0x01,0xff,0x75,0xcc,0x8f,0x00,0x10, ++ 0x08,0x01,0xff,0x75,0xcc,0x91,0x00,0x01,0xff,0x75,0xcc,0x91,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x04,0xff,0x73,0xcc,0xa6,0x00,0x04,0xff,0x73,0xcc,0xa6,0x00,0x10, ++ 0x08,0x04,0xff,0x74,0xcc,0xa6,0x00,0x04,0xff,0x74,0xcc,0xa6,0x00,0xd1,0x0b,0x10, ++ 0x07,0x04,0xff,0xc8,0x9d,0x00,0x04,0x00,0x10,0x08,0x04,0xff,0x68,0xcc,0x8c,0x00, ++ 0x04,0xff,0x68,0xcc,0x8c,0x00,0xd4,0x79,0xd3,0x31,0xd2,0x16,0xd1,0x0b,0x10,0x07, ++ 0x06,0xff,0xc6,0x9e,0x00,0x07,0x00,0x10,0x07,0x04,0xff,0xc8,0xa3,0x00,0x04,0x00, ++ 0xd1,0x0b,0x10,0x07,0x04,0xff,0xc8,0xa5,0x00,0x04,0x00,0x10,0x08,0x04,0xff,0x61, ++ 0xcc,0x87,0x00,0x04,0xff,0x61,0xcc,0x87,0x00,0xd2,0x24,0xd1,0x10,0x10,0x08,0x04, ++ 0xff,0x65,0xcc,0xa7,0x00,0x04,0xff,0x65,0xcc,0xa7,0x00,0x10,0x0a,0x04,0xff,0x6f, ++ 0xcc,0x88,0xcc,0x84,0x00,0x04,0xff,0x6f,0xcc,0x88,0xcc,0x84,0x00,0xd1,0x14,0x10, ++ 0x0a,0x04,0xff,0x6f,0xcc,0x83,0xcc,0x84,0x00,0x04,0xff,0x6f,0xcc,0x83,0xcc,0x84, ++ 0x00,0x10,0x08,0x04,0xff,0x6f,0xcc,0x87,0x00,0x04,0xff,0x6f,0xcc,0x87,0x00,0xd3, ++ 0x27,0xe2,0x21,0x43,0xd1,0x14,0x10,0x0a,0x04,0xff,0x6f,0xcc,0x87,0xcc,0x84,0x00, ++ 0x04,0xff,0x6f,0xcc,0x87,0xcc,0x84,0x00,0x10,0x08,0x04,0xff,0x79,0xcc,0x84,0x00, ++ 0x04,0xff,0x79,0xcc,0x84,0x00,0xd2,0x13,0x51,0x04,0x08,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0xa5,0x00,0x08,0xff,0xc8,0xbc,0x00,0xd1,0x0b,0x10,0x04,0x08,0x00,0x08, ++ 0xff,0xc6,0x9a,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1,0xa6,0x00,0x08,0x00,0xcf,0x86, ++ 0x95,0x5f,0x94,0x5b,0xd3,0x2f,0xd2,0x16,0xd1,0x0b,0x10,0x04,0x08,0x00,0x08,0xff, ++ 0xc9,0x82,0x00,0x10,0x04,0x09,0x00,0x09,0xff,0xc6,0x80,0x00,0xd1,0x0e,0x10,0x07, ++ 0x09,0xff,0xca,0x89,0x00,0x09,0xff,0xca,0x8c,0x00,0x10,0x07,0x09,0xff,0xc9,0x87, ++ 0x00,0x09,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x09,0xff,0xc9,0x89,0x00,0x09,0x00, ++ 0x10,0x07,0x09,0xff,0xc9,0x8b,0x00,0x09,0x00,0xd1,0x0b,0x10,0x07,0x09,0xff,0xc9, ++ 0x8d,0x00,0x09,0x00,0x10,0x07,0x09,0xff,0xc9,0x8f,0x00,0x09,0x00,0x01,0x00,0x01, ++ 0x00,0xd1,0x8b,0xd0,0x0c,0xcf,0x86,0xe5,0x10,0x43,0x64,0xef,0x42,0x01,0xe6,0xcf, ++ 0x86,0xd5,0x2a,0xe4,0x99,0x43,0xe3,0x7f,0x43,0xd2,0x11,0xe1,0x5e,0x43,0x10,0x07, ++ 0x01,0xff,0xcc,0x80,0x00,0x01,0xff,0xcc,0x81,0x00,0xe1,0x65,0x43,0x10,0x09,0x01, ++ 0xff,0xcc,0x88,0xcc,0x81,0x00,0x01,0xff,0xce,0xb9,0x00,0xd4,0x0f,0x93,0x0b,0x92, ++ 0x07,0x61,0xab,0x43,0x01,0xea,0x06,0xe6,0x06,0xe6,0xd3,0x2c,0xd2,0x16,0xd1,0x0b, ++ 0x10,0x07,0x0a,0xff,0xcd,0xb1,0x00,0x0a,0x00,0x10,0x07,0x0a,0xff,0xcd,0xb3,0x00, ++ 0x0a,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xca,0xb9,0x00,0x01,0x00,0x10,0x07,0x0a, ++ 0xff,0xcd,0xb7,0x00,0x0a,0x00,0xd2,0x07,0x61,0x97,0x43,0x00,0x00,0x51,0x04,0x09, ++ 0x00,0x10,0x06,0x01,0xff,0x3b,0x00,0x10,0xff,0xcf,0xb3,0x00,0xe0,0x31,0x01,0xcf, ++ 0x86,0xd5,0xd3,0xd4,0x5f,0xd3,0x21,0x52,0x04,0x00,0x00,0xd1,0x0d,0x10,0x04,0x01, ++ 0x00,0x01,0xff,0xc2,0xa8,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x81, ++ 0x00,0x01,0xff,0xc2,0xb7,0x00,0xd2,0x1f,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb5, ++ 0xcc,0x81,0x00,0x01,0xff,0xce,0xb7,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb9, ++ 0xcc,0x81,0x00,0x00,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x81,0x00, ++ 0x00,0x00,0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x81,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x81,0x00,0xd3,0x3c,0xd2,0x20,0xd1,0x12,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x88, ++ 0xcc,0x81,0x00,0x01,0xff,0xce,0xb1,0x00,0x10,0x07,0x01,0xff,0xce,0xb2,0x00,0x01, ++ 0xff,0xce,0xb3,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xce,0xb4,0x00,0x01,0xff,0xce, ++ 0xb5,0x00,0x10,0x07,0x01,0xff,0xce,0xb6,0x00,0x01,0xff,0xce,0xb7,0x00,0xd2,0x1c, ++ 0xd1,0x0e,0x10,0x07,0x01,0xff,0xce,0xb8,0x00,0x01,0xff,0xce,0xb9,0x00,0x10,0x07, ++ 0x01,0xff,0xce,0xba,0x00,0x01,0xff,0xce,0xbb,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff, ++ 0xce,0xbc,0x00,0x01,0xff,0xce,0xbd,0x00,0x10,0x07,0x01,0xff,0xce,0xbe,0x00,0x01, ++ 0xff,0xce,0xbf,0x00,0xe4,0x85,0x43,0xd3,0x35,0xd2,0x19,0xd1,0x0e,0x10,0x07,0x01, ++ 0xff,0xcf,0x80,0x00,0x01,0xff,0xcf,0x81,0x00,0x10,0x04,0x00,0x00,0x01,0xff,0xcf, ++ 0x83,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xcf,0x84,0x00,0x01,0xff,0xcf,0x85,0x00, ++ 0x10,0x07,0x01,0xff,0xcf,0x86,0x00,0x01,0xff,0xcf,0x87,0x00,0xe2,0x2b,0x43,0xd1, ++ 0x0e,0x10,0x07,0x01,0xff,0xcf,0x88,0x00,0x01,0xff,0xcf,0x89,0x00,0x10,0x09,0x01, ++ 0xff,0xce,0xb9,0xcc,0x88,0x00,0x01,0xff,0xcf,0x85,0xcc,0x88,0x00,0xcf,0x86,0xd5, ++ 0x94,0xd4,0x3c,0xd3,0x13,0x92,0x0f,0x51,0x04,0x01,0x00,0x10,0x07,0x01,0xff,0xcf, ++ 0x83,0x00,0x01,0x00,0x01,0x00,0xd2,0x07,0x61,0x3a,0x43,0x01,0x00,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xce,0xbf,0xcc,0x81,0x00,0x01,0xff,0xcf,0x85,0xcc,0x81,0x00,0x10, ++ 0x09,0x01,0xff,0xcf,0x89,0xcc,0x81,0x00,0x0a,0xff,0xcf,0x97,0x00,0xd3,0x2c,0xd2, ++ 0x11,0xe1,0x46,0x43,0x10,0x07,0x01,0xff,0xce,0xb2,0x00,0x01,0xff,0xce,0xb8,0x00, ++ 0xd1,0x10,0x10,0x09,0x01,0xff,0xcf,0x92,0xcc,0x88,0x00,0x01,0xff,0xcf,0x86,0x00, ++ 0x10,0x07,0x01,0xff,0xcf,0x80,0x00,0x04,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x06, ++ 0xff,0xcf,0x99,0x00,0x06,0x00,0x10,0x07,0x01,0xff,0xcf,0x9b,0x00,0x04,0x00,0xd1, ++ 0x0b,0x10,0x07,0x01,0xff,0xcf,0x9d,0x00,0x04,0x00,0x10,0x07,0x01,0xff,0xcf,0x9f, ++ 0x00,0x04,0x00,0xd4,0x58,0xd3,0x2c,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xcf, ++ 0xa1,0x00,0x04,0x00,0x10,0x07,0x01,0xff,0xcf,0xa3,0x00,0x01,0x00,0xd1,0x0b,0x10, ++ 0x07,0x01,0xff,0xcf,0xa5,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xcf,0xa7,0x00,0x01, ++ 0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xcf,0xa9,0x00,0x01,0x00,0x10,0x07, ++ 0x01,0xff,0xcf,0xab,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xcf,0xad,0x00, ++ 0x01,0x00,0x10,0x07,0x01,0xff,0xcf,0xaf,0x00,0x01,0x00,0xd3,0x2b,0xd2,0x12,0x91, ++ 0x0e,0x10,0x07,0x01,0xff,0xce,0xba,0x00,0x01,0xff,0xcf,0x81,0x00,0x01,0x00,0xd1, ++ 0x0e,0x10,0x07,0x05,0xff,0xce,0xb8,0x00,0x05,0xff,0xce,0xb5,0x00,0x10,0x04,0x06, ++ 0x00,0x07,0xff,0xcf,0xb8,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x04,0x07,0x00,0x07,0xff, ++ 0xcf,0xb2,0x00,0x10,0x07,0x07,0xff,0xcf,0xbb,0x00,0x07,0x00,0xd1,0x0b,0x10,0x04, ++ 0x08,0x00,0x08,0xff,0xcd,0xbb,0x00,0x10,0x07,0x08,0xff,0xcd,0xbc,0x00,0x08,0xff, ++ 0xcd,0xbd,0x00,0xe3,0xed,0x46,0xe2,0x3d,0x05,0xe1,0x27,0x02,0xe0,0x66,0x01,0xcf, ++ 0x86,0xd5,0xf0,0xd4,0x7e,0xd3,0x40,0xd2,0x22,0xd1,0x12,0x10,0x09,0x04,0xff,0xd0, ++ 0xb5,0xcc,0x80,0x00,0x01,0xff,0xd0,0xb5,0xcc,0x88,0x00,0x10,0x07,0x01,0xff,0xd1, ++ 0x92,0x00,0x01,0xff,0xd0,0xb3,0xcc,0x81,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1, ++ 0x94,0x00,0x01,0xff,0xd1,0x95,0x00,0x10,0x07,0x01,0xff,0xd1,0x96,0x00,0x01,0xff, ++ 0xd1,0x96,0xcc,0x88,0x00,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1,0x98,0x00, ++ 0x01,0xff,0xd1,0x99,0x00,0x10,0x07,0x01,0xff,0xd1,0x9a,0x00,0x01,0xff,0xd1,0x9b, ++ 0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0xba,0xcc,0x81,0x00,0x04,0xff,0xd0,0xb8, ++ 0xcc,0x80,0x00,0x10,0x09,0x01,0xff,0xd1,0x83,0xcc,0x86,0x00,0x01,0xff,0xd1,0x9f, ++ 0x00,0xd3,0x38,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd0,0xb0,0x00,0x01,0xff, ++ 0xd0,0xb1,0x00,0x10,0x07,0x01,0xff,0xd0,0xb2,0x00,0x01,0xff,0xd0,0xb3,0x00,0xd1, ++ 0x0e,0x10,0x07,0x01,0xff,0xd0,0xb4,0x00,0x01,0xff,0xd0,0xb5,0x00,0x10,0x07,0x01, ++ 0xff,0xd0,0xb6,0x00,0x01,0xff,0xd0,0xb7,0x00,0xd2,0x1e,0xd1,0x10,0x10,0x07,0x01, ++ 0xff,0xd0,0xb8,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x86,0x00,0x10,0x07,0x01,0xff,0xd0, ++ 0xba,0x00,0x01,0xff,0xd0,0xbb,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd0,0xbc,0x00, ++ 0x01,0xff,0xd0,0xbd,0x00,0x10,0x07,0x01,0xff,0xd0,0xbe,0x00,0x01,0xff,0xd0,0xbf, ++ 0x00,0xe4,0x25,0x42,0xd3,0x38,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1,0x80, ++ 0x00,0x01,0xff,0xd1,0x81,0x00,0x10,0x07,0x01,0xff,0xd1,0x82,0x00,0x01,0xff,0xd1, ++ 0x83,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1,0x84,0x00,0x01,0xff,0xd1,0x85,0x00, ++ 0x10,0x07,0x01,0xff,0xd1,0x86,0x00,0x01,0xff,0xd1,0x87,0x00,0xd2,0x1c,0xd1,0x0e, ++ 0x10,0x07,0x01,0xff,0xd1,0x88,0x00,0x01,0xff,0xd1,0x89,0x00,0x10,0x07,0x01,0xff, ++ 0xd1,0x8a,0x00,0x01,0xff,0xd1,0x8b,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1,0x8c, ++ 0x00,0x01,0xff,0xd1,0x8d,0x00,0x10,0x07,0x01,0xff,0xd1,0x8e,0x00,0x01,0xff,0xd1, ++ 0x8f,0x00,0xcf,0x86,0xd5,0x07,0x64,0xcf,0x41,0x01,0x00,0xd4,0x58,0xd3,0x2c,0xd2, ++ 0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd1,0xa1,0x00,0x01,0x00,0x10,0x07,0x01,0xff, ++ 0xd1,0xa3,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd1,0xa5,0x00,0x01,0x00, ++ 0x10,0x07,0x01,0xff,0xd1,0xa7,0x00,0x01,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01, ++ 0xff,0xd1,0xa9,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xab,0x00,0x01,0x00,0xd1, ++ 0x0b,0x10,0x07,0x01,0xff,0xd1,0xad,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xaf, ++ 0x00,0x01,0x00,0xd3,0x33,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd1,0xb1,0x00, ++ 0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xb3,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01, ++ 0xff,0xd1,0xb5,0x00,0x01,0x00,0x10,0x09,0x01,0xff,0xd1,0xb5,0xcc,0x8f,0x00,0x01, ++ 0xff,0xd1,0xb5,0xcc,0x8f,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd1,0xb9, ++ 0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xbb,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07, ++ 0x01,0xff,0xd1,0xbd,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xbf,0x00,0x01,0x00, ++ 0xe0,0x41,0x01,0xcf,0x86,0xd5,0x8e,0xd4,0x36,0xd3,0x11,0xe2,0x91,0x41,0xe1,0x88, ++ 0x41,0x10,0x07,0x01,0xff,0xd2,0x81,0x00,0x01,0x00,0xd2,0x0f,0x51,0x04,0x04,0x00, ++ 0x10,0x07,0x06,0xff,0xd2,0x8b,0x00,0x06,0x00,0xd1,0x0b,0x10,0x07,0x04,0xff,0xd2, ++ 0x8d,0x00,0x04,0x00,0x10,0x07,0x04,0xff,0xd2,0x8f,0x00,0x04,0x00,0xd3,0x2c,0xd2, ++ 0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0x91,0x00,0x01,0x00,0x10,0x07,0x01,0xff, ++ 0xd2,0x93,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0x95,0x00,0x01,0x00, ++ 0x10,0x07,0x01,0xff,0xd2,0x97,0x00,0x01,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01, ++ 0xff,0xd2,0x99,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0x9b,0x00,0x01,0x00,0xd1, ++ 0x0b,0x10,0x07,0x01,0xff,0xd2,0x9d,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0x9f, ++ 0x00,0x01,0x00,0xd4,0x58,0xd3,0x2c,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2, ++ 0xa1,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xa3,0x00,0x01,0x00,0xd1,0x0b,0x10, ++ 0x07,0x01,0xff,0xd2,0xa5,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xa7,0x00,0x01, ++ 0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0xa9,0x00,0x01,0x00,0x10,0x07, ++ 0x01,0xff,0xd2,0xab,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0xad,0x00, ++ 0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xaf,0x00,0x01,0x00,0xd3,0x2c,0xd2,0x16,0xd1, ++ 0x0b,0x10,0x07,0x01,0xff,0xd2,0xb1,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xb3, ++ 0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0xb5,0x00,0x01,0x00,0x10,0x07, ++ 0x01,0xff,0xd2,0xb7,0x00,0x01,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2, ++ 0xb9,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xbb,0x00,0x01,0x00,0xd1,0x0b,0x10, ++ 0x07,0x01,0xff,0xd2,0xbd,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xbf,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0xdc,0xd4,0x5a,0xd3,0x36,0xd2,0x20,0xd1,0x10,0x10,0x07,0x01, ++ 0xff,0xd3,0x8f,0x00,0x01,0xff,0xd0,0xb6,0xcc,0x86,0x00,0x10,0x09,0x01,0xff,0xd0, ++ 0xb6,0xcc,0x86,0x00,0x01,0xff,0xd3,0x84,0x00,0xd1,0x0b,0x10,0x04,0x01,0x00,0x06, ++ 0xff,0xd3,0x86,0x00,0x10,0x04,0x06,0x00,0x01,0xff,0xd3,0x88,0x00,0xd2,0x16,0xd1, ++ 0x0b,0x10,0x04,0x01,0x00,0x06,0xff,0xd3,0x8a,0x00,0x10,0x04,0x06,0x00,0x01,0xff, ++ 0xd3,0x8c,0x00,0xe1,0x69,0x40,0x10,0x04,0x01,0x00,0x06,0xff,0xd3,0x8e,0x00,0xd3, ++ 0x41,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0xb0,0xcc,0x86,0x00,0x01,0xff, ++ 0xd0,0xb0,0xcc,0x86,0x00,0x10,0x09,0x01,0xff,0xd0,0xb0,0xcc,0x88,0x00,0x01,0xff, ++ 0xd0,0xb0,0xcc,0x88,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd3,0x95,0x00,0x01,0x00, ++ 0x10,0x09,0x01,0xff,0xd0,0xb5,0xcc,0x86,0x00,0x01,0xff,0xd0,0xb5,0xcc,0x86,0x00, ++ 0xd2,0x1d,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd3,0x99,0x00,0x01,0x00,0x10,0x09,0x01, ++ 0xff,0xd3,0x99,0xcc,0x88,0x00,0x01,0xff,0xd3,0x99,0xcc,0x88,0x00,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xd0,0xb6,0xcc,0x88,0x00,0x01,0xff,0xd0,0xb6,0xcc,0x88,0x00,0x10, ++ 0x09,0x01,0xff,0xd0,0xb7,0xcc,0x88,0x00,0x01,0xff,0xd0,0xb7,0xcc,0x88,0x00,0xd4, ++ 0x82,0xd3,0x41,0xd2,0x1d,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd3,0xa1,0x00,0x01,0x00, ++ 0x10,0x09,0x01,0xff,0xd0,0xb8,0xcc,0x84,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x84,0x00, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0xb8,0xcc,0x88,0x00,0x01,0xff,0xd0,0xb8,0xcc, ++ 0x88,0x00,0x10,0x09,0x01,0xff,0xd0,0xbe,0xcc,0x88,0x00,0x01,0xff,0xd0,0xbe,0xcc, ++ 0x88,0x00,0xd2,0x1d,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd3,0xa9,0x00,0x01,0x00,0x10, ++ 0x09,0x01,0xff,0xd3,0xa9,0xcc,0x88,0x00,0x01,0xff,0xd3,0xa9,0xcc,0x88,0x00,0xd1, ++ 0x12,0x10,0x09,0x04,0xff,0xd1,0x8d,0xcc,0x88,0x00,0x04,0xff,0xd1,0x8d,0xcc,0x88, ++ 0x00,0x10,0x09,0x01,0xff,0xd1,0x83,0xcc,0x84,0x00,0x01,0xff,0xd1,0x83,0xcc,0x84, ++ 0x00,0xd3,0x41,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd1,0x83,0xcc,0x88,0x00, ++ 0x01,0xff,0xd1,0x83,0xcc,0x88,0x00,0x10,0x09,0x01,0xff,0xd1,0x83,0xcc,0x8b,0x00, ++ 0x01,0xff,0xd1,0x83,0xcc,0x8b,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd1,0x87,0xcc, ++ 0x88,0x00,0x01,0xff,0xd1,0x87,0xcc,0x88,0x00,0x10,0x07,0x08,0xff,0xd3,0xb7,0x00, ++ 0x08,0x00,0xd2,0x1d,0xd1,0x12,0x10,0x09,0x01,0xff,0xd1,0x8b,0xcc,0x88,0x00,0x01, ++ 0xff,0xd1,0x8b,0xcc,0x88,0x00,0x10,0x07,0x09,0xff,0xd3,0xbb,0x00,0x09,0x00,0xd1, ++ 0x0b,0x10,0x07,0x09,0xff,0xd3,0xbd,0x00,0x09,0x00,0x10,0x07,0x09,0xff,0xd3,0xbf, ++ 0x00,0x09,0x00,0xe1,0x26,0x02,0xe0,0x78,0x01,0xcf,0x86,0xd5,0xb0,0xd4,0x58,0xd3, ++ 0x2c,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x06,0xff,0xd4,0x81,0x00,0x06,0x00,0x10,0x07, ++ 0x06,0xff,0xd4,0x83,0x00,0x06,0x00,0xd1,0x0b,0x10,0x07,0x06,0xff,0xd4,0x85,0x00, ++ 0x06,0x00,0x10,0x07,0x06,0xff,0xd4,0x87,0x00,0x06,0x00,0xd2,0x16,0xd1,0x0b,0x10, ++ 0x07,0x06,0xff,0xd4,0x89,0x00,0x06,0x00,0x10,0x07,0x06,0xff,0xd4,0x8b,0x00,0x06, ++ 0x00,0xd1,0x0b,0x10,0x07,0x06,0xff,0xd4,0x8d,0x00,0x06,0x00,0x10,0x07,0x06,0xff, ++ 0xd4,0x8f,0x00,0x06,0x00,0xd3,0x2c,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x09,0xff,0xd4, ++ 0x91,0x00,0x09,0x00,0x10,0x07,0x09,0xff,0xd4,0x93,0x00,0x09,0x00,0xd1,0x0b,0x10, ++ 0x07,0x0a,0xff,0xd4,0x95,0x00,0x0a,0x00,0x10,0x07,0x0a,0xff,0xd4,0x97,0x00,0x0a, ++ 0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x0a,0xff,0xd4,0x99,0x00,0x0a,0x00,0x10,0x07, ++ 0x0a,0xff,0xd4,0x9b,0x00,0x0a,0x00,0xd1,0x0b,0x10,0x07,0x0a,0xff,0xd4,0x9d,0x00, ++ 0x0a,0x00,0x10,0x07,0x0a,0xff,0xd4,0x9f,0x00,0x0a,0x00,0xd4,0x58,0xd3,0x2c,0xd2, ++ 0x16,0xd1,0x0b,0x10,0x07,0x0a,0xff,0xd4,0xa1,0x00,0x0a,0x00,0x10,0x07,0x0a,0xff, ++ 0xd4,0xa3,0x00,0x0a,0x00,0xd1,0x0b,0x10,0x07,0x0b,0xff,0xd4,0xa5,0x00,0x0b,0x00, ++ 0x10,0x07,0x0c,0xff,0xd4,0xa7,0x00,0x0c,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x10, ++ 0xff,0xd4,0xa9,0x00,0x10,0x00,0x10,0x07,0x10,0xff,0xd4,0xab,0x00,0x10,0x00,0xd1, ++ 0x0b,0x10,0x07,0x10,0xff,0xd4,0xad,0x00,0x10,0x00,0x10,0x07,0x10,0xff,0xd4,0xaf, ++ 0x00,0x10,0x00,0xd3,0x35,0xd2,0x19,0xd1,0x0b,0x10,0x04,0x00,0x00,0x01,0xff,0xd5, ++ 0xa1,0x00,0x10,0x07,0x01,0xff,0xd5,0xa2,0x00,0x01,0xff,0xd5,0xa3,0x00,0xd1,0x0e, ++ 0x10,0x07,0x01,0xff,0xd5,0xa4,0x00,0x01,0xff,0xd5,0xa5,0x00,0x10,0x07,0x01,0xff, ++ 0xd5,0xa6,0x00,0x01,0xff,0xd5,0xa7,0x00,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff, ++ 0xd5,0xa8,0x00,0x01,0xff,0xd5,0xa9,0x00,0x10,0x07,0x01,0xff,0xd5,0xaa,0x00,0x01, ++ 0xff,0xd5,0xab,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd5,0xac,0x00,0x01,0xff,0xd5, ++ 0xad,0x00,0x10,0x07,0x01,0xff,0xd5,0xae,0x00,0x01,0xff,0xd5,0xaf,0x00,0xcf,0x86, ++ 0xe5,0x08,0x3f,0xd4,0x70,0xd3,0x38,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd5, ++ 0xb0,0x00,0x01,0xff,0xd5,0xb1,0x00,0x10,0x07,0x01,0xff,0xd5,0xb2,0x00,0x01,0xff, ++ 0xd5,0xb3,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd5,0xb4,0x00,0x01,0xff,0xd5,0xb5, ++ 0x00,0x10,0x07,0x01,0xff,0xd5,0xb6,0x00,0x01,0xff,0xd5,0xb7,0x00,0xd2,0x1c,0xd1, ++ 0x0e,0x10,0x07,0x01,0xff,0xd5,0xb8,0x00,0x01,0xff,0xd5,0xb9,0x00,0x10,0x07,0x01, ++ 0xff,0xd5,0xba,0x00,0x01,0xff,0xd5,0xbb,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd5, ++ 0xbc,0x00,0x01,0xff,0xd5,0xbd,0x00,0x10,0x07,0x01,0xff,0xd5,0xbe,0x00,0x01,0xff, ++ 0xd5,0xbf,0x00,0xe3,0x87,0x3e,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd6,0x80, ++ 0x00,0x01,0xff,0xd6,0x81,0x00,0x10,0x07,0x01,0xff,0xd6,0x82,0x00,0x01,0xff,0xd6, ++ 0x83,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd6,0x84,0x00,0x01,0xff,0xd6,0x85,0x00, ++ 0x10,0x07,0x01,0xff,0xd6,0x86,0x00,0x00,0x00,0xe0,0x2f,0x3f,0xcf,0x86,0xe5,0xc0, ++ 0x3e,0xe4,0x97,0x3e,0xe3,0x76,0x3e,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0xd5,0xa5,0xd6,0x82,0x00,0xe4,0x3e,0x25,0xe3,0xc3,0x1a, ++ 0xe2,0x7b,0x81,0xe1,0xc0,0x13,0xd0,0x1e,0xcf,0x86,0xc5,0xe4,0x08,0x4b,0xe3,0x53, ++ 0x46,0xe2,0xe9,0x43,0xe1,0x1c,0x43,0xe0,0xe1,0x42,0xcf,0x86,0xe5,0xa6,0x42,0x64, ++ 0x89,0x42,0x0b,0x00,0xcf,0x86,0xe5,0xfa,0x01,0xe4,0x03,0x56,0xe3,0x76,0x01,0xe2, ++ 0x8e,0x53,0xd1,0x0c,0xe0,0xef,0x52,0xcf,0x86,0x65,0x8d,0x52,0x04,0x00,0xe0,0x0d, ++ 0x01,0xcf,0x86,0xd5,0x0a,0xe4,0x10,0x53,0x63,0xff,0x52,0x0a,0x00,0xd4,0x80,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x80,0x00,0x01,0xff,0xe2, ++ 0xb4,0x81,0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0x82,0x00,0x01,0xff,0xe2,0xb4,0x83, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x84,0x00,0x01,0xff,0xe2,0xb4,0x85, ++ 0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0x86,0x00,0x01,0xff,0xe2,0xb4,0x87,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x88,0x00,0x01,0xff,0xe2,0xb4,0x89, ++ 0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0x8a,0x00,0x01,0xff,0xe2,0xb4,0x8b,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x8c,0x00,0x01,0xff,0xe2,0xb4,0x8d,0x00,0x10, ++ 0x08,0x01,0xff,0xe2,0xb4,0x8e,0x00,0x01,0xff,0xe2,0xb4,0x8f,0x00,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x90,0x00,0x01,0xff,0xe2,0xb4,0x91, ++ 0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0x92,0x00,0x01,0xff,0xe2,0xb4,0x93,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x94,0x00,0x01,0xff,0xe2,0xb4,0x95,0x00,0x10, ++ 0x08,0x01,0xff,0xe2,0xb4,0x96,0x00,0x01,0xff,0xe2,0xb4,0x97,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x98,0x00,0x01,0xff,0xe2,0xb4,0x99,0x00,0x10, ++ 0x08,0x01,0xff,0xe2,0xb4,0x9a,0x00,0x01,0xff,0xe2,0xb4,0x9b,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe2,0xb4,0x9c,0x00,0x01,0xff,0xe2,0xb4,0x9d,0x00,0x10,0x08,0x01, ++ 0xff,0xe2,0xb4,0x9e,0x00,0x01,0xff,0xe2,0xb4,0x9f,0x00,0xcf,0x86,0xe5,0x42,0x52, ++ 0x94,0x50,0xd3,0x3c,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0xa0,0x00, ++ 0x01,0xff,0xe2,0xb4,0xa1,0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0xa2,0x00,0x01,0xff, ++ 0xe2,0xb4,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0xa4,0x00,0x01,0xff, ++ 0xe2,0xb4,0xa5,0x00,0x10,0x04,0x00,0x00,0x0d,0xff,0xe2,0xb4,0xa7,0x00,0x52,0x04, ++ 0x00,0x00,0x91,0x0c,0x10,0x04,0x00,0x00,0x0d,0xff,0xe2,0xb4,0xad,0x00,0x00,0x00, ++ 0x01,0x00,0xd2,0x1b,0xe1,0xfc,0x52,0xe0,0xad,0x52,0xcf,0x86,0x95,0x0f,0x94,0x0b, ++ 0x93,0x07,0x62,0x92,0x52,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0xd1,0x13,0xe0, ++ 0xd3,0x53,0xcf,0x86,0x95,0x0a,0xe4,0xa8,0x53,0x63,0x97,0x53,0x04,0x00,0x04,0x00, ++ 0xd0,0x0d,0xcf,0x86,0x95,0x07,0x64,0x22,0x54,0x08,0x00,0x04,0x00,0xcf,0x86,0x55, ++ 0x04,0x04,0x00,0x54,0x04,0x04,0x00,0xd3,0x07,0x62,0x2f,0x54,0x04,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8f,0xb0,0x00,0x11,0xff,0xe1,0x8f,0xb1,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0xb2,0x00,0x11,0xff,0xe1,0x8f,0xb3,0x00,0x91,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0xb4,0x00,0x11,0xff,0xe1,0x8f,0xb5,0x00,0x00,0x00, ++ 0xd4,0x1c,0xe3,0xe0,0x56,0xe2,0x17,0x56,0xe1,0xda,0x55,0xe0,0xbb,0x55,0xcf,0x86, ++ 0x95,0x0a,0xe4,0xa4,0x55,0x63,0x88,0x55,0x04,0x00,0x04,0x00,0xe3,0xd2,0x01,0xe2, ++ 0x2b,0x5a,0xd1,0x0c,0xe0,0x4c,0x59,0xcf,0x86,0x65,0x25,0x59,0x0a,0x00,0xe0,0x9c, ++ 0x59,0xcf,0x86,0xd5,0xc5,0xd4,0x45,0xd3,0x31,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x12, ++ 0xff,0xd0,0xb2,0x00,0x12,0xff,0xd0,0xb4,0x00,0x10,0x07,0x12,0xff,0xd0,0xbe,0x00, ++ 0x12,0xff,0xd1,0x81,0x00,0x51,0x07,0x12,0xff,0xd1,0x82,0x00,0x10,0x07,0x12,0xff, ++ 0xd1,0x8a,0x00,0x12,0xff,0xd1,0xa3,0x00,0x92,0x10,0x91,0x0c,0x10,0x08,0x12,0xff, ++ 0xea,0x99,0x8b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x14,0xff,0xe1,0x83,0x90,0x00,0x14,0xff,0xe1,0x83,0x91,0x00,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0x92,0x00,0x14,0xff,0xe1,0x83,0x93,0x00,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0x94,0x00,0x14,0xff,0xe1,0x83,0x95,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0x96,0x00,0x14,0xff,0xe1,0x83,0x97,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0x98,0x00,0x14,0xff,0xe1,0x83,0x99,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0x9a,0x00,0x14,0xff,0xe1,0x83,0x9b,0x00,0xd1,0x10,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0x9c,0x00,0x14,0xff,0xe1,0x83,0x9d,0x00,0x10,0x08,0x14,0xff,0xe1,0x83, ++ 0x9e,0x00,0x14,0xff,0xe1,0x83,0x9f,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x14,0xff,0xe1,0x83,0xa0,0x00,0x14,0xff,0xe1,0x83,0xa1,0x00,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0xa2,0x00,0x14,0xff,0xe1,0x83,0xa3,0x00,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0xa4,0x00,0x14,0xff,0xe1,0x83,0xa5,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xa6,0x00,0x14,0xff,0xe1,0x83,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0xa8,0x00,0x14,0xff,0xe1,0x83,0xa9,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xaa,0x00,0x14,0xff,0xe1,0x83,0xab,0x00,0xd1,0x10,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xac,0x00,0x14,0xff,0xe1,0x83,0xad,0x00,0x10,0x08,0x14,0xff,0xe1,0x83, ++ 0xae,0x00,0x14,0xff,0xe1,0x83,0xaf,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0xb0,0x00,0x14,0xff,0xe1,0x83,0xb1,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xb2,0x00,0x14,0xff,0xe1,0x83,0xb3,0x00,0xd1,0x10,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xb4,0x00,0x14,0xff,0xe1,0x83,0xb5,0x00,0x10,0x08,0x14,0xff,0xe1,0x83, ++ 0xb6,0x00,0x14,0xff,0xe1,0x83,0xb7,0x00,0xd2,0x1c,0xd1,0x10,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xb8,0x00,0x14,0xff,0xe1,0x83,0xb9,0x00,0x10,0x08,0x14,0xff,0xe1,0x83, ++ 0xba,0x00,0x00,0x00,0xd1,0x0c,0x10,0x04,0x00,0x00,0x14,0xff,0xe1,0x83,0xbd,0x00, ++ 0x10,0x08,0x14,0xff,0xe1,0x83,0xbe,0x00,0x14,0xff,0xe1,0x83,0xbf,0x00,0xe2,0x9d, ++ 0x08,0xe1,0x48,0x04,0xe0,0x1c,0x02,0xcf,0x86,0xe5,0x11,0x01,0xd4,0x84,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc,0xa5,0x00,0x01,0xff,0x61,0xcc, ++ 0xa5,0x00,0x10,0x08,0x01,0xff,0x62,0xcc,0x87,0x00,0x01,0xff,0x62,0xcc,0x87,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x62,0xcc,0xa3,0x00,0x01,0xff,0x62,0xcc,0xa3,0x00, ++ 0x10,0x08,0x01,0xff,0x62,0xcc,0xb1,0x00,0x01,0xff,0x62,0xcc,0xb1,0x00,0xd2,0x24, ++ 0xd1,0x14,0x10,0x0a,0x01,0xff,0x63,0xcc,0xa7,0xcc,0x81,0x00,0x01,0xff,0x63,0xcc, ++ 0xa7,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x64,0xcc,0x87,0x00,0x01,0xff,0x64,0xcc, ++ 0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x64,0xcc,0xa3,0x00,0x01,0xff,0x64,0xcc, ++ 0xa3,0x00,0x10,0x08,0x01,0xff,0x64,0xcc,0xb1,0x00,0x01,0xff,0x64,0xcc,0xb1,0x00, ++ 0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x64,0xcc,0xa7,0x00,0x01,0xff, ++ 0x64,0xcc,0xa7,0x00,0x10,0x08,0x01,0xff,0x64,0xcc,0xad,0x00,0x01,0xff,0x64,0xcc, ++ 0xad,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x65,0xcc,0x84,0xcc,0x80,0x00,0x01,0xff, ++ 0x65,0xcc,0x84,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x65,0xcc,0x84,0xcc,0x81,0x00, ++ 0x01,0xff,0x65,0xcc,0x84,0xcc,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x65,0xcc,0xad,0x00,0x01,0xff,0x65,0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x65,0xcc, ++ 0xb0,0x00,0x01,0xff,0x65,0xcc,0xb0,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x65,0xcc, ++ 0xa7,0xcc,0x86,0x00,0x01,0xff,0x65,0xcc,0xa7,0xcc,0x86,0x00,0x10,0x08,0x01,0xff, ++ 0x66,0xcc,0x87,0x00,0x01,0xff,0x66,0xcc,0x87,0x00,0xd4,0x84,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x67,0xcc,0x84,0x00,0x01,0xff,0x67,0xcc,0x84,0x00, ++ 0x10,0x08,0x01,0xff,0x68,0xcc,0x87,0x00,0x01,0xff,0x68,0xcc,0x87,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x68,0xcc,0xa3,0x00,0x01,0xff,0x68,0xcc,0xa3,0x00,0x10,0x08, ++ 0x01,0xff,0x68,0xcc,0x88,0x00,0x01,0xff,0x68,0xcc,0x88,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x68,0xcc,0xa7,0x00,0x01,0xff,0x68,0xcc,0xa7,0x00,0x10,0x08, ++ 0x01,0xff,0x68,0xcc,0xae,0x00,0x01,0xff,0x68,0xcc,0xae,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x69,0xcc,0xb0,0x00,0x01,0xff,0x69,0xcc,0xb0,0x00,0x10,0x0a,0x01,0xff, ++ 0x69,0xcc,0x88,0xcc,0x81,0x00,0x01,0xff,0x69,0xcc,0x88,0xcc,0x81,0x00,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x6b,0xcc,0x81,0x00,0x01,0xff,0x6b,0xcc, ++ 0x81,0x00,0x10,0x08,0x01,0xff,0x6b,0xcc,0xa3,0x00,0x01,0xff,0x6b,0xcc,0xa3,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x6b,0xcc,0xb1,0x00,0x01,0xff,0x6b,0xcc,0xb1,0x00, ++ 0x10,0x08,0x01,0xff,0x6c,0xcc,0xa3,0x00,0x01,0xff,0x6c,0xcc,0xa3,0x00,0xd2,0x24, ++ 0xd1,0x14,0x10,0x0a,0x01,0xff,0x6c,0xcc,0xa3,0xcc,0x84,0x00,0x01,0xff,0x6c,0xcc, ++ 0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x6c,0xcc,0xb1,0x00,0x01,0xff,0x6c,0xcc, ++ 0xb1,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6c,0xcc,0xad,0x00,0x01,0xff,0x6c,0xcc, ++ 0xad,0x00,0x10,0x08,0x01,0xff,0x6d,0xcc,0x81,0x00,0x01,0xff,0x6d,0xcc,0x81,0x00, ++ 0xcf,0x86,0xe5,0x15,0x01,0xd4,0x88,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x6d,0xcc,0x87,0x00,0x01,0xff,0x6d,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x6d, ++ 0xcc,0xa3,0x00,0x01,0xff,0x6d,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e, ++ 0xcc,0x87,0x00,0x01,0xff,0x6e,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x6e,0xcc,0xa3, ++ 0x00,0x01,0xff,0x6e,0xcc,0xa3,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e, ++ 0xcc,0xb1,0x00,0x01,0xff,0x6e,0xcc,0xb1,0x00,0x10,0x08,0x01,0xff,0x6e,0xcc,0xad, ++ 0x00,0x01,0xff,0x6e,0xcc,0xad,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x83, ++ 0xcc,0x81,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x6f, ++ 0xcc,0x83,0xcc,0x88,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x88,0x00,0xd3,0x48,0xd2, ++ 0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x84,0xcc,0x80,0x00,0x01,0xff,0x6f, ++ 0xcc,0x84,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x84,0xcc,0x81,0x00,0x01, ++ 0xff,0x6f,0xcc,0x84,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x70,0xcc,0x81, ++ 0x00,0x01,0xff,0x70,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x70,0xcc,0x87,0x00,0x01, ++ 0xff,0x70,0xcc,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x72,0xcc,0x87, ++ 0x00,0x01,0xff,0x72,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x72,0xcc,0xa3,0x00,0x01, ++ 0xff,0x72,0xcc,0xa3,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x72,0xcc,0xa3,0xcc,0x84, ++ 0x00,0x01,0xff,0x72,0xcc,0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x72,0xcc,0xb1, ++ 0x00,0x01,0xff,0x72,0xcc,0xb1,0x00,0xd4,0x8c,0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x73,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x87,0x00,0x10,0x08,0x01, ++ 0xff,0x73,0xcc,0xa3,0x00,0x01,0xff,0x73,0xcc,0xa3,0x00,0xd1,0x14,0x10,0x0a,0x01, ++ 0xff,0x73,0xcc,0x81,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x81,0xcc,0x87,0x00,0x10, ++ 0x0a,0x01,0xff,0x73,0xcc,0x8c,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x8c,0xcc,0x87, ++ 0x00,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x73,0xcc,0xa3,0xcc,0x87,0x00,0x01, ++ 0xff,0x73,0xcc,0xa3,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x74,0xcc,0x87,0x00,0x01, ++ 0xff,0x74,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x74,0xcc,0xa3,0x00,0x01, ++ 0xff,0x74,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x74,0xcc,0xb1,0x00,0x01,0xff,0x74, ++ 0xcc,0xb1,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x74,0xcc,0xad, ++ 0x00,0x01,0xff,0x74,0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0xa4,0x00,0x01, ++ 0xff,0x75,0xcc,0xa4,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0xb0,0x00,0x01, ++ 0xff,0x75,0xcc,0xb0,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0xad,0x00,0x01,0xff,0x75, ++ 0xcc,0xad,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75,0xcc,0x83,0xcc,0x81, ++ 0x00,0x01,0xff,0x75,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x84, ++ 0xcc,0x88,0x00,0x01,0xff,0x75,0xcc,0x84,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x76,0xcc,0x83,0x00,0x01,0xff,0x76,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x76, ++ 0xcc,0xa3,0x00,0x01,0xff,0x76,0xcc,0xa3,0x00,0xe0,0x11,0x02,0xcf,0x86,0xd5,0xe2, ++ 0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x80,0x00, ++ 0x01,0xff,0x77,0xcc,0x80,0x00,0x10,0x08,0x01,0xff,0x77,0xcc,0x81,0x00,0x01,0xff, ++ 0x77,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x88,0x00,0x01,0xff, ++ 0x77,0xcc,0x88,0x00,0x10,0x08,0x01,0xff,0x77,0xcc,0x87,0x00,0x01,0xff,0x77,0xcc, ++ 0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0xa3,0x00,0x01,0xff, ++ 0x77,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x78,0xcc,0x87,0x00,0x01,0xff,0x78,0xcc, ++ 0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x78,0xcc,0x88,0x00,0x01,0xff,0x78,0xcc, ++ 0x88,0x00,0x10,0x08,0x01,0xff,0x79,0xcc,0x87,0x00,0x01,0xff,0x79,0xcc,0x87,0x00, ++ 0xd3,0x33,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x7a,0xcc,0x82,0x00,0x01,0xff, ++ 0x7a,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0xa3,0x00,0x01,0xff,0x7a,0xcc, ++ 0xa3,0x00,0xe1,0x12,0x59,0x10,0x08,0x01,0xff,0x7a,0xcc,0xb1,0x00,0x01,0xff,0x7a, ++ 0xcc,0xb1,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x8a,0x00,0x01, ++ 0xff,0x79,0xcc,0x8a,0x00,0x10,0x08,0x01,0xff,0x61,0xca,0xbe,0x00,0x02,0xff,0x73, ++ 0xcc,0x87,0x00,0x51,0x04,0x0a,0x00,0x10,0x07,0x0a,0xff,0x73,0x73,0x00,0x0a,0x00, ++ 0xd4,0x98,0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc,0xa3,0x00, ++ 0x01,0xff,0x61,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x61,0xcc,0x89,0x00,0x01,0xff, ++ 0x61,0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x61,0xcc,0x82,0xcc,0x81,0x00, ++ 0x01,0xff,0x61,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x61,0xcc,0x82,0xcc, + 0x80,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x80,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a, +- 0x01,0xff,0x41,0xcc,0x82,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x89,0x00, +- 0x10,0x0a,0x01,0xff,0x41,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc, +- 0x83,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff, +- 0x61,0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x81,0x00, ++ 0x01,0xff,0x61,0xcc,0x82,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x89,0x00, ++ 0x10,0x0a,0x01,0xff,0x61,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc, ++ 0x83,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x61,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff, ++ 0x61,0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x61,0xcc,0x86,0xcc,0x81,0x00, + 0x01,0xff,0x61,0xcc,0x86,0xcc,0x81,0x00,0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a, +- 0x01,0xff,0x41,0xcc,0x86,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x86,0xcc,0x80,0x00, +- 0x10,0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x86,0xcc, +- 0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x83,0x00,0x01,0xff, +- 0x61,0xcc,0x86,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0xa3,0xcc,0x86,0x00, ++ 0x01,0xff,0x61,0xcc,0x86,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x86,0xcc,0x80,0x00, ++ 0x10,0x0a,0x01,0xff,0x61,0xcc,0x86,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x86,0xcc, ++ 0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x61,0xcc,0x86,0xcc,0x83,0x00,0x01,0xff, ++ 0x61,0xcc,0x86,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x61,0xcc,0xa3,0xcc,0x86,0x00, + 0x01,0xff,0x61,0xcc,0xa3,0xcc,0x86,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, +- 0x45,0xcc,0xa3,0x00,0x01,0xff,0x65,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x45,0xcc, +- 0x89,0x00,0x01,0xff,0x65,0xcc,0x89,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc, +- 0x83,0x00,0x01,0xff,0x65,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x45,0xcc,0x82,0xcc, ++ 0x65,0xcc,0xa3,0x00,0x01,0xff,0x65,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x65,0xcc, ++ 0x89,0x00,0x01,0xff,0x65,0xcc,0x89,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc, ++ 0x83,0x00,0x01,0xff,0x65,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x65,0xcc,0x82,0xcc, + 0x81,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x81,0x00,0xcf,0x86,0xe5,0x31,0x01,0xd4, +- 0x90,0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x45,0xcc,0x82,0xcc,0x80, +- 0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x45,0xcc,0x82, ++ 0x90,0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x65,0xcc,0x82,0xcc,0x80, ++ 0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x65,0xcc,0x82, + 0xcc,0x89,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a,0x01, +- 0xff,0x45,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x83,0x00,0x10, +- 0x0a,0x01,0xff,0x45,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff,0x65,0xcc,0xa3,0xcc,0x82, +- 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x89,0x00,0x01,0xff,0x69, +- 0xcc,0x89,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0xa3,0x00,0x01,0xff,0x69,0xcc,0xa3, +- 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0xa3,0x00,0x01,0xff,0x6f,0xcc,0xa3, +- 0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x89,0x00,0xd3, +- 0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x82,0xcc,0x81,0x00,0x01, +- 0xff,0x6f,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x82,0xcc,0x80, +- 0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x80,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f, ++ 0xff,0x65,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x83,0x00,0x10, ++ 0x0a,0x01,0xff,0x65,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff,0x65,0xcc,0xa3,0xcc,0x82, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x89,0x00,0x01,0xff,0x69, ++ 0xcc,0x89,0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0xa3,0x00,0x01,0xff,0x69,0xcc,0xa3, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0xa3,0x00,0x01,0xff,0x6f,0xcc,0xa3, ++ 0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x89,0x00,0xd3, ++ 0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x81,0x00,0x01, ++ 0xff,0x6f,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x80, ++ 0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x80,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f, + 0xcc,0x82,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x89,0x00,0x10,0x0a,0x01, +- 0xff,0x4f,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x83,0x00,0xd2, +- 0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff,0x6f, +- 0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b,0xcc,0x81,0x00,0x01, +- 0xff,0x6f,0xcc,0x9b,0xcc,0x81,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b, +- 0xcc,0x80,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x4f, ++ 0xff,0x6f,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x83,0x00,0xd2, ++ 0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff,0x6f, ++ 0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x81,0x00,0x01, ++ 0xff,0x6f,0xcc,0x9b,0xcc,0x81,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x9b, ++ 0xcc,0x80,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x6f, + 0xcc,0x9b,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x89,0x00,0xd4,0x98,0xd3, +- 0x48,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b,0xcc,0x83,0x00,0x01, +- 0xff,0x6f,0xcc,0x9b,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b,0xcc,0xa3, +- 0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x55, +- 0xcc,0xa3,0x00,0x01,0xff,0x75,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0x89, +- 0x00,0x01,0xff,0x75,0xcc,0x89,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x55, ++ 0x48,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x83,0x00,0x01, ++ 0xff,0x6f,0xcc,0x9b,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0xa3, ++ 0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x75, ++ 0xcc,0xa3,0x00,0x01,0xff,0x75,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x89, ++ 0x00,0x01,0xff,0x75,0xcc,0x89,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75, + 0xcc,0x9b,0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x81,0x00,0x10,0x0a,0x01, +- 0xff,0x55,0xcc,0x9b,0xcc,0x80,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x80,0x00,0xd1, +- 0x14,0x10,0x0a,0x01,0xff,0x55,0xcc,0x9b,0xcc,0x89,0x00,0x01,0xff,0x75,0xcc,0x9b, +- 0xcc,0x89,0x00,0x10,0x0a,0x01,0xff,0x55,0xcc,0x9b,0xcc,0x83,0x00,0x01,0xff,0x75, +- 0xcc,0x9b,0xcc,0x83,0x00,0xd3,0x44,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x55, ++ 0xff,0x75,0xcc,0x9b,0xcc,0x80,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x80,0x00,0xd1, ++ 0x14,0x10,0x0a,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x89,0x00,0x01,0xff,0x75,0xcc,0x9b, ++ 0xcc,0x89,0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x83,0x00,0x01,0xff,0x75, ++ 0xcc,0x9b,0xcc,0x83,0x00,0xd3,0x44,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75, + 0xcc,0x9b,0xcc,0xa3,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0xa3,0x00,0x10,0x08,0x01, +- 0xff,0x59,0xcc,0x80,0x00,0x01,0xff,0x79,0xcc,0x80,0x00,0xd1,0x10,0x10,0x08,0x01, +- 0xff,0x59,0xcc,0xa3,0x00,0x01,0xff,0x79,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x59, +- 0xcc,0x89,0x00,0x01,0xff,0x79,0xcc,0x89,0x00,0x92,0x14,0x91,0x10,0x10,0x08,0x01, +- 0xff,0x59,0xcc,0x83,0x00,0x01,0xff,0x79,0xcc,0x83,0x00,0x0a,0x00,0x0a,0x00,0xe1, +- 0xc0,0x04,0xe0,0x80,0x02,0xcf,0x86,0xe5,0x2d,0x01,0xd4,0xa8,0xd3,0x54,0xd2,0x28, +- 0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x93,0x00,0x01,0xff,0xce,0xb1,0xcc, +- 0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce, +- 0xb1,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x93, +- 0xcc,0x81,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff, +- 0xce,0xb1,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82,0x00, +- 0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x91,0xcc,0x93,0x00,0x01,0xff,0xce, +- 0x91,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0x91,0xcc,0x93,0xcc,0x80,0x00,0x01, +- 0xff,0xce,0x91,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x91, +- 0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b, +- 0x01,0xff,0xce,0x91,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcd, +- 0x82,0x00,0xd3,0x42,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc,0x93, +- 0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb5,0xcc,0x93, +- 0xcc,0x80,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0xcc,0x80,0x00,0x91,0x16,0x10,0x0b, +- 0x01,0xff,0xce,0xb5,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0xcc, +- 0x81,0x00,0x00,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x95,0xcc,0x93, +- 0x00,0x01,0xff,0xce,0x95,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0x95,0xcc,0x93, +- 0xcc,0x80,0x00,0x01,0xff,0xce,0x95,0xcc,0x94,0xcc,0x80,0x00,0x91,0x16,0x10,0x0b, +- 0x01,0xff,0xce,0x95,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0x95,0xcc,0x94,0xcc, +- 0x81,0x00,0x00,0x00,0xd4,0xa8,0xd3,0x54,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff, +- 0xce,0xb7,0xcc,0x93,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff, +- 0xce,0xb7,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0x00, +- 0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce, +- 0xb7,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd,0x82, +- 0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x82,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09, +- 0x01,0xff,0xce,0x97,0xcc,0x93,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0x00,0x10,0x0b, +- 0x01,0xff,0xce,0x97,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcc, +- 0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x97,0xcc,0x93,0xcc,0x81,0x00,0x01, +- 0xff,0xce,0x97,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xce,0x97,0xcc,0x93, +- 0xcd,0x82,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcd,0x82,0x00,0xd3,0x54,0xd2,0x28, +- 0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x93,0x00,0x01,0xff,0xce,0xb9,0xcc, +- 0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce, +- 0xb9,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x93, +- 0xcc,0x81,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff, +- 0xce,0xb9,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcd,0x82,0x00, +- 0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x99,0xcc,0x93,0x00,0x01,0xff,0xce, +- 0x99,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0x99,0xcc,0x93,0xcc,0x80,0x00,0x01, +- 0xff,0xce,0x99,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x99, +- 0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0x99,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b, +- 0x01,0xff,0xce,0x99,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0x99,0xcc,0x94,0xcd, +- 0x82,0x00,0xcf,0x86,0xe5,0x13,0x01,0xd4,0x84,0xd3,0x42,0xd2,0x28,0xd1,0x12,0x10, +- 0x09,0x01,0xff,0xce,0xbf,0xcc,0x93,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94,0x00,0x10, +- 0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94, +- 0xcc,0x80,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc,0x81,0x00, +- 0x01,0xff,0xce,0xbf,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd2,0x28,0xd1,0x12,0x10, +- 0x09,0x01,0xff,0xce,0x9f,0xcc,0x93,0x00,0x01,0xff,0xce,0x9f,0xcc,0x94,0x00,0x10, +- 0x0b,0x01,0xff,0xce,0x9f,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0x9f,0xcc,0x94, +- 0xcc,0x80,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0x9f,0xcc,0x93,0xcc,0x81,0x00, +- 0x01,0xff,0xce,0x9f,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd3,0x54,0xd2,0x28,0xd1, +- 0x12,0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x93,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94, +- 0x00,0x10,0x0b,0x01,0xff,0xcf,0x85,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xcf,0x85, +- 0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x85,0xcc,0x93,0xcc, +- 0x81,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xcf, +- 0x85,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcd,0x82,0x00,0xd2, +- 0x1c,0xd1,0x0d,0x10,0x04,0x00,0x00,0x01,0xff,0xce,0xa5,0xcc,0x94,0x00,0x10,0x04, +- 0x00,0x00,0x01,0xff,0xce,0xa5,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x0f,0x10,0x04,0x00, +- 0x00,0x01,0xff,0xce,0xa5,0xcc,0x94,0xcc,0x81,0x00,0x10,0x04,0x00,0x00,0x01,0xff, +- 0xce,0xa5,0xcc,0x94,0xcd,0x82,0x00,0xd4,0xa8,0xd3,0x54,0xd2,0x28,0xd1,0x12,0x10, +- 0x09,0x01,0xff,0xcf,0x89,0xcc,0x93,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0x00,0x10, +- 0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94, +- 0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x81,0x00, +- 0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc, +- 0x93,0xcd,0x82,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd,0x82,0x00,0xd2,0x28,0xd1, +- 0x12,0x10,0x09,0x01,0xff,0xce,0xa9,0xcc,0x93,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94, +- 0x00,0x10,0x0b,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xa9, +- 0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcc, +- 0x81,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xce, +- 0xa9,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcd,0x82,0x00,0xd3, +- 0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x80,0x00,0x01,0xff, +- 0xce,0xb1,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc,0x80,0x00,0x01,0xff, +- 0xce,0xb5,0xcc,0x81,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc,0x80,0x00, +- 0x01,0xff,0xce,0xb7,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x80,0x00, +- 0x01,0xff,0xce,0xb9,0xcc,0x81,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce, +- 0xbf,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xcf, +- 0x85,0xcc,0x80,0x00,0x01,0xff,0xcf,0x85,0xcc,0x81,0x00,0x91,0x12,0x10,0x09,0x01, +- 0xff,0xcf,0x89,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc,0x81,0x00,0x00,0x00,0xe0, +- 0xe1,0x02,0xcf,0x86,0xe5,0x91,0x01,0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10, +- 0x0b,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94, +- 0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00, +- 0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01, +- 0xff,0xce,0xb1,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94, +- 0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82,0xcd, +- 0x85,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x30,0xd1, +- 0x16,0x10,0x0b,0x01,0xff,0xce,0x91,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xce,0x91, +- 0xcc,0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0x91,0xcc,0x93,0xcc,0x80,0xcd, +- 0x85,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10, +- 0x0d,0x01,0xff,0xce,0x91,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xce,0x91, +- 0xcc,0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0x91,0xcc,0x93,0xcd, +- 0x82,0xcd,0x85,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd3, +- 0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd,0x85,0x00, +- 0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc, +- 0x93,0xcc,0x80,0xcd,0x85,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0xcd,0x85, +- 0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00, +- 0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce, +- 0xb7,0xcc,0x93,0xcd,0x82,0xcd,0x85,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x82, +- 0xcd,0x85,0x00,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x97,0xcc,0x93,0xcd, +- 0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce, +- 0x97,0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcc,0x80, +- 0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0x97,0xcc,0x93,0xcc,0x81,0xcd, +- 0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01, +- 0xff,0xce,0x97,0xcc,0x93,0xcd,0x82,0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94, +- 0xcd,0x82,0xcd,0x85,0x00,0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01, +- 0xff,0xcf,0x89,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd,0x85, +- 0x00,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00,0x01,0xff, +- 0xcf,0x89,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xcf, +- 0x89,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x81, +- 0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x82,0xcd,0x85,0x00, +- 0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x30,0xd1,0x16,0x10, +- 0x0b,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94, +- 0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00, +- 0x01,0xff,0xce,0xa9,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01, +- 0xff,0xce,0xa9,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94, +- 0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcd,0x82,0xcd, +- 0x85,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd3,0x49,0xd2, +- 0x26,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x86,0x00,0x01,0xff,0xce,0xb1, +- 0xcc,0x84,0x00,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x80,0xcd,0x85,0x00,0x01,0xff, +- 0xce,0xb1,0xcd,0x85,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x81,0xcd, +- 0x85,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xb1,0xcd,0x82,0x00,0x01,0xff,0xce, +- 0xb1,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x91, +- 0xcc,0x86,0x00,0x01,0xff,0xce,0x91,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xce,0x91, +- 0xcc,0x80,0x00,0x01,0xff,0xce,0x91,0xcc,0x81,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff, +- 0xce,0x91,0xcd,0x85,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xce,0xb9,0x00,0x01,0x00, +- 0xcf,0x86,0xe5,0x16,0x01,0xd4,0x8f,0xd3,0x44,0xd2,0x21,0xd1,0x0d,0x10,0x04,0x01, +- 0x00,0x01,0xff,0xc2,0xa8,0xcd,0x82,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x80, +- 0xcd,0x85,0x00,0x01,0xff,0xce,0xb7,0xcd,0x85,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff, +- 0xce,0xb7,0xcc,0x81,0xcd,0x85,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xb7,0xcd, +- 0x82,0x00,0x01,0xff,0xce,0xb7,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x24,0xd1,0x12,0x10, +- 0x09,0x01,0xff,0xce,0x95,0xcc,0x80,0x00,0x01,0xff,0xce,0x95,0xcc,0x81,0x00,0x10, +- 0x09,0x01,0xff,0xce,0x97,0xcc,0x80,0x00,0x01,0xff,0xce,0x97,0xcc,0x81,0x00,0xd1, +- 0x13,0x10,0x09,0x01,0xff,0xce,0x97,0xcd,0x85,0x00,0x01,0xff,0xe1,0xbe,0xbf,0xcc, +- 0x80,0x00,0x10,0x0a,0x01,0xff,0xe1,0xbe,0xbf,0xcc,0x81,0x00,0x01,0xff,0xe1,0xbe, +- 0xbf,0xcd,0x82,0x00,0xd3,0x40,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb9, +- 0xcc,0x86,0x00,0x01,0xff,0xce,0xb9,0xcc,0x84,0x00,0x10,0x0b,0x01,0xff,0xce,0xb9, +- 0xcc,0x88,0xcc,0x80,0x00,0x01,0xff,0xce,0xb9,0xcc,0x88,0xcc,0x81,0x00,0x51,0x04, +- 0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcd,0x82,0x00,0x01,0xff,0xce,0xb9,0xcc, +- 0x88,0xcd,0x82,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x99,0xcc,0x86, +- 0x00,0x01,0xff,0xce,0x99,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xce,0x99,0xcc,0x80, +- 0x00,0x01,0xff,0xce,0x99,0xcc,0x81,0x00,0xd1,0x0e,0x10,0x04,0x00,0x00,0x01,0xff, +- 0xe1,0xbf,0xbe,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0xe1,0xbf,0xbe,0xcc,0x81,0x00, +- 0x01,0xff,0xe1,0xbf,0xbe,0xcd,0x82,0x00,0xd4,0x93,0xd3,0x4e,0xd2,0x28,0xd1,0x12, ++ 0xff,0x79,0xcc,0x80,0x00,0x01,0xff,0x79,0xcc,0x80,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x79,0xcc,0xa3,0x00,0x01,0xff,0x79,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x79, ++ 0xcc,0x89,0x00,0x01,0xff,0x79,0xcc,0x89,0x00,0xd2,0x1c,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x79,0xcc,0x83,0x00,0x01,0xff,0x79,0xcc,0x83,0x00,0x10,0x08,0x0a,0xff,0xe1, ++ 0xbb,0xbb,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xe1,0xbb,0xbd,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xe1,0xbb,0xbf,0x00,0x0a,0x00,0xe1,0xbf,0x02,0xe0,0xa1, ++ 0x01,0xcf,0x86,0xd5,0xc6,0xd4,0x6c,0xd3,0x18,0xe2,0x0e,0x59,0xe1,0xf7,0x58,0x10, ++ 0x09,0x01,0xff,0xce,0xb1,0xcc,0x93,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0x00,0xd2, ++ 0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x93,0x00,0x01,0xff,0xce,0xb1, ++ 0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff, ++ 0xce,0xb1,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc, ++ 0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82, ++ 0x00,0xd3,0x18,0xe2,0x4a,0x59,0xe1,0x33,0x59,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc, ++ 0x93,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01, ++ 0xff,0xce,0xb5,0xcc,0x93,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb5,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0xcc,0x80, ++ 0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0xb5,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff, ++ 0xce,0xb5,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd4,0x6c,0xd3,0x18,0xe2,0x74,0x59, ++ 0xe1,0x5d,0x59,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc,0x93,0x00,0x01,0xff,0xce,0xb7, ++ 0xcc,0x94,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc,0x93,0x00, ++ 0x01,0xff,0xce,0xb7,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc, ++ 0x80,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01, ++ 0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x81, ++ 0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb7, ++ 0xcc,0x94,0xcd,0x82,0x00,0xd3,0x18,0xe2,0xb0,0x59,0xe1,0x99,0x59,0x10,0x09,0x01, ++ 0xff,0xce,0xb9,0xcc,0x93,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0x00,0xd2,0x28,0xd1, ++ 0x12,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x93,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94, ++ 0x00,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xb9, ++ 0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x93,0xcc, ++ 0x81,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xce, ++ 0xb9,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcd,0x82,0x00,0xcf, ++ 0x86,0xd5,0xac,0xd4,0x5a,0xd3,0x18,0xe2,0xed,0x59,0xe1,0xd6,0x59,0x10,0x09,0x01, ++ 0xff,0xce,0xbf,0xcc,0x93,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94,0x00,0xd2,0x28,0xd1, ++ 0x12,0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x93,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94, ++ 0x00,0x10,0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf, ++ 0xcc,0x94,0xcc,0x80,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc, ++ 0x81,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd3,0x18,0xe2, ++ 0x17,0x5a,0xe1,0x00,0x5a,0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x93,0x00,0x01,0xff, ++ 0xcf,0x85,0xcc,0x94,0x00,0xd2,0x1c,0xd1,0x0d,0x10,0x04,0x00,0x00,0x01,0xff,0xcf, ++ 0x85,0xcc,0x94,0x00,0x10,0x04,0x00,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcc,0x80, ++ 0x00,0xd1,0x0f,0x10,0x04,0x00,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcc,0x81,0x00, ++ 0x10,0x04,0x00,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcd,0x82,0x00,0xe4,0xd3,0x5a, ++ 0xd3,0x18,0xe2,0x52,0x5a,0xe1,0x3b,0x5a,0x10,0x09,0x01,0xff,0xcf,0x89,0xcc,0x93, ++ 0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff, ++ 0xcf,0x89,0xcc,0x93,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff, ++ 0xcf,0x89,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x80,0x00, ++ 0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xcf, ++ 0x89,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x82, ++ 0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd,0x82,0x00,0xe0,0xd9,0x02,0xcf,0x86,0xe5, ++ 0x91,0x01,0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb1, ++ 0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xce,0xb9,0x00,0x10,0x0d, ++ 0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc, ++ 0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93, ++ 0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x81,0xce,0xb9,0x00, ++ 0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82,0xce,0xb9,0x00,0x01,0xff,0xce, ++ 0xb1,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff, ++ 0xce,0xb1,0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xce,0xb9,0x00, ++ 0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xce, ++ 0xb1,0xcc,0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0xb1, ++ 0xcc,0x93,0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x81,0xce, ++ 0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82,0xce,0xb9,0x00,0x01, ++ 0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00,0xd3,0x64,0xd2,0x30,0xd1,0x16, ++ 0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc, ++ 0x94,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x80,0xce,0xb9, ++ 0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d, ++ 0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc, ++ 0x94,0xcc,0x81,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd,0x82, ++ 0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x30, ++ 0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xce, ++ 0xb7,0xcc,0x94,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x80, ++ 0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a, ++ 0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xce, ++ 0xb7,0xcc,0x94,0xcc,0x81,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93, ++ 0xcd,0x82,0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00, ++ 0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93, ++ 0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff, ++ 0xcf,0x89,0xcc,0x93,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc, ++ 0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x81, ++ 0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x81,0xce,0xb9,0x00,0x10,0x0d, ++ 0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x82,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x94,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x89, ++ 0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xce,0xb9,0x00,0x10,0x0d, ++ 0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93, ++ 0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x81,0xce,0xb9,0x00, ++ 0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x82,0xce,0xb9,0x00,0x01,0xff,0xcf, ++ 0x89,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00,0xd3,0x49,0xd2,0x26,0xd1,0x12,0x10,0x09, ++ 0x01,0xff,0xce,0xb1,0xcc,0x86,0x00,0x01,0xff,0xce,0xb1,0xcc,0x84,0x00,0x10,0x0b, ++ 0x01,0xff,0xce,0xb1,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xce,0xb9,0x00, ++ 0xd1,0x0f,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x81,0xce,0xb9,0x00,0x00,0x00,0x10, ++ 0x09,0x01,0xff,0xce,0xb1,0xcd,0x82,0x00,0x01,0xff,0xce,0xb1,0xcd,0x82,0xce,0xb9, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x86,0x00,0x01,0xff, ++ 0xce,0xb1,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x80,0x00,0x01,0xff, ++ 0xce,0xb1,0xcc,0x81,0x00,0xe1,0xf3,0x5a,0x10,0x09,0x01,0xff,0xce,0xb1,0xce,0xb9, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0xbd,0xd4,0x7e,0xd3,0x44,0xd2,0x21,0xd1,0x0d,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0xc2,0xa8,0xcd,0x82,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7, ++ 0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xce,0xb9,0x00,0xd1,0x0f,0x10,0x0b, ++ 0x01,0xff,0xce,0xb7,0xcc,0x81,0xce,0xb9,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce, ++ 0xb7,0xcd,0x82,0x00,0x01,0xff,0xce,0xb7,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x24,0xd1, ++ 0x12,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc,0x80,0x00,0x01,0xff,0xce,0xb5,0xcc,0x81, ++ 0x00,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc,0x80,0x00,0x01,0xff,0xce,0xb7,0xcc,0x81, ++ 0x00,0xe1,0x02,0x5b,0x10,0x09,0x01,0xff,0xce,0xb7,0xce,0xb9,0x00,0x01,0xff,0xe1, ++ 0xbe,0xbf,0xcc,0x80,0x00,0xd3,0x18,0xe2,0x28,0x5b,0xe1,0x11,0x5b,0x10,0x09,0x01, ++ 0xff,0xce,0xb9,0xcc,0x86,0x00,0x01,0xff,0xce,0xb9,0xcc,0x84,0x00,0xe2,0x4c,0x5b, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x86,0x00,0x01,0xff,0xce,0xb9,0xcc, ++ 0x84,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x80,0x00,0x01,0xff,0xce,0xb9,0xcc, ++ 0x81,0x00,0xd4,0x51,0xd3,0x18,0xe2,0x6f,0x5b,0xe1,0x58,0x5b,0x10,0x09,0x01,0xff, ++ 0xcf,0x85,0xcc,0x86,0x00,0x01,0xff,0xcf,0x85,0xcc,0x84,0x00,0xd2,0x24,0xd1,0x12, + 0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x86,0x00,0x01,0xff,0xcf,0x85,0xcc,0x84,0x00, +- 0x10,0x0b,0x01,0xff,0xcf,0x85,0xcc,0x88,0xcc,0x80,0x00,0x01,0xff,0xcf,0x85,0xcc, +- 0x88,0xcc,0x81,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xcf,0x81,0xcc,0x93,0x00,0x01, +- 0xff,0xcf,0x81,0xcc,0x94,0x00,0x10,0x09,0x01,0xff,0xcf,0x85,0xcd,0x82,0x00,0x01, +- 0xff,0xcf,0x85,0xcc,0x88,0xcd,0x82,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff, +- 0xce,0xa5,0xcc,0x86,0x00,0x01,0xff,0xce,0xa5,0xcc,0x84,0x00,0x10,0x09,0x01,0xff, +- 0xce,0xa5,0xcc,0x80,0x00,0x01,0xff,0xce,0xa5,0xcc,0x81,0x00,0xd1,0x12,0x10,0x09, +- 0x01,0xff,0xce,0xa1,0xcc,0x94,0x00,0x01,0xff,0xc2,0xa8,0xcc,0x80,0x00,0x10,0x09, +- 0x01,0xff,0xc2,0xa8,0xcc,0x81,0x00,0x01,0xff,0x60,0x00,0xd3,0x3b,0xd2,0x18,0x51, +- 0x04,0x00,0x00,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x80,0xcd,0x85,0x00,0x01,0xff, +- 0xcf,0x89,0xcd,0x85,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x81,0xcd, +- 0x85,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xcf,0x89,0xcd,0x82,0x00,0x01,0xff,0xcf, +- 0x89,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x9f, +- 0xcc,0x80,0x00,0x01,0xff,0xce,0x9f,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xa9, +- 0xcc,0x80,0x00,0x01,0xff,0xce,0xa9,0xcc,0x81,0x00,0xd1,0x10,0x10,0x09,0x01,0xff, +- 0xce,0xa9,0xcd,0x85,0x00,0x01,0xff,0xc2,0xb4,0x00,0x10,0x04,0x01,0x00,0x00,0x00, +- 0xe0,0x62,0x0c,0xcf,0x86,0xe5,0x9f,0x08,0xe4,0xf8,0x05,0xe3,0xdb,0x02,0xe2,0xa1, +- 0x01,0xd1,0xb4,0xd0,0x3a,0xcf,0x86,0xd5,0x20,0x94,0x1c,0x93,0x18,0x92,0x14,0x91, +- 0x10,0x10,0x08,0x01,0xff,0xe2,0x80,0x82,0x00,0x01,0xff,0xe2,0x80,0x83,0x00,0x01, +- 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x94,0x14,0x53,0x04,0x01,0x00,0x52,0x04,0x01, +- 0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x04,0x00,0x01,0x00,0xcf,0x86,0xd5, +- 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0xd3,0x74,0xd2,0x6e,0xd1,0x06,0xcf,0x06,0x04,0x00,0xd0,0x3e,0xcf,0x86,0xd5,0x18, +- 0x94,0x14,0x53,0x04,0x04,0x00,0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00, +- 0x00,0x00,0x00,0x00,0x04,0x00,0xd4,0x10,0x93,0x0c,0x92,0x08,0x11,0x04,0x04,0x00, +- 0x06,0x00,0x04,0x00,0x04,0x00,0x93,0x10,0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04, +- 0x06,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0xcf,0x86,0x95,0x24,0x94,0x20,0x93,0x1c, +- 0xd2,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x06,0x00,0x04,0x00,0xd1,0x08,0x10,0x04, +- 0x04,0x00,0x06,0x00,0x10,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x0b,0x00,0x0b,0x00, +- 0xcf,0x06,0x0a,0x00,0xd2,0x84,0xd1,0x4c,0xd0,0x16,0xcf,0x86,0x55,0x04,0x0a,0x00, +- 0x94,0x0c,0x53,0x04,0x0a,0x00,0x12,0x04,0x0a,0x00,0x00,0x00,0x00,0x00,0xcf,0x86, +- 0x55,0x04,0x0a,0x00,0xd4,0x1c,0xd3,0x0c,0x92,0x08,0x11,0x04,0x0c,0x00,0x0a,0x00, +- 0x0a,0x00,0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x00,0x0a,0xe6, +- 0xd3,0x08,0x12,0x04,0x0a,0x00,0x0d,0xe6,0x52,0x04,0x0d,0xe6,0x11,0x04,0x0a,0xe6, +- 0x0a,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x0a,0x00,0x53,0x04,0x0a,0x00, +- 0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x11,0xe6,0x0d,0xe6,0x0b,0x00, +- 0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04,0x0b,0x00,0x93,0x0c,0x92,0x08,0x11,0x04, +- 0x0b,0xe6,0x0b,0x00,0x0b,0x00,0x00,0x00,0xd1,0x40,0xd0,0x3a,0xcf,0x86,0xd5,0x24, +- 0x54,0x04,0x08,0x00,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04, +- 0x08,0x00,0x09,0x00,0x92,0x0c,0x51,0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x0a,0x00, +- 0x0a,0x00,0x94,0x10,0x93,0x0c,0x92,0x08,0x11,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00, +- 0x0a,0x00,0x0a,0x00,0xcf,0x06,0x0a,0x00,0xd0,0x5e,0xcf,0x86,0xd5,0x28,0xd4,0x18, +- 0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00,0xd1,0x08,0x10,0x04,0x0a,0x00,0x0c,0x00, +- 0x10,0x04,0x0c,0x00,0x11,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x0c,0x00,0x0d,0x00, +- 0x10,0x00,0x10,0x00,0xd4,0x1c,0x53,0x04,0x0c,0x00,0xd2,0x0c,0x51,0x04,0x0c,0x00, +- 0x10,0x04,0x0d,0x00,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x12,0x00,0x14,0x00, +- 0xd3,0x0c,0x92,0x08,0x11,0x04,0x10,0x00,0x11,0x00,0x11,0x00,0x92,0x08,0x11,0x04, +- 0x14,0x00,0x15,0x00,0x15,0x00,0xcf,0x86,0xd5,0x1c,0x94,0x18,0x93,0x14,0xd2,0x08, +- 0x11,0x04,0x00,0x00,0x15,0x00,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00,0x00, +- 0x00,0x00,0x00,0x00,0x54,0x04,0x00,0x00,0xd3,0x10,0x52,0x04,0x00,0x00,0x51,0x04, +- 0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x92,0x0c,0x51,0x04,0x0d,0x00,0x10,0x04, +- 0x0c,0x00,0x0a,0x00,0x0a,0x00,0xe4,0xf2,0x02,0xe3,0x65,0x01,0xd2,0x98,0xd1,0x48, +- 0xd0,0x36,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x52,0x04,0x08,0x00,0x51,0x04, +- 0x08,0x00,0x10,0x04,0x08,0x09,0x08,0x00,0x08,0x00,0x08,0x00,0xd4,0x0c,0x53,0x04, +- 0x08,0x00,0x12,0x04,0x08,0x00,0x00,0x00,0x53,0x04,0x0b,0x00,0x92,0x08,0x11,0x04, +- 0x0b,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x55,0x04,0x09,0x00,0x54,0x04,0x09,0x00, +- 0x13,0x04,0x09,0x00,0x00,0x00,0xd0,0x06,0xcf,0x06,0x0a,0x00,0xcf,0x86,0xd5,0x2c, +- 0xd4,0x1c,0xd3,0x10,0x52,0x04,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a,0x09,0x12,0x00, +- 0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x0a,0x00,0x53,0x04,0x0a,0x00, +- 0x92,0x08,0x11,0x04,0x0a,0x00,0x00,0x00,0x00,0x00,0x54,0x04,0x0b,0xe6,0xd3,0x0c, +- 0x92,0x08,0x11,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0x00,0x52,0x04,0x0b,0x00,0x11,0x04, +- 0x11,0x00,0x14,0x00,0xd1,0x60,0xd0,0x22,0xcf,0x86,0x55,0x04,0x0a,0x00,0x94,0x18, +- 0x53,0x04,0x0a,0x00,0xd2,0x0c,0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x00,0x0a,0xdc, +- 0x11,0x04,0x0a,0xdc,0x0a,0x00,0x0a,0x00,0xcf,0x86,0xd5,0x24,0x54,0x04,0x0a,0x00, +- 0xd3,0x10,0x92,0x0c,0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x00,0x0a,0x09,0x00,0x00, +- 0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0a,0x00,0x54,0x04, +- 0x0b,0x00,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x00, +- 0x00,0x00,0x00,0x00,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04,0x0b,0x00, +- 0x93,0x10,0x92,0x0c,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x0b,0x07,0x0b,0x00, +- 0x0b,0x00,0xcf,0x86,0xd5,0x34,0xd4,0x20,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04, +- 0x0b,0x09,0x0b,0x00,0x0b,0x00,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00, +- 0x10,0x04,0x00,0x00,0x0b,0x00,0x53,0x04,0x0b,0x00,0xd2,0x08,0x11,0x04,0x0b,0x00, +- 0x00,0x00,0x11,0x04,0x00,0x00,0x0b,0x00,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00, +- 0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0xd2,0xd0, +- 0xd1,0x50,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x0a,0x00,0x54,0x04,0x0a,0x00,0x93,0x10, +- 0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x00,0x00,0x00,0x00,0x00, +- 0xcf,0x86,0xd5,0x20,0xd4,0x10,0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00,0x11,0x04, +- 0x0a,0x00,0x00,0x00,0x53,0x04,0x0a,0x00,0x92,0x08,0x11,0x04,0x0a,0x00,0x00,0x00, +- 0x0a,0x00,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00,0x12,0x04,0x0b,0x00,0x10,0x00, +- 0xd0,0x3a,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04,0x0b,0x00,0xd3,0x1c,0xd2,0x0c, +- 0x91,0x08,0x10,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0xe6,0xd1,0x08,0x10,0x04,0x0b,0xdc, +- 0x0b,0x00,0x10,0x04,0x0b,0x00,0x0b,0xe6,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0b,0xe6, +- 0x0b,0x00,0x0b,0x00,0x11,0x04,0x0b,0x00,0x0b,0xe6,0xcf,0x86,0xd5,0x2c,0xd4,0x18, +- 0x93,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x0b,0x00,0x0b,0xe6,0x10,0x04,0x0b,0x00, +- 0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x00,0x00,0x92,0x0c,0x51,0x04,0x00,0x00, +- 0x10,0x04,0x00,0x00,0x0b,0x00,0x0b,0x00,0x54,0x04,0x0d,0x00,0x93,0x10,0x52,0x04, +- 0x0d,0x00,0x51,0x04,0x0d,0x00,0x10,0x04,0x0d,0x09,0x00,0x00,0x00,0x00,0xd1,0x8c, +- 0xd0,0x72,0xcf,0x86,0xd5,0x4c,0xd4,0x30,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04, +- 0x00,0x00,0x0c,0x00,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00, ++ 0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x80,0x00,0x01,0xff,0xcf,0x85,0xcc,0x81,0x00, ++ 0xe1,0x8f,0x5b,0x10,0x09,0x01,0xff,0xcf,0x81,0xcc,0x94,0x00,0x01,0xff,0xc2,0xa8, ++ 0xcc,0x80,0x00,0xd3,0x3b,0xd2,0x18,0x51,0x04,0x00,0x00,0x10,0x0b,0x01,0xff,0xcf, ++ 0x89,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xce,0xb9,0x00,0xd1,0x0f,0x10, ++ 0x0b,0x01,0xff,0xcf,0x89,0xcc,0x81,0xce,0xb9,0x00,0x00,0x00,0x10,0x09,0x01,0xff, ++ 0xcf,0x89,0xcd,0x82,0x00,0x01,0xff,0xcf,0x89,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x24, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf,0xcc, ++ 0x81,0x00,0x10,0x09,0x01,0xff,0xcf,0x89,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x81,0x00,0xe1,0x99,0x5b,0x10,0x09,0x01,0xff,0xcf,0x89,0xce,0xb9,0x00,0x01,0xff, ++ 0xc2,0xb4,0x00,0xe0,0x0c,0x68,0xcf,0x86,0xe5,0x23,0x02,0xe4,0x25,0x01,0xe3,0x85, ++ 0x5e,0xd2,0x2a,0xe1,0x5f,0x5c,0xe0,0xdd,0x5b,0xcf,0x86,0xe5,0xbb,0x5b,0x94,0x1b, ++ 0xe3,0xa4,0x5b,0x92,0x14,0x91,0x10,0x10,0x08,0x01,0xff,0xe2,0x80,0x82,0x00,0x01, ++ 0xff,0xe2,0x80,0x83,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd1,0xd6,0xd0,0x46,0xcf, ++ 0x86,0x55,0x04,0x01,0x00,0xd4,0x29,0xd3,0x13,0x52,0x04,0x01,0x00,0x51,0x04,0x01, ++ 0x00,0x10,0x07,0x01,0xff,0xcf,0x89,0x00,0x01,0x00,0x92,0x12,0x51,0x04,0x01,0x00, ++ 0x10,0x06,0x01,0xff,0x6b,0x00,0x01,0xff,0x61,0xcc,0x8a,0x00,0x01,0x00,0xe3,0x25, ++ 0x5d,0x92,0x10,0x51,0x04,0x01,0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0x8e,0x00,0x01, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0x0a,0xe4,0x42,0x5d,0x63,0x2d,0x5d,0x06,0x00,0x94, ++ 0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x85,0xb0,0x00,0x01, ++ 0xff,0xe2,0x85,0xb1,0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0xb2,0x00,0x01,0xff,0xe2, ++ 0x85,0xb3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x85,0xb4,0x00,0x01,0xff,0xe2, ++ 0x85,0xb5,0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0xb6,0x00,0x01,0xff,0xe2,0x85,0xb7, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x85,0xb8,0x00,0x01,0xff,0xe2, ++ 0x85,0xb9,0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0xba,0x00,0x01,0xff,0xe2,0x85,0xbb, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x85,0xbc,0x00,0x01,0xff,0xe2,0x85,0xbd, ++ 0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0xbe,0x00,0x01,0xff,0xe2,0x85,0xbf,0x00,0x01, ++ 0x00,0xe0,0x34,0x5d,0xcf,0x86,0xe5,0x13,0x5d,0xe4,0xf2,0x5c,0xe3,0xe1,0x5c,0xe2, ++ 0xd4,0x5c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x04,0xff,0xe2,0x86,0x84,0x00, ++ 0xe3,0x23,0x61,0xe2,0xf0,0x60,0xd1,0x0c,0xe0,0x9d,0x60,0xcf,0x86,0x65,0x7e,0x60, ++ 0x01,0x00,0xd0,0x62,0xcf,0x86,0x55,0x04,0x01,0x00,0x54,0x04,0x01,0x00,0xd3,0x18, ++ 0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x08,0x01,0xff,0xe2,0x93,0x90,0x00, ++ 0x01,0xff,0xe2,0x93,0x91,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x93, ++ 0x92,0x00,0x01,0xff,0xe2,0x93,0x93,0x00,0x10,0x08,0x01,0xff,0xe2,0x93,0x94,0x00, ++ 0x01,0xff,0xe2,0x93,0x95,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x93,0x96,0x00, ++ 0x01,0xff,0xe2,0x93,0x97,0x00,0x10,0x08,0x01,0xff,0xe2,0x93,0x98,0x00,0x01,0xff, ++ 0xe2,0x93,0x99,0x00,0xcf,0x86,0xe5,0x57,0x60,0x94,0x80,0xd3,0x40,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe2,0x93,0x9a,0x00,0x01,0xff,0xe2,0x93,0x9b,0x00,0x10, ++ 0x08,0x01,0xff,0xe2,0x93,0x9c,0x00,0x01,0xff,0xe2,0x93,0x9d,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe2,0x93,0x9e,0x00,0x01,0xff,0xe2,0x93,0x9f,0x00,0x10,0x08,0x01, ++ 0xff,0xe2,0x93,0xa0,0x00,0x01,0xff,0xe2,0x93,0xa1,0x00,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe2,0x93,0xa2,0x00,0x01,0xff,0xe2,0x93,0xa3,0x00,0x10,0x08,0x01, ++ 0xff,0xe2,0x93,0xa4,0x00,0x01,0xff,0xe2,0x93,0xa5,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe2,0x93,0xa6,0x00,0x01,0xff,0xe2,0x93,0xa7,0x00,0x10,0x08,0x01,0xff,0xe2, ++ 0x93,0xa8,0x00,0x01,0xff,0xe2,0x93,0xa9,0x00,0x01,0x00,0xd4,0x0c,0xe3,0x33,0x62, ++ 0xe2,0x2c,0x62,0xcf,0x06,0x04,0x00,0xe3,0x0c,0x65,0xe2,0xff,0x63,0xe1,0x2e,0x02, ++ 0xe0,0x84,0x01,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x08,0xff,0xe2,0xb0,0xb0,0x00,0x08,0xff,0xe2,0xb0,0xb1,0x00,0x10,0x08, ++ 0x08,0xff,0xe2,0xb0,0xb2,0x00,0x08,0xff,0xe2,0xb0,0xb3,0x00,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe2,0xb0,0xb4,0x00,0x08,0xff,0xe2,0xb0,0xb5,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb0,0xb6,0x00,0x08,0xff,0xe2,0xb0,0xb7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe2,0xb0,0xb8,0x00,0x08,0xff,0xe2,0xb0,0xb9,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb0,0xba,0x00,0x08,0xff,0xe2,0xb0,0xbb,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb0,0xbc,0x00,0x08,0xff,0xe2,0xb0,0xbd,0x00,0x10,0x08,0x08,0xff,0xe2,0xb0, ++ 0xbe,0x00,0x08,0xff,0xe2,0xb0,0xbf,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe2,0xb1,0x80,0x00,0x08,0xff,0xe2,0xb1,0x81,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x82,0x00,0x08,0xff,0xe2,0xb1,0x83,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x84,0x00,0x08,0xff,0xe2,0xb1,0x85,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x86,0x00,0x08,0xff,0xe2,0xb1,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x88,0x00,0x08,0xff,0xe2,0xb1,0x89,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x8a,0x00,0x08,0xff,0xe2,0xb1,0x8b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x8c,0x00,0x08,0xff,0xe2,0xb1,0x8d,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1,0x8e,0x00, ++ 0x08,0xff,0xe2,0xb1,0x8f,0x00,0x94,0x7c,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe2,0xb1,0x90,0x00,0x08,0xff,0xe2,0xb1,0x91,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x92,0x00,0x08,0xff,0xe2,0xb1,0x93,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x94,0x00,0x08,0xff,0xe2,0xb1,0x95,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x96,0x00,0x08,0xff,0xe2,0xb1,0x97,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x98,0x00,0x08,0xff,0xe2,0xb1,0x99,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x9a,0x00,0x08,0xff,0xe2,0xb1,0x9b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x9c,0x00,0x08,0xff,0xe2,0xb1,0x9d,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1,0x9e,0x00, ++ 0x00,0x00,0x08,0x00,0xcf,0x86,0xd5,0x07,0x64,0xef,0x61,0x08,0x00,0xd4,0x63,0xd3, ++ 0x32,0xd2,0x1b,0xd1,0x0c,0x10,0x08,0x09,0xff,0xe2,0xb1,0xa1,0x00,0x09,0x00,0x10, ++ 0x07,0x09,0xff,0xc9,0xab,0x00,0x09,0xff,0xe1,0xb5,0xbd,0x00,0xd1,0x0b,0x10,0x07, ++ 0x09,0xff,0xc9,0xbd,0x00,0x09,0x00,0x10,0x04,0x09,0x00,0x09,0xff,0xe2,0xb1,0xa8, ++ 0x00,0xd2,0x18,0xd1,0x0c,0x10,0x04,0x09,0x00,0x09,0xff,0xe2,0xb1,0xaa,0x00,0x10, ++ 0x04,0x09,0x00,0x09,0xff,0xe2,0xb1,0xac,0x00,0xd1,0x0b,0x10,0x04,0x09,0x00,0x0a, ++ 0xff,0xc9,0x91,0x00,0x10,0x07,0x0a,0xff,0xc9,0xb1,0x00,0x0a,0xff,0xc9,0x90,0x00, ++ 0xd3,0x27,0xd2,0x17,0xd1,0x0b,0x10,0x07,0x0b,0xff,0xc9,0x92,0x00,0x0a,0x00,0x10, ++ 0x08,0x0a,0xff,0xe2,0xb1,0xb3,0x00,0x0a,0x00,0x91,0x0c,0x10,0x04,0x09,0x00,0x09, ++ 0xff,0xe2,0xb1,0xb6,0x00,0x09,0x00,0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10, ++ 0x07,0x0b,0xff,0xc8,0xbf,0x00,0x0b,0xff,0xc9,0x80,0x00,0xe0,0x83,0x01,0xcf,0x86, ++ 0xd5,0xc0,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2, ++ 0x81,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x83,0x00,0x08,0x00,0xd1,0x0c, ++ 0x10,0x08,0x08,0xff,0xe2,0xb2,0x85,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2, ++ 0x87,0x00,0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0x89,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x8b,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb2,0x8d,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x8f,0x00, ++ 0x08,0x00,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0x91,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x93,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb2,0x95,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x97,0x00, ++ 0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0x99,0x00,0x08,0x00, ++ 0x10,0x08,0x08,0xff,0xe2,0xb2,0x9b,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff, ++ 0xe2,0xb2,0x9d,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x9f,0x00,0x08,0x00, ++ 0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0xa1,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xa3,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb2,0xa5,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xa7,0x00, ++ 0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0xa9,0x00,0x08,0x00, ++ 0x10,0x08,0x08,0xff,0xe2,0xb2,0xab,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff, ++ 0xe2,0xb2,0xad,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xaf,0x00,0x08,0x00, ++ 0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0xb1,0x00,0x08,0x00, ++ 0x10,0x08,0x08,0xff,0xe2,0xb2,0xb3,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff, ++ 0xe2,0xb2,0xb5,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xb7,0x00,0x08,0x00, ++ 0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0xb9,0x00,0x08,0x00,0x10,0x08, ++ 0x08,0xff,0xe2,0xb2,0xbb,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2, ++ 0xbd,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xbf,0x00,0x08,0x00,0xcf,0x86, ++ 0xd5,0xc0,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3, ++ 0x81,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x83,0x00,0x08,0x00,0xd1,0x0c, ++ 0x10,0x08,0x08,0xff,0xe2,0xb3,0x85,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3, ++ 0x87,0x00,0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3,0x89,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x8b,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb3,0x8d,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x8f,0x00, ++ 0x08,0x00,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3,0x91,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x93,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb3,0x95,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x97,0x00, ++ 0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3,0x99,0x00,0x08,0x00, ++ 0x10,0x08,0x08,0xff,0xe2,0xb3,0x9b,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff, ++ 0xe2,0xb3,0x9d,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x9f,0x00,0x08,0x00, ++ 0xd4,0x3b,0xd3,0x1c,0x92,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3,0xa1,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0xa3,0x00,0x08,0x00,0x08,0x00,0xd2,0x10, ++ 0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x0b,0xff,0xe2,0xb3,0xac,0x00,0xe1,0x3b, ++ 0x5f,0x10,0x04,0x0b,0x00,0x0b,0xff,0xe2,0xb3,0xae,0x00,0xe3,0x40,0x5f,0x92,0x10, ++ 0x51,0x04,0x0b,0xe6,0x10,0x08,0x0d,0xff,0xe2,0xb3,0xb3,0x00,0x0d,0x00,0x00,0x00, ++ 0xe2,0x98,0x08,0xd1,0x0b,0xe0,0x11,0x67,0xcf,0x86,0xcf,0x06,0x01,0x00,0xe0,0x65, ++ 0x6c,0xcf,0x86,0xe5,0xa7,0x05,0xd4,0x06,0xcf,0x06,0x04,0x00,0xd3,0x0c,0xe2,0xf8, ++ 0x67,0xe1,0x8f,0x67,0xcf,0x06,0x04,0x00,0xe2,0xdb,0x01,0xe1,0x26,0x01,0xd0,0x09, ++ 0xcf,0x86,0x65,0xf4,0x67,0x0a,0x00,0xcf,0x86,0xd5,0xc0,0xd4,0x60,0xd3,0x30,0xd2, ++ 0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x81,0x00,0x0a,0x00,0x10,0x08,0x0a, ++ 0xff,0xea,0x99,0x83,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x85, ++ 0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0x87,0x00,0x0a,0x00,0xd2,0x18,0xd1, ++ 0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x89,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea, ++ 0x99,0x8b,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x8d,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0x8f,0x00,0x0a,0x00,0xd3,0x30,0xd2,0x18,0xd1, ++ 0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x91,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea, ++ 0x99,0x93,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x95,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0x97,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x99,0x99,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0x9b, ++ 0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x9d,0x00,0x0a,0x00,0x10, ++ 0x08,0x0a,0xff,0xea,0x99,0x9f,0x00,0x0a,0x00,0xe4,0x5d,0x67,0xd3,0x30,0xd2,0x18, ++ 0xd1,0x0c,0x10,0x08,0x0c,0xff,0xea,0x99,0xa1,0x00,0x0c,0x00,0x10,0x08,0x0a,0xff, ++ 0xea,0x99,0xa3,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0xa5,0x00, ++ 0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0xa7,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c, ++ 0x10,0x08,0x0a,0xff,0xea,0x99,0xa9,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x99, ++ 0xab,0x00,0x0a,0x00,0xe1,0x0c,0x67,0x10,0x08,0x0a,0xff,0xea,0x99,0xad,0x00,0x0a, ++ 0x00,0xe0,0x35,0x67,0xcf,0x86,0x95,0xab,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c, ++ 0x10,0x08,0x0a,0xff,0xea,0x9a,0x81,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9a, ++ 0x83,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9a,0x85,0x00,0x0a,0x00, ++ 0x10,0x08,0x0a,0xff,0xea,0x9a,0x87,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08, ++ 0x0a,0xff,0xea,0x9a,0x89,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9a,0x8b,0x00, ++ 0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9a,0x8d,0x00,0x0a,0x00,0x10,0x08, ++ 0x0a,0xff,0xea,0x9a,0x8f,0x00,0x0a,0x00,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08, ++ 0x0a,0xff,0xea,0x9a,0x91,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9a,0x93,0x00, ++ 0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9a,0x95,0x00,0x0a,0x00,0x10,0x08, ++ 0x0a,0xff,0xea,0x9a,0x97,0x00,0x0a,0x00,0xe2,0x92,0x66,0xd1,0x0c,0x10,0x08,0x10, ++ 0xff,0xea,0x9a,0x99,0x00,0x10,0x00,0x10,0x08,0x10,0xff,0xea,0x9a,0x9b,0x00,0x10, ++ 0x00,0x0b,0x00,0xe1,0x10,0x02,0xd0,0xb9,0xcf,0x86,0xd5,0x07,0x64,0x9e,0x66,0x08, ++ 0x00,0xd4,0x58,0xd3,0x28,0xd2,0x10,0x51,0x04,0x09,0x00,0x10,0x08,0x0a,0xff,0xea, ++ 0x9c,0xa3,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9c,0xa5,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xa7,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x9c,0xa9,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xab, ++ 0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9c,0xad,0x00,0x0a,0x00,0x10, ++ 0x08,0x0a,0xff,0xea,0x9c,0xaf,0x00,0x0a,0x00,0xd3,0x28,0xd2,0x10,0x51,0x04,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xb3,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a, ++ 0xff,0xea,0x9c,0xb5,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xb7,0x00,0x0a, ++ 0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9c,0xb9,0x00,0x0a,0x00,0x10, ++ 0x08,0x0a,0xff,0xea,0x9c,0xbb,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea, ++ 0x9c,0xbd,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xbf,0x00,0x0a,0x00,0xcf, ++ 0x86,0xd5,0xc0,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea, ++ 0x9d,0x81,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x83,0x00,0x0a,0x00,0xd1, ++ 0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0x85,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea, ++ 0x9d,0x87,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0x89, ++ 0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x8b,0x00,0x0a,0x00,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x9d,0x8d,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x8f, ++ 0x00,0x0a,0x00,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0x91, ++ 0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x93,0x00,0x0a,0x00,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x9d,0x95,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x97, ++ 0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0x99,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x9b,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a, ++ 0xff,0xea,0x9d,0x9d,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x9f,0x00,0x0a, ++ 0x00,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0xa1, ++ 0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xa3,0x00,0x0a,0x00,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x9d,0xa5,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xa7, ++ 0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0xa9,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xab,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a, ++ 0xff,0xea,0x9d,0xad,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xaf,0x00,0x0a, ++ 0x00,0x53,0x04,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x04,0x0a,0x00,0x0a,0xff,0xea, ++ 0x9d,0xba,0x00,0x10,0x04,0x0a,0x00,0x0a,0xff,0xea,0x9d,0xbc,0x00,0xd1,0x0c,0x10, ++ 0x04,0x0a,0x00,0x0a,0xff,0xe1,0xb5,0xb9,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xbf, ++ 0x00,0x0a,0x00,0xe0,0x71,0x01,0xcf,0x86,0xd5,0xa6,0xd4,0x4e,0xd3,0x30,0xd2,0x18, ++ 0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9e,0x81,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff, ++ 0xea,0x9e,0x83,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9e,0x85,0x00, ++ 0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9e,0x87,0x00,0x0a,0x00,0xd2,0x10,0x51,0x04, ++ 0x0a,0x00,0x10,0x04,0x0a,0x00,0x0a,0xff,0xea,0x9e,0x8c,0x00,0xe1,0x9a,0x64,0x10, ++ 0x04,0x0a,0x00,0x0c,0xff,0xc9,0xa5,0x00,0xd3,0x28,0xd2,0x18,0xd1,0x0c,0x10,0x08, ++ 0x0c,0xff,0xea,0x9e,0x91,0x00,0x0c,0x00,0x10,0x08,0x0d,0xff,0xea,0x9e,0x93,0x00, ++ 0x0d,0x00,0x51,0x04,0x10,0x00,0x10,0x08,0x10,0xff,0xea,0x9e,0x97,0x00,0x10,0x00, ++ 0xd2,0x18,0xd1,0x0c,0x10,0x08,0x10,0xff,0xea,0x9e,0x99,0x00,0x10,0x00,0x10,0x08, ++ 0x10,0xff,0xea,0x9e,0x9b,0x00,0x10,0x00,0xd1,0x0c,0x10,0x08,0x10,0xff,0xea,0x9e, ++ 0x9d,0x00,0x10,0x00,0x10,0x08,0x10,0xff,0xea,0x9e,0x9f,0x00,0x10,0x00,0xd4,0x63, ++ 0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0c,0xff,0xea,0x9e,0xa1,0x00,0x0c,0x00, ++ 0x10,0x08,0x0c,0xff,0xea,0x9e,0xa3,0x00,0x0c,0x00,0xd1,0x0c,0x10,0x08,0x0c,0xff, ++ 0xea,0x9e,0xa5,0x00,0x0c,0x00,0x10,0x08,0x0c,0xff,0xea,0x9e,0xa7,0x00,0x0c,0x00, ++ 0xd2,0x1a,0xd1,0x0c,0x10,0x08,0x0c,0xff,0xea,0x9e,0xa9,0x00,0x0c,0x00,0x10,0x07, ++ 0x0d,0xff,0xc9,0xa6,0x00,0x10,0xff,0xc9,0x9c,0x00,0xd1,0x0e,0x10,0x07,0x10,0xff, ++ 0xc9,0xa1,0x00,0x10,0xff,0xc9,0xac,0x00,0x10,0x07,0x12,0xff,0xc9,0xaa,0x00,0x14, ++ 0x00,0xd3,0x35,0xd2,0x1d,0xd1,0x0e,0x10,0x07,0x10,0xff,0xca,0x9e,0x00,0x10,0xff, ++ 0xca,0x87,0x00,0x10,0x07,0x11,0xff,0xca,0x9d,0x00,0x11,0xff,0xea,0xad,0x93,0x00, ++ 0xd1,0x0c,0x10,0x08,0x11,0xff,0xea,0x9e,0xb5,0x00,0x11,0x00,0x10,0x08,0x11,0xff, ++ 0xea,0x9e,0xb7,0x00,0x11,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x14,0xff,0xea,0x9e, ++ 0xb9,0x00,0x14,0x00,0x10,0x08,0x15,0xff,0xea,0x9e,0xbb,0x00,0x15,0x00,0xd1,0x0c, ++ 0x10,0x08,0x15,0xff,0xea,0x9e,0xbd,0x00,0x15,0x00,0x10,0x08,0x15,0xff,0xea,0x9e, ++ 0xbf,0x00,0x15,0x00,0xcf,0x86,0xe5,0xd4,0x63,0x94,0x2f,0x93,0x2b,0xd2,0x10,0x51, ++ 0x04,0x00,0x00,0x10,0x08,0x15,0xff,0xea,0x9f,0x83,0x00,0x15,0x00,0xd1,0x0f,0x10, ++ 0x08,0x15,0xff,0xea,0x9e,0x94,0x00,0x15,0xff,0xca,0x82,0x00,0x10,0x08,0x15,0xff, ++ 0xe1,0xb6,0x8e,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xe4,0xb4,0x66,0xd3,0x1d,0xe2, ++ 0x5b,0x64,0xe1,0x0a,0x64,0xe0,0xf7,0x63,0xcf,0x86,0xe5,0xd8,0x63,0x94,0x0b,0x93, ++ 0x07,0x62,0xc3,0x63,0x08,0x00,0x08,0x00,0x08,0x00,0xd2,0x0f,0xe1,0x5a,0x65,0xe0, ++ 0x27,0x65,0xcf,0x86,0x65,0x0c,0x65,0x0a,0x00,0xd1,0xab,0xd0,0x1a,0xcf,0x86,0xe5, ++ 0x17,0x66,0xe4,0xfa,0x65,0xe3,0xe1,0x65,0xe2,0xd4,0x65,0x91,0x08,0x10,0x04,0x00, ++ 0x00,0x0c,0x00,0x0c,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0xd4,0x0b,0x93,0x07,0x62, ++ 0x27,0x66,0x11,0x00,0x00,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x11,0xff, ++ 0xe1,0x8e,0xa0,0x00,0x11,0xff,0xe1,0x8e,0xa1,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e, ++ 0xa2,0x00,0x11,0xff,0xe1,0x8e,0xa3,0x00,0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e, ++ 0xa4,0x00,0x11,0xff,0xe1,0x8e,0xa5,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e,0xa6,0x00, ++ 0x11,0xff,0xe1,0x8e,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e, ++ 0xa8,0x00,0x11,0xff,0xe1,0x8e,0xa9,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e,0xaa,0x00, ++ 0x11,0xff,0xe1,0x8e,0xab,0x00,0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e,0xac,0x00, ++ 0x11,0xff,0xe1,0x8e,0xad,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e,0xae,0x00,0x11,0xff, ++ 0xe1,0x8e,0xaf,0x00,0xe0,0xb2,0x65,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e,0xb0,0x00,0x11,0xff,0xe1,0x8e, ++ 0xb1,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e,0xb2,0x00,0x11,0xff,0xe1,0x8e,0xb3,0x00, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e,0xb4,0x00,0x11,0xff,0xe1,0x8e,0xb5,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8e,0xb6,0x00,0x11,0xff,0xe1,0x8e,0xb7,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e,0xb8,0x00,0x11,0xff,0xe1,0x8e,0xb9,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8e,0xba,0x00,0x11,0xff,0xe1,0x8e,0xbb,0x00,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8e,0xbc,0x00,0x11,0xff,0xe1,0x8e,0xbd,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8e,0xbe,0x00,0x11,0xff,0xe1,0x8e,0xbf,0x00,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8f,0x80,0x00,0x11,0xff,0xe1,0x8f,0x81,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x82,0x00,0x11,0xff,0xe1,0x8f,0x83,0x00,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x84,0x00,0x11,0xff,0xe1,0x8f,0x85,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x86,0x00,0x11,0xff,0xe1,0x8f,0x87,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x88,0x00,0x11,0xff,0xe1,0x8f,0x89,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x8a,0x00,0x11,0xff,0xe1,0x8f,0x8b,0x00,0xd1,0x10,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x8c,0x00,0x11,0xff,0xe1,0x8f,0x8d,0x00,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0x8e,0x00,0x11,0xff,0xe1,0x8f,0x8f,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8f,0x90,0x00,0x11,0xff,0xe1,0x8f,0x91,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x92,0x00,0x11,0xff,0xe1,0x8f,0x93,0x00,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x94,0x00,0x11,0xff,0xe1,0x8f,0x95,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x96,0x00,0x11,0xff,0xe1,0x8f,0x97,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x98,0x00,0x11,0xff,0xe1,0x8f,0x99,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x9a,0x00,0x11,0xff,0xe1,0x8f,0x9b,0x00,0xd1,0x10,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x9c,0x00,0x11,0xff,0xe1,0x8f,0x9d,0x00,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0x9e,0x00,0x11,0xff,0xe1,0x8f,0x9f,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0xa0,0x00,0x11,0xff,0xe1,0x8f,0xa1,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0xa2,0x00,0x11,0xff,0xe1,0x8f,0xa3,0x00,0xd1,0x10,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0xa4,0x00,0x11,0xff,0xe1,0x8f,0xa5,0x00,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0xa6,0x00,0x11,0xff,0xe1,0x8f,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0xa8,0x00,0x11,0xff,0xe1,0x8f,0xa9,0x00,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0xaa,0x00,0x11,0xff,0xe1,0x8f,0xab,0x00,0xd1,0x10,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0xac,0x00,0x11,0xff,0xe1,0x8f,0xad,0x00,0x10,0x08,0x11,0xff,0xe1,0x8f, ++ 0xae,0x00,0x11,0xff,0xe1,0x8f,0xaf,0x00,0xd1,0x0c,0xe0,0xeb,0x63,0xcf,0x86,0xcf, ++ 0x06,0x02,0xff,0xff,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06, ++ 0xcf,0x06,0x01,0x00,0xd4,0xae,0xd3,0x09,0xe2,0x54,0x64,0xcf,0x06,0x01,0x00,0xd2, ++ 0x27,0xe1,0x1f,0x70,0xe0,0x26,0x6e,0xcf,0x86,0xe5,0x3f,0x6d,0xe4,0xce,0x6c,0xe3, ++ 0x99,0x6c,0xe2,0x78,0x6c,0xe1,0x67,0x6c,0x10,0x08,0x01,0xff,0xe5,0x88,0x87,0x00, ++ 0x01,0xff,0xe5,0xba,0xa6,0x00,0xe1,0x74,0x74,0xe0,0xe8,0x73,0xcf,0x86,0xe5,0x22, ++ 0x73,0xd4,0x3b,0x93,0x37,0xd2,0x1d,0xd1,0x0e,0x10,0x07,0x01,0xff,0x66,0x66,0x00, ++ 0x01,0xff,0x66,0x69,0x00,0x10,0x07,0x01,0xff,0x66,0x6c,0x00,0x01,0xff,0x66,0x66, ++ 0x69,0x00,0xd1,0x0f,0x10,0x08,0x01,0xff,0x66,0x66,0x6c,0x00,0x01,0xff,0x73,0x74, ++ 0x00,0x10,0x07,0x01,0xff,0x73,0x74,0x00,0x00,0x00,0x00,0x00,0xe3,0xc8,0x72,0xd2, ++ 0x11,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0xff,0xd5,0xb4,0xd5,0xb6,0x00, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xd5,0xb4,0xd5,0xa5,0x00,0x01,0xff,0xd5,0xb4,0xd5, ++ 0xab,0x00,0x10,0x09,0x01,0xff,0xd5,0xbe,0xd5,0xb6,0x00,0x01,0xff,0xd5,0xb4,0xd5, ++ 0xad,0x00,0xd3,0x09,0xe2,0x40,0x74,0xcf,0x06,0x01,0x00,0xd2,0x13,0xe1,0x30,0x75, ++ 0xe0,0xc1,0x74,0xcf,0x86,0xe5,0x9e,0x74,0x64,0x8d,0x74,0x06,0xff,0x00,0xe1,0x96, ++ 0x75,0xe0,0x63,0x75,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x7c, ++ 0xd3,0x3c,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0xef,0xbd,0x81,0x00, ++ 0x10,0x08,0x01,0xff,0xef,0xbd,0x82,0x00,0x01,0xff,0xef,0xbd,0x83,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xef,0xbd,0x84,0x00,0x01,0xff,0xef,0xbd,0x85,0x00,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x86,0x00,0x01,0xff,0xef,0xbd,0x87,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xef,0xbd,0x88,0x00,0x01,0xff,0xef,0xbd,0x89,0x00,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x8a,0x00,0x01,0xff,0xef,0xbd,0x8b,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x8c,0x00,0x01,0xff,0xef,0xbd,0x8d,0x00,0x10,0x08,0x01,0xff, ++ 0xef,0xbd,0x8e,0x00,0x01,0xff,0xef,0xbd,0x8f,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xef,0xbd,0x90,0x00,0x01,0xff,0xef,0xbd,0x91,0x00,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x92,0x00,0x01,0xff,0xef,0xbd,0x93,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x94,0x00,0x01,0xff,0xef,0xbd,0x95,0x00,0x10,0x08,0x01,0xff, ++ 0xef,0xbd,0x96,0x00,0x01,0xff,0xef,0xbd,0x97,0x00,0x92,0x1c,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x98,0x00,0x01,0xff,0xef,0xbd,0x99,0x00,0x10,0x08,0x01,0xff, ++ 0xef,0xbd,0x9a,0x00,0x01,0x00,0x01,0x00,0x83,0xe2,0x87,0xb3,0xe1,0x60,0xb0,0xe0, ++ 0xdd,0xae,0xcf,0x86,0xe5,0x81,0x9b,0xc4,0xe3,0xc1,0x07,0xe2,0x62,0x06,0xe1,0x11, ++ 0x86,0xe0,0x09,0x05,0xcf,0x86,0xe5,0xfb,0x02,0xd4,0x1c,0xe3,0x7f,0x76,0xe2,0xd6, ++ 0x75,0xe1,0xb1,0x75,0xe0,0x8a,0x75,0xcf,0x86,0xe5,0x57,0x75,0x94,0x07,0x63,0x42, ++ 0x75,0x07,0x00,0x07,0x00,0xe3,0x2b,0x78,0xe2,0xf0,0x77,0xe1,0x77,0x01,0xe0,0x88, ++ 0x77,0xcf,0x86,0xe5,0x21,0x01,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x90,0xa8,0x00,0x05,0xff,0xf0,0x90,0x90,0xa9,0x00,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x90,0xaa,0x00,0x05,0xff,0xf0,0x90,0x90,0xab,0x00,0xd1,0x12, ++ 0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xac,0x00,0x05,0xff,0xf0,0x90,0x90,0xad,0x00, ++ 0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xae,0x00,0x05,0xff,0xf0,0x90,0x90,0xaf,0x00, ++ 0xd2,0x24,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xb0,0x00,0x05,0xff,0xf0, ++ 0x90,0x90,0xb1,0x00,0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xb2,0x00,0x05,0xff,0xf0, ++ 0x90,0x90,0xb3,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xb4,0x00,0x05, ++ 0xff,0xf0,0x90,0x90,0xb5,0x00,0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xb6,0x00,0x05, ++ 0xff,0xf0,0x90,0x90,0xb7,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x05,0xff, ++ 0xf0,0x90,0x90,0xb8,0x00,0x05,0xff,0xf0,0x90,0x90,0xb9,0x00,0x10,0x09,0x05,0xff, ++ 0xf0,0x90,0x90,0xba,0x00,0x05,0xff,0xf0,0x90,0x90,0xbb,0x00,0xd1,0x12,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x90,0xbc,0x00,0x05,0xff,0xf0,0x90,0x90,0xbd,0x00,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x90,0xbe,0x00,0x05,0xff,0xf0,0x90,0x90,0xbf,0x00,0xd2,0x24, ++ 0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0x90,0x91,0x80,0x00,0x05,0xff,0xf0,0x90,0x91, ++ 0x81,0x00,0x10,0x09,0x05,0xff,0xf0,0x90,0x91,0x82,0x00,0x05,0xff,0xf0,0x90,0x91, ++ 0x83,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0x90,0x91,0x84,0x00,0x05,0xff,0xf0, ++ 0x90,0x91,0x85,0x00,0x10,0x09,0x05,0xff,0xf0,0x90,0x91,0x86,0x00,0x05,0xff,0xf0, ++ 0x90,0x91,0x87,0x00,0x94,0x4c,0x93,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x05,0xff, ++ 0xf0,0x90,0x91,0x88,0x00,0x05,0xff,0xf0,0x90,0x91,0x89,0x00,0x10,0x09,0x05,0xff, ++ 0xf0,0x90,0x91,0x8a,0x00,0x05,0xff,0xf0,0x90,0x91,0x8b,0x00,0xd1,0x12,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x91,0x8c,0x00,0x05,0xff,0xf0,0x90,0x91,0x8d,0x00,0x10,0x09, ++ 0x07,0xff,0xf0,0x90,0x91,0x8e,0x00,0x07,0xff,0xf0,0x90,0x91,0x8f,0x00,0x05,0x00, ++ 0x05,0x00,0xd0,0xa0,0xcf,0x86,0xd5,0x07,0x64,0x30,0x76,0x07,0x00,0xd4,0x07,0x63, ++ 0x3d,0x76,0x07,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x90, ++ 0x93,0x98,0x00,0x12,0xff,0xf0,0x90,0x93,0x99,0x00,0x10,0x09,0x12,0xff,0xf0,0x90, ++ 0x93,0x9a,0x00,0x12,0xff,0xf0,0x90,0x93,0x9b,0x00,0xd1,0x12,0x10,0x09,0x12,0xff, ++ 0xf0,0x90,0x93,0x9c,0x00,0x12,0xff,0xf0,0x90,0x93,0x9d,0x00,0x10,0x09,0x12,0xff, ++ 0xf0,0x90,0x93,0x9e,0x00,0x12,0xff,0xf0,0x90,0x93,0x9f,0x00,0xd2,0x24,0xd1,0x12, ++ 0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xa0,0x00,0x12,0xff,0xf0,0x90,0x93,0xa1,0x00, ++ 0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xa2,0x00,0x12,0xff,0xf0,0x90,0x93,0xa3,0x00, ++ 0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xa4,0x00,0x12,0xff,0xf0,0x90,0x93, ++ 0xa5,0x00,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xa6,0x00,0x12,0xff,0xf0,0x90,0x93, ++ 0xa7,0x00,0xcf,0x86,0xe5,0xc6,0x75,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10, ++ 0x09,0x12,0xff,0xf0,0x90,0x93,0xa8,0x00,0x12,0xff,0xf0,0x90,0x93,0xa9,0x00,0x10, ++ 0x09,0x12,0xff,0xf0,0x90,0x93,0xaa,0x00,0x12,0xff,0xf0,0x90,0x93,0xab,0x00,0xd1, ++ 0x12,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xac,0x00,0x12,0xff,0xf0,0x90,0x93,0xad, ++ 0x00,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xae,0x00,0x12,0xff,0xf0,0x90,0x93,0xaf, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xb0,0x00,0x12,0xff, ++ 0xf0,0x90,0x93,0xb1,0x00,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xb2,0x00,0x12,0xff, ++ 0xf0,0x90,0x93,0xb3,0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xb4,0x00, ++ 0x12,0xff,0xf0,0x90,0x93,0xb5,0x00,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xb6,0x00, ++ 0x12,0xff,0xf0,0x90,0x93,0xb7,0x00,0x93,0x28,0x92,0x24,0xd1,0x12,0x10,0x09,0x12, ++ 0xff,0xf0,0x90,0x93,0xb8,0x00,0x12,0xff,0xf0,0x90,0x93,0xb9,0x00,0x10,0x09,0x12, ++ 0xff,0xf0,0x90,0x93,0xba,0x00,0x12,0xff,0xf0,0x90,0x93,0xbb,0x00,0x00,0x00,0x12, ++ 0x00,0xd4,0x1f,0xe3,0xdf,0x76,0xe2,0x6a,0x76,0xe1,0x09,0x76,0xe0,0xea,0x75,0xcf, ++ 0x86,0xe5,0xb7,0x75,0x94,0x0a,0xe3,0xa2,0x75,0x62,0x99,0x75,0x07,0x00,0x07,0x00, ++ 0xe3,0xde,0x78,0xe2,0xaf,0x78,0xd1,0x09,0xe0,0x4c,0x78,0xcf,0x06,0x0b,0x00,0xe0, ++ 0x7f,0x78,0xcf,0x86,0xe5,0x21,0x01,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0x80,0x00,0x11,0xff,0xf0,0x90,0xb3,0x81,0x00,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0x82,0x00,0x11,0xff,0xf0,0x90,0xb3,0x83,0x00,0xd1, ++ 0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x84,0x00,0x11,0xff,0xf0,0x90,0xb3,0x85, ++ 0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x86,0x00,0x11,0xff,0xf0,0x90,0xb3,0x87, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x88,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0x89,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x8a,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0x8b,0x00,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x8c,0x00, ++ 0x11,0xff,0xf0,0x90,0xb3,0x8d,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x8e,0x00, ++ 0x11,0xff,0xf0,0x90,0xb3,0x8f,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x11, ++ 0xff,0xf0,0x90,0xb3,0x90,0x00,0x11,0xff,0xf0,0x90,0xb3,0x91,0x00,0x10,0x09,0x11, ++ 0xff,0xf0,0x90,0xb3,0x92,0x00,0x11,0xff,0xf0,0x90,0xb3,0x93,0x00,0xd1,0x12,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0x94,0x00,0x11,0xff,0xf0,0x90,0xb3,0x95,0x00,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0x96,0x00,0x11,0xff,0xf0,0x90,0xb3,0x97,0x00,0xd2, ++ 0x24,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x98,0x00,0x11,0xff,0xf0,0x90, ++ 0xb3,0x99,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x9a,0x00,0x11,0xff,0xf0,0x90, ++ 0xb3,0x9b,0x00,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x9c,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0x9d,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x9e,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0x9f,0x00,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x11, ++ 0xff,0xf0,0x90,0xb3,0xa0,0x00,0x11,0xff,0xf0,0x90,0xb3,0xa1,0x00,0x10,0x09,0x11, ++ 0xff,0xf0,0x90,0xb3,0xa2,0x00,0x11,0xff,0xf0,0x90,0xb3,0xa3,0x00,0xd1,0x12,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0xa4,0x00,0x11,0xff,0xf0,0x90,0xb3,0xa5,0x00,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0xa6,0x00,0x11,0xff,0xf0,0x90,0xb3,0xa7,0x00,0xd2, ++ 0x24,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0xa8,0x00,0x11,0xff,0xf0,0x90, ++ 0xb3,0xa9,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0xaa,0x00,0x11,0xff,0xf0,0x90, ++ 0xb3,0xab,0x00,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0xac,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0xad,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0xae,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0xaf,0x00,0x93,0x23,0x92,0x1f,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0, ++ 0x90,0xb3,0xb0,0x00,0x11,0xff,0xf0,0x90,0xb3,0xb1,0x00,0x10,0x09,0x11,0xff,0xf0, ++ 0x90,0xb3,0xb2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x15,0xe4,0x91, ++ 0x7b,0xe3,0x9b,0x79,0xe2,0x94,0x78,0xe1,0xe4,0x77,0xe0,0x9d,0x77,0xcf,0x06,0x0c, ++ 0x00,0xe4,0xeb,0x7e,0xe3,0x44,0x7e,0xe2,0xed,0x7d,0xd1,0x0c,0xe0,0xb2,0x7d,0xcf, ++ 0x86,0x65,0x93,0x7d,0x14,0x00,0xe0,0xb6,0x7d,0xcf,0x86,0x55,0x04,0x00,0x00,0xd4, ++ 0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x80,0x00, ++ 0x10,0xff,0xf0,0x91,0xa3,0x81,0x00,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x82,0x00, ++ 0x10,0xff,0xf0,0x91,0xa3,0x83,0x00,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3, ++ 0x84,0x00,0x10,0xff,0xf0,0x91,0xa3,0x85,0x00,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3, ++ 0x86,0x00,0x10,0xff,0xf0,0x91,0xa3,0x87,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x10, ++ 0xff,0xf0,0x91,0xa3,0x88,0x00,0x10,0xff,0xf0,0x91,0xa3,0x89,0x00,0x10,0x09,0x10, ++ 0xff,0xf0,0x91,0xa3,0x8a,0x00,0x10,0xff,0xf0,0x91,0xa3,0x8b,0x00,0xd1,0x12,0x10, ++ 0x09,0x10,0xff,0xf0,0x91,0xa3,0x8c,0x00,0x10,0xff,0xf0,0x91,0xa3,0x8d,0x00,0x10, ++ 0x09,0x10,0xff,0xf0,0x91,0xa3,0x8e,0x00,0x10,0xff,0xf0,0x91,0xa3,0x8f,0x00,0xd3, ++ 0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x90,0x00,0x10,0xff, ++ 0xf0,0x91,0xa3,0x91,0x00,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x92,0x00,0x10,0xff, ++ 0xf0,0x91,0xa3,0x93,0x00,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x94,0x00, ++ 0x10,0xff,0xf0,0x91,0xa3,0x95,0x00,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x96,0x00, ++ 0x10,0xff,0xf0,0x91,0xa3,0x97,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0, ++ 0x91,0xa3,0x98,0x00,0x10,0xff,0xf0,0x91,0xa3,0x99,0x00,0x10,0x09,0x10,0xff,0xf0, ++ 0x91,0xa3,0x9a,0x00,0x10,0xff,0xf0,0x91,0xa3,0x9b,0x00,0xd1,0x12,0x10,0x09,0x10, ++ 0xff,0xf0,0x91,0xa3,0x9c,0x00,0x10,0xff,0xf0,0x91,0xa3,0x9d,0x00,0x10,0x09,0x10, ++ 0xff,0xf0,0x91,0xa3,0x9e,0x00,0x10,0xff,0xf0,0x91,0xa3,0x9f,0x00,0xd1,0x11,0xe0, ++ 0x12,0x81,0xcf,0x86,0xe5,0x09,0x81,0xe4,0xd2,0x80,0xcf,0x06,0x00,0x00,0xe0,0xdb, ++ 0x82,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x09,0xe3,0x10,0x81,0xcf,0x06, ++ 0x0c,0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xe2,0x3b,0x82,0xe1,0x16,0x82,0xd0,0x06, ++ 0xcf,0x06,0x00,0x00,0xcf,0x86,0xa5,0x21,0x01,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1, ++ 0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa0,0x00,0x14,0xff,0xf0,0x96,0xb9,0xa1, ++ 0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa2,0x00,0x14,0xff,0xf0,0x96,0xb9,0xa3, ++ 0x00,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa4,0x00,0x14,0xff,0xf0,0x96, ++ 0xb9,0xa5,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa6,0x00,0x14,0xff,0xf0,0x96, ++ 0xb9,0xa7,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa8,0x00, ++ 0x14,0xff,0xf0,0x96,0xb9,0xa9,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xaa,0x00, ++ 0x14,0xff,0xf0,0x96,0xb9,0xab,0x00,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9, ++ 0xac,0x00,0x14,0xff,0xf0,0x96,0xb9,0xad,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9, ++ 0xae,0x00,0x14,0xff,0xf0,0x96,0xb9,0xaf,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10, ++ 0x09,0x14,0xff,0xf0,0x96,0xb9,0xb0,0x00,0x14,0xff,0xf0,0x96,0xb9,0xb1,0x00,0x10, ++ 0x09,0x14,0xff,0xf0,0x96,0xb9,0xb2,0x00,0x14,0xff,0xf0,0x96,0xb9,0xb3,0x00,0xd1, ++ 0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xb4,0x00,0x14,0xff,0xf0,0x96,0xb9,0xb5, ++ 0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xb6,0x00,0x14,0xff,0xf0,0x96,0xb9,0xb7, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xb8,0x00,0x14,0xff, ++ 0xf0,0x96,0xb9,0xb9,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xba,0x00,0x14,0xff, ++ 0xf0,0x96,0xb9,0xbb,0x00,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xbc,0x00, ++ 0x14,0xff,0xf0,0x96,0xb9,0xbd,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xbe,0x00, ++ 0x14,0xff,0xf0,0x96,0xb9,0xbf,0x00,0x14,0x00,0xd2,0x14,0xe1,0x25,0x82,0xe0,0x1c, ++ 0x82,0xcf,0x86,0xe5,0xdd,0x81,0xe4,0x9a,0x81,0xcf,0x06,0x12,0x00,0xd1,0x0b,0xe0, ++ 0x51,0x83,0xcf,0x86,0xcf,0x06,0x00,0x00,0xe0,0x95,0x8b,0xcf,0x86,0xd5,0x22,0xe4, ++ 0xd0,0x88,0xe3,0x93,0x88,0xe2,0x38,0x88,0xe1,0x31,0x88,0xe0,0x2a,0x88,0xcf,0x86, ++ 0xe5,0xfb,0x87,0xe4,0xe2,0x87,0x93,0x07,0x62,0xd1,0x87,0x12,0xe6,0x12,0xe6,0xe4, ++ 0x36,0x89,0xe3,0x2f,0x89,0xd2,0x09,0xe1,0xb8,0x88,0xcf,0x06,0x10,0x00,0xe1,0x1f, ++ 0x89,0xe0,0xec,0x88,0xcf,0x86,0xe5,0x21,0x01,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1, ++ 0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xa2,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xa3, ++ 0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xa4,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xa5, ++ 0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xa6,0x00,0x12,0xff,0xf0,0x9e, ++ 0xa4,0xa7,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xa8,0x00,0x12,0xff,0xf0,0x9e, ++ 0xa4,0xa9,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xaa,0x00, ++ 0x12,0xff,0xf0,0x9e,0xa4,0xab,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xac,0x00, ++ 0x12,0xff,0xf0,0x9e,0xa4,0xad,0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4, ++ 0xae,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xaf,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4, ++ 0xb0,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb1,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10, ++ 0x09,0x12,0xff,0xf0,0x9e,0xa4,0xb2,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb3,0x00,0x10, ++ 0x09,0x12,0xff,0xf0,0x9e,0xa4,0xb4,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb5,0x00,0xd1, ++ 0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xb6,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb7, ++ 0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xb8,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb9, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xba,0x00,0x12,0xff, ++ 0xf0,0x9e,0xa4,0xbb,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xbc,0x00,0x12,0xff, ++ 0xf0,0x9e,0xa4,0xbd,0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xbe,0x00, ++ 0x12,0xff,0xf0,0x9e,0xa4,0xbf,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa5,0x80,0x00, ++ 0x12,0xff,0xf0,0x9e,0xa5,0x81,0x00,0x94,0x1e,0x93,0x1a,0x92,0x16,0x91,0x12,0x10, ++ 0x09,0x12,0xff,0xf0,0x9e,0xa5,0x82,0x00,0x12,0xff,0xf0,0x9e,0xa5,0x83,0x00,0x12, ++ 0x00,0x12,0x00,0x12,0x00,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ /* nfdi_c0100 */ ++ 0x57,0x04,0x01,0x00,0xc6,0xe5,0xac,0x13,0xe4,0x41,0x0c,0xe3,0x7a,0x07,0xe2,0xf3, ++ 0x01,0xc1,0xd0,0x1f,0xcf,0x86,0x55,0x04,0x01,0x00,0x94,0x15,0x53,0x04,0x01,0x00, ++ 0x52,0x04,0x01,0x00,0x91,0x09,0x10,0x04,0x01,0x00,0x01,0xff,0x00,0x01,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0xe4,0xd4,0x7c,0xd3,0x3c,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x41,0xcc,0x80,0x00,0x01,0xff,0x41,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x41, ++ 0xcc,0x82,0x00,0x01,0xff,0x41,0xcc,0x83,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x41, ++ 0xcc,0x88,0x00,0x01,0xff,0x41,0xcc,0x8a,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0x43, ++ 0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc,0x80,0x00,0x01, ++ 0xff,0x45,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x82,0x00,0x01,0xff,0x45, ++ 0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x80,0x00,0x01,0xff,0x49, ++ 0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0x82,0x00,0x01,0xff,0x49,0xcc,0x88, ++ 0x00,0xd3,0x38,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x4e,0xcc,0x83, ++ 0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0x80,0x00,0x01,0xff,0x4f,0xcc,0x81,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0x82,0x00,0x01,0xff,0x4f,0xcc,0x83,0x00,0x10, ++ 0x08,0x01,0xff,0x4f,0xcc,0x88,0x00,0x01,0x00,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01, ++ 0x00,0x01,0xff,0x55,0xcc,0x80,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0x81,0x00,0x01, ++ 0xff,0x55,0xcc,0x82,0x00,0x91,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x88,0x00,0x01, ++ 0xff,0x59,0xcc,0x81,0x00,0x01,0x00,0xd4,0x7c,0xd3,0x3c,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x61,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x81,0x00,0x10,0x08,0x01, ++ 0xff,0x61,0xcc,0x82,0x00,0x01,0xff,0x61,0xcc,0x83,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x61,0xcc,0x88,0x00,0x01,0xff,0x61,0xcc,0x8a,0x00,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0x63,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0x80, ++ 0x00,0x01,0xff,0x65,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x82,0x00,0x01, ++ 0xff,0x65,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x80,0x00,0x01, ++ 0xff,0x69,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0x82,0x00,0x01,0xff,0x69, ++ 0xcc,0x88,0x00,0xd3,0x38,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x6e, ++ 0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x80,0x00,0x01,0xff,0x6f,0xcc,0x81, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x82,0x00,0x01,0xff,0x6f,0xcc,0x83, ++ 0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x88,0x00,0x01,0x00,0xd2,0x1c,0xd1,0x0c,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0x75,0xcc,0x80,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x81, ++ 0x00,0x01,0xff,0x75,0xcc,0x82,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0x88, ++ 0x00,0x01,0xff,0x79,0xcc,0x81,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0x79,0xcc,0x88, ++ 0x00,0xe1,0x9a,0x03,0xe0,0xd3,0x01,0xcf,0x86,0xd5,0xf4,0xd4,0x80,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0x84,0x00,0x01,0xff,0x61,0xcc,0x84, ++ 0x00,0x10,0x08,0x01,0xff,0x41,0xcc,0x86,0x00,0x01,0xff,0x61,0xcc,0x86,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0xa8,0x00,0x01,0xff,0x61,0xcc,0xa8,0x00,0x10, ++ 0x08,0x01,0xff,0x43,0xcc,0x81,0x00,0x01,0xff,0x63,0xcc,0x81,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x43,0xcc,0x82,0x00,0x01,0xff,0x63,0xcc,0x82,0x00,0x10, ++ 0x08,0x01,0xff,0x43,0xcc,0x87,0x00,0x01,0xff,0x63,0xcc,0x87,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x43,0xcc,0x8c,0x00,0x01,0xff,0x63,0xcc,0x8c,0x00,0x10,0x08,0x01, ++ 0xff,0x44,0xcc,0x8c,0x00,0x01,0xff,0x64,0xcc,0x8c,0x00,0xd3,0x34,0xd2,0x14,0x51, ++ 0x04,0x01,0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x84,0x00,0x01,0xff,0x65,0xcc,0x84, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc,0x86,0x00,0x01,0xff,0x65,0xcc,0x86, ++ 0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x87,0x00,0x01,0xff,0x65,0xcc,0x87,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc,0xa8,0x00,0x01,0xff,0x65,0xcc,0xa8, ++ 0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x8c,0x00,0x01,0xff,0x65,0xcc,0x8c,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x47,0xcc,0x82,0x00,0x01,0xff,0x67,0xcc,0x82,0x00,0x10, ++ 0x08,0x01,0xff,0x47,0xcc,0x86,0x00,0x01,0xff,0x67,0xcc,0x86,0x00,0xd4,0x74,0xd3, ++ 0x34,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x47,0xcc,0x87,0x00,0x01,0xff,0x67, ++ 0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x47,0xcc,0xa7,0x00,0x01,0xff,0x67,0xcc,0xa7, ++ 0x00,0x91,0x10,0x10,0x08,0x01,0xff,0x48,0xcc,0x82,0x00,0x01,0xff,0x68,0xcc,0x82, ++ 0x00,0x01,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x83,0x00,0x01, ++ 0xff,0x69,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0x84,0x00,0x01,0xff,0x69, ++ 0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x86,0x00,0x01,0xff,0x69, ++ 0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0xa8,0x00,0x01,0xff,0x69,0xcc,0xa8, ++ 0x00,0xd3,0x30,0xd2,0x10,0x91,0x0c,0x10,0x08,0x01,0xff,0x49,0xcc,0x87,0x00,0x01, ++ 0x00,0x01,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4a,0xcc,0x82,0x00,0x01,0xff,0x6a, ++ 0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x4b,0xcc,0xa7,0x00,0x01,0xff,0x6b,0xcc,0xa7, ++ 0x00,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x4c,0xcc,0x81,0x00,0x10, ++ 0x08,0x01,0xff,0x6c,0xcc,0x81,0x00,0x01,0xff,0x4c,0xcc,0xa7,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x6c,0xcc,0xa7,0x00,0x01,0xff,0x4c,0xcc,0x8c,0x00,0x10,0x08,0x01, ++ 0xff,0x6c,0xcc,0x8c,0x00,0x01,0x00,0xcf,0x86,0xd5,0xd4,0xd4,0x60,0xd3,0x30,0xd2, ++ 0x10,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0x4e,0xcc,0x81,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x6e,0xcc,0x81,0x00,0x01,0xff,0x4e,0xcc,0xa7,0x00,0x10, ++ 0x08,0x01,0xff,0x6e,0xcc,0xa7,0x00,0x01,0xff,0x4e,0xcc,0x8c,0x00,0xd2,0x10,0x91, ++ 0x0c,0x10,0x08,0x01,0xff,0x6e,0xcc,0x8c,0x00,0x01,0x00,0x01,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x4f,0xcc,0x84,0x00,0x01,0xff,0x6f,0xcc,0x84,0x00,0x10,0x08,0x01, ++ 0xff,0x4f,0xcc,0x86,0x00,0x01,0xff,0x6f,0xcc,0x86,0x00,0xd3,0x34,0xd2,0x14,0x91, ++ 0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0x8b,0x00,0x01,0xff,0x6f,0xcc,0x8b,0x00,0x01, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x52,0xcc,0x81,0x00,0x01,0xff,0x72,0xcc,0x81, ++ 0x00,0x10,0x08,0x01,0xff,0x52,0xcc,0xa7,0x00,0x01,0xff,0x72,0xcc,0xa7,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x52,0xcc,0x8c,0x00,0x01,0xff,0x72,0xcc,0x8c, ++ 0x00,0x10,0x08,0x01,0xff,0x53,0xcc,0x81,0x00,0x01,0xff,0x73,0xcc,0x81,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x53,0xcc,0x82,0x00,0x01,0xff,0x73,0xcc,0x82,0x00,0x10, ++ 0x08,0x01,0xff,0x53,0xcc,0xa7,0x00,0x01,0xff,0x73,0xcc,0xa7,0x00,0xd4,0x74,0xd3, ++ 0x34,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x53,0xcc,0x8c,0x00,0x01,0xff,0x73, ++ 0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x54,0xcc,0xa7,0x00,0x01,0xff,0x74,0xcc,0xa7, ++ 0x00,0x91,0x10,0x10,0x08,0x01,0xff,0x54,0xcc,0x8c,0x00,0x01,0xff,0x74,0xcc,0x8c, ++ 0x00,0x01,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x83,0x00,0x01, ++ 0xff,0x75,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0x84,0x00,0x01,0xff,0x75, ++ 0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x86,0x00,0x01,0xff,0x75, ++ 0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0x8a,0x00,0x01,0xff,0x75,0xcc,0x8a, ++ 0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x8b,0x00,0x01, ++ 0xff,0x75,0xcc,0x8b,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0xa8,0x00,0x01,0xff,0x75, ++ 0xcc,0xa8,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc,0x82,0x00,0x01,0xff,0x77, ++ 0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x59,0xcc,0x82,0x00,0x01,0xff,0x79,0xcc,0x82, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x59,0xcc,0x88,0x00,0x01,0xff,0x5a, ++ 0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0x81,0x00,0x01,0xff,0x5a,0xcc,0x87, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x7a,0xcc,0x87,0x00,0x01,0xff,0x5a,0xcc,0x8c, ++ 0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0x8c,0x00,0x01,0x00,0xd0,0x4a,0xcf,0x86,0x55, ++ 0x04,0x01,0x00,0xd4,0x2c,0xd3,0x18,0x92,0x14,0x91,0x10,0x10,0x08,0x01,0xff,0x4f, ++ 0xcc,0x9b,0x00,0x01,0xff,0x6f,0xcc,0x9b,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01, ++ 0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0x55,0xcc,0x9b,0x00,0x93, ++ 0x14,0x92,0x10,0x91,0x0c,0x10,0x08,0x01,0xff,0x75,0xcc,0x9b,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0xb4,0xd4,0x24,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x41,0xcc,0x8c,0x00,0x10, ++ 0x08,0x01,0xff,0x61,0xcc,0x8c,0x00,0x01,0xff,0x49,0xcc,0x8c,0x00,0xd3,0x46,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x8c,0x00,0x01,0xff,0x4f,0xcc,0x8c, ++ 0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x8c,0x00,0x01,0xff,0x55,0xcc,0x8c,0x00,0xd1, ++ 0x12,0x10,0x08,0x01,0xff,0x75,0xcc,0x8c,0x00,0x01,0xff,0x55,0xcc,0x88,0xcc,0x84, ++ 0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88,0xcc,0x84,0x00,0x01,0xff,0x55,0xcc,0x88, ++ 0xcc,0x81,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88,0xcc,0x81, ++ 0x00,0x01,0xff,0x55,0xcc,0x88,0xcc,0x8c,0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88, ++ 0xcc,0x8c,0x00,0x01,0xff,0x55,0xcc,0x88,0xcc,0x80,0x00,0xd1,0x0e,0x10,0x0a,0x01, ++ 0xff,0x75,0xcc,0x88,0xcc,0x80,0x00,0x01,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x88, ++ 0xcc,0x84,0x00,0x01,0xff,0x61,0xcc,0x88,0xcc,0x84,0x00,0xd4,0x80,0xd3,0x3a,0xd2, ++ 0x26,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0x87,0xcc,0x84,0x00,0x01,0xff,0x61, ++ 0xcc,0x87,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xc3,0x86,0xcc,0x84,0x00,0x01,0xff, ++ 0xc3,0xa6,0xcc,0x84,0x00,0x51,0x04,0x01,0x00,0x10,0x08,0x01,0xff,0x47,0xcc,0x8c, ++ 0x00,0x01,0xff,0x67,0xcc,0x8c,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x4b, ++ 0xcc,0x8c,0x00,0x01,0xff,0x6b,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0xa8, ++ 0x00,0x01,0xff,0x6f,0xcc,0xa8,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0xa8, ++ 0xcc,0x84,0x00,0x01,0xff,0x6f,0xcc,0xa8,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xc6, ++ 0xb7,0xcc,0x8c,0x00,0x01,0xff,0xca,0x92,0xcc,0x8c,0x00,0xd3,0x24,0xd2,0x10,0x91, ++ 0x0c,0x10,0x08,0x01,0xff,0x6a,0xcc,0x8c,0x00,0x01,0x00,0x01,0x00,0x91,0x10,0x10, ++ 0x08,0x01,0xff,0x47,0xcc,0x81,0x00,0x01,0xff,0x67,0xcc,0x81,0x00,0x04,0x00,0xd2, ++ 0x24,0xd1,0x10,0x10,0x08,0x04,0xff,0x4e,0xcc,0x80,0x00,0x04,0xff,0x6e,0xcc,0x80, ++ 0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x8a,0xcc,0x81,0x00,0x01,0xff,0x61,0xcc,0x8a, ++ 0xcc,0x81,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xc3,0x86,0xcc,0x81,0x00,0x01,0xff, ++ 0xc3,0xa6,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xc3,0x98,0xcc,0x81,0x00,0x01,0xff, ++ 0xc3,0xb8,0xcc,0x81,0x00,0xe2,0x07,0x02,0xe1,0xae,0x01,0xe0,0x93,0x01,0xcf,0x86, ++ 0xd5,0xf4,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc, ++ 0x8f,0x00,0x01,0xff,0x61,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x41,0xcc,0x91,0x00, ++ 0x01,0xff,0x61,0xcc,0x91,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc,0x8f,0x00, ++ 0x01,0xff,0x65,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x91,0x00,0x01,0xff, ++ 0x65,0xcc,0x91,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x8f,0x00, ++ 0x01,0xff,0x69,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0x91,0x00,0x01,0xff, ++ 0x69,0xcc,0x91,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0x8f,0x00,0x01,0xff, ++ 0x6f,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0x91,0x00,0x01,0xff,0x6f,0xcc, ++ 0x91,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x52,0xcc,0x8f,0x00, ++ 0x01,0xff,0x72,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x52,0xcc,0x91,0x00,0x01,0xff, ++ 0x72,0xcc,0x91,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x8f,0x00,0x01,0xff, ++ 0x75,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0x91,0x00,0x01,0xff,0x75,0xcc, ++ 0x91,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x04,0xff,0x53,0xcc,0xa6,0x00,0x04,0xff, ++ 0x73,0xcc,0xa6,0x00,0x10,0x08,0x04,0xff,0x54,0xcc,0xa6,0x00,0x04,0xff,0x74,0xcc, ++ 0xa6,0x00,0x51,0x04,0x04,0x00,0x10,0x08,0x04,0xff,0x48,0xcc,0x8c,0x00,0x04,0xff, ++ 0x68,0xcc,0x8c,0x00,0xd4,0x68,0xd3,0x20,0xd2,0x0c,0x91,0x08,0x10,0x04,0x06,0x00, ++ 0x07,0x00,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x08,0x04,0xff,0x41,0xcc,0x87,0x00, ++ 0x04,0xff,0x61,0xcc,0x87,0x00,0xd2,0x24,0xd1,0x10,0x10,0x08,0x04,0xff,0x45,0xcc, ++ 0xa7,0x00,0x04,0xff,0x65,0xcc,0xa7,0x00,0x10,0x0a,0x04,0xff,0x4f,0xcc,0x88,0xcc, ++ 0x84,0x00,0x04,0xff,0x6f,0xcc,0x88,0xcc,0x84,0x00,0xd1,0x14,0x10,0x0a,0x04,0xff, ++ 0x4f,0xcc,0x83,0xcc,0x84,0x00,0x04,0xff,0x6f,0xcc,0x83,0xcc,0x84,0x00,0x10,0x08, ++ 0x04,0xff,0x4f,0xcc,0x87,0x00,0x04,0xff,0x6f,0xcc,0x87,0x00,0x93,0x30,0xd2,0x24, ++ 0xd1,0x14,0x10,0x0a,0x04,0xff,0x4f,0xcc,0x87,0xcc,0x84,0x00,0x04,0xff,0x6f,0xcc, ++ 0x87,0xcc,0x84,0x00,0x10,0x08,0x04,0xff,0x59,0xcc,0x84,0x00,0x04,0xff,0x79,0xcc, ++ 0x84,0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00,0x08,0x00,0x08,0x00,0xcf,0x86, ++ 0x95,0x14,0x94,0x10,0x93,0x0c,0x92,0x08,0x11,0x04,0x08,0x00,0x09,0x00,0x09,0x00, ++ 0x09,0x00,0x01,0x00,0x01,0x00,0xd0,0x22,0xcf,0x86,0x55,0x04,0x01,0x00,0x94,0x18, ++ 0x53,0x04,0x01,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x04,0x00, ++ 0x11,0x04,0x04,0x00,0x07,0x00,0x01,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04,0x01,0x00, ++ 0x53,0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00, ++ 0x04,0x00,0x94,0x18,0x53,0x04,0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x04,0x00, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x07,0x00,0x07,0x00,0xe1,0x35,0x01,0xd0, ++ 0x72,0xcf,0x86,0xd5,0x24,0x54,0x04,0x01,0xe6,0xd3,0x10,0x52,0x04,0x01,0xe6,0x91, ++ 0x08,0x10,0x04,0x01,0xe6,0x01,0xe8,0x01,0xdc,0x92,0x0c,0x51,0x04,0x01,0xdc,0x10, ++ 0x04,0x01,0xe8,0x01,0xd8,0x01,0xdc,0xd4,0x2c,0xd3,0x1c,0xd2,0x10,0xd1,0x08,0x10, ++ 0x04,0x01,0xdc,0x01,0xca,0x10,0x04,0x01,0xca,0x01,0xdc,0x51,0x04,0x01,0xdc,0x10, ++ 0x04,0x01,0xdc,0x01,0xca,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0xca,0x01,0xdc,0x01, ++ 0xdc,0x01,0xdc,0xd3,0x08,0x12,0x04,0x01,0xdc,0x01,0x01,0xd2,0x0c,0x91,0x08,0x10, ++ 0x04,0x01,0x01,0x01,0xdc,0x01,0xdc,0x91,0x08,0x10,0x04,0x01,0xdc,0x01,0xe6,0x01, ++ 0xe6,0xcf,0x86,0xd5,0x7f,0xd4,0x47,0xd3,0x2e,0xd2,0x19,0xd1,0x0e,0x10,0x07,0x01, ++ 0xff,0xcc,0x80,0x00,0x01,0xff,0xcc,0x81,0x00,0x10,0x04,0x01,0xe6,0x01,0xff,0xcc, ++ 0x93,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xcc,0x88,0xcc,0x81,0x00,0x01,0xf0,0x10, ++ 0x04,0x04,0xe6,0x04,0xdc,0xd2,0x08,0x11,0x04,0x04,0xdc,0x04,0xe6,0xd1,0x08,0x10, ++ 0x04,0x04,0xe6,0x04,0xdc,0x10,0x04,0x04,0xdc,0x06,0xff,0x00,0xd3,0x18,0xd2,0x0c, ++ 0x51,0x04,0x07,0xe6,0x10,0x04,0x07,0xe6,0x07,0xdc,0x51,0x04,0x07,0xdc,0x10,0x04, ++ 0x07,0xdc,0x07,0xe6,0xd2,0x10,0xd1,0x08,0x10,0x04,0x08,0xe8,0x08,0xdc,0x10,0x04, ++ 0x08,0xdc,0x08,0xe6,0xd1,0x08,0x10,0x04,0x08,0xe9,0x07,0xea,0x10,0x04,0x07,0xea, ++ 0x07,0xe9,0xd4,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x01,0xea,0x10,0x04,0x04,0xe9, ++ 0x06,0xe6,0x06,0xe6,0x06,0xe6,0xd3,0x13,0x52,0x04,0x0a,0x00,0x91,0x0b,0x10,0x07, ++ 0x01,0xff,0xca,0xb9,0x00,0x01,0x00,0x0a,0x00,0xd2,0x0c,0x51,0x04,0x00,0x00,0x10, ++ 0x04,0x01,0x00,0x09,0x00,0x51,0x04,0x09,0x00,0x10,0x06,0x01,0xff,0x3b,0x00,0x10, ++ 0x00,0xd0,0xe1,0xcf,0x86,0xd5,0x7a,0xd4,0x5f,0xd3,0x21,0x52,0x04,0x00,0x00,0xd1, ++ 0x0d,0x10,0x04,0x01,0x00,0x01,0xff,0xc2,0xa8,0xcc,0x81,0x00,0x10,0x09,0x01,0xff, ++ 0xce,0x91,0xcc,0x81,0x00,0x01,0xff,0xc2,0xb7,0x00,0xd2,0x1f,0xd1,0x12,0x10,0x09, ++ 0x01,0xff,0xce,0x95,0xcc,0x81,0x00,0x01,0xff,0xce,0x97,0xcc,0x81,0x00,0x10,0x09, ++ 0x01,0xff,0xce,0x99,0xcc,0x81,0x00,0x00,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xce, ++ 0x9f,0xcc,0x81,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xa5,0xcc,0x81,0x00,0x01, ++ 0xff,0xce,0xa9,0xcc,0x81,0x00,0x93,0x17,0x92,0x13,0x91,0x0f,0x10,0x0b,0x01,0xff, ++ 0xce,0xb9,0xcc,0x88,0xcc,0x81,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4, ++ 0x4a,0xd3,0x10,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x01, ++ 0x00,0xd2,0x16,0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff,0xce,0x99,0xcc,0x88,0x00, ++ 0x01,0xff,0xce,0xa5,0xcc,0x88,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc, ++ 0x81,0x00,0x01,0xff,0xce,0xb5,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc, ++ 0x81,0x00,0x01,0xff,0xce,0xb9,0xcc,0x81,0x00,0x93,0x17,0x92,0x13,0x91,0x0f,0x10, ++ 0x0b,0x01,0xff,0xcf,0x85,0xcc,0x88,0xcc,0x81,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x7b,0xd4,0x39,0x53,0x04,0x01,0x00,0xd2,0x16,0x51,0x04, ++ 0x01,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x88,0x00,0x01,0xff,0xcf,0x85,0xcc, ++ 0x88,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x81,0x00,0x01,0xff,0xcf, ++ 0x85,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xcf,0x89,0xcc,0x81,0x00,0x0a,0x00,0xd3, ++ 0x26,0xd2,0x11,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xcf,0x92,0xcc, ++ 0x81,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xcf,0x92,0xcc,0x88,0x00,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x04,0x00,0xd2,0x0c,0x51,0x04,0x06,0x00,0x10,0x04,0x01,0x00,0x04, ++ 0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x10,0x04,0x01,0x00,0x04,0x00,0xd4, ++ 0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0xd3,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x05,0x00,0x10,0x04,0x06, ++ 0x00,0x07,0x00,0x12,0x04,0x07,0x00,0x08,0x00,0xe3,0x47,0x04,0xe2,0xbe,0x02,0xe1, ++ 0x07,0x01,0xd0,0x8b,0xcf,0x86,0xd5,0x6c,0xd4,0x53,0xd3,0x30,0xd2,0x1f,0xd1,0x12, ++ 0x10,0x09,0x04,0xff,0xd0,0x95,0xcc,0x80,0x00,0x01,0xff,0xd0,0x95,0xcc,0x88,0x00, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xd0,0x93,0xcc,0x81,0x00,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0xd0,0x86,0xcc,0x88,0x00,0x52,0x04,0x01,0x00,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xd0,0x9a,0xcc,0x81,0x00,0x04,0xff,0xd0,0x98,0xcc,0x80,0x00, ++ 0x10,0x09,0x01,0xff,0xd0,0xa3,0xcc,0x86,0x00,0x01,0x00,0x53,0x04,0x01,0x00,0x92, ++ 0x11,0x91,0x0d,0x10,0x04,0x01,0x00,0x01,0xff,0xd0,0x98,0xcc,0x86,0x00,0x01,0x00, ++ 0x01,0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0x92,0x11,0x91,0x0d,0x10,0x04, ++ 0x01,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x86,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5, ++ 0x57,0x54,0x04,0x01,0x00,0xd3,0x30,0xd2,0x1f,0xd1,0x12,0x10,0x09,0x04,0xff,0xd0, ++ 0xb5,0xcc,0x80,0x00,0x01,0xff,0xd0,0xb5,0xcc,0x88,0x00,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xd0,0xb3,0xcc,0x81,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff, ++ 0xd1,0x96,0xcc,0x88,0x00,0x52,0x04,0x01,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0, ++ 0xba,0xcc,0x81,0x00,0x04,0xff,0xd0,0xb8,0xcc,0x80,0x00,0x10,0x09,0x01,0xff,0xd1, ++ 0x83,0xcc,0x86,0x00,0x01,0x00,0x54,0x04,0x01,0x00,0x93,0x1a,0x52,0x04,0x01,0x00, ++ 0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff,0xd1,0xb4,0xcc,0x8f,0x00,0x01,0xff,0xd1, ++ 0xb5,0xcc,0x8f,0x00,0x01,0x00,0xd0,0x2e,0xcf,0x86,0x95,0x28,0x94,0x24,0xd3,0x18, ++ 0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xe6,0x51,0x04,0x01,0xe6, ++ 0x10,0x04,0x01,0xe6,0x0a,0xe6,0x92,0x08,0x11,0x04,0x04,0x00,0x06,0x00,0x04,0x00, ++ 0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0xbe,0xd4,0x4a,0xd3,0x2a,0xd2,0x1a,0xd1,0x0d, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xd0,0x96,0xcc,0x86,0x00,0x10,0x09,0x01,0xff,0xd0, ++ 0xb6,0xcc,0x86,0x00,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x06,0x00,0x10,0x04, ++ 0x06,0x00,0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x06,0x00,0x10,0x04, ++ 0x06,0x00,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x06,0x00,0x10,0x04,0x06,0x00, ++ 0x09,0x00,0xd3,0x3a,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0x90,0xcc,0x86, ++ 0x00,0x01,0xff,0xd0,0xb0,0xcc,0x86,0x00,0x10,0x09,0x01,0xff,0xd0,0x90,0xcc,0x88, ++ 0x00,0x01,0xff,0xd0,0xb0,0xcc,0x88,0x00,0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff, ++ 0xd0,0x95,0xcc,0x86,0x00,0x01,0xff,0xd0,0xb5,0xcc,0x86,0x00,0xd2,0x16,0x51,0x04, ++ 0x01,0x00,0x10,0x09,0x01,0xff,0xd3,0x98,0xcc,0x88,0x00,0x01,0xff,0xd3,0x99,0xcc, ++ 0x88,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0x96,0xcc,0x88,0x00,0x01,0xff,0xd0, ++ 0xb6,0xcc,0x88,0x00,0x10,0x09,0x01,0xff,0xd0,0x97,0xcc,0x88,0x00,0x01,0xff,0xd0, ++ 0xb7,0xcc,0x88,0x00,0xd4,0x74,0xd3,0x3a,0xd2,0x16,0x51,0x04,0x01,0x00,0x10,0x09, ++ 0x01,0xff,0xd0,0x98,0xcc,0x84,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x84,0x00,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xd0,0x98,0xcc,0x88,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x88,0x00, ++ 0x10,0x09,0x01,0xff,0xd0,0x9e,0xcc,0x88,0x00,0x01,0xff,0xd0,0xbe,0xcc,0x88,0x00, ++ 0xd2,0x16,0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff,0xd3,0xa8,0xcc,0x88,0x00,0x01, ++ 0xff,0xd3,0xa9,0xcc,0x88,0x00,0xd1,0x12,0x10,0x09,0x04,0xff,0xd0,0xad,0xcc,0x88, ++ 0x00,0x04,0xff,0xd1,0x8d,0xcc,0x88,0x00,0x10,0x09,0x01,0xff,0xd0,0xa3,0xcc,0x84, ++ 0x00,0x01,0xff,0xd1,0x83,0xcc,0x84,0x00,0xd3,0x3a,0xd2,0x24,0xd1,0x12,0x10,0x09, ++ 0x01,0xff,0xd0,0xa3,0xcc,0x88,0x00,0x01,0xff,0xd1,0x83,0xcc,0x88,0x00,0x10,0x09, ++ 0x01,0xff,0xd0,0xa3,0xcc,0x8b,0x00,0x01,0xff,0xd1,0x83,0xcc,0x8b,0x00,0x91,0x12, ++ 0x10,0x09,0x01,0xff,0xd0,0xa7,0xcc,0x88,0x00,0x01,0xff,0xd1,0x87,0xcc,0x88,0x00, ++ 0x08,0x00,0x92,0x16,0x91,0x12,0x10,0x09,0x01,0xff,0xd0,0xab,0xcc,0x88,0x00,0x01, ++ 0xff,0xd1,0x8b,0xcc,0x88,0x00,0x09,0x00,0x09,0x00,0xd1,0x74,0xd0,0x36,0xcf,0x86, ++ 0xd5,0x10,0x54,0x04,0x06,0x00,0x93,0x08,0x12,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00, ++ 0xd4,0x10,0x93,0x0c,0x52,0x04,0x0a,0x00,0x11,0x04,0x0b,0x00,0x0c,0x00,0x10,0x00, ++ 0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x24,0x54,0x04,0x01,0x00,0xd3,0x10,0x52,0x04,0x01,0x00, ++ 0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x14,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0xba, ++ 0xcf,0x86,0xd5,0x4c,0xd4,0x24,0x53,0x04,0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x14,0x00,0x01,0x00,0x10,0x04,0x04,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x00,0x00, ++ 0x10,0x00,0x10,0x04,0x10,0x00,0x0d,0x00,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x00,0x00,0x02,0xdc,0x02,0xe6,0x51,0x04,0x02,0xe6,0x10,0x04,0x02,0xdc,0x02,0xe6, ++ 0x92,0x0c,0x51,0x04,0x02,0xe6,0x10,0x04,0x02,0xde,0x02,0xdc,0x02,0xe6,0xd4,0x2c, ++ 0xd3,0x10,0x92,0x0c,0x51,0x04,0x02,0xe6,0x10,0x04,0x08,0xdc,0x02,0xdc,0x02,0xdc, ++ 0xd2,0x0c,0x51,0x04,0x02,0xe6,0x10,0x04,0x02,0xdc,0x02,0xe6,0xd1,0x08,0x10,0x04, ++ 0x02,0xe6,0x02,0xde,0x10,0x04,0x02,0xe4,0x02,0xe6,0xd3,0x20,0xd2,0x10,0xd1,0x08, ++ 0x10,0x04,0x01,0x0a,0x01,0x0b,0x10,0x04,0x01,0x0c,0x01,0x0d,0xd1,0x08,0x10,0x04, ++ 0x01,0x0e,0x01,0x0f,0x10,0x04,0x01,0x10,0x01,0x11,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x01,0x12,0x01,0x13,0x10,0x04,0x09,0x13,0x01,0x14,0xd1,0x08,0x10,0x04,0x01,0x15, ++ 0x01,0x16,0x10,0x04,0x01,0x00,0x01,0x17,0xcf,0x86,0xd5,0x28,0x94,0x24,0x93,0x20, ++ 0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x01,0x18,0x10,0x04,0x01,0x19,0x01,0x00, ++ 0xd1,0x08,0x10,0x04,0x02,0xe6,0x08,0xdc,0x10,0x04,0x08,0x00,0x08,0x12,0x00,0x00, ++ 0x01,0x00,0xd4,0x1c,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04, ++ 0x01,0x00,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x14,0x00,0x93,0x10, ++ 0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xe2,0xfb,0x01,0xe1,0x2b,0x01,0xd0,0xa8,0xcf,0x86,0xd5,0x55,0xd4,0x28,0xd3,0x10, ++ 0x52,0x04,0x07,0x00,0x91,0x08,0x10,0x04,0x0d,0x00,0x10,0x00,0x0a,0x00,0xd2,0x0c, ++ 0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x00,0x08,0x00,0x91,0x08,0x10,0x04,0x01,0x00, ++ 0x07,0x00,0x07,0x00,0xd3,0x0c,0x52,0x04,0x07,0xe6,0x11,0x04,0x07,0xe6,0x0a,0xe6, ++ 0xd2,0x10,0xd1,0x08,0x10,0x04,0x0a,0x1e,0x0a,0x1f,0x10,0x04,0x0a,0x20,0x01,0x00, ++ 0xd1,0x09,0x10,0x05,0x0f,0xff,0x00,0x00,0x00,0x10,0x04,0x08,0x00,0x01,0x00,0xd4, ++ 0x3d,0x93,0x39,0xd2,0x1a,0xd1,0x08,0x10,0x04,0x0c,0x00,0x01,0x00,0x10,0x09,0x01, ++ 0xff,0xd8,0xa7,0xd9,0x93,0x00,0x01,0xff,0xd8,0xa7,0xd9,0x94,0x00,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xd9,0x88,0xd9,0x94,0x00,0x01,0xff,0xd8,0xa7,0xd9,0x95,0x00,0x10, ++ 0x09,0x01,0xff,0xd9,0x8a,0xd9,0x94,0x00,0x01,0x00,0x01,0x00,0x53,0x04,0x01,0x00, ++ 0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x0a,0x00,0x0a,0x00,0xcf,0x86, ++ 0xd5,0x5c,0xd4,0x20,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04, ++ 0x01,0x00,0x01,0x1b,0xd1,0x08,0x10,0x04,0x01,0x1c,0x01,0x1d,0x10,0x04,0x01,0x1e, ++ 0x01,0x1f,0xd3,0x20,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x20,0x01,0x21,0x10,0x04, ++ 0x01,0x22,0x04,0xe6,0xd1,0x08,0x10,0x04,0x04,0xe6,0x04,0xdc,0x10,0x04,0x07,0xdc, ++ 0x07,0xe6,0xd2,0x0c,0x91,0x08,0x10,0x04,0x07,0xe6,0x08,0xe6,0x08,0xe6,0xd1,0x08, ++ 0x10,0x04,0x08,0xdc,0x08,0xe6,0x10,0x04,0x08,0xe6,0x0c,0xdc,0xd4,0x10,0x53,0x04, ++ 0x01,0x00,0x52,0x04,0x01,0x00,0x11,0x04,0x01,0x00,0x06,0x00,0x93,0x10,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x01,0x23,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0x22, ++ 0xcf,0x86,0x55,0x04,0x01,0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x08, ++ 0x11,0x04,0x04,0x00,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x04,0x00, ++ 0xcf,0x86,0xd5,0x5b,0xd4,0x2e,0xd3,0x1e,0x92,0x1a,0xd1,0x0d,0x10,0x09,0x01,0xff, ++ 0xdb,0x95,0xd9,0x94,0x00,0x01,0x00,0x10,0x09,0x01,0xff,0xdb,0x81,0xd9,0x94,0x00, ++ 0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00, ++ 0x04,0x00,0xd3,0x19,0xd2,0x11,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff, ++ 0xdb,0x92,0xd9,0x94,0x00,0x11,0x04,0x01,0x00,0x01,0xe6,0x52,0x04,0x01,0xe6,0xd1, ++ 0x08,0x10,0x04,0x01,0xe6,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xe6,0xd4,0x38,0xd3, ++ 0x1c,0xd2,0x0c,0x51,0x04,0x01,0xe6,0x10,0x04,0x01,0xe6,0x01,0xdc,0xd1,0x08,0x10, ++ 0x04,0x01,0xe6,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xe6,0xd2,0x10,0xd1,0x08,0x10, ++ 0x04,0x01,0xe6,0x01,0x00,0x10,0x04,0x01,0xdc,0x01,0xe6,0x91,0x08,0x10,0x04,0x01, ++ 0xe6,0x01,0xdc,0x07,0x00,0x53,0x04,0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x04, ++ 0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x07,0x00,0xd1,0xc8,0xd0,0x76,0xcf, ++ 0x86,0xd5,0x28,0xd4,0x14,0x53,0x04,0x04,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04, ++ 0x00,0x10,0x04,0x00,0x00,0x04,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x04, ++ 0x00,0x04,0x24,0x04,0x00,0x04,0x00,0x04,0x00,0xd4,0x14,0x53,0x04,0x04,0x00,0x52, ++ 0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x07,0x00,0x07,0x00,0xd3,0x1c,0xd2, ++ 0x0c,0x91,0x08,0x10,0x04,0x04,0xe6,0x04,0xdc,0x04,0xe6,0xd1,0x08,0x10,0x04,0x04, ++ 0xdc,0x04,0xe6,0x10,0x04,0x04,0xe6,0x04,0xdc,0xd2,0x0c,0x51,0x04,0x04,0xdc,0x10, ++ 0x04,0x04,0xe6,0x04,0xdc,0xd1,0x08,0x10,0x04,0x04,0xdc,0x04,0xe6,0x10,0x04,0x04, ++ 0xdc,0x04,0xe6,0xcf,0x86,0xd5,0x3c,0x94,0x38,0xd3,0x1c,0xd2,0x0c,0x51,0x04,0x04, ++ 0xe6,0x10,0x04,0x04,0xdc,0x04,0xe6,0xd1,0x08,0x10,0x04,0x04,0xdc,0x04,0xe6,0x10, ++ 0x04,0x04,0xdc,0x04,0xe6,0xd2,0x10,0xd1,0x08,0x10,0x04,0x04,0xdc,0x04,0xe6,0x10, ++ 0x04,0x04,0xe6,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x07,0x00,0x07,0x00,0x08, ++ 0x00,0x94,0x10,0x53,0x04,0x08,0x00,0x52,0x04,0x08,0x00,0x11,0x04,0x08,0x00,0x0a, ++ 0x00,0x0a,0x00,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04,0x04,0x00,0x93, ++ 0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0xcf,0x86,0x55,0x04,0x09,0x00,0xd4,0x14,0x53,0x04,0x09,0x00,0x92,0x0c,0x51, ++ 0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x09,0xe6,0x09,0xe6,0xd3,0x10,0x92,0x0c,0x51, ++ 0x04,0x09,0xe6,0x10,0x04,0x09,0xdc,0x09,0xe6,0x09,0x00,0xd2,0x0c,0x51,0x04,0x09, ++ 0x00,0x10,0x04,0x09,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x14,0xdc,0x14, ++ 0x00,0xe4,0xf8,0x57,0xe3,0x45,0x3f,0xe2,0xf4,0x3e,0xe1,0xc7,0x2c,0xe0,0x21,0x10, ++ 0xcf,0x86,0xc5,0xe4,0x80,0x08,0xe3,0xcb,0x03,0xe2,0x61,0x01,0xd1,0x94,0xd0,0x5a, ++ 0xcf,0x86,0xd5,0x20,0x54,0x04,0x0b,0x00,0xd3,0x0c,0x52,0x04,0x0b,0x00,0x11,0x04, ++ 0x0b,0x00,0x0b,0xe6,0x92,0x0c,0x51,0x04,0x0b,0xe6,0x10,0x04,0x0b,0x00,0x0b,0xe6, ++ 0x0b,0xe6,0xd4,0x24,0xd3,0x10,0x52,0x04,0x0b,0xe6,0x91,0x08,0x10,0x04,0x0b,0x00, ++ 0x0b,0xe6,0x0b,0xe6,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0b,0x00,0x0b,0xe6,0x0b,0xe6, ++ 0x11,0x04,0x0b,0xe6,0x00,0x00,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04, ++ 0x0b,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0xcf,0x86,0xd5,0x20,0x54,0x04,0x0c,0x00, ++ 0x53,0x04,0x0c,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x0c,0xdc,0x0c,0xdc, ++ 0x51,0x04,0x00,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0x94,0x14,0x53,0x04,0x13,0x00, ++ 0x92,0x0c,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xd0,0x4a,0xcf,0x86,0x55,0x04,0x00,0x00,0xd4,0x20,0xd3,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0d,0x00,0x10,0x00,0x0d,0x00,0x0d,0x00,0x52,0x04,0x0d,0x00,0x91,0x08, ++ 0x10,0x04,0x0d,0x00,0x10,0x00,0x10,0x00,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x10,0x00, ++ 0x10,0x04,0x10,0x00,0x11,0x00,0x91,0x08,0x10,0x04,0x11,0x00,0x00,0x00,0x12,0x00, ++ 0x52,0x04,0x12,0x00,0x11,0x04,0x12,0x00,0x00,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04, ++ 0x00,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x14,0xdc, ++ 0x12,0xe6,0x12,0xe6,0xd4,0x30,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x12,0xe6,0x10,0x04, ++ 0x12,0x00,0x11,0xdc,0x51,0x04,0x0d,0xe6,0x10,0x04,0x0d,0xdc,0x0d,0xe6,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x0d,0xe6,0x0d,0xdc,0x0d,0xe6,0x91,0x08,0x10,0x04,0x0d,0xe6, ++ 0x0d,0xdc,0x0d,0xdc,0xd3,0x1c,0xd2,0x10,0xd1,0x08,0x10,0x04,0x0d,0x1b,0x0d,0x1c, ++ 0x10,0x04,0x0d,0x1d,0x0d,0xe6,0x51,0x04,0x0d,0xe6,0x10,0x04,0x0d,0xdc,0x0d,0xe6, ++ 0xd2,0x10,0xd1,0x08,0x10,0x04,0x0d,0xe6,0x0d,0xdc,0x10,0x04,0x0d,0xdc,0x0d,0xe6, ++ 0x51,0x04,0x0d,0xe6,0x10,0x04,0x0d,0xe6,0x10,0xe6,0xe1,0x3a,0x01,0xd0,0x77,0xcf, ++ 0x86,0xd5,0x20,0x94,0x1c,0x93,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0b,0x00,0x01, ++ 0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x07,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0xd4,0x1b,0x53,0x04,0x01,0x00,0x92,0x13,0x91,0x0f,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe0,0xa4,0xa8,0xe0,0xa4,0xbc,0x00,0x01,0x00,0x01,0x00,0xd3,0x26,0xd2,0x13, ++ 0x91,0x0f,0x10,0x04,0x01,0x00,0x01,0xff,0xe0,0xa4,0xb0,0xe0,0xa4,0xbc,0x00,0x01, ++ 0x00,0x91,0x0f,0x10,0x0b,0x01,0xff,0xe0,0xa4,0xb3,0xe0,0xa4,0xbc,0x00,0x01,0x00, ++ 0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x0c,0x00,0x91,0x08,0x10,0x04,0x01,0x07, ++ 0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0x8c,0xd4,0x18,0x53,0x04,0x01,0x00,0x52,0x04, ++ 0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x01,0x09,0x10,0x04,0x0b,0x00,0x0c,0x00, ++ 0xd3,0x1c,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x01,0xe6,0x10,0x04,0x01,0xdc, ++ 0x01,0xe6,0x91,0x08,0x10,0x04,0x01,0xe6,0x0b,0x00,0x0c,0x00,0xd2,0x2c,0xd1,0x16, ++ 0x10,0x0b,0x01,0xff,0xe0,0xa4,0x95,0xe0,0xa4,0xbc,0x00,0x01,0xff,0xe0,0xa4,0x96, ++ 0xe0,0xa4,0xbc,0x00,0x10,0x0b,0x01,0xff,0xe0,0xa4,0x97,0xe0,0xa4,0xbc,0x00,0x01, ++ 0xff,0xe0,0xa4,0x9c,0xe0,0xa4,0xbc,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xe0,0xa4, ++ 0xa1,0xe0,0xa4,0xbc,0x00,0x01,0xff,0xe0,0xa4,0xa2,0xe0,0xa4,0xbc,0x00,0x10,0x0b, ++ 0x01,0xff,0xe0,0xa4,0xab,0xe0,0xa4,0xbc,0x00,0x01,0xff,0xe0,0xa4,0xaf,0xe0,0xa4, ++ 0xbc,0x00,0x54,0x04,0x01,0x00,0xd3,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x01,0x00, ++ 0x0a,0x00,0x10,0x04,0x0a,0x00,0x0c,0x00,0x0c,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x10,0x00,0x0b,0x00,0x10,0x04,0x0b,0x00,0x09,0x00,0x91,0x08,0x10,0x04,0x09,0x00, ++ 0x08,0x00,0x09,0x00,0xd0,0x86,0xcf,0x86,0xd5,0x44,0xd4,0x2c,0xd3,0x18,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x10,0x00,0x01,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00, ++ 0x10,0x04,0x00,0x00,0x01,0x00,0x93,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04, ++ 0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00, ++ 0xd3,0x18,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00, ++ 0x91,0x08,0x10,0x04,0x01,0x07,0x07,0x00,0x01,0x00,0xcf,0x86,0xd5,0x7b,0xd4,0x42, ++ 0xd3,0x14,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x01,0x00,0xd2,0x17,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x01,0xff,0xe0,0xa7,0x87,0xe0,0xa6,0xbe,0x00,0xd1,0x0f,0x10,0x0b,0x01, ++ 0xff,0xe0,0xa7,0x87,0xe0,0xa7,0x97,0x00,0x01,0x09,0x10,0x04,0x08,0x00,0x00,0x00, ++ 0xd3,0x10,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x52,0x04,0x00,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xe0,0xa6,0xa1,0xe0,0xa6,0xbc, ++ 0x00,0x01,0xff,0xe0,0xa6,0xa2,0xe0,0xa6,0xbc,0x00,0x10,0x04,0x00,0x00,0x01,0xff, ++ 0xe0,0xa6,0xaf,0xe0,0xa6,0xbc,0x00,0xd4,0x10,0x93,0x0c,0x52,0x04,0x01,0x00,0x11, ++ 0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x01,0x00,0x0b,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x14,0xe6,0x00, ++ 0x00,0xe2,0x48,0x02,0xe1,0x4f,0x01,0xd0,0xa4,0xcf,0x86,0xd5,0x4c,0xd4,0x34,0xd3, ++ 0x1c,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00,0x00,0x07,0x00,0x10,0x04,0x01,0x00,0x07, ++ 0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01, ++ 0x00,0x93,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x2e,0xd2,0x17,0xd1, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xe0,0xa8,0xb2, ++ 0xe0,0xa8,0xbc,0x00,0xd1,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x10,0x0b,0x01,0xff, ++ 0xe0,0xa8,0xb8,0xe0,0xa8,0xbc,0x00,0x00,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x00, ++ 0x00,0x91,0x08,0x10,0x04,0x01,0x07,0x00,0x00,0x01,0x00,0xcf,0x86,0xd5,0x80,0xd4, ++ 0x34,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x51, ++ 0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01, ++ 0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x01, ++ 0x09,0x00,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0a,0x00,0x00, ++ 0x00,0x00,0x00,0xd2,0x25,0xd1,0x0f,0x10,0x04,0x00,0x00,0x01,0xff,0xe0,0xa8,0x96, ++ 0xe0,0xa8,0xbc,0x00,0x10,0x0b,0x01,0xff,0xe0,0xa8,0x97,0xe0,0xa8,0xbc,0x00,0x01, ++ 0xff,0xe0,0xa8,0x9c,0xe0,0xa8,0xbc,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00, ++ 0x10,0x0b,0x01,0xff,0xe0,0xa8,0xab,0xe0,0xa8,0xbc,0x00,0x00,0x00,0xd4,0x10,0x93, ++ 0x0c,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x93,0x14,0x52, ++ 0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x0a,0x00,0x10,0x04,0x14,0x00,0x00, ++ 0x00,0x00,0x00,0xd0,0x82,0xcf,0x86,0xd5,0x40,0xd4,0x2c,0xd3,0x18,0xd2,0x0c,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01, ++ 0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x07,0x00,0x01,0x00,0x10, ++ 0x04,0x00,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x18,0xd2,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01, ++ 0x00,0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x01, ++ 0x07,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0x3c,0xd4,0x28,0xd3,0x10,0x52,0x04,0x01, ++ 0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x01,0x09,0x00, ++ 0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0xd4,0x18,0x93,0x14,0xd2,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x07, ++ 0x00,0x07,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x10,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x0d,0x00,0x07,0x00,0x00,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x11,0x00,0x13,0x00,0x13,0x00,0xe1,0x24,0x01,0xd0,0x86,0xcf,0x86, ++ 0xd5,0x44,0xd4,0x2c,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00, ++ 0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x93,0x14, ++ 0x92,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x01,0x00,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x07,0x00,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x01,0x07,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x73,0xd4,0x45,0xd3,0x14,0x52,0x04,0x01,0x00,0xd1,0x08, ++ 0x10,0x04,0x0a,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xd2,0x1e,0xd1,0x0f, ++ 0x10,0x0b,0x01,0xff,0xe0,0xad,0x87,0xe0,0xad,0x96,0x00,0x00,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0xff,0xe0,0xad,0x87,0xe0,0xac,0xbe,0x00,0x91,0x0f,0x10,0x0b,0x01,0xff, ++ 0xe0,0xad,0x87,0xe0,0xad,0x97,0x00,0x01,0x09,0x00,0x00,0xd3,0x0c,0x52,0x04,0x00, ++ 0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x52,0x04,0x00,0x00,0xd1,0x16,0x10,0x0b,0x01, ++ 0xff,0xe0,0xac,0xa1,0xe0,0xac,0xbc,0x00,0x01,0xff,0xe0,0xac,0xa2,0xe0,0xac,0xbc, ++ 0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xd4,0x14,0x93,0x10,0xd2,0x08,0x11,0x04,0x01, ++ 0x00,0x0a,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x07,0x00,0x0c,0x00,0x0c,0x00,0x00,0x00,0xd0,0xb1,0xcf, ++ 0x86,0xd5,0x63,0xd4,0x28,0xd3,0x14,0xd2,0x08,0x11,0x04,0x00,0x00,0x01,0x00,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0xd3,0x1f,0xd2,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x91,0x0f,0x10,0x0b,0x01,0xff,0xe0, ++ 0xae,0x92,0xe0,0xaf,0x97,0x00,0x01,0x00,0x00,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x00,0x00,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x01,0x00,0xd4,0x2c,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0xd2,0x0c, ++ 0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00, ++ 0xd3,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x08,0x00,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0xcf,0x86, ++ 0xd5,0x61,0xd4,0x45,0xd3,0x14,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0xd2,0x1e,0xd1,0x08,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x10,0x0b,0x01,0xff,0xe0,0xaf,0x86,0xe0,0xae,0xbe,0x00,0x01,0xff,0xe0, ++ 0xaf,0x87,0xe0,0xae,0xbe,0x00,0x91,0x0f,0x10,0x0b,0x01,0xff,0xe0,0xaf,0x86,0xe0, ++ 0xaf,0x97,0x00,0x01,0x09,0x00,0x00,0x93,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0a, ++ 0x00,0x00,0x00,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x00, ++ 0x00,0xd4,0x14,0x93,0x10,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x08, ++ 0x00,0x01,0x00,0x01,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x07,0x00,0x07,0x00,0x92,0x0c,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00,0x00, ++ 0x00,0x00,0x00,0xe3,0x1c,0x04,0xe2,0x1a,0x02,0xd1,0xf3,0xd0,0x76,0xcf,0x86,0xd5, ++ 0x3c,0xd4,0x28,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x01,0x00,0x01, ++ 0x00,0x91,0x08,0x10,0x04,0x14,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01, ++ 0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd3, ++ 0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x01,0x00,0x01,0x00,0xd2, ++ 0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x0a,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0x53,0xd4,0x2f,0xd3,0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10, ++ 0x04,0x01,0x00,0x00,0x00,0x01,0x00,0xd2,0x13,0x91,0x0f,0x10,0x0b,0x01,0xff,0xe0, ++ 0xb1,0x86,0xe0,0xb1,0x96,0x00,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00, ++ 0x01,0x09,0x00,0x00,0xd3,0x14,0x52,0x04,0x00,0x00,0xd1,0x08,0x10,0x04,0x00,0x00, ++ 0x01,0x54,0x10,0x04,0x01,0x5b,0x00,0x00,0x92,0x0c,0x51,0x04,0x0a,0x00,0x10,0x04, ++ 0x11,0x00,0x00,0x00,0x00,0x00,0xd4,0x14,0x93,0x10,0xd2,0x08,0x11,0x04,0x01,0x00, ++ 0x0a,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x93,0x10,0x52,0x04,0x00,0x00, ++ 0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x15,0x00,0x0a,0x00,0xd0,0x76,0xcf,0x86, ++ 0xd5,0x3c,0xd4,0x28,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x12,0x00,0x10,0x00, ++ 0x01,0x00,0x91,0x08,0x10,0x04,0x14,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00, ++ 0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04, ++ 0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00, ++ 0xd3,0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x07,0x07,0x07,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x82,0xd4,0x5e,0xd3,0x2a,0xd2,0x13,0x91,0x0f,0x10,0x0b, ++ 0x01,0xff,0xe0,0xb2,0xbf,0xe0,0xb3,0x95,0x00,0x01,0x00,0x01,0x00,0xd1,0x08,0x10, ++ 0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xe0,0xb3,0x86,0xe0,0xb3, ++ 0x95,0x00,0xd2,0x28,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe0,0xb3,0x86,0xe0,0xb3,0x96, ++ 0x00,0x00,0x00,0x10,0x0b,0x01,0xff,0xe0,0xb3,0x86,0xe0,0xb3,0x82,0x00,0x01,0xff, ++ 0xe0,0xb3,0x86,0xe0,0xb3,0x82,0xe0,0xb3,0x95,0x00,0x91,0x08,0x10,0x04,0x01,0x00, ++ 0x01,0x09,0x00,0x00,0xd3,0x14,0x52,0x04,0x00,0x00,0xd1,0x08,0x10,0x04,0x00,0x00, ++ 0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00, ++ 0x10,0x04,0x01,0x00,0x00,0x00,0xd4,0x14,0x93,0x10,0xd2,0x08,0x11,0x04,0x01,0x00, ++ 0x09,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x93,0x14,0x92,0x10,0xd1,0x08, ++ 0x10,0x04,0x00,0x00,0x09,0x00,0x10,0x04,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xe1,0x06,0x01,0xd0,0x6e,0xcf,0x86,0xd5,0x3c,0xd4,0x28,0xd3,0x18,0xd2,0x0c,0x91, ++ 0x08,0x10,0x04,0x13,0x00,0x10,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01, ++ 0x00,0x01,0x00,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01, ++ 0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x01, ++ 0x00,0x0c,0x00,0x01,0x00,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x0c,0x00,0x13,0x09,0x91,0x08,0x10,0x04,0x13,0x09,0x0a,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0x65,0xd4,0x45,0xd3,0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10, ++ 0x04,0x0a,0x00,0x00,0x00,0x01,0x00,0xd2,0x1e,0xd1,0x08,0x10,0x04,0x01,0x00,0x00, ++ 0x00,0x10,0x0b,0x01,0xff,0xe0,0xb5,0x86,0xe0,0xb4,0xbe,0x00,0x01,0xff,0xe0,0xb5, ++ 0x87,0xe0,0xb4,0xbe,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe0,0xb5,0x86,0xe0,0xb5, ++ 0x97,0x00,0x01,0x09,0x10,0x04,0x0c,0x00,0x12,0x00,0xd3,0x10,0x52,0x04,0x00,0x00, ++ 0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x01,0x00,0x52,0x04,0x12,0x00,0x51,0x04, ++ 0x12,0x00,0x10,0x04,0x12,0x00,0x11,0x00,0xd4,0x14,0x93,0x10,0xd2,0x08,0x11,0x04, ++ 0x01,0x00,0x0a,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x0c,0x52,0x04, ++ 0x0a,0x00,0x11,0x04,0x0a,0x00,0x12,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x12,0x00, ++ 0x0a,0x00,0x0a,0x00,0x0a,0x00,0xd0,0x5a,0xcf,0x86,0xd5,0x34,0xd4,0x18,0x93,0x14, ++ 0xd2,0x08,0x11,0x04,0x00,0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x04,0x00, ++ 0x04,0x00,0x04,0x00,0xd3,0x10,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04, ++ 0x04,0x00,0x00,0x00,0x92,0x08,0x11,0x04,0x00,0x00,0x04,0x00,0x04,0x00,0x54,0x04, ++ 0x04,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x04,0x00,0x10,0x04,0x00,0x00,0x04,0x00, ++ 0x04,0x00,0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x04,0x00,0x00,0x00, ++ 0xcf,0x86,0xd5,0x77,0xd4,0x28,0xd3,0x10,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00, ++ 0x10,0x04,0x04,0x00,0x00,0x00,0xd2,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x04,0x09, ++ 0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x04,0x00,0xd3,0x14,0x52,0x04, ++ 0x04,0x00,0xd1,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x10,0x04,0x04,0x00,0x00,0x00, ++ 0xd2,0x13,0x51,0x04,0x04,0x00,0x10,0x0b,0x04,0xff,0xe0,0xb7,0x99,0xe0,0xb7,0x8a, ++ 0x00,0x04,0x00,0xd1,0x19,0x10,0x0b,0x04,0xff,0xe0,0xb7,0x99,0xe0,0xb7,0x8f,0x00, ++ 0x04,0xff,0xe0,0xb7,0x99,0xe0,0xb7,0x8f,0xe0,0xb7,0x8a,0x00,0x10,0x0b,0x04,0xff, ++ 0xe0,0xb7,0x99,0xe0,0xb7,0x9f,0x00,0x04,0x00,0xd4,0x10,0x93,0x0c,0x52,0x04,0x00, ++ 0x00,0x11,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x93,0x14,0xd2,0x08,0x11,0x04,0x00, ++ 0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xe2, ++ 0x31,0x01,0xd1,0x58,0xd0,0x3a,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x67,0x10,0x04, ++ 0x01,0x09,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xcf,0x86, ++ 0x95,0x18,0xd4,0x0c,0x53,0x04,0x01,0x00,0x12,0x04,0x01,0x6b,0x01,0x00,0x53,0x04, ++ 0x01,0x00,0x12,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0xd0,0x9e,0xcf,0x86,0xd5,0x54, ++ 0xd4,0x3c,0xd3,0x20,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x10,0x04, ++ 0x01,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x15,0x00, ++ 0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x15,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x91,0x08,0x10,0x04,0x15,0x00,0x01,0x00,0x15,0x00,0xd3,0x08,0x12,0x04, ++ 0x15,0x00,0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x15,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0xd4,0x30,0xd3,0x1c,0xd2,0x0c,0x91,0x08,0x10,0x04,0x15,0x00,0x01,0x00, ++ 0x01,0x00,0xd1,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x15,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x15,0x00,0x01,0x00, ++ 0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x76,0x10,0x04,0x15,0x09, ++ 0x01,0x00,0x11,0x04,0x01,0x00,0x00,0x00,0xcf,0x86,0x95,0x34,0xd4,0x20,0xd3,0x14, ++ 0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x52,0x04,0x01,0x7a,0x11,0x04,0x01,0x00,0x00,0x00,0x53,0x04,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x11,0x04,0x01,0x00,0x0d,0x00,0x00,0x00, ++ 0xe1,0x2b,0x01,0xd0,0x3e,0xcf,0x86,0xd5,0x14,0x54,0x04,0x02,0x00,0x53,0x04,0x02, ++ 0x00,0x92,0x08,0x11,0x04,0x02,0xdc,0x02,0x00,0x02,0x00,0x54,0x04,0x02,0x00,0xd3, ++ 0x14,0x52,0x04,0x02,0x00,0xd1,0x08,0x10,0x04,0x02,0x00,0x02,0xdc,0x10,0x04,0x02, ++ 0x00,0x02,0xdc,0x92,0x0c,0x91,0x08,0x10,0x04,0x02,0x00,0x02,0xd8,0x02,0x00,0x02, ++ 0x00,0xcf,0x86,0xd5,0x73,0xd4,0x36,0xd3,0x17,0x92,0x13,0x51,0x04,0x02,0x00,0x10, ++ 0x04,0x02,0x00,0x02,0xff,0xe0,0xbd,0x82,0xe0,0xbe,0xb7,0x00,0x02,0x00,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x00,0x00,0x02,0x00,0x02,0x00,0x91,0x0f,0x10,0x04,0x02,0x00, ++ 0x02,0xff,0xe0,0xbd,0x8c,0xe0,0xbe,0xb7,0x00,0x02,0x00,0xd3,0x26,0xd2,0x13,0x51, ++ 0x04,0x02,0x00,0x10,0x0b,0x02,0xff,0xe0,0xbd,0x91,0xe0,0xbe,0xb7,0x00,0x02,0x00, ++ 0x51,0x04,0x02,0x00,0x10,0x04,0x02,0x00,0x02,0xff,0xe0,0xbd,0x96,0xe0,0xbe,0xb7, ++ 0x00,0x52,0x04,0x02,0x00,0x91,0x0f,0x10,0x0b,0x02,0xff,0xe0,0xbd,0x9b,0xe0,0xbe, ++ 0xb7,0x00,0x02,0x00,0x02,0x00,0xd4,0x27,0x53,0x04,0x02,0x00,0xd2,0x17,0xd1,0x0f, ++ 0x10,0x04,0x02,0x00,0x02,0xff,0xe0,0xbd,0x80,0xe0,0xbe,0xb5,0x00,0x10,0x04,0x04, ++ 0x00,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a,0x00,0x00,0x00,0x00,0x00,0xd3,0x35,0xd2, ++ 0x17,0xd1,0x08,0x10,0x04,0x00,0x00,0x02,0x81,0x10,0x04,0x02,0x82,0x02,0xff,0xe0, ++ 0xbd,0xb1,0xe0,0xbd,0xb2,0x00,0xd1,0x0f,0x10,0x04,0x02,0x84,0x02,0xff,0xe0,0xbd, ++ 0xb1,0xe0,0xbd,0xb4,0x00,0x10,0x0b,0x02,0xff,0xe0,0xbe,0xb2,0xe0,0xbe,0x80,0x00, ++ 0x02,0x00,0xd2,0x13,0x91,0x0f,0x10,0x0b,0x02,0xff,0xe0,0xbe,0xb3,0xe0,0xbe,0x80, ++ 0x00,0x02,0x00,0x02,0x82,0x11,0x04,0x02,0x82,0x02,0x00,0xd0,0xd3,0xcf,0x86,0xd5, ++ 0x65,0xd4,0x27,0xd3,0x1f,0xd2,0x13,0x91,0x0f,0x10,0x04,0x02,0x82,0x02,0xff,0xe0, ++ 0xbd,0xb1,0xe0,0xbe,0x80,0x00,0x02,0xe6,0x91,0x08,0x10,0x04,0x02,0x09,0x02,0x00, ++ 0x02,0xe6,0x12,0x04,0x02,0x00,0x0c,0x00,0xd3,0x1f,0xd2,0x13,0x51,0x04,0x02,0x00, ++ 0x10,0x04,0x02,0x00,0x02,0xff,0xe0,0xbe,0x92,0xe0,0xbe,0xb7,0x00,0x51,0x04,0x02, ++ 0x00,0x10,0x04,0x04,0x00,0x02,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x02, ++ 0x00,0x02,0x00,0x91,0x0f,0x10,0x04,0x02,0x00,0x02,0xff,0xe0,0xbe,0x9c,0xe0,0xbe, ++ 0xb7,0x00,0x02,0x00,0xd4,0x3d,0xd3,0x26,0xd2,0x13,0x51,0x04,0x02,0x00,0x10,0x0b, ++ 0x02,0xff,0xe0,0xbe,0xa1,0xe0,0xbe,0xb7,0x00,0x02,0x00,0x51,0x04,0x02,0x00,0x10, ++ 0x04,0x02,0x00,0x02,0xff,0xe0,0xbe,0xa6,0xe0,0xbe,0xb7,0x00,0x52,0x04,0x02,0x00, ++ 0x91,0x0f,0x10,0x0b,0x02,0xff,0xe0,0xbe,0xab,0xe0,0xbe,0xb7,0x00,0x02,0x00,0x04, ++ 0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x02,0x00,0x02,0x00,0x02, ++ 0x00,0xd2,0x13,0x91,0x0f,0x10,0x04,0x04,0x00,0x02,0xff,0xe0,0xbe,0x90,0xe0,0xbe, ++ 0xb5,0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0xcf,0x86, ++ 0x95,0x4c,0xd4,0x24,0xd3,0x10,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04, ++ 0x04,0xdc,0x04,0x00,0x52,0x04,0x04,0x00,0xd1,0x08,0x10,0x04,0x04,0x00,0x00,0x00, ++ 0x10,0x04,0x0a,0x00,0x04,0x00,0xd3,0x14,0xd2,0x08,0x11,0x04,0x08,0x00,0x0a,0x00, ++ 0x91,0x08,0x10,0x04,0x0a,0x00,0x0b,0x00,0x0b,0x00,0x92,0x10,0xd1,0x08,0x10,0x04, ++ 0x0b,0x00,0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86, ++ 0xe5,0xf7,0x04,0xe4,0x79,0x03,0xe3,0x7b,0x01,0xe2,0x04,0x01,0xd1,0x7f,0xd0,0x65, ++ 0xcf,0x86,0x55,0x04,0x04,0x00,0xd4,0x33,0xd3,0x1f,0xd2,0x0c,0x51,0x04,0x04,0x00, ++ 0x10,0x04,0x0a,0x00,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x0b,0x04,0xff,0xe1,0x80, ++ 0xa5,0xe1,0x80,0xae,0x00,0x04,0x00,0x92,0x10,0xd1,0x08,0x10,0x04,0x0a,0x00,0x04, ++ 0x00,0x10,0x04,0x04,0x00,0x0a,0x00,0x04,0x00,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x04, ++ 0x00,0x10,0x04,0x04,0x00,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10,0x04,0x04,0x00,0x04, ++ 0x07,0x92,0x10,0xd1,0x08,0x10,0x04,0x04,0x00,0x04,0x09,0x10,0x04,0x0a,0x09,0x0a, ++ 0x00,0x0a,0x00,0xcf,0x86,0x95,0x14,0x54,0x04,0x04,0x00,0x53,0x04,0x04,0x00,0x92, ++ 0x08,0x11,0x04,0x04,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0xd0,0x2e,0xcf,0x86,0x95, ++ 0x28,0xd4,0x14,0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a, ++ 0x00,0x0a,0xdc,0x0a,0x00,0x53,0x04,0x0a,0x00,0xd2,0x08,0x11,0x04,0x0a,0x00,0x0b, ++ 0x00,0x11,0x04,0x0b,0x00,0x0a,0x00,0x01,0x00,0xcf,0x86,0xd5,0x24,0x94,0x20,0xd3, ++ 0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x00,0x00,0x0d,0x00,0x52, ++ 0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x00,0x00,0x01,0x00,0x54, ++ 0x04,0x01,0x00,0xd3,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x06,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x06,0x00,0x08,0x00,0x10,0x04,0x08, ++ 0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x08,0x00,0x0d,0x00,0x0d,0x00,0xd1,0x3e,0xd0, ++ 0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x1d,0x54,0x04,0x01,0x00,0x53,0x04,0x01, ++ 0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b, ++ 0x00,0x01,0xff,0x00,0x94,0x15,0x93,0x11,0x92,0x0d,0x91,0x09,0x10,0x05,0x01,0xff, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0x1e,0xcf,0x86,0x55, ++ 0x04,0x01,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x0b,0x00,0x0b,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x54, ++ 0x04,0x01,0x00,0x53,0x04,0x01,0x00,0x92,0x08,0x11,0x04,0x01,0x00,0x0b,0x00,0x0b, ++ 0x00,0xe2,0x21,0x01,0xd1,0x6c,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x93,0x10, ++ 0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0x04,0x00, ++ 0x04,0x00,0x04,0x00,0xcf,0x86,0x95,0x48,0xd4,0x24,0xd3,0x10,0x52,0x04,0x04,0x00, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0xd3,0x10,0x52,0x04, ++ 0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x00,0x00,0xd2,0x0c,0x91,0x08, ++ 0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0x04,0x00, ++ 0xd0,0x62,0xcf,0x86,0xd5,0x28,0x94,0x24,0xd3,0x10,0x52,0x04,0x04,0x00,0x51,0x04, ++ 0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x04,0x00, ++ 0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0xd4,0x14,0x53,0x04, ++ 0x04,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00, ++ 0xd3,0x14,0xd2,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04, ++ 0x04,0x00,0x00,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00, ++ 0x00,0x00,0xcf,0x86,0xd5,0x38,0xd4,0x24,0xd3,0x14,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0x52,0x04,0x04,0x00, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0x93,0x10,0x52,0x04,0x04,0x00, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0x94,0x14,0x53,0x04, ++ 0x04,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00, ++ 0x04,0x00,0xd1,0x9c,0xd0,0x3e,0xcf,0x86,0x95,0x38,0xd4,0x14,0x53,0x04,0x04,0x00, ++ 0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0xd3,0x14, ++ 0xd2,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00, ++ 0x00,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00, ++ 0x04,0x00,0xcf,0x86,0xd5,0x34,0xd4,0x14,0x93,0x10,0x52,0x04,0x04,0x00,0x51,0x04, ++ 0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0x04,0x00,0x53,0x04,0x04,0x00,0xd2,0x0c, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x00,0x00, ++ 0x0c,0xe6,0x10,0x04,0x0c,0xe6,0x08,0xe6,0xd4,0x14,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x08,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x53,0x04,0x04,0x00, ++ 0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0xd0,0x1a, ++ 0xcf,0x86,0x95,0x14,0x54,0x04,0x08,0x00,0x53,0x04,0x08,0x00,0x92,0x08,0x11,0x04, ++ 0x08,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04, ++ 0x04,0x00,0xd3,0x10,0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x11,0x00, ++ 0x00,0x00,0x52,0x04,0x11,0x00,0x11,0x04,0x11,0x00,0x00,0x00,0xd3,0x30,0xd2,0x2a, ++ 0xd1,0x24,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0b,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00, ++ 0xcf,0x06,0x04,0x00,0xcf,0x06,0x04,0x00,0xcf,0x06,0x04,0x00,0xd2,0x6c,0xd1,0x24, ++ 0xd0,0x06,0xcf,0x06,0x04,0x00,0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04,0x04,0x00, ++ 0x93,0x10,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x0b,0x00, ++ 0x0b,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x04,0x00,0x53,0x04,0x04,0x00, ++ 0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x04,0x00, ++ 0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04,0x04,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x04,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1,0x80,0xd0,0x46,0xcf,0x86,0xd5,0x28, ++ 0xd4,0x14,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x91,0x08,0x10,0x04,0x06,0x00, ++ 0x00,0x00,0x06,0x00,0x93,0x10,0x52,0x04,0x06,0x00,0x91,0x08,0x10,0x04,0x06,0x09, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x04,0x06,0x00,0x93,0x14,0x52,0x04,0x06,0x00, ++ 0xd1,0x08,0x10,0x04,0x06,0x09,0x06,0x00,0x10,0x04,0x06,0x00,0x00,0x00,0x00,0x00, ++ 0xcf,0x86,0xd5,0x10,0x54,0x04,0x06,0x00,0x93,0x08,0x12,0x04,0x06,0x00,0x00,0x00, ++ 0x00,0x00,0xd4,0x14,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x91,0x08,0x10,0x04, ++ 0x06,0x00,0x00,0x00,0x06,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x06,0x00, ++ 0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0xd0,0x1b,0xcf,0x86,0x55,0x04,0x04,0x00, ++ 0x54,0x04,0x04,0x00,0x93,0x0d,0x52,0x04,0x04,0x00,0x11,0x05,0x04,0xff,0x00,0x04, ++ 0x00,0x04,0x00,0xcf,0x86,0xd5,0x24,0x54,0x04,0x04,0x00,0xd3,0x10,0x92,0x0c,0x51, ++ 0x04,0x04,0x00,0x10,0x04,0x04,0x09,0x04,0x00,0x04,0x00,0x52,0x04,0x04,0x00,0x91, ++ 0x08,0x10,0x04,0x04,0x00,0x07,0xe6,0x00,0x00,0xd4,0x10,0x53,0x04,0x04,0x00,0x92, ++ 0x08,0x11,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x07,0x00,0x92,0x08,0x11, ++ 0x04,0x07,0x00,0x00,0x00,0x00,0x00,0xe4,0xb7,0x03,0xe3,0x58,0x01,0xd2,0x8f,0xd1, ++ 0x53,0xd0,0x35,0xcf,0x86,0x95,0x2f,0xd4,0x1f,0x53,0x04,0x04,0x00,0xd2,0x0d,0x51, ++ 0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x04,0xff,0x00,0x51,0x05,0x04,0xff,0x00,0x10, ++ 0x05,0x04,0xff,0x00,0x00,0x00,0x53,0x04,0x04,0x00,0x92,0x08,0x11,0x04,0x04,0x00, ++ 0x00,0x00,0x00,0x00,0x04,0x00,0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04,0x04,0x00, ++ 0x53,0x04,0x04,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0xd0,0x22,0xcf,0x86,0x55,0x04,0x04,0x00,0x94,0x18,0x53,0x04,0x04,0x00, ++ 0x92,0x10,0xd1,0x08,0x10,0x04,0x04,0x00,0x04,0xe4,0x10,0x04,0x0a,0x00,0x00,0x00, ++ 0x00,0x00,0x0b,0x00,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04,0x0b,0x00,0x93,0x0c, ++ 0x52,0x04,0x0b,0x00,0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xd1,0x80,0xd0,0x42, ++ 0xcf,0x86,0xd5,0x1c,0x54,0x04,0x07,0x00,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00, ++ 0xd1,0x08,0x10,0x04,0x07,0x00,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0xd4,0x0c, ++ 0x53,0x04,0x07,0x00,0x12,0x04,0x07,0x00,0x00,0x00,0x53,0x04,0x07,0x00,0x92,0x10, ++ 0xd1,0x08,0x10,0x04,0x07,0x00,0x07,0xde,0x10,0x04,0x07,0xe6,0x07,0xdc,0x00,0x00, ++ 0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x07,0x00, ++ 0x00,0x00,0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0xd4,0x10,0x53,0x04,0x07,0x00, ++ 0x52,0x04,0x07,0x00,0x11,0x04,0x07,0x00,0x00,0x00,0x93,0x10,0x52,0x04,0x07,0x00, ++ 0x91,0x08,0x10,0x04,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd0,0x1a,0xcf,0x86, ++ 0x55,0x04,0x08,0x00,0x94,0x10,0x53,0x04,0x08,0x00,0x92,0x08,0x11,0x04,0x08,0x00, ++ 0x0b,0x00,0x00,0x00,0x08,0x00,0xcf,0x86,0x95,0x28,0xd4,0x10,0x53,0x04,0x08,0x00, ++ 0x92,0x08,0x11,0x04,0x08,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x08,0x00,0xd2,0x0c, ++ 0x51,0x04,0x08,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x08,0x00, ++ 0x07,0x00,0xd2,0xe4,0xd1,0x80,0xd0,0x2e,0xcf,0x86,0x95,0x28,0x54,0x04,0x08,0x00, ++ 0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x08,0xe6, ++ 0xd2,0x0c,0x91,0x08,0x10,0x04,0x08,0xdc,0x08,0x00,0x08,0x00,0x11,0x04,0x00,0x00, ++ 0x08,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00, ++ 0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0xd4,0x14, ++ 0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0b,0x09,0x0b,0x00,0x0b,0x00,0x0b,0x00, ++ 0x0b,0x00,0xd3,0x10,0x52,0x04,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x00,0x0b,0xe6, ++ 0x0b,0xe6,0x52,0x04,0x0b,0xe6,0xd1,0x08,0x10,0x04,0x0b,0xe6,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x0b,0xdc,0xd0,0x5e,0xcf,0x86,0xd5,0x20,0xd4,0x10,0x53,0x04,0x0b,0x00, ++ 0x92,0x08,0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x0b,0x00,0x92,0x08, ++ 0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xd4,0x10,0x53,0x04,0x0b,0x00,0x52,0x04, ++ 0x0b,0x00,0x11,0x04,0x0b,0x00,0x00,0x00,0xd3,0x10,0x52,0x04,0x10,0xe6,0x91,0x08, ++ 0x10,0x04,0x10,0xe6,0x10,0xdc,0x10,0xdc,0xd2,0x0c,0x51,0x04,0x10,0xdc,0x10,0x04, ++ 0x10,0xdc,0x10,0xe6,0xd1,0x08,0x10,0x04,0x10,0xe6,0x10,0xdc,0x10,0x04,0x10,0x00, ++ 0x00,0x00,0xcf,0x06,0x00,0x00,0xe1,0x1e,0x01,0xd0,0xaa,0xcf,0x86,0xd5,0x6e,0xd4, ++ 0x53,0xd3,0x17,0x52,0x04,0x09,0x00,0x51,0x04,0x09,0x00,0x10,0x0b,0x09,0xff,0xe1, ++ 0xac,0x85,0xe1,0xac,0xb5,0x00,0x09,0x00,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x09,0xff, ++ 0xe1,0xac,0x87,0xe1,0xac,0xb5,0x00,0x09,0x00,0x10,0x0b,0x09,0xff,0xe1,0xac,0x89, ++ 0xe1,0xac,0xb5,0x00,0x09,0x00,0xd1,0x0f,0x10,0x0b,0x09,0xff,0xe1,0xac,0x8b,0xe1, ++ 0xac,0xb5,0x00,0x09,0x00,0x10,0x0b,0x09,0xff,0xe1,0xac,0x8d,0xe1,0xac,0xb5,0x00, ++ 0x09,0x00,0x93,0x17,0x92,0x13,0x51,0x04,0x09,0x00,0x10,0x0b,0x09,0xff,0xe1,0xac, ++ 0x91,0xe1,0xac,0xb5,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x54,0x04,0x09,0x00,0xd3, ++ 0x10,0x52,0x04,0x09,0x00,0x91,0x08,0x10,0x04,0x09,0x07,0x09,0x00,0x09,0x00,0xd2, ++ 0x13,0x51,0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x09,0xff,0xe1,0xac,0xba,0xe1,0xac, ++ 0xb5,0x00,0x91,0x0f,0x10,0x04,0x09,0x00,0x09,0xff,0xe1,0xac,0xbc,0xe1,0xac,0xb5, ++ 0x00,0x09,0x00,0xcf,0x86,0xd5,0x3d,0x94,0x39,0xd3,0x31,0xd2,0x25,0xd1,0x16,0x10, ++ 0x0b,0x09,0xff,0xe1,0xac,0xbe,0xe1,0xac,0xb5,0x00,0x09,0xff,0xe1,0xac,0xbf,0xe1, ++ 0xac,0xb5,0x00,0x10,0x04,0x09,0x00,0x09,0xff,0xe1,0xad,0x82,0xe1,0xac,0xb5,0x00, ++ 0x91,0x08,0x10,0x04,0x09,0x09,0x09,0x00,0x09,0x00,0x12,0x04,0x09,0x00,0x00,0x00, ++ 0x09,0x00,0xd4,0x1c,0x53,0x04,0x09,0x00,0xd2,0x0c,0x51,0x04,0x09,0x00,0x10,0x04, ++ 0x09,0x00,0x09,0xe6,0x91,0x08,0x10,0x04,0x09,0xdc,0x09,0xe6,0x09,0xe6,0xd3,0x08, ++ 0x12,0x04,0x09,0xe6,0x09,0x00,0x52,0x04,0x09,0x00,0x91,0x08,0x10,0x04,0x09,0x00, ++ 0x00,0x00,0x00,0x00,0xd0,0x2e,0xcf,0x86,0x55,0x04,0x0a,0x00,0xd4,0x18,0x53,0x04, ++ 0x0a,0x00,0xd2,0x0c,0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x09,0x0d,0x09,0x11,0x04, ++ 0x0d,0x00,0x0a,0x00,0x53,0x04,0x0a,0x00,0x92,0x08,0x11,0x04,0x0a,0x00,0x0d,0x00, ++ 0x0d,0x00,0xcf,0x86,0x55,0x04,0x0c,0x00,0xd4,0x14,0x93,0x10,0x52,0x04,0x0c,0x00, ++ 0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x07,0x0c,0x00,0x0c,0x00,0xd3,0x0c,0x92,0x08, ++ 0x11,0x04,0x0c,0x00,0x0c,0x09,0x00,0x00,0x12,0x04,0x00,0x00,0x0c,0x00,0xe3,0xb2, ++ 0x01,0xe2,0x09,0x01,0xd1,0x4c,0xd0,0x2a,0xcf,0x86,0x55,0x04,0x0a,0x00,0x54,0x04, ++ 0x0a,0x00,0xd3,0x10,0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x00, ++ 0x0a,0x07,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0a,0x00,0x0a,0x00, ++ 0xcf,0x86,0x95,0x1c,0x94,0x18,0x53,0x04,0x0a,0x00,0xd2,0x08,0x11,0x04,0x0a,0x00, ++ 0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00, ++ 0xd0,0x3a,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x12,0x00,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x00,0x54,0x04,0x14,0x00, ++ 0x53,0x04,0x14,0x00,0xd2,0x0c,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00, ++ 0x91,0x08,0x10,0x04,0x00,0x00,0x14,0x00,0x14,0x00,0xcf,0x86,0xd5,0x2c,0xd4,0x08, ++ 0x13,0x04,0x0d,0x00,0x00,0x00,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x0b,0xe6,0x10,0x04, ++ 0x0b,0xe6,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x01,0x0b,0xdc,0x0b,0xdc,0x92,0x08, ++ 0x11,0x04,0x0b,0xdc,0x0b,0xe6,0x0b,0xdc,0xd4,0x28,0xd3,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0x01,0x0b,0x01,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x0b,0x01,0x0b,0x00,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x00,0x0b,0xdc,0x0b,0x00, ++ 0xd3,0x1c,0xd2,0x0c,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x0d,0x00,0xd1,0x08, ++ 0x10,0x04,0x0d,0xe6,0x0d,0x00,0x10,0x04,0x0d,0x00,0x13,0x00,0x92,0x0c,0x51,0x04, ++ 0x10,0xe6,0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0xd1,0x1c,0xd0,0x06,0xcf,0x06, ++ 0x07,0x00,0xcf,0x86,0x55,0x04,0x07,0x00,0x94,0x0c,0x53,0x04,0x07,0x00,0x12,0x04, ++ 0x07,0x00,0x08,0x00,0x08,0x00,0xd0,0x06,0xcf,0x06,0x08,0x00,0xcf,0x86,0xd5,0x40, ++ 0xd4,0x2c,0xd3,0x10,0x92,0x0c,0x51,0x04,0x08,0xe6,0x10,0x04,0x08,0xdc,0x08,0xe6, ++ 0x09,0xe6,0xd2,0x0c,0x51,0x04,0x09,0xe6,0x10,0x04,0x09,0xdc,0x0a,0xe6,0xd1,0x08, ++ 0x10,0x04,0x0a,0xe6,0x0a,0xea,0x10,0x04,0x0a,0xd6,0x0a,0xdc,0x93,0x10,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x0a,0xca,0x0a,0xe6,0x0a,0xe6,0x0a,0xe6,0x0a,0xe6,0xd4,0x14, ++ 0x93,0x10,0x52,0x04,0x0a,0xe6,0x51,0x04,0x0a,0xe6,0x10,0x04,0x0a,0xe6,0x10,0xe6, ++ 0x10,0xe6,0xd3,0x10,0x52,0x04,0x10,0xe6,0x51,0x04,0x10,0xe6,0x10,0x04,0x13,0xe8, ++ 0x13,0xe4,0xd2,0x10,0xd1,0x08,0x10,0x04,0x13,0xe4,0x13,0xdc,0x10,0x04,0x00,0x00, ++ 0x12,0xe6,0xd1,0x08,0x10,0x04,0x0c,0xe9,0x0b,0xdc,0x10,0x04,0x09,0xe6,0x09,0xdc, ++ 0xe2,0x80,0x08,0xe1,0x48,0x04,0xe0,0x1c,0x02,0xcf,0x86,0xe5,0x11,0x01,0xd4,0x84, ++ 0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0xa5,0x00,0x01,0xff, ++ 0x61,0xcc,0xa5,0x00,0x10,0x08,0x01,0xff,0x42,0xcc,0x87,0x00,0x01,0xff,0x62,0xcc, ++ 0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x42,0xcc,0xa3,0x00,0x01,0xff,0x62,0xcc, ++ 0xa3,0x00,0x10,0x08,0x01,0xff,0x42,0xcc,0xb1,0x00,0x01,0xff,0x62,0xcc,0xb1,0x00, ++ 0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x43,0xcc,0xa7,0xcc,0x81,0x00,0x01,0xff, ++ 0x63,0xcc,0xa7,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x44,0xcc,0x87,0x00,0x01,0xff, ++ 0x64,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x44,0xcc,0xa3,0x00,0x01,0xff, ++ 0x64,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x44,0xcc,0xb1,0x00,0x01,0xff,0x64,0xcc, ++ 0xb1,0x00,0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x44,0xcc,0xa7,0x00, ++ 0x01,0xff,0x64,0xcc,0xa7,0x00,0x10,0x08,0x01,0xff,0x44,0xcc,0xad,0x00,0x01,0xff, ++ 0x64,0xcc,0xad,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x45,0xcc,0x84,0xcc,0x80,0x00, ++ 0x01,0xff,0x65,0xcc,0x84,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x45,0xcc,0x84,0xcc, ++ 0x81,0x00,0x01,0xff,0x65,0xcc,0x84,0xcc,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x45,0xcc,0xad,0x00,0x01,0xff,0x65,0xcc,0xad,0x00,0x10,0x08,0x01,0xff, ++ 0x45,0xcc,0xb0,0x00,0x01,0xff,0x65,0xcc,0xb0,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff, ++ 0x45,0xcc,0xa7,0xcc,0x86,0x00,0x01,0xff,0x65,0xcc,0xa7,0xcc,0x86,0x00,0x10,0x08, ++ 0x01,0xff,0x46,0xcc,0x87,0x00,0x01,0xff,0x66,0xcc,0x87,0x00,0xd4,0x84,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x47,0xcc,0x84,0x00,0x01,0xff,0x67,0xcc, ++ 0x84,0x00,0x10,0x08,0x01,0xff,0x48,0xcc,0x87,0x00,0x01,0xff,0x68,0xcc,0x87,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x48,0xcc,0xa3,0x00,0x01,0xff,0x68,0xcc,0xa3,0x00, ++ 0x10,0x08,0x01,0xff,0x48,0xcc,0x88,0x00,0x01,0xff,0x68,0xcc,0x88,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x48,0xcc,0xa7,0x00,0x01,0xff,0x68,0xcc,0xa7,0x00, ++ 0x10,0x08,0x01,0xff,0x48,0xcc,0xae,0x00,0x01,0xff,0x68,0xcc,0xae,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x49,0xcc,0xb0,0x00,0x01,0xff,0x69,0xcc,0xb0,0x00,0x10,0x0a, ++ 0x01,0xff,0x49,0xcc,0x88,0xcc,0x81,0x00,0x01,0xff,0x69,0xcc,0x88,0xcc,0x81,0x00, ++ 0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x4b,0xcc,0x81,0x00,0x01,0xff, ++ 0x6b,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x4b,0xcc,0xa3,0x00,0x01,0xff,0x6b,0xcc, ++ 0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4b,0xcc,0xb1,0x00,0x01,0xff,0x6b,0xcc, ++ 0xb1,0x00,0x10,0x08,0x01,0xff,0x4c,0xcc,0xa3,0x00,0x01,0xff,0x6c,0xcc,0xa3,0x00, ++ 0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4c,0xcc,0xa3,0xcc,0x84,0x00,0x01,0xff, ++ 0x6c,0xcc,0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x4c,0xcc,0xb1,0x00,0x01,0xff, ++ 0x6c,0xcc,0xb1,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4c,0xcc,0xad,0x00,0x01,0xff, ++ 0x6c,0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x4d,0xcc,0x81,0x00,0x01,0xff,0x6d,0xcc, ++ 0x81,0x00,0xcf,0x86,0xe5,0x15,0x01,0xd4,0x88,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x4d,0xcc,0x87,0x00,0x01,0xff,0x6d,0xcc,0x87,0x00,0x10,0x08,0x01, ++ 0xff,0x4d,0xcc,0xa3,0x00,0x01,0xff,0x6d,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x4e,0xcc,0x87,0x00,0x01,0xff,0x6e,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x4e, ++ 0xcc,0xa3,0x00,0x01,0xff,0x6e,0xcc,0xa3,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x4e,0xcc,0xb1,0x00,0x01,0xff,0x6e,0xcc,0xb1,0x00,0x10,0x08,0x01,0xff,0x4e, ++ 0xcc,0xad,0x00,0x01,0xff,0x6e,0xcc,0xad,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f, ++ 0xcc,0x83,0xcc,0x81,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01, ++ 0xff,0x4f,0xcc,0x83,0xcc,0x88,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x88,0x00,0xd3, ++ 0x48,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x84,0xcc,0x80,0x00,0x01, ++ 0xff,0x6f,0xcc,0x84,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x84,0xcc,0x81, ++ 0x00,0x01,0xff,0x6f,0xcc,0x84,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x50, ++ 0xcc,0x81,0x00,0x01,0xff,0x70,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x50,0xcc,0x87, ++ 0x00,0x01,0xff,0x70,0xcc,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x52, ++ 0xcc,0x87,0x00,0x01,0xff,0x72,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x52,0xcc,0xa3, ++ 0x00,0x01,0xff,0x72,0xcc,0xa3,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x52,0xcc,0xa3, ++ 0xcc,0x84,0x00,0x01,0xff,0x72,0xcc,0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x52, ++ 0xcc,0xb1,0x00,0x01,0xff,0x72,0xcc,0xb1,0x00,0xd4,0x8c,0xd3,0x48,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x53,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x87,0x00,0x10, ++ 0x08,0x01,0xff,0x53,0xcc,0xa3,0x00,0x01,0xff,0x73,0xcc,0xa3,0x00,0xd1,0x14,0x10, ++ 0x0a,0x01,0xff,0x53,0xcc,0x81,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x81,0xcc,0x87, ++ 0x00,0x10,0x0a,0x01,0xff,0x53,0xcc,0x8c,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x8c, ++ 0xcc,0x87,0x00,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x53,0xcc,0xa3,0xcc,0x87, ++ 0x00,0x01,0xff,0x73,0xcc,0xa3,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x54,0xcc,0x87, ++ 0x00,0x01,0xff,0x74,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x54,0xcc,0xa3, ++ 0x00,0x01,0xff,0x74,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x54,0xcc,0xb1,0x00,0x01, ++ 0xff,0x74,0xcc,0xb1,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x54, ++ 0xcc,0xad,0x00,0x01,0xff,0x74,0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0xa4, ++ 0x00,0x01,0xff,0x75,0xcc,0xa4,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0xb0, ++ 0x00,0x01,0xff,0x75,0xcc,0xb0,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0xad,0x00,0x01, ++ 0xff,0x75,0xcc,0xad,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x55,0xcc,0x83, ++ 0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x55, ++ 0xcc,0x84,0xcc,0x88,0x00,0x01,0xff,0x75,0xcc,0x84,0xcc,0x88,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x56,0xcc,0x83,0x00,0x01,0xff,0x76,0xcc,0x83,0x00,0x10,0x08,0x01, ++ 0xff,0x56,0xcc,0xa3,0x00,0x01,0xff,0x76,0xcc,0xa3,0x00,0xe0,0x10,0x02,0xcf,0x86, ++ 0xd5,0xe1,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc, ++ 0x80,0x00,0x01,0xff,0x77,0xcc,0x80,0x00,0x10,0x08,0x01,0xff,0x57,0xcc,0x81,0x00, ++ 0x01,0xff,0x77,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc,0x88,0x00, ++ 0x01,0xff,0x77,0xcc,0x88,0x00,0x10,0x08,0x01,0xff,0x57,0xcc,0x87,0x00,0x01,0xff, ++ 0x77,0xcc,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc,0xa3,0x00, ++ 0x01,0xff,0x77,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x58,0xcc,0x87,0x00,0x01,0xff, ++ 0x78,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x58,0xcc,0x88,0x00,0x01,0xff, ++ 0x78,0xcc,0x88,0x00,0x10,0x08,0x01,0xff,0x59,0xcc,0x87,0x00,0x01,0xff,0x79,0xcc, ++ 0x87,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x5a,0xcc,0x82,0x00, ++ 0x01,0xff,0x7a,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x5a,0xcc,0xa3,0x00,0x01,0xff, ++ 0x7a,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x5a,0xcc,0xb1,0x00,0x01,0xff, ++ 0x7a,0xcc,0xb1,0x00,0x10,0x08,0x01,0xff,0x68,0xcc,0xb1,0x00,0x01,0xff,0x74,0xcc, ++ 0x88,0x00,0x92,0x1d,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x8a,0x00,0x01,0xff, ++ 0x79,0xcc,0x8a,0x00,0x10,0x04,0x01,0x00,0x02,0xff,0xc5,0xbf,0xcc,0x87,0x00,0x0a, ++ 0x00,0xd4,0x98,0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0xa3, ++ 0x00,0x01,0xff,0x61,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x41,0xcc,0x89,0x00,0x01, ++ 0xff,0x61,0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0x82,0xcc,0x81, ++ 0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x82, ++ 0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x80,0x00,0xd2,0x28,0xd1,0x14,0x10, ++ 0x0a,0x01,0xff,0x41,0xcc,0x82,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x89, ++ 0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x61,0xcc,0x82, ++ 0xcc,0x83,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0xa3,0xcc,0x82,0x00,0x01, ++ 0xff,0x61,0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x81, ++ 0x00,0x01,0xff,0x61,0xcc,0x86,0xcc,0x81,0x00,0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10, ++ 0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x86,0xcc,0x80, ++ 0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x86, ++ 0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x83,0x00,0x01, ++ 0xff,0x61,0xcc,0x86,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0xa3,0xcc,0x86, ++ 0x00,0x01,0xff,0x61,0xcc,0xa3,0xcc,0x86,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x45,0xcc,0xa3,0x00,0x01,0xff,0x65,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x45, ++ 0xcc,0x89,0x00,0x01,0xff,0x65,0xcc,0x89,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x45, ++ 0xcc,0x83,0x00,0x01,0xff,0x65,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x45,0xcc,0x82, ++ 0xcc,0x81,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x81,0x00,0xcf,0x86,0xe5,0x31,0x01, ++ 0xd4,0x90,0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x45,0xcc,0x82,0xcc, ++ 0x80,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x45,0xcc, ++ 0x82,0xcc,0x89,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a, ++ 0x01,0xff,0x45,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x83,0x00, ++ 0x10,0x0a,0x01,0xff,0x45,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff,0x65,0xcc,0xa3,0xcc, ++ 0x82,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x89,0x00,0x01,0xff, ++ 0x69,0xcc,0x89,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0xa3,0x00,0x01,0xff,0x69,0xcc, ++ 0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0xa3,0x00,0x01,0xff,0x6f,0xcc, ++ 0xa3,0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x89,0x00, ++ 0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x82,0xcc,0x81,0x00, ++ 0x01,0xff,0x6f,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x82,0xcc, ++ 0x80,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x80,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff, ++ 0x4f,0xcc,0x82,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x89,0x00,0x10,0x0a, ++ 0x01,0xff,0x4f,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x83,0x00, ++ 0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff, ++ 0x6f,0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b,0xcc,0x81,0x00, ++ 0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x81,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc, ++ 0x9b,0xcc,0x80,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff, ++ 0x4f,0xcc,0x9b,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x89,0x00,0xd4,0x98, ++ 0xd3,0x48,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b,0xcc,0x83,0x00, ++ 0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b,0xcc, ++ 0xa3,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x55,0xcc,0xa3,0x00,0x01,0xff,0x75,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x55,0xcc, ++ 0x89,0x00,0x01,0xff,0x75,0xcc,0x89,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff, ++ 0x55,0xcc,0x9b,0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x81,0x00,0x10,0x0a, ++ 0x01,0xff,0x55,0xcc,0x9b,0xcc,0x80,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x80,0x00, ++ 0xd1,0x14,0x10,0x0a,0x01,0xff,0x55,0xcc,0x9b,0xcc,0x89,0x00,0x01,0xff,0x75,0xcc, ++ 0x9b,0xcc,0x89,0x00,0x10,0x0a,0x01,0xff,0x55,0xcc,0x9b,0xcc,0x83,0x00,0x01,0xff, ++ 0x75,0xcc,0x9b,0xcc,0x83,0x00,0xd3,0x44,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff, ++ 0x55,0xcc,0x9b,0xcc,0xa3,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0xa3,0x00,0x10,0x08, ++ 0x01,0xff,0x59,0xcc,0x80,0x00,0x01,0xff,0x79,0xcc,0x80,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x59,0xcc,0xa3,0x00,0x01,0xff,0x79,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff, ++ 0x59,0xcc,0x89,0x00,0x01,0xff,0x79,0xcc,0x89,0x00,0x92,0x14,0x91,0x10,0x10,0x08, ++ 0x01,0xff,0x59,0xcc,0x83,0x00,0x01,0xff,0x79,0xcc,0x83,0x00,0x0a,0x00,0x0a,0x00, ++ 0xe1,0xc0,0x04,0xe0,0x80,0x02,0xcf,0x86,0xe5,0x2d,0x01,0xd4,0xa8,0xd3,0x54,0xd2, ++ 0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x93,0x00,0x01,0xff,0xce,0xb1, ++ 0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff, ++ 0xce,0xb1,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc, ++ 0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82, ++ 0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x91,0xcc,0x93,0x00,0x01,0xff, ++ 0xce,0x91,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0x91,0xcc,0x93,0xcc,0x80,0x00, ++ 0x01,0xff,0xce,0x91,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce, ++ 0x91,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcc,0x81,0x00,0x10, ++ 0x0b,0x01,0xff,0xce,0x91,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0x91,0xcc,0x94, ++ 0xcd,0x82,0x00,0xd3,0x42,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc, ++ 0x93,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb5,0xcc, ++ 0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0xcc,0x80,0x00,0x91,0x16,0x10, ++ 0x0b,0x01,0xff,0xce,0xb5,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94, ++ 0xcc,0x81,0x00,0x00,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x95,0xcc, ++ 0x93,0x00,0x01,0xff,0xce,0x95,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0x95,0xcc, ++ 0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0x95,0xcc,0x94,0xcc,0x80,0x00,0x91,0x16,0x10, ++ 0x0b,0x01,0xff,0xce,0x95,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0x95,0xcc,0x94, ++ 0xcc,0x81,0x00,0x00,0x00,0xd4,0xa8,0xd3,0x54,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01, ++ 0xff,0xce,0xb7,0xcc,0x93,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb7,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80, ++ 0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff, ++ 0xce,0xb7,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd, ++ 0x82,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x82,0x00,0xd2,0x28,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xce,0x97,0xcc,0x93,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0x00,0x10, ++ 0x0b,0x01,0xff,0xce,0x97,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0x97,0xcc,0x94, ++ 0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x97,0xcc,0x93,0xcc,0x81,0x00, ++ 0x01,0xff,0xce,0x97,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xce,0x97,0xcc, ++ 0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcd,0x82,0x00,0xd3,0x54,0xd2, ++ 0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x93,0x00,0x01,0xff,0xce,0xb9, ++ 0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff, ++ 0xce,0xb9,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc, ++ 0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb9,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcd,0x82, ++ 0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x99,0xcc,0x93,0x00,0x01,0xff, ++ 0xce,0x99,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0x99,0xcc,0x93,0xcc,0x80,0x00, ++ 0x01,0xff,0xce,0x99,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce, ++ 0x99,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0x99,0xcc,0x94,0xcc,0x81,0x00,0x10, ++ 0x0b,0x01,0xff,0xce,0x99,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0x99,0xcc,0x94, ++ 0xcd,0x82,0x00,0xcf,0x86,0xe5,0x13,0x01,0xd4,0x84,0xd3,0x42,0xd2,0x28,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x93,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94,0x00, ++ 0x10,0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf,0xcc, ++ 0x94,0xcc,0x80,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc,0x81, ++ 0x00,0x01,0xff,0xce,0xbf,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd2,0x28,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xce,0x9f,0xcc,0x93,0x00,0x01,0xff,0xce,0x9f,0xcc,0x94,0x00, ++ 0x10,0x0b,0x01,0xff,0xce,0x9f,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0x9f,0xcc, ++ 0x94,0xcc,0x80,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0x9f,0xcc,0x93,0xcc,0x81, ++ 0x00,0x01,0xff,0xce,0x9f,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd3,0x54,0xd2,0x28, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x93,0x00,0x01,0xff,0xcf,0x85,0xcc, ++ 0x94,0x00,0x10,0x0b,0x01,0xff,0xcf,0x85,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xcf, ++ 0x85,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x85,0xcc,0x93, ++ 0xcc,0x81,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff, ++ 0xcf,0x85,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcd,0x82,0x00, ++ 0xd2,0x1c,0xd1,0x0d,0x10,0x04,0x00,0x00,0x01,0xff,0xce,0xa5,0xcc,0x94,0x00,0x10, ++ 0x04,0x00,0x00,0x01,0xff,0xce,0xa5,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x0f,0x10,0x04, ++ 0x00,0x00,0x01,0xff,0xce,0xa5,0xcc,0x94,0xcc,0x81,0x00,0x10,0x04,0x00,0x00,0x01, ++ 0xff,0xce,0xa5,0xcc,0x94,0xcd,0x82,0x00,0xd4,0xa8,0xd3,0x54,0xd2,0x28,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xcf,0x89,0xcc,0x93,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0x00, ++ 0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x81, ++ 0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xcf,0x89, ++ 0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd,0x82,0x00,0xd2,0x28, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xa9,0xcc,0x93,0x00,0x01,0xff,0xce,0xa9,0xcc, ++ 0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce, ++ 0xa9,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xa9,0xcc,0x93, ++ 0xcc,0x81,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff, ++ 0xce,0xa9,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcd,0x82,0x00, ++ 0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x80,0x00,0x01, ++ 0xff,0xce,0xb1,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc,0x80,0x00,0x01, ++ 0xff,0xce,0xb5,0xcc,0x81,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc,0x80, ++ 0x00,0x01,0xff,0xce,0xb7,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x80, ++ 0x00,0x01,0xff,0xce,0xb9,0xcc,0x81,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff, ++ 0xce,0xbf,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf,0xcc,0x81,0x00,0x10,0x09,0x01,0xff, ++ 0xcf,0x85,0xcc,0x80,0x00,0x01,0xff,0xcf,0x85,0xcc,0x81,0x00,0x91,0x12,0x10,0x09, ++ 0x01,0xff,0xcf,0x89,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc,0x81,0x00,0x00,0x00, ++ 0xe0,0xe1,0x02,0xcf,0x86,0xe5,0x91,0x01,0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16, ++ 0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xce,0xb1,0xcc, ++ 0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0xcd,0x85, ++ 0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d, ++ 0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xce,0xb1,0xcc, ++ 0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x30, ++ 0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x91,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xce, ++ 0x91,0xcc,0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0x91,0xcc,0x93,0xcc,0x80, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a, ++ 0x10,0x0d,0x01,0xff,0xce,0x91,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xce, ++ 0x91,0xcc,0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0x91,0xcc,0x93, ++ 0xcd,0x82,0xcd,0x85,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00, ++ 0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd,0x85, ++ 0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7, ++ 0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0xcd, ++ 0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0xcd,0x85, ++ 0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff, ++ 0xce,0xb7,0xcc,0x93,0xcd,0x82,0xcd,0x85,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd, ++ 0x82,0xcd,0x85,0x00,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x97,0xcc,0x93, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff, ++ 0xce,0x97,0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcc, ++ 0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0x97,0xcc,0x93,0xcc,0x81, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d, ++ 0x01,0xff,0xce,0x97,0xcc,0x93,0xcd,0x82,0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc, ++ 0x94,0xcd,0x82,0xcd,0x85,0x00,0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b, ++ 0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd, ++ 0x85,0x00,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00,0x01, ++ 0xff,0xcf,0x89,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff, ++ 0xcf,0x89,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc, ++ 0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x82,0xcd,0x85, ++ 0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x30,0xd1,0x16, ++ 0x10,0x0b,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xce,0xa9,0xcc, ++ 0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcc,0x80,0xcd,0x85, ++ 0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d, ++ 0x01,0xff,0xce,0xa9,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xce,0xa9,0xcc, ++ 0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcd,0x82, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd3,0x49, ++ 0xd2,0x26,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x86,0x00,0x01,0xff,0xce, ++ 0xb1,0xcc,0x84,0x00,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x80,0xcd,0x85,0x00,0x01, ++ 0xff,0xce,0xb1,0xcd,0x85,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x81, ++ 0xcd,0x85,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xb1,0xcd,0x82,0x00,0x01,0xff, ++ 0xce,0xb1,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce, ++ 0x91,0xcc,0x86,0x00,0x01,0xff,0xce,0x91,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xce, ++ 0x91,0xcc,0x80,0x00,0x01,0xff,0xce,0x91,0xcc,0x81,0x00,0xd1,0x0d,0x10,0x09,0x01, ++ 0xff,0xce,0x91,0xcd,0x85,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xce,0xb9,0x00,0x01, ++ 0x00,0xcf,0x86,0xe5,0x16,0x01,0xd4,0x8f,0xd3,0x44,0xd2,0x21,0xd1,0x0d,0x10,0x04, ++ 0x01,0x00,0x01,0xff,0xc2,0xa8,0xcd,0x82,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc, ++ 0x80,0xcd,0x85,0x00,0x01,0xff,0xce,0xb7,0xcd,0x85,0x00,0xd1,0x0f,0x10,0x0b,0x01, ++ 0xff,0xce,0xb7,0xcc,0x81,0xcd,0x85,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xb7, ++ 0xcd,0x82,0x00,0x01,0xff,0xce,0xb7,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x24,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xce,0x95,0xcc,0x80,0x00,0x01,0xff,0xce,0x95,0xcc,0x81,0x00, ++ 0x10,0x09,0x01,0xff,0xce,0x97,0xcc,0x80,0x00,0x01,0xff,0xce,0x97,0xcc,0x81,0x00, ++ 0xd1,0x13,0x10,0x09,0x01,0xff,0xce,0x97,0xcd,0x85,0x00,0x01,0xff,0xe1,0xbe,0xbf, ++ 0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0xe1,0xbe,0xbf,0xcc,0x81,0x00,0x01,0xff,0xe1, ++ 0xbe,0xbf,0xcd,0x82,0x00,0xd3,0x40,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce, ++ 0xb9,0xcc,0x86,0x00,0x01,0xff,0xce,0xb9,0xcc,0x84,0x00,0x10,0x0b,0x01,0xff,0xce, ++ 0xb9,0xcc,0x88,0xcc,0x80,0x00,0x01,0xff,0xce,0xb9,0xcc,0x88,0xcc,0x81,0x00,0x51, ++ 0x04,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcd,0x82,0x00,0x01,0xff,0xce,0xb9, ++ 0xcc,0x88,0xcd,0x82,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x99,0xcc, ++ 0x86,0x00,0x01,0xff,0xce,0x99,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xce,0x99,0xcc, ++ 0x80,0x00,0x01,0xff,0xce,0x99,0xcc,0x81,0x00,0xd1,0x0e,0x10,0x04,0x00,0x00,0x01, ++ 0xff,0xe1,0xbf,0xbe,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0xe1,0xbf,0xbe,0xcc,0x81, ++ 0x00,0x01,0xff,0xe1,0xbf,0xbe,0xcd,0x82,0x00,0xd4,0x93,0xd3,0x4e,0xd2,0x28,0xd1, ++ 0x12,0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x86,0x00,0x01,0xff,0xcf,0x85,0xcc,0x84, ++ 0x00,0x10,0x0b,0x01,0xff,0xcf,0x85,0xcc,0x88,0xcc,0x80,0x00,0x01,0xff,0xcf,0x85, ++ 0xcc,0x88,0xcc,0x81,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xcf,0x81,0xcc,0x93,0x00, ++ 0x01,0xff,0xcf,0x81,0xcc,0x94,0x00,0x10,0x09,0x01,0xff,0xcf,0x85,0xcd,0x82,0x00, ++ 0x01,0xff,0xcf,0x85,0xcc,0x88,0xcd,0x82,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01, ++ 0xff,0xce,0xa5,0xcc,0x86,0x00,0x01,0xff,0xce,0xa5,0xcc,0x84,0x00,0x10,0x09,0x01, ++ 0xff,0xce,0xa5,0xcc,0x80,0x00,0x01,0xff,0xce,0xa5,0xcc,0x81,0x00,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xce,0xa1,0xcc,0x94,0x00,0x01,0xff,0xc2,0xa8,0xcc,0x80,0x00,0x10, ++ 0x09,0x01,0xff,0xc2,0xa8,0xcc,0x81,0x00,0x01,0xff,0x60,0x00,0xd3,0x3b,0xd2,0x18, ++ 0x51,0x04,0x00,0x00,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x80,0xcd,0x85,0x00,0x01, ++ 0xff,0xcf,0x89,0xcd,0x85,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x81, ++ 0xcd,0x85,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xcf,0x89,0xcd,0x82,0x00,0x01,0xff, ++ 0xcf,0x89,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce, ++ 0x9f,0xcc,0x80,0x00,0x01,0xff,0xce,0x9f,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce, ++ 0xa9,0xcc,0x80,0x00,0x01,0xff,0xce,0xa9,0xcc,0x81,0x00,0xd1,0x10,0x10,0x09,0x01, ++ 0xff,0xce,0xa9,0xcd,0x85,0x00,0x01,0xff,0xc2,0xb4,0x00,0x10,0x04,0x01,0x00,0x00, ++ 0x00,0xe0,0x7e,0x0c,0xcf,0x86,0xe5,0xbb,0x08,0xe4,0x14,0x06,0xe3,0xf7,0x02,0xe2, ++ 0xbd,0x01,0xd1,0xd0,0xd0,0x4f,0xcf,0x86,0xd5,0x2e,0x94,0x2a,0xd3,0x18,0x92,0x14, ++ 0x91,0x10,0x10,0x08,0x01,0xff,0xe2,0x80,0x82,0x00,0x01,0xff,0xe2,0x80,0x83,0x00, ++ 0x01,0x00,0x01,0x00,0x92,0x0d,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff, ++ 0x00,0x01,0xff,0x00,0x01,0x00,0x94,0x1b,0x53,0x04,0x01,0x00,0xd2,0x09,0x11,0x04, ++ 0x01,0x00,0x01,0xff,0x00,0x51,0x05,0x01,0xff,0x00,0x10,0x05,0x01,0xff,0x00,0x04, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0x48,0xd4,0x1c,0xd3,0x10,0x52,0x04,0x01,0x00,0x51, ++ 0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x06,0x00,0x52,0x04,0x04,0x00,0x11,0x04,0x04, ++ 0x00,0x06,0x00,0xd3,0x1c,0xd2,0x0c,0x51,0x04,0x06,0x00,0x10,0x04,0x06,0x00,0x07, ++ 0x00,0xd1,0x08,0x10,0x04,0x07,0x00,0x08,0x00,0x10,0x04,0x08,0x00,0x06,0x00,0x52, ++ 0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x06,0x00,0xd4,0x23,0xd3, ++ 0x14,0x52,0x05,0x06,0xff,0x00,0x91,0x0a,0x10,0x05,0x0a,0xff,0x00,0x00,0xff,0x00, ++ 0x0f,0xff,0x00,0x92,0x0a,0x11,0x05,0x0f,0xff,0x00,0x01,0xff,0x00,0x01,0xff,0x00, ++ 0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x06,0x00,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0xd0,0x7e,0xcf,0x86,0xd5,0x34,0xd4,0x14,0x53,0x04,0x01,0x00,0x52,0x04, ++ 0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0xd3,0x10,0x52,0x04, ++ 0x08,0x00,0x91,0x08,0x10,0x04,0x08,0x00,0x0c,0x00,0x0c,0x00,0x52,0x04,0x0c,0x00, ++ 0x91,0x08,0x10,0x04,0x0c,0x00,0x00,0x00,0x00,0x00,0xd4,0x1c,0x53,0x04,0x01,0x00, ++ 0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x02,0x00,0x91,0x08,0x10,0x04, ++ 0x03,0x00,0x04,0x00,0x04,0x00,0xd3,0x10,0xd2,0x08,0x11,0x04,0x06,0x00,0x08,0x00, ++ 0x11,0x04,0x08,0x00,0x0b,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x0b,0x00,0x0c,0x00, ++ 0x10,0x04,0x0e,0x00,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x11,0x00,0x13,0x00, ++ 0xcf,0x86,0xd5,0x28,0x54,0x04,0x00,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x01,0xe6, ++ 0x01,0x01,0x01,0xe6,0xd2,0x0c,0x51,0x04,0x01,0x01,0x10,0x04,0x01,0x01,0x01,0xe6, ++ 0x91,0x08,0x10,0x04,0x01,0xe6,0x01,0x00,0x01,0x00,0xd4,0x30,0xd3,0x1c,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x01,0x00,0x01,0xe6,0x04,0x00,0xd1,0x08,0x10,0x04,0x06,0x00, ++ 0x06,0x01,0x10,0x04,0x06,0x01,0x06,0xe6,0x92,0x10,0xd1,0x08,0x10,0x04,0x06,0xdc, ++ 0x06,0xe6,0x10,0x04,0x06,0x01,0x08,0x01,0x09,0xdc,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0a,0xe6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1,0x81,0xd0,0x4f, ++ 0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x29,0xd3,0x13,0x52,0x04,0x01,0x00,0x51,0x04, ++ 0x01,0x00,0x10,0x07,0x01,0xff,0xce,0xa9,0x00,0x01,0x00,0x92,0x12,0x51,0x04,0x01, ++ 0x00,0x10,0x06,0x01,0xff,0x4b,0x00,0x01,0xff,0x41,0xcc,0x8a,0x00,0x01,0x00,0x53, ++ 0x04,0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x10,0x04,0x04, ++ 0x00,0x07,0x00,0x91,0x08,0x10,0x04,0x08,0x00,0x06,0x00,0x06,0x00,0xcf,0x86,0x95, ++ 0x2c,0xd4,0x18,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0xd1,0x08,0x10,0x04,0x08, ++ 0x00,0x09,0x00,0x10,0x04,0x09,0x00,0x0a,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x0b, ++ 0x00,0x10,0x04,0x0b,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0x68,0xcf, ++ 0x86,0xd5,0x48,0xd4,0x28,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x0a,0x00,0x0b,0x00,0x11,0x00,0x00,0x00,0x53,0x04,0x01,0x00,0x92, ++ 0x18,0x51,0x04,0x01,0x00,0x10,0x0a,0x01,0xff,0xe2,0x86,0x90,0xcc,0xb8,0x00,0x01, ++ 0xff,0xe2,0x86,0x92,0xcc,0xb8,0x00,0x01,0x00,0x94,0x1a,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x0a,0x01,0xff,0xe2,0x86,0x94,0xcc,0xb8, ++ 0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0x2e,0x94,0x2a,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0xd1,0x0e,0x10,0x04,0x01,0x00,0x01,0xff,0xe2,0x87,0x90,0xcc,0xb8, ++ 0x00,0x10,0x0a,0x01,0xff,0xe2,0x87,0x94,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x87,0x92, ++ 0xcc,0xb8,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x01,0x00,0x04,0x00,0x04,0x00,0x93,0x08,0x12,0x04,0x04,0x00,0x06, ++ 0x00,0x06,0x00,0xe2,0x38,0x02,0xe1,0x3f,0x01,0xd0,0x68,0xcf,0x86,0xd5,0x3e,0x94, ++ 0x3a,0xd3,0x16,0x52,0x04,0x01,0x00,0x91,0x0e,0x10,0x0a,0x01,0xff,0xe2,0x88,0x83, ++ 0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0xd2,0x12,0x91,0x0e,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe2,0x88,0x88,0xcc,0xb8,0x00,0x01,0x00,0x91,0x0e,0x10,0x0a,0x01,0xff,0xe2, ++ 0x88,0x8b,0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x94,0x24,0x93,0x20,0x52, ++ 0x04,0x01,0x00,0xd1,0x0e,0x10,0x0a,0x01,0xff,0xe2,0x88,0xa3,0xcc,0xb8,0x00,0x01, ++ 0x00,0x10,0x0a,0x01,0xff,0xe2,0x88,0xa5,0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0x48,0x94,0x44,0xd3,0x2e,0xd2,0x12,0x91,0x0e,0x10,0x04,0x01, ++ 0x00,0x01,0xff,0xe2,0x88,0xbc,0xcc,0xb8,0x00,0x01,0x00,0xd1,0x0e,0x10,0x0a,0x01, ++ 0xff,0xe2,0x89,0x83,0xcc,0xb8,0x00,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xe2, ++ 0x89,0x85,0xcc,0xb8,0x00,0x92,0x12,0x91,0x0e,0x10,0x04,0x01,0x00,0x01,0xff,0xe2, ++ 0x89,0x88,0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x40,0xd3,0x1e,0x92, ++ 0x1a,0xd1,0x0c,0x10,0x08,0x01,0xff,0x3d,0xcc,0xb8,0x00,0x01,0x00,0x10,0x0a,0x01, ++ 0xff,0xe2,0x89,0xa1,0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1, ++ 0x0e,0x10,0x04,0x01,0x00,0x01,0xff,0xe2,0x89,0x8d,0xcc,0xb8,0x00,0x10,0x08,0x01, ++ 0xff,0x3c,0xcc,0xb8,0x00,0x01,0xff,0x3e,0xcc,0xb8,0x00,0xd3,0x30,0xd2,0x18,0x91, ++ 0x14,0x10,0x0a,0x01,0xff,0xe2,0x89,0xa4,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x89,0xa5, ++ 0xcc,0xb8,0x00,0x01,0x00,0x91,0x14,0x10,0x0a,0x01,0xff,0xe2,0x89,0xb2,0xcc,0xb8, ++ 0x00,0x01,0xff,0xe2,0x89,0xb3,0xcc,0xb8,0x00,0x01,0x00,0x92,0x18,0x91,0x14,0x10, ++ 0x0a,0x01,0xff,0xe2,0x89,0xb6,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x89,0xb7,0xcc,0xb8, ++ 0x00,0x01,0x00,0x01,0x00,0xd0,0x86,0xcf,0x86,0xd5,0x50,0x94,0x4c,0xd3,0x30,0xd2, ++ 0x18,0x91,0x14,0x10,0x0a,0x01,0xff,0xe2,0x89,0xba,0xcc,0xb8,0x00,0x01,0xff,0xe2, ++ 0x89,0xbb,0xcc,0xb8,0x00,0x01,0x00,0x91,0x14,0x10,0x0a,0x01,0xff,0xe2,0x8a,0x82, ++ 0xcc,0xb8,0x00,0x01,0xff,0xe2,0x8a,0x83,0xcc,0xb8,0x00,0x01,0x00,0x92,0x18,0x91, ++ 0x14,0x10,0x0a,0x01,0xff,0xe2,0x8a,0x86,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x8a,0x87, ++ 0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x94,0x30,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0xe2,0x8a,0xa2,0xcc,0xb8,0x00,0x01, ++ 0xff,0xe2,0x8a,0xa8,0xcc,0xb8,0x00,0x10,0x0a,0x01,0xff,0xe2,0x8a,0xa9,0xcc,0xb8, ++ 0x00,0x01,0xff,0xe2,0x8a,0xab,0xcc,0xb8,0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01, ++ 0x00,0xd4,0x5c,0xd3,0x2c,0x92,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0xe2,0x89,0xbc, ++ 0xcc,0xb8,0x00,0x01,0xff,0xe2,0x89,0xbd,0xcc,0xb8,0x00,0x10,0x0a,0x01,0xff,0xe2, ++ 0x8a,0x91,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x8a,0x92,0xcc,0xb8,0x00,0x01,0x00,0xd2, ++ 0x18,0x51,0x04,0x01,0x00,0x10,0x0a,0x01,0xff,0xe2,0x8a,0xb2,0xcc,0xb8,0x00,0x01, ++ 0xff,0xe2,0x8a,0xb3,0xcc,0xb8,0x00,0x91,0x14,0x10,0x0a,0x01,0xff,0xe2,0x8a,0xb4, ++ 0xcc,0xb8,0x00,0x01,0xff,0xe2,0x8a,0xb5,0xcc,0xb8,0x00,0x01,0x00,0x93,0x0c,0x92, ++ 0x08,0x11,0x04,0x01,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0xd1,0x64,0xd0,0x3e,0xcf, ++ 0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x04, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x94,0x20,0x53,0x04,0x01,0x00,0x92, ++ 0x18,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x80,0x88,0x00,0x10,0x08,0x01, ++ 0xff,0xe3,0x80,0x89,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01, ++ 0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x06,0x00,0x04,0x00,0x04,0x00,0xd0, ++ 0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x04,0x00,0x53,0x04,0x04,0x00,0x92,0x0c,0x51, ++ 0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0xcf,0x86,0xd5, ++ 0x2c,0xd4,0x14,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x51,0x04,0x06,0x00,0x10, ++ 0x04,0x06,0x00,0x07,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x07,0x00,0x08, ++ 0x00,0x08,0x00,0x08,0x00,0x12,0x04,0x08,0x00,0x09,0x00,0xd4,0x14,0x53,0x04,0x09, ++ 0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x0b,0x00,0x0c,0x00,0x0c,0x00,0x0c,0x00,0xd3, ++ 0x08,0x12,0x04,0x0c,0x00,0x10,0x00,0xd2,0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x10, ++ 0x00,0x12,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x13,0x00,0xd3,0xa6,0xd2, ++ 0x74,0xd1,0x40,0xd0,0x22,0xcf,0x86,0x55,0x04,0x01,0x00,0x94,0x18,0x93,0x14,0x52, ++ 0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x10,0x04,0x04,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x95,0x18,0x94,0x14,0x53,0x04,0x01,0x00,0x92, ++ 0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01, ++ 0x00,0xd0,0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x14,0x53, ++ 0x04,0x01,0x00,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x06,0x00,0x06, ++ 0x00,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x51,0x04,0x06,0x00,0x10,0x04,0x06, ++ 0x00,0x07,0x00,0xd1,0x06,0xcf,0x06,0x01,0x00,0xd0,0x1a,0xcf,0x86,0x95,0x14,0x54, ++ 0x04,0x01,0x00,0x93,0x0c,0x52,0x04,0x01,0x00,0x11,0x04,0x01,0x00,0x06,0x00,0x06, ++ 0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x54,0x04,0x01,0x00,0x13,0x04,0x04, ++ 0x00,0x06,0x00,0xd2,0xdc,0xd1,0x48,0xd0,0x26,0xcf,0x86,0x95,0x20,0x54,0x04,0x01, ++ 0x00,0xd3,0x0c,0x52,0x04,0x01,0x00,0x11,0x04,0x07,0x00,0x06,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x08,0x00,0x04,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0x55, ++ 0x04,0x01,0x00,0x54,0x04,0x01,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x04,0x00,0x06, ++ 0x00,0x06,0x00,0x52,0x04,0x06,0x00,0x11,0x04,0x06,0x00,0x08,0x00,0xd0,0x5e,0xcf, ++ 0x86,0xd5,0x2c,0xd4,0x10,0x53,0x04,0x06,0x00,0x92,0x08,0x11,0x04,0x06,0x00,0x07, ++ 0x00,0x07,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x07,0x00,0x08,0x00,0x08,0x00,0x52, ++ 0x04,0x08,0x00,0x91,0x08,0x10,0x04,0x08,0x00,0x0a,0x00,0x0b,0x00,0xd4,0x10,0x93, ++ 0x0c,0x92,0x08,0x11,0x04,0x07,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0xd3,0x10,0x92, ++ 0x0c,0x51,0x04,0x08,0x00,0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x52,0x04,0x0a, ++ 0x00,0x91,0x08,0x10,0x04,0x0a,0x00,0x0b,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x1c,0x94, ++ 0x18,0xd3,0x08,0x12,0x04,0x0a,0x00,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b, ++ 0x00,0x10,0x04,0x0c,0x00,0x0b,0x00,0x0b,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x51, ++ 0x04,0x0b,0x00,0x10,0x04,0x0c,0x00,0x0b,0x00,0x0c,0x00,0x0b,0x00,0x0b,0x00,0xd1, ++ 0xa8,0xd0,0x42,0xcf,0x86,0xd5,0x28,0x94,0x24,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10, ++ 0x04,0x10,0x00,0x01,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x0c,0x00,0x01, ++ 0x00,0x92,0x08,0x11,0x04,0x01,0x00,0x0c,0x00,0x01,0x00,0x01,0x00,0x94,0x14,0x53, ++ 0x04,0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0x40,0xd4,0x18,0x53,0x04,0x01,0x00,0x52,0x04,0x01, ++ 0x00,0xd1,0x08,0x10,0x04,0x0c,0x00,0x01,0x00,0x10,0x04,0x0c,0x00,0x01,0x00,0xd3, ++ 0x18,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x0c,0x00,0x51,0x04,0x0c, ++ 0x00,0x10,0x04,0x01,0x00,0x0b,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x0c,0x00,0xd4,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x06,0x00,0x93,0x0c,0x52,0x04,0x06,0x00,0x11, ++ 0x04,0x06,0x00,0x01,0x00,0x01,0x00,0xd0,0x3e,0xcf,0x86,0xd5,0x18,0x54,0x04,0x01, ++ 0x00,0x93,0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x0c,0x00,0x0c, ++ 0x00,0x01,0x00,0x54,0x04,0x01,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x0c,0x00,0xcf,0x86,0xd5,0x2c,0x94,0x28,0xd3,0x10,0x52,0x04,0x08, ++ 0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x09,0x00,0xd2,0x0c,0x51,0x04,0x09, ++ 0x00,0x10,0x04,0x09,0x00,0x0d,0x00,0x91,0x08,0x10,0x04,0x0a,0x00,0x0d,0x00,0x0c, ++ 0x00,0x06,0x00,0x94,0x0c,0x53,0x04,0x06,0x00,0x12,0x04,0x06,0x00,0x0a,0x00,0x06, ++ 0x00,0xe4,0x39,0x01,0xd3,0x0c,0xd2,0x06,0xcf,0x06,0x04,0x00,0xcf,0x06,0x06,0x00, ++ 0xd2,0x30,0xd1,0x06,0xcf,0x06,0x06,0x00,0xd0,0x06,0xcf,0x06,0x06,0x00,0xcf,0x86, ++ 0x95,0x1e,0x54,0x04,0x06,0x00,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x91,0x0e, ++ 0x10,0x0a,0x06,0xff,0xe2,0xab,0x9d,0xcc,0xb8,0x00,0x06,0x00,0x06,0x00,0x06,0x00, ++ 0xd1,0x80,0xd0,0x3a,0xcf,0x86,0xd5,0x28,0xd4,0x10,0x53,0x04,0x07,0x00,0x52,0x04, ++ 0x07,0x00,0x11,0x04,0x07,0x00,0x08,0x00,0xd3,0x08,0x12,0x04,0x08,0x00,0x09,0x00, ++ 0x92,0x0c,0x51,0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x94,0x0c, ++ 0x93,0x08,0x12,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0xcf,0x86,0xd5,0x30, ++ 0xd4,0x14,0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a,0x00, ++ 0x10,0x00,0x10,0x00,0xd3,0x10,0x52,0x04,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a,0x00, ++ 0x0b,0x00,0x0b,0x00,0x92,0x08,0x11,0x04,0x0b,0x00,0x10,0x00,0x10,0x00,0x54,0x04, ++ 0x10,0x00,0x93,0x0c,0x52,0x04,0x10,0x00,0x11,0x04,0x00,0x00,0x10,0x00,0x10,0x00, ++ 0xd0,0x32,0xcf,0x86,0xd5,0x14,0x54,0x04,0x10,0x00,0x93,0x0c,0x52,0x04,0x10,0x00, ++ 0x11,0x04,0x10,0x00,0x00,0x00,0x10,0x00,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00, ++ 0xd2,0x08,0x11,0x04,0x10,0x00,0x14,0x00,0x91,0x08,0x10,0x04,0x14,0x00,0x10,0x00, ++ 0x10,0x00,0xcf,0x86,0xd5,0x28,0xd4,0x14,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x10,0x00,0x15,0x00,0x10,0x00,0x10,0x00,0x93,0x10,0x92,0x0c,0x51,0x04, ++ 0x10,0x00,0x10,0x04,0x13,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0xd4,0x0c,0x53,0x04, ++ 0x14,0x00,0x12,0x04,0x14,0x00,0x11,0x00,0x53,0x04,0x14,0x00,0x52,0x04,0x14,0x00, ++ 0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x15,0x00,0xe3,0xb9,0x01,0xd2,0xac,0xd1, ++ 0x68,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x08,0x00,0x94,0x14,0x53,0x04,0x08,0x00,0x52, ++ 0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00,0x00,0x08,0x00,0xcf, ++ 0x86,0xd5,0x18,0x54,0x04,0x08,0x00,0x53,0x04,0x08,0x00,0x52,0x04,0x08,0x00,0x51, ++ 0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00,0x00,0xd4,0x14,0x53,0x04,0x09,0x00,0x52, ++ 0x04,0x09,0x00,0x91,0x08,0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0xd3,0x10,0x92, ++ 0x0c,0x91,0x08,0x10,0x04,0x0b,0x00,0x0a,0x00,0x0a,0x00,0x09,0x00,0x52,0x04,0x0a, ++ 0x00,0x11,0x04,0x0a,0x00,0x0b,0x00,0xd0,0x06,0xcf,0x06,0x08,0x00,0xcf,0x86,0x55, ++ 0x04,0x08,0x00,0xd4,0x1c,0x53,0x04,0x08,0x00,0xd2,0x0c,0x51,0x04,0x08,0x00,0x10, ++ 0x04,0x08,0x00,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x0b,0xe6,0xd3, ++ 0x0c,0x92,0x08,0x11,0x04,0x0b,0xe6,0x0d,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0xd1,0x6c,0xd0,0x2a,0xcf,0x86,0x55, ++ 0x04,0x08,0x00,0x94,0x20,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10, ++ 0x04,0x00,0x00,0x0d,0x00,0x52,0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x0d, ++ 0x00,0x00,0x00,0x08,0x00,0xcf,0x86,0x55,0x04,0x08,0x00,0xd4,0x1c,0xd3,0x0c,0x52, ++ 0x04,0x08,0x00,0x11,0x04,0x08,0x00,0x0d,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00, ++ 0x00,0x10,0x04,0x00,0x00,0x08,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10, ++ 0x04,0x00,0x00,0x0c,0x09,0xd0,0x5a,0xcf,0x86,0xd5,0x18,0x54,0x04,0x08,0x00,0x93, ++ 0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00,0x00,0x00, ++ 0x00,0xd4,0x20,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08, ++ 0x00,0x00,0x00,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00, ++ 0x00,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00, ++ 0x00,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00,0x00,0xcf, ++ 0x86,0x95,0x40,0xd4,0x20,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10, ++ 0x04,0x08,0x00,0x00,0x00,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08, ++ 0x00,0x00,0x00,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08, ++ 0x00,0x00,0x00,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00, ++ 0x00,0x0a,0xe6,0xd2,0x9c,0xd1,0x68,0xd0,0x32,0xcf,0x86,0xd5,0x14,0x54,0x04,0x08, ++ 0x00,0x53,0x04,0x08,0x00,0x52,0x04,0x0a,0x00,0x11,0x04,0x08,0x00,0x0a,0x00,0x54, ++ 0x04,0x0a,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0a,0x00,0x0b,0x00,0x0d, ++ 0x00,0x0d,0x00,0x12,0x04,0x0d,0x00,0x10,0x00,0xcf,0x86,0x95,0x30,0x94,0x2c,0xd3, ++ 0x18,0xd2,0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x12,0x00,0x91,0x08,0x10, ++ 0x04,0x12,0x00,0x13,0x00,0x13,0x00,0xd2,0x08,0x11,0x04,0x13,0x00,0x14,0x00,0x51, ++ 0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x15,0x00,0x00,0x00,0x00,0x00,0xd0,0x1e,0xcf, ++ 0x86,0x95,0x18,0x54,0x04,0x04,0x00,0x53,0x04,0x04,0x00,0x92,0x0c,0x51,0x04,0x04, ++ 0x00,0x10,0x04,0x00,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0xcf,0x86,0x55,0x04,0x04, ++ 0x00,0x54,0x04,0x04,0x00,0x93,0x08,0x12,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0xd1, ++ 0x06,0xcf,0x06,0x04,0x00,0xd0,0x06,0xcf,0x06,0x04,0x00,0xcf,0x86,0xd5,0x14,0x54, ++ 0x04,0x04,0x00,0x93,0x0c,0x52,0x04,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0x00, ++ 0x00,0x54,0x04,0x00,0x00,0x53,0x04,0x04,0x00,0x12,0x04,0x04,0x00,0x00,0x00,0xcf, ++ 0x86,0xe5,0xa6,0x05,0xe4,0x9f,0x05,0xe3,0x96,0x04,0xe2,0xe4,0x03,0xe1,0xc0,0x01, ++ 0xd0,0x3e,0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x1c,0x53,0x04,0x01,0x00,0xd2,0x0c, ++ 0x51,0x04,0x01,0x00,0x10,0x04,0x01,0xda,0x01,0xe4,0x91,0x08,0x10,0x04,0x01,0xe8, ++ 0x01,0xde,0x01,0xe0,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x04,0x00,0x10,0x04, ++ 0x04,0x00,0x06,0x00,0x51,0x04,0x06,0x00,0x10,0x04,0x04,0x00,0x01,0x00,0xcf,0x86, ++ 0xd5,0xaa,0xd4,0x32,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81, ++ 0x8b,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0x8d,0xe3,0x82, ++ 0x99,0x00,0x01,0x00,0xd3,0x3c,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81, ++ 0x8f,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0x91,0xe3,0x82, ++ 0x99,0x00,0x01,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81,0x93,0xe3,0x82,0x99, ++ 0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0x95,0xe3,0x82,0x99,0x00,0x01,0x00, ++ 0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81,0x97,0xe3,0x82,0x99,0x00,0x01, ++ 0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0x99,0xe3,0x82,0x99,0x00,0x01,0x00,0xd1,0x0f, ++ 0x10,0x0b,0x01,0xff,0xe3,0x81,0x9b,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01, ++ 0xff,0xe3,0x81,0x9d,0xe3,0x82,0x99,0x00,0x01,0x00,0xd4,0x53,0xd3,0x3c,0xd2,0x1e, ++ 0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81,0x9f,0xe3,0x82,0x99,0x00,0x01,0x00,0x10, ++ 0x0b,0x01,0xff,0xe3,0x81,0xa1,0xe3,0x82,0x99,0x00,0x01,0x00,0xd1,0x0f,0x10,0x04, ++ 0x01,0x00,0x01,0xff,0xe3,0x81,0xa4,0xe3,0x82,0x99,0x00,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe3,0x81,0xa6,0xe3,0x82,0x99,0x00,0x92,0x13,0x91,0x0f,0x10,0x04,0x01,0x00, ++ 0x01,0xff,0xe3,0x81,0xa8,0xe3,0x82,0x99,0x00,0x01,0x00,0x01,0x00,0xd3,0x4a,0xd2, ++ 0x25,0xd1,0x16,0x10,0x0b,0x01,0xff,0xe3,0x81,0xaf,0xe3,0x82,0x99,0x00,0x01,0xff, ++ 0xe3,0x81,0xaf,0xe3,0x82,0x9a,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x81,0xb2, ++ 0xe3,0x82,0x99,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81,0xb2,0xe3,0x82,0x9a, ++ 0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0xb5,0xe3,0x82,0x99,0x00,0x01,0xff, ++ 0xe3,0x81,0xb5,0xe3,0x82,0x9a,0x00,0xd2,0x1e,0xd1,0x0f,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe3,0x81,0xb8,0xe3,0x82,0x99,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0xb8,0xe3, ++ 0x82,0x9a,0x00,0x01,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xe3,0x81,0xbb,0xe3,0x82, ++ 0x99,0x00,0x01,0xff,0xe3,0x81,0xbb,0xe3,0x82,0x9a,0x00,0x01,0x00,0xd0,0xee,0xcf, ++ 0x86,0xd5,0x42,0x54,0x04,0x01,0x00,0xd3,0x1b,0x52,0x04,0x01,0x00,0xd1,0x0f,0x10, ++ 0x0b,0x01,0xff,0xe3,0x81,0x86,0xe3,0x82,0x99,0x00,0x06,0x00,0x10,0x04,0x06,0x00, ++ 0x00,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00,0x00,0x01,0x08,0x10,0x04,0x01,0x08, ++ 0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0x9d,0xe3,0x82,0x99, ++ 0x00,0x06,0x00,0xd4,0x32,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x06,0x00,0x01, ++ 0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3, ++ 0x82,0xab,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0xad,0xe3, ++ 0x82,0x99,0x00,0x01,0x00,0xd3,0x3c,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3, ++ 0x82,0xaf,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb1,0xe3, ++ 0x82,0x99,0x00,0x01,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb3,0xe3,0x82, ++ 0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb5,0xe3,0x82,0x99,0x00,0x01, ++ 0x00,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb7,0xe3,0x82,0x99,0x00, ++ 0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb9,0xe3,0x82,0x99,0x00,0x01,0x00,0xd1, ++ 0x0f,0x10,0x0b,0x01,0xff,0xe3,0x82,0xbb,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b, ++ 0x01,0xff,0xe3,0x82,0xbd,0xe3,0x82,0x99,0x00,0x01,0x00,0xcf,0x86,0xd5,0xd5,0xd4, ++ 0x53,0xd3,0x3c,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x82,0xbf,0xe3,0x82, ++ 0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x83,0x81,0xe3,0x82,0x99,0x00,0x01, ++ 0x00,0xd1,0x0f,0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x83,0x84,0xe3,0x82,0x99,0x00, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x83,0x86,0xe3,0x82,0x99,0x00,0x92,0x13,0x91, ++ 0x0f,0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x83,0x88,0xe3,0x82,0x99,0x00,0x01,0x00, ++ 0x01,0x00,0xd3,0x4a,0xd2,0x25,0xd1,0x16,0x10,0x0b,0x01,0xff,0xe3,0x83,0x8f,0xe3, ++ 0x82,0x99,0x00,0x01,0xff,0xe3,0x83,0x8f,0xe3,0x82,0x9a,0x00,0x10,0x04,0x01,0x00, ++ 0x01,0xff,0xe3,0x83,0x92,0xe3,0x82,0x99,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3, ++ 0x83,0x92,0xe3,0x82,0x9a,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x83,0x95,0xe3, ++ 0x82,0x99,0x00,0x01,0xff,0xe3,0x83,0x95,0xe3,0x82,0x9a,0x00,0xd2,0x1e,0xd1,0x0f, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x83,0x98,0xe3,0x82,0x99,0x00,0x10,0x0b,0x01, ++ 0xff,0xe3,0x83,0x98,0xe3,0x82,0x9a,0x00,0x01,0x00,0x91,0x16,0x10,0x0b,0x01,0xff, ++ 0xe3,0x83,0x9b,0xe3,0x82,0x99,0x00,0x01,0xff,0xe3,0x83,0x9b,0xe3,0x82,0x9a,0x00, ++ 0x01,0x00,0x54,0x04,0x01,0x00,0xd3,0x22,0x52,0x04,0x01,0x00,0xd1,0x0f,0x10,0x0b, ++ 0x01,0xff,0xe3,0x82,0xa6,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe3,0x83,0xaf,0xe3,0x82,0x99,0x00,0xd2,0x25,0xd1,0x16,0x10,0x0b,0x01,0xff, ++ 0xe3,0x83,0xb0,0xe3,0x82,0x99,0x00,0x01,0xff,0xe3,0x83,0xb1,0xe3,0x82,0x99,0x00, ++ 0x10,0x0b,0x01,0xff,0xe3,0x83,0xb2,0xe3,0x82,0x99,0x00,0x01,0x00,0x51,0x04,0x01, ++ 0x00,0x10,0x0b,0x01,0xff,0xe3,0x83,0xbd,0xe3,0x82,0x99,0x00,0x06,0x00,0xd1,0x65, ++ 0xd0,0x46,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x52,0x04,0x00,0x00,0x91,0x08, ++ 0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x18,0x53,0x04, ++ 0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x0a,0x00,0x10,0x04, ++ 0x13,0x00,0x14,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x94,0x15,0x93,0x11, ++ 0x52,0x04,0x01,0x00,0x91,0x09,0x10,0x05,0x01,0xff,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0xd0,0x32,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x54, ++ 0x04,0x04,0x00,0x53,0x04,0x04,0x00,0x92,0x0c,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x08,0x14,0x04,0x08,0x00,0x0a,0x00,0x94, ++ 0x0c,0x93,0x08,0x12,0x04,0x0a,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0xd2,0xa4,0xd1, ++ 0x5c,0xd0,0x22,0xcf,0x86,0x95,0x1c,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x07,0x00,0x10,0x04,0x07,0x00,0x00, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0x20,0xd4,0x0c,0x93,0x08,0x12,0x04,0x01,0x00,0x0b, ++ 0x00,0x0b,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x07,0x00,0x06,0x00,0x06, ++ 0x00,0x06,0x00,0x06,0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0x52,0x04,0x01, ++ 0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x08,0x00,0x01,0x00,0xd0,0x1e,0xcf,0x86,0x55, ++ 0x04,0x01,0x00,0x54,0x04,0x01,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01, ++ 0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0xcf,0x86,0xd5,0x10,0x94,0x0c,0x53, ++ 0x04,0x01,0x00,0x12,0x04,0x01,0x00,0x07,0x00,0x01,0x00,0x54,0x04,0x01,0x00,0x53, ++ 0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x16, ++ 0x00,0xd1,0x30,0xd0,0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x54, ++ 0x04,0x01,0x00,0xd3,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x07,0x00,0x92,0x0c,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00,0x01,0x00,0x01, ++ 0x00,0xd0,0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x14,0x54,0x04,0x01,0x00,0x53, ++ 0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x11,0x04,0x01,0x00,0x07,0x00,0x54,0x04,0x01, ++ 0x00,0x53,0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x07,0x00,0xcf,0x06,0x04,0x00,0xcf,0x06,0x04,0x00,0xd1,0x48,0xd0,0x40,0xcf, ++ 0x86,0xd5,0x06,0xcf,0x06,0x04,0x00,0xd4,0x06,0xcf,0x06,0x04,0x00,0xd3,0x2c,0xd2, ++ 0x06,0xcf,0x06,0x04,0x00,0xd1,0x06,0xcf,0x06,0x04,0x00,0xd0,0x1a,0xcf,0x86,0x55, ++ 0x04,0x04,0x00,0x54,0x04,0x04,0x00,0x93,0x0c,0x52,0x04,0x04,0x00,0x11,0x04,0x04, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x07,0x00,0xcf,0x06,0x01,0x00,0xcf,0x86,0xcf, ++ 0x06,0x01,0x00,0xcf,0x86,0xcf,0x06,0x01,0x00,0xe2,0x71,0x05,0xd1,0x8c,0xd0,0x08, ++ 0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01,0x00,0xd4,0x06, ++ 0xcf,0x06,0x01,0x00,0xd3,0x06,0xcf,0x06,0x01,0x00,0xd2,0x06,0xcf,0x06,0x01,0x00, ++ 0xd1,0x06,0xcf,0x06,0x01,0x00,0xd0,0x22,0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x10, ++ 0x93,0x0c,0x52,0x04,0x01,0x00,0x11,0x04,0x01,0x00,0x08,0x00,0x08,0x00,0x53,0x04, ++ 0x08,0x00,0x12,0x04,0x08,0x00,0x0a,0x00,0xcf,0x86,0xd5,0x28,0xd4,0x18,0xd3,0x08, ++ 0x12,0x04,0x0a,0x00,0x0b,0x00,0x52,0x04,0x0b,0x00,0x91,0x08,0x10,0x04,0x0d,0x00, ++ 0x11,0x00,0x11,0x00,0x93,0x0c,0x52,0x04,0x11,0x00,0x11,0x04,0x11,0x00,0x13,0x00, ++ 0x13,0x00,0x94,0x14,0x53,0x04,0x13,0x00,0x92,0x0c,0x51,0x04,0x13,0x00,0x10,0x04, ++ 0x13,0x00,0x14,0x00,0x14,0x00,0x00,0x00,0xe0,0xdb,0x04,0xcf,0x86,0xe5,0xdf,0x01, ++ 0xd4,0x06,0xcf,0x06,0x04,0x00,0xd3,0x74,0xd2,0x6e,0xd1,0x06,0xcf,0x06,0x04,0x00, ++ 0xd0,0x3e,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x04,0x00,0x52,0x04,0x04,0x00, ++ 0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0xd4,0x10,0x93,0x0c, ++ 0x92,0x08,0x11,0x04,0x04,0x00,0x06,0x00,0x04,0x00,0x04,0x00,0x93,0x10,0x52,0x04, ++ 0x04,0x00,0x91,0x08,0x10,0x04,0x06,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0xcf,0x86, ++ 0x95,0x24,0x94,0x20,0x93,0x1c,0xd2,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x06,0x00, ++ 0x04,0x00,0xd1,0x08,0x10,0x04,0x04,0x00,0x06,0x00,0x10,0x04,0x04,0x00,0x00,0x00, ++ 0x00,0x00,0x0b,0x00,0x0b,0x00,0xcf,0x06,0x0a,0x00,0xd2,0x84,0xd1,0x4c,0xd0,0x16, ++ 0xcf,0x86,0x55,0x04,0x0a,0x00,0x94,0x0c,0x53,0x04,0x0a,0x00,0x12,0x04,0x0a,0x00, ++ 0x00,0x00,0x00,0x00,0xcf,0x86,0x55,0x04,0x0a,0x00,0xd4,0x1c,0xd3,0x0c,0x92,0x08, ++ 0x11,0x04,0x0c,0x00,0x0a,0x00,0x0a,0x00,0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00, ++ 0x10,0x04,0x0a,0x00,0x0a,0xe6,0xd3,0x08,0x12,0x04,0x0a,0x00,0x0d,0xe6,0x52,0x04, ++ 0x0d,0xe6,0x11,0x04,0x0a,0xe6,0x0a,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04, ++ 0x0a,0x00,0x53,0x04,0x0a,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04, ++ 0x11,0xe6,0x0d,0xe6,0x0b,0x00,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04,0x0b,0x00, ++ 0x93,0x0c,0x92,0x08,0x11,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0x00,0x00,0x00,0xd1,0x40, ++ 0xd0,0x3a,0xcf,0x86,0xd5,0x24,0x54,0x04,0x08,0x00,0xd3,0x10,0x52,0x04,0x08,0x00, ++ 0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x09,0x00,0x92,0x0c,0x51,0x04,0x09,0x00, ++ 0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x94,0x10,0x93,0x0c,0x92,0x08,0x11,0x04, ++ 0x09,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0xcf,0x06,0x0a,0x00,0xd0,0x5e, ++ 0xcf,0x86,0xd5,0x28,0xd4,0x18,0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00,0xd1,0x08, ++ 0x10,0x04,0x0a,0x00,0x0c,0x00,0x10,0x04,0x0c,0x00,0x11,0x00,0x93,0x0c,0x92,0x08, ++ 0x11,0x04,0x0c,0x00,0x0d,0x00,0x10,0x00,0x10,0x00,0xd4,0x1c,0x53,0x04,0x0c,0x00, ++ 0xd2,0x0c,0x51,0x04,0x0c,0x00,0x10,0x04,0x0d,0x00,0x10,0x00,0x51,0x04,0x10,0x00, ++ 0x10,0x04,0x12,0x00,0x14,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x10,0x00,0x11,0x00, ++ 0x11,0x00,0x92,0x08,0x11,0x04,0x14,0x00,0x15,0x00,0x15,0x00,0xcf,0x86,0xd5,0x1c, ++ 0x94,0x18,0x93,0x14,0xd2,0x08,0x11,0x04,0x00,0x00,0x15,0x00,0x51,0x04,0x15,0x00, ++ 0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x04,0x00,0x00,0xd3,0x10, ++ 0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x92,0x0c, ++ 0x51,0x04,0x0d,0x00,0x10,0x04,0x0c,0x00,0x0a,0x00,0x0a,0x00,0xe4,0xf2,0x02,0xe3, ++ 0x65,0x01,0xd2,0x98,0xd1,0x48,0xd0,0x36,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10, ++ 0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x09,0x08,0x00,0x08,0x00, ++ 0x08,0x00,0xd4,0x0c,0x53,0x04,0x08,0x00,0x12,0x04,0x08,0x00,0x00,0x00,0x53,0x04, ++ 0x0b,0x00,0x92,0x08,0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x55,0x04, ++ 0x09,0x00,0x54,0x04,0x09,0x00,0x13,0x04,0x09,0x00,0x00,0x00,0xd0,0x06,0xcf,0x06, ++ 0x0a,0x00,0xcf,0x86,0xd5,0x2c,0xd4,0x1c,0xd3,0x10,0x52,0x04,0x0a,0x00,0x91,0x08, ++ 0x10,0x04,0x0a,0x09,0x12,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00, ++ 0x0a,0x00,0x53,0x04,0x0a,0x00,0x92,0x08,0x11,0x04,0x0a,0x00,0x00,0x00,0x00,0x00, ++ 0x54,0x04,0x0b,0xe6,0xd3,0x0c,0x92,0x08,0x11,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0x00, ++ 0x52,0x04,0x0b,0x00,0x11,0x04,0x11,0x00,0x14,0x00,0xd1,0x60,0xd0,0x22,0xcf,0x86, ++ 0x55,0x04,0x0a,0x00,0x94,0x18,0x53,0x04,0x0a,0x00,0xd2,0x0c,0x51,0x04,0x0a,0x00, ++ 0x10,0x04,0x0a,0x00,0x0a,0xdc,0x11,0x04,0x0a,0xdc,0x0a,0x00,0x0a,0x00,0xcf,0x86, ++ 0xd5,0x24,0x54,0x04,0x0a,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x0a,0x00,0x10,0x04, ++ 0x0a,0x00,0x0a,0x09,0x00,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x0a,0x00,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00, ++ 0x91,0x08,0x10,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xd0,0x1e,0xcf,0x86,0x55,0x04, ++ 0x0b,0x00,0x54,0x04,0x0b,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x0b,0x00,0x10,0x04, ++ 0x0b,0x00,0x0b,0x07,0x0b,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x34,0xd4,0x20,0xd3,0x10, ++ 0x92,0x0c,0x91,0x08,0x10,0x04,0x0b,0x09,0x0b,0x00,0x0b,0x00,0x0b,0x00,0x52,0x04, ++ 0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x00,0x00,0x0b,0x00,0x53,0x04,0x0b,0x00, ++ 0xd2,0x08,0x11,0x04,0x0b,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x0b,0x00,0x54,0x04, ++ 0x10,0x00,0x53,0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0xd2,0xd0,0xd1,0x50,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x0a,0x00, ++ 0x54,0x04,0x0a,0x00,0x93,0x10,0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10,0x04, ++ 0x0a,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x20,0xd4,0x10,0x53,0x04,0x0a,0x00, ++ 0x52,0x04,0x0a,0x00,0x11,0x04,0x0a,0x00,0x00,0x00,0x53,0x04,0x0a,0x00,0x92,0x08, ++ 0x11,0x04,0x0a,0x00,0x00,0x00,0x0a,0x00,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00, ++ 0x12,0x04,0x0b,0x00,0x10,0x00,0xd0,0x3a,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04, ++ 0x0b,0x00,0xd3,0x1c,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0xe6, ++ 0xd1,0x08,0x10,0x04,0x0b,0xdc,0x0b,0x00,0x10,0x04,0x0b,0x00,0x0b,0xe6,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0x00,0x11,0x04,0x0b,0x00,0x0b,0xe6, ++ 0xcf,0x86,0xd5,0x2c,0xd4,0x18,0x93,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x0b,0x00, ++ 0x0b,0xe6,0x10,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x00,0x00, ++ 0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0b,0x00,0x0b,0x00,0x54,0x04, ++ 0x0d,0x00,0x93,0x10,0x52,0x04,0x0d,0x00,0x51,0x04,0x0d,0x00,0x10,0x04,0x0d,0x09, ++ 0x00,0x00,0x00,0x00,0xd1,0x8c,0xd0,0x72,0xcf,0x86,0xd5,0x4c,0xd4,0x30,0xd3,0x18, + 0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0c,0x00,0x0c,0x00,0x51,0x04,0x0c,0x00, +- 0x10,0x04,0x0c,0x00,0x00,0x00,0x93,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00, +- 0x0c,0x00,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0x00,0x00, +- 0x94,0x20,0xd3,0x10,0x52,0x04,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00, +- 0x00,0x00,0x52,0x04,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00, +- 0x10,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0x94,0x10,0x93,0x0c,0x52,0x04,0x11,0x00, +- 0x11,0x04,0x10,0x00,0x15,0x00,0x00,0x00,0x11,0x00,0xd0,0x06,0xcf,0x06,0x11,0x00, +- 0xcf,0x86,0x55,0x04,0x0b,0x00,0xd4,0x14,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00, +- 0x91,0x08,0x10,0x04,0x0b,0x00,0x0b,0x09,0x00,0x00,0x53,0x04,0x0b,0x00,0x92,0x08, +- 0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x02,0xff,0xff,0xcf,0x86,0xcf, +- 0x06,0x02,0xff,0xff,0xd1,0x76,0xd0,0x09,0xcf,0x86,0xcf,0x06,0x02,0xff,0xff,0xcf, +- 0x86,0x85,0xd4,0x07,0xcf,0x06,0x02,0xff,0xff,0xd3,0x07,0xcf,0x06,0x02,0xff,0xff, +- 0xd2,0x07,0xcf,0x06,0x02,0xff,0xff,0xd1,0x07,0xcf,0x06,0x02,0xff,0xff,0xd0,0x18, +- 0xcf,0x86,0x55,0x05,0x02,0xff,0xff,0x94,0x0d,0x93,0x09,0x12,0x05,0x02,0xff,0xff, +- 0x00,0x00,0x00,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x24,0x94,0x20,0xd3,0x10,0x52,0x04, +- 0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0x92,0x0c,0x51,0x04, +- 0x00,0x00,0x10,0x04,0x00,0x00,0x0b,0x00,0x0b,0x00,0x0b,0x00,0x54,0x04,0x0b,0x00, +- 0x53,0x04,0x0b,0x00,0x12,0x04,0x0b,0x00,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06, +- 0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01,0x00,0xe4,0x9c,0x10,0xe3,0x16,0x08, +- 0xd2,0x06,0xcf,0x06,0x01,0x00,0xe1,0x08,0x04,0xe0,0x04,0x02,0xcf,0x86,0xe5,0x01, +- 0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0xb1,0x88, +- 0x00,0x01,0xff,0xe6,0x9b,0xb4,0x00,0x10,0x08,0x01,0xff,0xe8,0xbb,0x8a,0x00,0x01, +- 0xff,0xe8,0xb3,0x88,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0xbb,0x91,0x00,0x01, +- 0xff,0xe4,0xb8,0xb2,0x00,0x10,0x08,0x01,0xff,0xe5,0x8f,0xa5,0x00,0x01,0xff,0xe9, +- 0xbe,0x9c,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0xbe,0x9c,0x00,0x01, +- 0xff,0xe5,0xa5,0x91,0x00,0x10,0x08,0x01,0xff,0xe9,0x87,0x91,0x00,0x01,0xff,0xe5, +- 0x96,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0xa5,0x88,0x00,0x01,0xff,0xe6, +- 0x87,0xb6,0x00,0x10,0x08,0x01,0xff,0xe7,0x99,0xa9,0x00,0x01,0xff,0xe7,0xbe,0x85, +- 0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x98,0xbf,0x00,0x01, +- 0xff,0xe8,0x9e,0xba,0x00,0x10,0x08,0x01,0xff,0xe8,0xa3,0xb8,0x00,0x01,0xff,0xe9, +- 0x82,0x8f,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0xa8,0x82,0x00,0x01,0xff,0xe6, +- 0xb4,0x9b,0x00,0x10,0x08,0x01,0xff,0xe7,0x83,0x99,0x00,0x01,0xff,0xe7,0x8f,0x9e, +- 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x90,0xbd,0x00,0x01,0xff,0xe9, +- 0x85,0xaa,0x00,0x10,0x08,0x01,0xff,0xe9,0xa7,0xb1,0x00,0x01,0xff,0xe4,0xba,0x82, +- 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0x8d,0xb5,0x00,0x01,0xff,0xe6,0xac,0x84, +- 0x00,0x10,0x08,0x01,0xff,0xe7,0x88,0x9b,0x00,0x01,0xff,0xe8,0x98,0xad,0x00,0xd4, +- 0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0xb8,0x9e,0x00,0x01, +- 0xff,0xe5,0xb5,0x90,0x00,0x10,0x08,0x01,0xff,0xe6,0xbf,0xab,0x00,0x01,0xff,0xe8, +- 0x97,0x8d,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0xa5,0xa4,0x00,0x01,0xff,0xe6, +- 0x8b,0x89,0x00,0x10,0x08,0x01,0xff,0xe8,0x87,0x98,0x00,0x01,0xff,0xe8,0xa0,0x9f, +- 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0xbb,0x8a,0x00,0x01,0xff,0xe6, +- 0x9c,0x97,0x00,0x10,0x08,0x01,0xff,0xe6,0xb5,0xaa,0x00,0x01,0xff,0xe7,0x8b,0xbc, +- 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0x83,0x8e,0x00,0x01,0xff,0xe4,0xbe,0x86, +- 0x00,0x10,0x08,0x01,0xff,0xe5,0x86,0xb7,0x00,0x01,0xff,0xe5,0x8b,0x9e,0x00,0xd3, +- 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0x93,0x84,0x00,0x01,0xff,0xe6, +- 0xab,0x93,0x00,0x10,0x08,0x01,0xff,0xe7,0x88,0x90,0x00,0x01,0xff,0xe7,0x9b,0xa7, +- 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x80,0x81,0x00,0x01,0xff,0xe8,0x98,0x86, +- 0x00,0x10,0x08,0x01,0xff,0xe8,0x99,0x9c,0x00,0x01,0xff,0xe8,0xb7,0xaf,0x00,0xd2, +- 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0x9c,0xb2,0x00,0x01,0xff,0xe9,0xad,0xaf, +- 0x00,0x10,0x08,0x01,0xff,0xe9,0xb7,0xba,0x00,0x01,0xff,0xe7,0xa2,0x8c,0x00,0xd1, +- 0x10,0x10,0x08,0x01,0xff,0xe7,0xa5,0xbf,0x00,0x01,0xff,0xe7,0xb6,0xa0,0x00,0x10, +- 0x08,0x01,0xff,0xe8,0x8f,0x89,0x00,0x01,0xff,0xe9,0x8c,0x84,0x00,0xcf,0x86,0xe5, +- 0x01,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0xb9, +- 0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0x10,0x08,0x01,0xff,0xe5,0xa3,0x9f,0x00, +- 0x01,0xff,0xe5,0xbc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe7,0xb1,0xa0,0x00, +- 0x01,0xff,0xe8,0x81,0xbe,0x00,0x10,0x08,0x01,0xff,0xe7,0x89,0xa2,0x00,0x01,0xff, +- 0xe7,0xa3,0x8a,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0xb3,0x82,0x00, +- 0x01,0xff,0xe9,0x9b,0xb7,0x00,0x10,0x08,0x01,0xff,0xe5,0xa3,0x98,0x00,0x01,0xff, +- 0xe5,0xb1,0xa2,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0xa8,0x93,0x00,0x01,0xff, +- 0xe6,0xb7,0x9a,0x00,0x10,0x08,0x01,0xff,0xe6,0xbc,0x8f,0x00,0x01,0xff,0xe7,0xb4, +- 0xaf,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe7,0xb8,0xb7,0x00, +- 0x01,0xff,0xe9,0x99,0x8b,0x00,0x10,0x08,0x01,0xff,0xe5,0x8b,0x92,0x00,0x01,0xff, +- 0xe8,0x82,0x8b,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0x87,0x9c,0x00,0x01,0xff, +- 0xe5,0x87,0x8c,0x00,0x10,0x08,0x01,0xff,0xe7,0xa8,0x9c,0x00,0x01,0xff,0xe7,0xb6, +- 0xbe,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x8f,0xb1,0x00,0x01,0xff, +- 0xe9,0x99,0xb5,0x00,0x10,0x08,0x01,0xff,0xe8,0xae,0x80,0x00,0x01,0xff,0xe6,0x8b, +- 0x8f,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0xa8,0x82,0x00,0x01,0xff,0xe8,0xab, +- 0xbe,0x00,0x10,0x08,0x01,0xff,0xe4,0xb8,0xb9,0x00,0x01,0xff,0xe5,0xaf,0xa7,0x00, +- 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0x11,0x04,0x00,0x00,0x12,0x00,0x12,0x00,0x12,0x00,0xd4,0x14,0x53,0x04,0x12,0x00, +- 0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x12,0x00,0x12,0x00,0x12,0x00,0x93,0x10, +- 0x52,0x04,0x12,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00, +- 0xcf,0x06,0x00,0x00,0xd1,0xa0,0xd0,0x52,0xcf,0x86,0xd5,0x24,0x94,0x20,0xd3,0x10, +- 0x52,0x04,0x13,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0x92,0x0c, +- 0x51,0x04,0x13,0x00,0x10,0x04,0x00,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0x54,0x04, +- 0x13,0x00,0xd3,0x10,0x52,0x04,0x13,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x00, +- 0x00,0x00,0xd2,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0x51,0x04, +- 0x13,0x00,0x10,0x04,0x00,0x00,0x13,0x00,0xcf,0x86,0xd5,0x28,0xd4,0x18,0x93,0x14, +- 0xd2,0x0c,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x07,0x13,0x00,0x11,0x04,0x13,0x09, +- 0x13,0x00,0x00,0x00,0x53,0x04,0x13,0x00,0x92,0x08,0x11,0x04,0x13,0x00,0x00,0x00, +- 0x00,0x00,0x94,0x20,0xd3,0x10,0x52,0x04,0x14,0x00,0x51,0x04,0x14,0x00,0x10,0x04, +- 0x00,0x00,0x14,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x14,0x00, +- 0x14,0x00,0x14,0x00,0xd0,0x52,0xcf,0x86,0xd5,0x3c,0xd4,0x14,0x53,0x04,0x14,0x00, +- 0x52,0x04,0x14,0x00,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0xd3,0x18, +- 0xd2,0x0c,0x51,0x04,0x14,0x00,0x10,0x04,0x00,0x00,0x14,0x00,0x51,0x04,0x14,0x00, +- 0x10,0x04,0x14,0x00,0x14,0x09,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00, +- 0x00,0x00,0x00,0x00,0x94,0x10,0x53,0x04,0x14,0x00,0x92,0x08,0x11,0x04,0x14,0x00, +- 0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd2,0x2a,0xd1,0x06,0xcf,0x06, +- 0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04, +- 0x14,0x00,0x53,0x04,0x14,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00, +- 0x00,0x00,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00, +- 0xcf,0x86,0x55,0x04,0x15,0x00,0x54,0x04,0x15,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04, +- 0x15,0x00,0x00,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04, +- 0x00,0x00,0x15,0x00,0xd0,0xca,0xcf,0x86,0xd5,0xc2,0xd4,0x54,0xd3,0x06,0xcf,0x06, +- 0x09,0x00,0xd2,0x06,0xcf,0x06,0x09,0x00,0xd1,0x24,0xd0,0x06,0xcf,0x06,0x09,0x00, +- 0xcf,0x86,0x55,0x04,0x09,0x00,0x94,0x14,0x53,0x04,0x09,0x00,0x52,0x04,0x09,0x00, +- 0x51,0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x10,0x00,0x10,0x00,0xd0,0x1e,0xcf,0x86, +- 0x95,0x18,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04, +- 0x10,0x00,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd3,0x68, +- 0xd2,0x46,0xd1,0x40,0xd0,0x06,0xcf,0x06,0x09,0x00,0xcf,0x86,0x55,0x04,0x09,0x00, +- 0xd4,0x20,0xd3,0x10,0x92,0x0c,0x51,0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x10,0x00, +- 0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00, +- 0x93,0x10,0x52,0x04,0x09,0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00, +- 0x00,0x00,0xcf,0x06,0x11,0x00,0xd1,0x1c,0xd0,0x06,0xcf,0x06,0x11,0x00,0xcf,0x86, +- 0x95,0x10,0x94,0x0c,0x93,0x08,0x12,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +- 0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x86, +- 0xd5,0x4c,0xd4,0x06,0xcf,0x06,0x0b,0x00,0xd3,0x40,0xd2,0x3a,0xd1,0x34,0xd0,0x2e, +- 0xcf,0x86,0x55,0x04,0x0b,0x00,0xd4,0x14,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00, +- 0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0x53,0x04,0x15,0x00,0x92,0x0c, +- 0x91,0x08,0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00, +- 0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00, +- 0xd1,0x4c,0xd0,0x44,0xcf,0x86,0xd5,0x3c,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06, +- 0xcf,0x06,0x11,0x00,0xd2,0x2a,0xd1,0x24,0xd0,0x06,0xcf,0x06,0x11,0x00,0xcf,0x86, +- 0x95,0x18,0x94,0x14,0x93,0x10,0x52,0x04,0x11,0x00,0x51,0x04,0x11,0x00,0x10,0x04, +- 0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06, +- 0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x86,0xcf,0x06,0x00,0x00,0xe0,0xd2,0x01,0xcf, +- 0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0x0b,0x01,0xd3,0x06,0xcf,0x06,0x0c,0x00, +- 0xd2,0x84,0xd1,0x50,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x0c,0x00,0x54,0x04,0x0c,0x00, +- 0x53,0x04,0x0c,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x00,0x00,0x00,0x00, +- 0x00,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00,0x52,0x04, +- 0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x94,0x14,0x53,0x04, +- 0x10,0x00,0xd2,0x08,0x11,0x04,0x10,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x10,0x00, +- 0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0x08,0x14,0x04,0x00,0x00, +- 0x10,0x00,0xd4,0x10,0x53,0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00, +- 0x00,0x00,0x93,0x10,0x52,0x04,0x10,0x01,0x91,0x08,0x10,0x04,0x10,0x01,0x10,0x00, +- 0x00,0x00,0x00,0x00,0xd1,0x6c,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x10,0x00,0x54,0x04, +- 0x10,0x00,0x93,0x10,0x52,0x04,0x10,0xe6,0x51,0x04,0x10,0xe6,0x10,0x04,0x10,0xe6, +- 0x10,0x00,0x10,0x00,0xcf,0x86,0xd5,0x24,0xd4,0x10,0x93,0x0c,0x52,0x04,0x10,0x00, +- 0x11,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x92,0x0c,0x51,0x04, +- 0x10,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0xd4,0x14,0x93,0x10,0x92,0x0c, +- 0x51,0x04,0x10,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x53,0x04, +- 0x10,0x00,0x52,0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00, +- 0xd0,0x0e,0xcf,0x86,0x95,0x08,0x14,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xcf,0x06, +- 0x00,0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2,0x30,0xd1,0x0c,0xd0,0x06,0xcf,0x06, +- 0x00,0x00,0xcf,0x06,0x14,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x14,0x00, +- 0x53,0x04,0x14,0x00,0x92,0x0c,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00, +- 0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1,0x4c,0xd0,0x06,0xcf,0x06,0x0d,0x00, +- 0xcf,0x86,0xd5,0x2c,0x94,0x28,0xd3,0x10,0x52,0x04,0x0d,0x00,0x91,0x08,0x10,0x04, +- 0x0d,0x00,0x15,0x00,0x15,0x00,0xd2,0x0c,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00, +- 0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x15,0x00,0x0d,0x00,0x54,0x04, +- 0x0d,0x00,0x53,0x04,0x0d,0x00,0x52,0x04,0x0d,0x00,0x51,0x04,0x0d,0x00,0x10,0x04, +- 0x0d,0x00,0x15,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x53,0x04,0x15,0x00, +- 0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0d,0x00,0x0d,0x00, +- 0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08, +- 0x10,0x04,0x12,0x00,0x13,0x00,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86, +- 0xcf,0x06,0x12,0x00,0xe2,0xc5,0x01,0xd1,0x8e,0xd0,0x86,0xcf,0x86,0xd5,0x48,0xd4, +- 0x06,0xcf,0x06,0x12,0x00,0xd3,0x06,0xcf,0x06,0x12,0x00,0xd2,0x06,0xcf,0x06,0x12, +- 0x00,0xd1,0x06,0xcf,0x06,0x12,0x00,0xd0,0x06,0xcf,0x06,0x12,0x00,0xcf,0x86,0x55, +- 0x04,0x12,0x00,0xd4,0x14,0x53,0x04,0x12,0x00,0x52,0x04,0x12,0x00,0x91,0x08,0x10, +- 0x04,0x12,0x00,0x14,0x00,0x14,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x14,0x00,0x15, +- 0x00,0x15,0x00,0x00,0x00,0xd4,0x36,0xd3,0x06,0xcf,0x06,0x12,0x00,0xd2,0x2a,0xd1, +- 0x06,0xcf,0x06,0x12,0x00,0xd0,0x06,0xcf,0x06,0x12,0x00,0xcf,0x86,0x55,0x04,0x12, +- 0x00,0x54,0x04,0x12,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x12,0x00,0x10,0x04,0x12, ++ 0x10,0x04,0x0c,0x00,0x00,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0c,0x00, ++ 0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0x93,0x18,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x00,0x00,0x0c,0x00,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04, ++ 0x0c,0x00,0x00,0x00,0x00,0x00,0x94,0x20,0xd3,0x10,0x52,0x04,0x0c,0x00,0x51,0x04, ++ 0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0x52,0x04,0x0c,0x00,0x51,0x04,0x0c,0x00, ++ 0x10,0x04,0x0c,0x00,0x00,0x00,0x10,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0x94,0x10, ++ 0x93,0x0c,0x52,0x04,0x11,0x00,0x11,0x04,0x10,0x00,0x15,0x00,0x00,0x00,0x11,0x00, ++ 0xd0,0x06,0xcf,0x06,0x11,0x00,0xcf,0x86,0x55,0x04,0x0b,0x00,0xd4,0x14,0x53,0x04, ++ 0x0b,0x00,0x52,0x04,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x00,0x0b,0x09,0x00,0x00, ++ 0x53,0x04,0x0b,0x00,0x92,0x08,0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xcf,0x06, ++ 0x02,0xff,0xff,0xcf,0x86,0xcf,0x06,0x02,0xff,0xff,0xd1,0x76,0xd0,0x09,0xcf,0x86, ++ 0xcf,0x06,0x02,0xff,0xff,0xcf,0x86,0x85,0xd4,0x07,0xcf,0x06,0x02,0xff,0xff,0xd3, ++ 0x07,0xcf,0x06,0x02,0xff,0xff,0xd2,0x07,0xcf,0x06,0x02,0xff,0xff,0xd1,0x07,0xcf, ++ 0x06,0x02,0xff,0xff,0xd0,0x18,0xcf,0x86,0x55,0x05,0x02,0xff,0xff,0x94,0x0d,0x93, ++ 0x09,0x12,0x05,0x02,0xff,0xff,0x00,0x00,0x00,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x24, ++ 0x94,0x20,0xd3,0x10,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00, ++ 0x00,0x00,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0b,0x00,0x0b,0x00, ++ 0x0b,0x00,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00,0x12,0x04,0x0b,0x00,0x00,0x00, ++ 0xd0,0x08,0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01,0x00, ++ 0xe4,0x9c,0x10,0xe3,0x16,0x08,0xd2,0x06,0xcf,0x06,0x01,0x00,0xe1,0x08,0x04,0xe0, ++ 0x04,0x02,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe8,0xb1,0x88,0x00,0x01,0xff,0xe6,0x9b,0xb4,0x00,0x10,0x08,0x01, ++ 0xff,0xe8,0xbb,0x8a,0x00,0x01,0xff,0xe8,0xb3,0x88,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe6,0xbb,0x91,0x00,0x01,0xff,0xe4,0xb8,0xb2,0x00,0x10,0x08,0x01,0xff,0xe5, ++ 0x8f,0xa5,0x00,0x01,0xff,0xe9,0xbe,0x9c,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe9,0xbe,0x9c,0x00,0x01,0xff,0xe5,0xa5,0x91,0x00,0x10,0x08,0x01,0xff,0xe9, ++ 0x87,0x91,0x00,0x01,0xff,0xe5,0x96,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5, ++ 0xa5,0x88,0x00,0x01,0xff,0xe6,0x87,0xb6,0x00,0x10,0x08,0x01,0xff,0xe7,0x99,0xa9, ++ 0x00,0x01,0xff,0xe7,0xbe,0x85,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe8,0x98,0xbf,0x00,0x01,0xff,0xe8,0x9e,0xba,0x00,0x10,0x08,0x01,0xff,0xe8, ++ 0xa3,0xb8,0x00,0x01,0xff,0xe9,0x82,0x8f,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6, ++ 0xa8,0x82,0x00,0x01,0xff,0xe6,0xb4,0x9b,0x00,0x10,0x08,0x01,0xff,0xe7,0x83,0x99, ++ 0x00,0x01,0xff,0xe7,0x8f,0x9e,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8, ++ 0x90,0xbd,0x00,0x01,0xff,0xe9,0x85,0xaa,0x00,0x10,0x08,0x01,0xff,0xe9,0xa7,0xb1, ++ 0x00,0x01,0xff,0xe4,0xba,0x82,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0x8d,0xb5, ++ 0x00,0x01,0xff,0xe6,0xac,0x84,0x00,0x10,0x08,0x01,0xff,0xe7,0x88,0x9b,0x00,0x01, ++ 0xff,0xe8,0x98,0xad,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe9,0xb8,0x9e,0x00,0x01,0xff,0xe5,0xb5,0x90,0x00,0x10,0x08,0x01,0xff,0xe6, ++ 0xbf,0xab,0x00,0x01,0xff,0xe8,0x97,0x8d,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8, ++ 0xa5,0xa4,0x00,0x01,0xff,0xe6,0x8b,0x89,0x00,0x10,0x08,0x01,0xff,0xe8,0x87,0x98, ++ 0x00,0x01,0xff,0xe8,0xa0,0x9f,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5, ++ 0xbb,0x8a,0x00,0x01,0xff,0xe6,0x9c,0x97,0x00,0x10,0x08,0x01,0xff,0xe6,0xb5,0xaa, ++ 0x00,0x01,0xff,0xe7,0x8b,0xbc,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0x83,0x8e, ++ 0x00,0x01,0xff,0xe4,0xbe,0x86,0x00,0x10,0x08,0x01,0xff,0xe5,0x86,0xb7,0x00,0x01, ++ 0xff,0xe5,0x8b,0x9e,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6, ++ 0x93,0x84,0x00,0x01,0xff,0xe6,0xab,0x93,0x00,0x10,0x08,0x01,0xff,0xe7,0x88,0x90, ++ 0x00,0x01,0xff,0xe7,0x9b,0xa7,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x80,0x81, ++ 0x00,0x01,0xff,0xe8,0x98,0x86,0x00,0x10,0x08,0x01,0xff,0xe8,0x99,0x9c,0x00,0x01, ++ 0xff,0xe8,0xb7,0xaf,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0x9c,0xb2, ++ 0x00,0x01,0xff,0xe9,0xad,0xaf,0x00,0x10,0x08,0x01,0xff,0xe9,0xb7,0xba,0x00,0x01, ++ 0xff,0xe7,0xa2,0x8c,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe7,0xa5,0xbf,0x00,0x01, ++ 0xff,0xe7,0xb6,0xa0,0x00,0x10,0x08,0x01,0xff,0xe8,0x8f,0x89,0x00,0x01,0xff,0xe9, ++ 0x8c,0x84,0x00,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe9,0xb9,0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0x10,0x08, ++ 0x01,0xff,0xe5,0xa3,0x9f,0x00,0x01,0xff,0xe5,0xbc,0x84,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe7,0xb1,0xa0,0x00,0x01,0xff,0xe8,0x81,0xbe,0x00,0x10,0x08,0x01,0xff, ++ 0xe7,0x89,0xa2,0x00,0x01,0xff,0xe7,0xa3,0x8a,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe8,0xb3,0x82,0x00,0x01,0xff,0xe9,0x9b,0xb7,0x00,0x10,0x08,0x01,0xff, ++ 0xe5,0xa3,0x98,0x00,0x01,0xff,0xe5,0xb1,0xa2,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe6,0xa8,0x93,0x00,0x01,0xff,0xe6,0xb7,0x9a,0x00,0x10,0x08,0x01,0xff,0xe6,0xbc, ++ 0x8f,0x00,0x01,0xff,0xe7,0xb4,0xaf,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe7,0xb8,0xb7,0x00,0x01,0xff,0xe9,0x99,0x8b,0x00,0x10,0x08,0x01,0xff, ++ 0xe5,0x8b,0x92,0x00,0x01,0xff,0xe8,0x82,0x8b,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe5,0x87,0x9c,0x00,0x01,0xff,0xe5,0x87,0x8c,0x00,0x10,0x08,0x01,0xff,0xe7,0xa8, ++ 0x9c,0x00,0x01,0xff,0xe7,0xb6,0xbe,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe8,0x8f,0xb1,0x00,0x01,0xff,0xe9,0x99,0xb5,0x00,0x10,0x08,0x01,0xff,0xe8,0xae, ++ 0x80,0x00,0x01,0xff,0xe6,0x8b,0x8f,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0xa8, ++ 0x82,0x00,0x01,0xff,0xe8,0xab,0xbe,0x00,0x10,0x08,0x01,0xff,0xe4,0xb8,0xb9,0x00, ++ 0x01,0xff,0xe5,0xaf,0xa7,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe6,0x80,0x92,0x00,0x01,0xff,0xe7,0x8e,0x87,0x00,0x10,0x08,0x01,0xff, ++ 0xe7,0x95,0xb0,0x00,0x01,0xff,0xe5,0x8c,0x97,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe7,0xa3,0xbb,0x00,0x01,0xff,0xe4,0xbe,0xbf,0x00,0x10,0x08,0x01,0xff,0xe5,0xbe, ++ 0xa9,0x00,0x01,0xff,0xe4,0xb8,0x8d,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe6,0xb3,0x8c,0x00,0x01,0xff,0xe6,0x95,0xb8,0x00,0x10,0x08,0x01,0xff,0xe7,0xb4, ++ 0xa2,0x00,0x01,0xff,0xe5,0x8f,0x83,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0xa1, ++ 0x9e,0x00,0x01,0xff,0xe7,0x9c,0x81,0x00,0x10,0x08,0x01,0xff,0xe8,0x91,0x89,0x00, ++ 0x01,0xff,0xe8,0xaa,0xaa,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe6,0xae,0xba,0x00,0x01,0xff,0xe8,0xbe,0xb0,0x00,0x10,0x08,0x01,0xff,0xe6,0xb2, ++ 0x88,0x00,0x01,0xff,0xe6,0x8b,0xbe,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x8b, ++ 0xa5,0x00,0x01,0xff,0xe6,0x8e,0xa0,0x00,0x10,0x08,0x01,0xff,0xe7,0x95,0xa5,0x00, ++ 0x01,0xff,0xe4,0xba,0xae,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0x85, ++ 0xa9,0x00,0x01,0xff,0xe5,0x87,0x89,0x00,0x10,0x08,0x01,0xff,0xe6,0xa2,0x81,0x00, ++ 0x01,0xff,0xe7,0xb3,0xa7,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x89,0xaf,0x00, ++ 0x01,0xff,0xe8,0xab,0x92,0x00,0x10,0x08,0x01,0xff,0xe9,0x87,0x8f,0x00,0x01,0xff, ++ 0xe5,0x8b,0xb5,0x00,0xe0,0x04,0x02,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0x91,0x82,0x00,0x01,0xff,0xe5,0xa5, ++ 0xb3,0x00,0x10,0x08,0x01,0xff,0xe5,0xbb,0xac,0x00,0x01,0xff,0xe6,0x97,0x85,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0xbf,0xbe,0x00,0x01,0xff,0xe7,0xa4,0xaa,0x00, ++ 0x10,0x08,0x01,0xff,0xe9,0x96,0xad,0x00,0x01,0xff,0xe9,0xa9,0xaa,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0xba,0x97,0x00,0x01,0xff,0xe9,0xbb,0x8e,0x00, ++ 0x10,0x08,0x01,0xff,0xe5,0x8a,0x9b,0x00,0x01,0xff,0xe6,0x9b,0x86,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe6,0xad,0xb7,0x00,0x01,0xff,0xe8,0xbd,0xa2,0x00,0x10,0x08, ++ 0x01,0xff,0xe5,0xb9,0xb4,0x00,0x01,0xff,0xe6,0x86,0x90,0x00,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0x88,0x80,0x00,0x01,0xff,0xe6,0x92,0x9a,0x00, ++ 0x10,0x08,0x01,0xff,0xe6,0xbc,0xa3,0x00,0x01,0xff,0xe7,0x85,0x89,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe7,0x92,0x89,0x00,0x01,0xff,0xe7,0xa7,0x8a,0x00,0x10,0x08, ++ 0x01,0xff,0xe7,0xb7,0xb4,0x00,0x01,0xff,0xe8,0x81,0xaf,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe8,0xbc,0xa6,0x00,0x01,0xff,0xe8,0x93,0xae,0x00,0x10,0x08, ++ 0x01,0xff,0xe9,0x80,0xa3,0x00,0x01,0xff,0xe9,0x8d,0x8a,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe5,0x88,0x97,0x00,0x01,0xff,0xe5,0x8a,0xa3,0x00,0x10,0x08,0x01,0xff, ++ 0xe5,0x92,0xbd,0x00,0x01,0xff,0xe7,0x83,0x88,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0xa3,0x82,0x00,0x01,0xff,0xe8,0xaa,0xaa,0x00, ++ 0x10,0x08,0x01,0xff,0xe5,0xbb,0x89,0x00,0x01,0xff,0xe5,0xbf,0xb5,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe6,0x8d,0xbb,0x00,0x01,0xff,0xe6,0xae,0xae,0x00,0x10,0x08, ++ 0x01,0xff,0xe7,0xb0,0xbe,0x00,0x01,0xff,0xe7,0x8d,0xb5,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe4,0xbb,0xa4,0x00,0x01,0xff,0xe5,0x9b,0xb9,0x00,0x10,0x08, ++ 0x01,0xff,0xe5,0xaf,0xa7,0x00,0x01,0xff,0xe5,0xb6,0xba,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe6,0x80,0x9c,0x00,0x01,0xff,0xe7,0x8e,0xb2,0x00,0x10,0x08,0x01,0xff, ++ 0xe7,0x91,0xa9,0x00,0x01,0xff,0xe7,0xbe,0x9a,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe8,0x81,0x86,0x00,0x01,0xff,0xe9,0x88,0xb4,0x00,0x10,0x08, ++ 0x01,0xff,0xe9,0x9b,0xb6,0x00,0x01,0xff,0xe9,0x9d,0x88,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe9,0xa0,0x98,0x00,0x01,0xff,0xe4,0xbe,0x8b,0x00,0x10,0x08,0x01,0xff, ++ 0xe7,0xa6,0xae,0x00,0x01,0xff,0xe9,0x86,0xb4,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe9,0x9a,0xb8,0x00,0x01,0xff,0xe6,0x83,0xa1,0x00,0x10,0x08,0x01,0xff, ++ 0xe4,0xba,0x86,0x00,0x01,0xff,0xe5,0x83,0x9a,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe5,0xaf,0xae,0x00,0x01,0xff,0xe5,0xb0,0xbf,0x00,0x10,0x08,0x01,0xff,0xe6,0x96, ++ 0x99,0x00,0x01,0xff,0xe6,0xa8,0x82,0x00,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe7,0x87,0x8e,0x00,0x01,0xff,0xe7, ++ 0x99,0x82,0x00,0x10,0x08,0x01,0xff,0xe8,0x93,0xbc,0x00,0x01,0xff,0xe9,0x81,0xbc, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0xbe,0x8d,0x00,0x01,0xff,0xe6,0x9a,0x88, ++ 0x00,0x10,0x08,0x01,0xff,0xe9,0x98,0xae,0x00,0x01,0xff,0xe5,0x8a,0x89,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0x9d,0xbb,0x00,0x01,0xff,0xe6,0x9f,0xb3, ++ 0x00,0x10,0x08,0x01,0xff,0xe6,0xb5,0x81,0x00,0x01,0xff,0xe6,0xba,0x9c,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe7,0x90,0x89,0x00,0x01,0xff,0xe7,0x95,0x99,0x00,0x10, ++ 0x08,0x01,0xff,0xe7,0xa1,0xab,0x00,0x01,0xff,0xe7,0xb4,0x90,0x00,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0xa1,0x9e,0x00,0x01,0xff,0xe5,0x85,0xad, ++ 0x00,0x10,0x08,0x01,0xff,0xe6,0x88,0xae,0x00,0x01,0xff,0xe9,0x99,0xb8,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe5,0x80,0xab,0x00,0x01,0xff,0xe5,0xb4,0x99,0x00,0x10, ++ 0x08,0x01,0xff,0xe6,0xb7,0xaa,0x00,0x01,0xff,0xe8,0xbc,0xaa,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe5,0xbe,0x8b,0x00,0x01,0xff,0xe6,0x85,0x84,0x00,0x10, ++ 0x08,0x01,0xff,0xe6,0xa0,0x97,0x00,0x01,0xff,0xe7,0x8e,0x87,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe9,0x9a,0x86,0x00,0x01,0xff,0xe5,0x88,0xa9,0x00,0x10,0x08,0x01, ++ 0xff,0xe5,0x90,0x8f,0x00,0x01,0xff,0xe5,0xb1,0xa5,0x00,0xd4,0x80,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0x98,0x93,0x00,0x01,0xff,0xe6,0x9d,0x8e, ++ 0x00,0x10,0x08,0x01,0xff,0xe6,0xa2,0xa8,0x00,0x01,0xff,0xe6,0xb3,0xa5,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe7,0x90,0x86,0x00,0x01,0xff,0xe7,0x97,0xa2,0x00,0x10, ++ 0x08,0x01,0xff,0xe7,0xbd,0xb9,0x00,0x01,0xff,0xe8,0xa3,0x8f,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe8,0xa3,0xa1,0x00,0x01,0xff,0xe9,0x87,0x8c,0x00,0x10, ++ 0x08,0x01,0xff,0xe9,0x9b,0xa2,0x00,0x01,0xff,0xe5,0x8c,0xbf,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe6,0xba,0xba,0x00,0x01,0xff,0xe5,0x90,0x9d,0x00,0x10,0x08,0x01, ++ 0xff,0xe7,0x87,0x90,0x00,0x01,0xff,0xe7,0x92,0x98,0x00,0xd3,0x40,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe8,0x97,0xba,0x00,0x01,0xff,0xe9,0x9a,0xa3,0x00,0x10, ++ 0x08,0x01,0xff,0xe9,0xb1,0x97,0x00,0x01,0xff,0xe9,0xba,0x9f,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe6,0x9e,0x97,0x00,0x01,0xff,0xe6,0xb7,0x8b,0x00,0x10,0x08,0x01, ++ 0xff,0xe8,0x87,0xa8,0x00,0x01,0xff,0xe7,0xab,0x8b,0x00,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe7,0xac,0xa0,0x00,0x01,0xff,0xe7,0xb2,0x92,0x00,0x10,0x08,0x01, ++ 0xff,0xe7,0x8b,0x80,0x00,0x01,0xff,0xe7,0x82,0x99,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe8,0xad,0x98,0x00,0x01,0xff,0xe4,0xbb,0x80,0x00,0x10,0x08,0x01,0xff,0xe8, ++ 0x8c,0xb6,0x00,0x01,0xff,0xe5,0x88,0xba,0x00,0xe2,0xad,0x06,0xe1,0xc4,0x03,0xe0, ++ 0xcb,0x01,0xcf,0x86,0xd5,0xe4,0xd4,0x74,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe5,0x88,0x87,0x00,0x01,0xff,0xe5,0xba,0xa6,0x00,0x10,0x08,0x01,0xff, ++ 0xe6,0x8b,0x93,0x00,0x01,0xff,0xe7,0xb3,0x96,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe5,0xae,0x85,0x00,0x01,0xff,0xe6,0xb4,0x9e,0x00,0x10,0x08,0x01,0xff,0xe6,0x9a, ++ 0xb4,0x00,0x01,0xff,0xe8,0xbc,0xbb,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe8,0xa1,0x8c,0x00,0x01,0xff,0xe9,0x99,0x8d,0x00,0x10,0x08,0x01,0xff,0xe8,0xa6, ++ 0x8b,0x00,0x01,0xff,0xe5,0xbb,0x93,0x00,0x91,0x10,0x10,0x08,0x01,0xff,0xe5,0x85, ++ 0x80,0x00,0x01,0xff,0xe5,0x97,0x80,0x00,0x01,0x00,0xd3,0x34,0xd2,0x18,0xd1,0x0c, ++ 0x10,0x08,0x01,0xff,0xe5,0xa1,0x9a,0x00,0x01,0x00,0x10,0x08,0x01,0xff,0xe6,0x99, ++ 0xb4,0x00,0x01,0x00,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0xe5,0x87,0x9e,0x00, ++ 0x10,0x08,0x01,0xff,0xe7,0x8c,0xaa,0x00,0x01,0xff,0xe7,0x9b,0x8a,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe7,0xa4,0xbc,0x00,0x01,0xff,0xe7,0xa5,0x9e,0x00, ++ 0x10,0x08,0x01,0xff,0xe7,0xa5,0xa5,0x00,0x01,0xff,0xe7,0xa6,0x8f,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe9,0x9d,0x96,0x00,0x01,0xff,0xe7,0xb2,0xbe,0x00,0x10,0x08, ++ 0x01,0xff,0xe7,0xbe,0xbd,0x00,0x01,0x00,0xd4,0x64,0xd3,0x30,0xd2,0x18,0xd1,0x0c, ++ 0x10,0x08,0x01,0xff,0xe8,0x98,0x92,0x00,0x01,0x00,0x10,0x08,0x01,0xff,0xe8,0xab, ++ 0xb8,0x00,0x01,0x00,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0xe9,0x80,0xb8,0x00, ++ 0x10,0x08,0x01,0xff,0xe9,0x83,0xbd,0x00,0x01,0x00,0xd2,0x14,0x51,0x04,0x01,0x00, ++ 0x10,0x08,0x01,0xff,0xe9,0xa3,0xaf,0x00,0x01,0xff,0xe9,0xa3,0xbc,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe9,0xa4,0xa8,0x00,0x01,0xff,0xe9,0xb6,0xb4,0x00,0x10,0x08, ++ 0x0d,0xff,0xe9,0x83,0x9e,0x00,0x0d,0xff,0xe9,0x9a,0xb7,0x00,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x06,0xff,0xe4,0xbe,0xae,0x00,0x06,0xff,0xe5,0x83,0xa7,0x00, ++ 0x10,0x08,0x06,0xff,0xe5,0x85,0x8d,0x00,0x06,0xff,0xe5,0x8b,0x89,0x00,0xd1,0x10, ++ 0x10,0x08,0x06,0xff,0xe5,0x8b,0xa4,0x00,0x06,0xff,0xe5,0x8d,0x91,0x00,0x10,0x08, ++ 0x06,0xff,0xe5,0x96,0x9d,0x00,0x06,0xff,0xe5,0x98,0x86,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x06,0xff,0xe5,0x99,0xa8,0x00,0x06,0xff,0xe5,0xa1,0x80,0x00,0x10,0x08, ++ 0x06,0xff,0xe5,0xa2,0xa8,0x00,0x06,0xff,0xe5,0xb1,0xa4,0x00,0xd1,0x10,0x10,0x08, ++ 0x06,0xff,0xe5,0xb1,0xae,0x00,0x06,0xff,0xe6,0x82,0x94,0x00,0x10,0x08,0x06,0xff, ++ 0xe6,0x85,0xa8,0x00,0x06,0xff,0xe6,0x86,0x8e,0x00,0xcf,0x86,0xe5,0x01,0x01,0xd4, ++ 0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe6,0x87,0xb2,0x00,0x06, ++ 0xff,0xe6,0x95,0x8f,0x00,0x10,0x08,0x06,0xff,0xe6,0x97,0xa2,0x00,0x06,0xff,0xe6, ++ 0x9a,0x91,0x00,0xd1,0x10,0x10,0x08,0x06,0xff,0xe6,0xa2,0x85,0x00,0x06,0xff,0xe6, ++ 0xb5,0xb7,0x00,0x10,0x08,0x06,0xff,0xe6,0xb8,0x9a,0x00,0x06,0xff,0xe6,0xbc,0xa2, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0x85,0xae,0x00,0x06,0xff,0xe7, ++ 0x88,0xab,0x00,0x10,0x08,0x06,0xff,0xe7,0x90,0xa2,0x00,0x06,0xff,0xe7,0xa2,0x91, ++ 0x00,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0xa4,0xbe,0x00,0x06,0xff,0xe7,0xa5,0x89, ++ 0x00,0x10,0x08,0x06,0xff,0xe7,0xa5,0x88,0x00,0x06,0xff,0xe7,0xa5,0x90,0x00,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0xa5,0x96,0x00,0x06,0xff,0xe7, ++ 0xa5,0x9d,0x00,0x10,0x08,0x06,0xff,0xe7,0xa6,0x8d,0x00,0x06,0xff,0xe7,0xa6,0x8e, ++ 0x00,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0xa9,0x80,0x00,0x06,0xff,0xe7,0xaa,0x81, ++ 0x00,0x10,0x08,0x06,0xff,0xe7,0xaf,0x80,0x00,0x06,0xff,0xe7,0xb7,0xb4,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0xb8,0x89,0x00,0x06,0xff,0xe7,0xb9,0x81, ++ 0x00,0x10,0x08,0x06,0xff,0xe7,0xbd,0xb2,0x00,0x06,0xff,0xe8,0x80,0x85,0x00,0xd1, ++ 0x10,0x10,0x08,0x06,0xff,0xe8,0x87,0xad,0x00,0x06,0xff,0xe8,0x89,0xb9,0x00,0x10, ++ 0x08,0x06,0xff,0xe8,0x89,0xb9,0x00,0x06,0xff,0xe8,0x91,0x97,0x00,0xd4,0x75,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe8,0xa4,0x90,0x00,0x06,0xff,0xe8, ++ 0xa6,0x96,0x00,0x10,0x08,0x06,0xff,0xe8,0xac,0x81,0x00,0x06,0xff,0xe8,0xac,0xb9, ++ 0x00,0xd1,0x10,0x10,0x08,0x06,0xff,0xe8,0xb3,0x93,0x00,0x06,0xff,0xe8,0xb4,0x88, ++ 0x00,0x10,0x08,0x06,0xff,0xe8,0xbe,0xb6,0x00,0x06,0xff,0xe9,0x80,0xb8,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe9,0x9b,0xa3,0x00,0x06,0xff,0xe9,0x9f,0xbf, ++ 0x00,0x10,0x08,0x06,0xff,0xe9,0xa0,0xbb,0x00,0x0b,0xff,0xe6,0x81,0xb5,0x00,0x91, ++ 0x11,0x10,0x09,0x0b,0xff,0xf0,0xa4,0x8b,0xae,0x00,0x0b,0xff,0xe8,0x88,0x98,0x00, ++ 0x00,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff,0xe4,0xb8,0xa6,0x00, ++ 0x08,0xff,0xe5,0x86,0xb5,0x00,0x10,0x08,0x08,0xff,0xe5,0x85,0xa8,0x00,0x08,0xff, ++ 0xe4,0xbe,0x80,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe5,0x85,0x85,0x00,0x08,0xff, ++ 0xe5,0x86,0x80,0x00,0x10,0x08,0x08,0xff,0xe5,0x8b,0x87,0x00,0x08,0xff,0xe5,0x8b, ++ 0xba,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff,0xe5,0x96,0x9d,0x00,0x08,0xff, ++ 0xe5,0x95,0x95,0x00,0x10,0x08,0x08,0xff,0xe5,0x96,0x99,0x00,0x08,0xff,0xe5,0x97, ++ 0xa2,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe5,0xa1,0x9a,0x00,0x08,0xff,0xe5,0xa2, ++ 0xb3,0x00,0x10,0x08,0x08,0xff,0xe5,0xa5,0x84,0x00,0x08,0xff,0xe5,0xa5,0x94,0x00, ++ 0xe0,0x04,0x02,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x08,0xff,0xe5,0xa9,0xa2,0x00,0x08,0xff,0xe5,0xac,0xa8,0x00,0x10,0x08, ++ 0x08,0xff,0xe5,0xbb,0x92,0x00,0x08,0xff,0xe5,0xbb,0x99,0x00,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe5,0xbd,0xa9,0x00,0x08,0xff,0xe5,0xbe,0xad,0x00,0x10,0x08,0x08,0xff, ++ 0xe6,0x83,0x98,0x00,0x08,0xff,0xe6,0x85,0x8e,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe6,0x84,0x88,0x00,0x08,0xff,0xe6,0x86,0x8e,0x00,0x10,0x08,0x08,0xff, ++ 0xe6,0x85,0xa0,0x00,0x08,0xff,0xe6,0x87,0xb2,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe6,0x88,0xb4,0x00,0x08,0xff,0xe6,0x8f,0x84,0x00,0x10,0x08,0x08,0xff,0xe6,0x90, ++ 0x9c,0x00,0x08,0xff,0xe6,0x91,0x92,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe6,0x95,0x96,0x00,0x08,0xff,0xe6,0x99,0xb4,0x00,0x10,0x08,0x08,0xff, ++ 0xe6,0x9c,0x97,0x00,0x08,0xff,0xe6,0x9c,0x9b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe6,0x9d,0x96,0x00,0x08,0xff,0xe6,0xad,0xb9,0x00,0x10,0x08,0x08,0xff,0xe6,0xae, ++ 0xba,0x00,0x08,0xff,0xe6,0xb5,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe6,0xbb,0x9b,0x00,0x08,0xff,0xe6,0xbb,0x8b,0x00,0x10,0x08,0x08,0xff,0xe6,0xbc, ++ 0xa2,0x00,0x08,0xff,0xe7,0x80,0x9e,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe7,0x85, ++ 0xae,0x00,0x08,0xff,0xe7,0x9e,0xa7,0x00,0x10,0x08,0x08,0xff,0xe7,0x88,0xb5,0x00, ++ 0x08,0xff,0xe7,0x8a,0xaf,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe7,0x8c,0xaa,0x00,0x08,0xff,0xe7,0x91,0xb1,0x00,0x10,0x08,0x08,0xff, ++ 0xe7,0x94,0x86,0x00,0x08,0xff,0xe7,0x94,0xbb,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe7,0x98,0x9d,0x00,0x08,0xff,0xe7,0x98,0x9f,0x00,0x10,0x08,0x08,0xff,0xe7,0x9b, ++ 0x8a,0x00,0x08,0xff,0xe7,0x9b,0x9b,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe7,0x9b,0xb4,0x00,0x08,0xff,0xe7,0x9d,0x8a,0x00,0x10,0x08,0x08,0xff,0xe7,0x9d, ++ 0x80,0x00,0x08,0xff,0xe7,0xa3,0x8c,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe7,0xaa, ++ 0xb1,0x00,0x08,0xff,0xe7,0xaf,0x80,0x00,0x10,0x08,0x08,0xff,0xe7,0xb1,0xbb,0x00, ++ 0x08,0xff,0xe7,0xb5,0x9b,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe7,0xb7,0xb4,0x00,0x08,0xff,0xe7,0xbc,0xbe,0x00,0x10,0x08,0x08,0xff,0xe8,0x80, ++ 0x85,0x00,0x08,0xff,0xe8,0x8d,0x92,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe8,0x8f, ++ 0xaf,0x00,0x08,0xff,0xe8,0x9d,0xb9,0x00,0x10,0x08,0x08,0xff,0xe8,0xa5,0x81,0x00, ++ 0x08,0xff,0xe8,0xa6,0x86,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff,0xe8,0xa6, ++ 0x96,0x00,0x08,0xff,0xe8,0xaa,0xbf,0x00,0x10,0x08,0x08,0xff,0xe8,0xab,0xb8,0x00, ++ 0x08,0xff,0xe8,0xab,0x8b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe8,0xac,0x81,0x00, ++ 0x08,0xff,0xe8,0xab,0xbe,0x00,0x10,0x08,0x08,0xff,0xe8,0xab,0xad,0x00,0x08,0xff, ++ 0xe8,0xac,0xb9,0x00,0xcf,0x86,0x95,0xde,0xd4,0x81,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x08,0xff,0xe8,0xae,0x8a,0x00,0x08,0xff,0xe8,0xb4,0x88,0x00,0x10,0x08, ++ 0x08,0xff,0xe8,0xbc,0xb8,0x00,0x08,0xff,0xe9,0x81,0xb2,0x00,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe9,0x86,0x99,0x00,0x08,0xff,0xe9,0x89,0xb6,0x00,0x10,0x08,0x08,0xff, ++ 0xe9,0x99,0xbc,0x00,0x08,0xff,0xe9,0x9b,0xa3,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe9,0x9d,0x96,0x00,0x08,0xff,0xe9,0x9f,0x9b,0x00,0x10,0x08,0x08,0xff, ++ 0xe9,0x9f,0xbf,0x00,0x08,0xff,0xe9,0xa0,0x8b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe9,0xa0,0xbb,0x00,0x08,0xff,0xe9,0xac,0x92,0x00,0x10,0x08,0x08,0xff,0xe9,0xbe, ++ 0x9c,0x00,0x08,0xff,0xf0,0xa2,0xa1,0x8a,0x00,0xd3,0x45,0xd2,0x22,0xd1,0x12,0x10, ++ 0x09,0x08,0xff,0xf0,0xa2,0xa1,0x84,0x00,0x08,0xff,0xf0,0xa3,0x8f,0x95,0x00,0x10, ++ 0x08,0x08,0xff,0xe3,0xae,0x9d,0x00,0x08,0xff,0xe4,0x80,0x98,0x00,0xd1,0x11,0x10, ++ 0x08,0x08,0xff,0xe4,0x80,0xb9,0x00,0x08,0xff,0xf0,0xa5,0x89,0x89,0x00,0x10,0x09, ++ 0x08,0xff,0xf0,0xa5,0xb3,0x90,0x00,0x08,0xff,0xf0,0xa7,0xbb,0x93,0x00,0x92,0x14, ++ 0x91,0x10,0x10,0x08,0x08,0xff,0xe9,0xbd,0x83,0x00,0x08,0xff,0xe9,0xbe,0x8e,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0xe1,0x94,0x01,0xe0,0x08,0x01,0xcf,0x86,0xd5,0x42, ++ 0xd4,0x14,0x93,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x00,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00, ++ 0x01,0x00,0x01,0x00,0x52,0x04,0x00,0x00,0xd1,0x0d,0x10,0x04,0x00,0x00,0x04,0xff, ++ 0xd7,0x99,0xd6,0xb4,0x00,0x10,0x04,0x01,0x1a,0x01,0xff,0xd7,0xb2,0xd6,0xb7,0x00, ++ 0xd4,0x42,0x53,0x04,0x01,0x00,0xd2,0x16,0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff, ++ 0xd7,0xa9,0xd7,0x81,0x00,0x01,0xff,0xd7,0xa9,0xd7,0x82,0x00,0xd1,0x16,0x10,0x0b, ++ 0x01,0xff,0xd7,0xa9,0xd6,0xbc,0xd7,0x81,0x00,0x01,0xff,0xd7,0xa9,0xd6,0xbc,0xd7, ++ 0x82,0x00,0x10,0x09,0x01,0xff,0xd7,0x90,0xd6,0xb7,0x00,0x01,0xff,0xd7,0x90,0xd6, ++ 0xb8,0x00,0xd3,0x43,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7,0x90,0xd6,0xbc, ++ 0x00,0x01,0xff,0xd7,0x91,0xd6,0xbc,0x00,0x10,0x09,0x01,0xff,0xd7,0x92,0xd6,0xbc, ++ 0x00,0x01,0xff,0xd7,0x93,0xd6,0xbc,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7,0x94, ++ 0xd6,0xbc,0x00,0x01,0xff,0xd7,0x95,0xd6,0xbc,0x00,0x10,0x09,0x01,0xff,0xd7,0x96, ++ 0xd6,0xbc,0x00,0x00,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7,0x98,0xd6, ++ 0xbc,0x00,0x01,0xff,0xd7,0x99,0xd6,0xbc,0x00,0x10,0x09,0x01,0xff,0xd7,0x9a,0xd6, ++ 0xbc,0x00,0x01,0xff,0xd7,0x9b,0xd6,0xbc,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xd7, ++ 0x9c,0xd6,0xbc,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xd7,0x9e,0xd6,0xbc,0x00,0x00, ++ 0x00,0xcf,0x86,0x95,0x85,0x94,0x81,0xd3,0x3e,0xd2,0x1f,0xd1,0x12,0x10,0x09,0x01, ++ 0xff,0xd7,0xa0,0xd6,0xbc,0x00,0x01,0xff,0xd7,0xa1,0xd6,0xbc,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0xff,0xd7,0xa3,0xd6,0xbc,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xd7,0xa4, ++ 0xd6,0xbc,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xd7,0xa6,0xd6,0xbc,0x00,0x01,0xff, ++ 0xd7,0xa7,0xd6,0xbc,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7,0xa8,0xd6, ++ 0xbc,0x00,0x01,0xff,0xd7,0xa9,0xd6,0xbc,0x00,0x10,0x09,0x01,0xff,0xd7,0xaa,0xd6, ++ 0xbc,0x00,0x01,0xff,0xd7,0x95,0xd6,0xb9,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7, ++ 0x91,0xd6,0xbf,0x00,0x01,0xff,0xd7,0x9b,0xd6,0xbf,0x00,0x10,0x09,0x01,0xff,0xd7, ++ 0xa4,0xd6,0xbf,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0x1a,0xcf,0x86,0x55,0x04, ++ 0x01,0x00,0x54,0x04,0x01,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x01,0x00,0x0c,0x00, ++ 0x0c,0x00,0x0c,0x00,0xcf,0x86,0x95,0x24,0xd4,0x10,0x93,0x0c,0x92,0x08,0x11,0x04, ++ 0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x00,0x00, ++ 0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd3,0x5a,0xd2,0x06, ++ 0xcf,0x06,0x01,0x00,0xd1,0x14,0xd0,0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0x95,0x08, ++ 0x14,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd0,0x1a,0xcf,0x86,0x95,0x14,0x54,0x04, ++ 0x01,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x0c,0x94,0x08,0x13,0x04,0x01,0x00,0x00,0x00,0x05,0x00, ++ 0x54,0x04,0x05,0x00,0x53,0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04, ++ 0x06,0x00,0x07,0x00,0x00,0x00,0xd2,0xce,0xd1,0xa5,0xd0,0x37,0xcf,0x86,0xd5,0x15, ++ 0x54,0x05,0x06,0xff,0x00,0x53,0x04,0x08,0x00,0x92,0x08,0x11,0x04,0x08,0x00,0x00, ++ 0x00,0x00,0x00,0x94,0x1c,0xd3,0x10,0x52,0x04,0x01,0xe6,0x51,0x04,0x0a,0xe6,0x10, ++ 0x04,0x0a,0xe6,0x10,0xdc,0x52,0x04,0x10,0xdc,0x11,0x04,0x10,0xdc,0x11,0xe6,0x01, ++ 0x00,0xcf,0x86,0xd5,0x38,0xd4,0x24,0xd3,0x14,0x52,0x04,0x01,0x00,0xd1,0x08,0x10, ++ 0x04,0x01,0x00,0x06,0x00,0x10,0x04,0x06,0x00,0x07,0x00,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x07,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd4,0x18,0xd3,0x10,0x52, ++ 0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x12,0x04,0x01, ++ 0x00,0x00,0x00,0x93,0x18,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x06, ++ 0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd0,0x06,0xcf, ++ 0x06,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01, ++ 0x00,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0xff,0x00,0xd1,0x50,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x93,0x10, ++ 0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00, ++ 0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x06,0x00,0x94,0x14, ++ 0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x06,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0xd0,0x2f,0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x15,0x93,0x11, ++ 0x92,0x0d,0x91,0x09,0x10,0x05,0x01,0xff,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0x53,0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x00,0x00,0xcf,0x86,0xd5,0x38,0xd4,0x18,0xd3,0x0c,0x92,0x08,0x11,0x04,0x00, ++ 0x00,0x01,0x00,0x01,0x00,0x92,0x08,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd3, ++ 0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd2,0x08,0x11,0x04,0x00, ++ 0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0xd4,0x20,0xd3, ++ 0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x52, ++ 0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x53,0x05,0x00, ++ 0xff,0x00,0xd2,0x0d,0x91,0x09,0x10,0x05,0x00,0xff,0x00,0x04,0x00,0x04,0x00,0x91, ++ 0x08,0x10,0x04,0x03,0x00,0x01,0x00,0x01,0x00,0x83,0xe2,0x46,0x3e,0xe1,0x1f,0x3b, ++ 0xe0,0x9c,0x39,0xcf,0x86,0xe5,0x40,0x26,0xc4,0xe3,0x16,0x14,0xe2,0xef,0x11,0xe1, ++ 0xd0,0x10,0xe0,0x60,0x07,0xcf,0x86,0xe5,0x53,0x03,0xe4,0x4c,0x02,0xe3,0x3d,0x01, ++ 0xd2,0x94,0xd1,0x70,0xd0,0x4a,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x07,0x00, ++ 0x52,0x04,0x07,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00, ++ 0xd4,0x14,0x93,0x10,0x52,0x04,0x07,0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00, ++ 0x00,0x00,0x07,0x00,0x53,0x04,0x07,0x00,0xd2,0x0c,0x51,0x04,0x07,0x00,0x10,0x04, ++ 0x07,0x00,0x00,0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x00,0x00,0x07,0x00,0xcf,0x86, ++ 0x95,0x20,0xd4,0x10,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00,0x11,0x04,0x07,0x00, ++ 0x00,0x00,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00,0x11,0x04,0x07,0x00,0x00,0x00, ++ 0x00,0x00,0xd0,0x06,0xcf,0x06,0x07,0x00,0xcf,0x86,0x55,0x04,0x07,0x00,0x54,0x04, ++ 0x07,0x00,0x53,0x04,0x07,0x00,0x92,0x0c,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00, ++ 0x00,0x00,0x00,0x00,0xd1,0x40,0xd0,0x3a,0xcf,0x86,0xd5,0x20,0x94,0x1c,0x93,0x18, ++ 0xd2,0x0c,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00,0x00,0x00,0x51,0x04,0x00,0x00, ++ 0x10,0x04,0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x54,0x04,0x07,0x00,0x93,0x10, ++ 0x52,0x04,0x07,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x07,0x00,0x07,0x00, ++ 0xcf,0x06,0x08,0x00,0xd0,0x46,0xcf,0x86,0xd5,0x2c,0xd4,0x20,0x53,0x04,0x08,0x00, ++ 0xd2,0x0c,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x10,0x00,0xd1,0x08,0x10,0x04, ++ 0x10,0x00,0x12,0x00,0x10,0x04,0x12,0x00,0x00,0x00,0x53,0x04,0x0a,0x00,0x12,0x04, ++ 0x0a,0x00,0x00,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x08,0x14,0x04, ++ 0x00,0x00,0x0a,0x00,0x54,0x04,0x0a,0x00,0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00, ++ 0x91,0x08,0x10,0x04,0x0a,0x00,0x0a,0xdc,0x00,0x00,0xd2,0x5e,0xd1,0x06,0xcf,0x06, ++ 0x00,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x0a,0x00,0x53,0x04,0x0a,0x00, ++ 0x52,0x04,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a,0x00,0x00,0x00,0x00,0x00,0x0a,0x00, ++ 0xcf,0x86,0xd5,0x18,0x54,0x04,0x0a,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x0a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd4,0x14,0x93,0x10,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x10,0xdc,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x53,0x04, ++ 0x10,0x00,0x12,0x04,0x10,0x00,0x00,0x00,0xd1,0x70,0xd0,0x36,0xcf,0x86,0xd5,0x18, ++ 0x54,0x04,0x05,0x00,0x53,0x04,0x05,0x00,0x52,0x04,0x05,0x00,0x51,0x04,0x05,0x00, ++ 0x10,0x04,0x05,0x00,0x10,0x00,0x94,0x18,0xd3,0x08,0x12,0x04,0x05,0x00,0x00,0x00, ++ 0x52,0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x13,0x00,0x13,0x00,0x05,0x00, ++ 0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x05,0x00,0x92,0x0c,0x51,0x04,0x05,0x00, ++ 0x10,0x04,0x05,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x54,0x04,0x10,0x00,0xd3,0x0c, ++ 0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00,0x10,0xe6,0x92,0x0c,0x51,0x04,0x10,0xe6, ++ 0x10,0x04,0x10,0xe6,0x00,0x00,0x00,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04, ++ 0x07,0x00,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00,0x51,0x04,0x07,0x00,0x10,0x04, ++ 0x00,0x00,0x07,0x00,0x08,0x00,0xcf,0x86,0x95,0x1c,0xd4,0x0c,0x93,0x08,0x12,0x04, ++ 0x08,0x00,0x00,0x00,0x08,0x00,0x93,0x0c,0x52,0x04,0x08,0x00,0x11,0x04,0x08,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0xd3,0xba,0xd2,0x80,0xd1,0x34,0xd0,0x1a,0xcf,0x86, ++ 0x55,0x04,0x05,0x00,0x94,0x10,0x93,0x0c,0x52,0x04,0x05,0x00,0x11,0x04,0x05,0x00, ++ 0x07,0x00,0x05,0x00,0x05,0x00,0xcf,0x86,0x95,0x14,0x94,0x10,0x53,0x04,0x05,0x00, ++ 0x52,0x04,0x05,0x00,0x11,0x04,0x05,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0xd0,0x2a, ++ 0xcf,0x86,0xd5,0x14,0x54,0x04,0x07,0x00,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00, ++ 0x11,0x04,0x07,0x00,0x00,0x00,0x94,0x10,0x53,0x04,0x07,0x00,0x92,0x08,0x11,0x04, ++ 0x07,0x00,0x00,0x00,0x00,0x00,0x12,0x00,0xcf,0x86,0xd5,0x10,0x54,0x04,0x12,0x00, ++ 0x93,0x08,0x12,0x04,0x12,0x00,0x00,0x00,0x12,0x00,0x54,0x04,0x12,0x00,0x53,0x04, ++ 0x12,0x00,0x12,0x04,0x12,0x00,0x00,0x00,0xd1,0x34,0xd0,0x12,0xcf,0x86,0x55,0x04, ++ 0x10,0x00,0x94,0x08,0x13,0x04,0x10,0x00,0x00,0x00,0x10,0x00,0xcf,0x86,0x55,0x04, ++ 0x10,0x00,0x94,0x18,0xd3,0x08,0x12,0x04,0x10,0x00,0x00,0x00,0x52,0x04,0x00,0x00, ++ 0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x00,0x00,0xcf,0x06,0x00,0x00, ++ 0xd2,0x06,0xcf,0x06,0x10,0x00,0xd1,0x40,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x10,0x00, ++ 0x54,0x04,0x10,0x00,0x93,0x10,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x14,0x54,0x04,0x10,0x00,0x93,0x0c, ++ 0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x94,0x08,0x13,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xe4,0xce,0x02,0xe3,0x45,0x01, ++ 0xd2,0xd0,0xd1,0x70,0xd0,0x52,0xcf,0x86,0xd5,0x20,0x94,0x1c,0xd3,0x0c,0x52,0x04, ++ 0x07,0x00,0x11,0x04,0x07,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x07,0x00, ++ 0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x54,0x04,0x07,0x00,0xd3,0x10,0x52,0x04, ++ 0x07,0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x00,0x00,0x07,0x00,0xd2,0x0c,0x91,0x08, ++ 0x10,0x04,0x07,0x00,0x00,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x07,0x00,0x00,0x00, ++ 0x10,0x04,0x00,0x00,0x07,0x00,0xcf,0x86,0x95,0x18,0x54,0x04,0x0b,0x00,0x93,0x10, ++ 0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x00,0x00,0x0b,0x00,0x0b,0x00, ++ 0x10,0x00,0xd0,0x32,0xcf,0x86,0xd5,0x18,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00, ++ 0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x94,0x14, ++ 0x93,0x10,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00, ++ 0x10,0x00,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x11,0x00,0xd3,0x14, ++ 0xd2,0x0c,0x51,0x04,0x11,0x00,0x10,0x04,0x11,0x00,0x00,0x00,0x11,0x04,0x11,0x00, ++ 0x00,0x00,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x11,0x00,0x11,0x00, ++ 0xd1,0x40,0xd0,0x3a,0xcf,0x86,0xd5,0x1c,0x54,0x04,0x09,0x00,0x53,0x04,0x09,0x00, ++ 0xd2,0x08,0x11,0x04,0x09,0x00,0x0b,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00, ++ 0x09,0x00,0x54,0x04,0x0a,0x00,0x53,0x04,0x0a,0x00,0xd2,0x08,0x11,0x04,0x0a,0x00, ++ 0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0a,0x00,0xcf,0x06,0x00,0x00, ++ 0xd0,0x1a,0xcf,0x86,0x55,0x04,0x0d,0x00,0x54,0x04,0x0d,0x00,0x53,0x04,0x0d,0x00, ++ 0x52,0x04,0x00,0x00,0x11,0x04,0x11,0x00,0x0d,0x00,0xcf,0x86,0x95,0x14,0x54,0x04, ++ 0x11,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x11,0x00,0x11,0x00,0x11,0x00, ++ 0x11,0x00,0xd2,0xec,0xd1,0xa4,0xd0,0x76,0xcf,0x86,0xd5,0x48,0xd4,0x28,0xd3,0x14, ++ 0x52,0x04,0x08,0x00,0xd1,0x08,0x10,0x04,0x00,0x00,0x08,0x00,0x10,0x04,0x08,0x00, ++ 0x00,0x00,0x52,0x04,0x00,0x00,0xd1,0x08,0x10,0x04,0x08,0x00,0x08,0xdc,0x10,0x04, ++ 0x08,0x00,0x08,0xe6,0xd3,0x10,0x52,0x04,0x08,0x00,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x08,0x00,0x08,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x08,0x00,0x08,0x00, ++ 0x08,0x00,0x54,0x04,0x08,0x00,0xd3,0x0c,0x52,0x04,0x08,0x00,0x11,0x04,0x14,0x00, ++ 0x00,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x08,0xe6,0x08,0x01,0x10,0x04,0x08,0xdc, ++ 0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x08,0x09,0xcf,0x86,0x95,0x28, ++ 0xd4,0x14,0x53,0x04,0x08,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x53,0x04,0x08,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x08,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x0b,0x00,0xd0,0x0a,0xcf,0x86,0x15,0x04,0x10,0x00, ++ 0x00,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0xd4,0x24,0xd3,0x14,0x52,0x04,0x10,0x00, ++ 0xd1,0x08,0x10,0x04,0x10,0x00,0x10,0xe6,0x10,0x04,0x10,0xdc,0x00,0x00,0x92,0x0c, ++ 0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x93,0x10,0x52,0x04, ++ 0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd1,0x54, ++ 0xd0,0x26,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04,0x0b,0x00,0xd3,0x0c,0x52,0x04, ++ 0x0b,0x00,0x11,0x04,0x0b,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x0b,0x00,0x0b,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x14,0x54,0x04,0x0b,0x00,0x93,0x0c, ++ 0x52,0x04,0x0b,0x00,0x11,0x04,0x0b,0x00,0x00,0x00,0x0b,0x00,0x54,0x04,0x0b,0x00, ++ 0x93,0x10,0x92,0x0c,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0x00,0x00, ++ 0x0b,0x00,0xd0,0x42,0xcf,0x86,0xd5,0x28,0x54,0x04,0x10,0x00,0xd3,0x0c,0x92,0x08, ++ 0x11,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x10,0x00,0x10,0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x94,0x14, ++ 0x53,0x04,0x00,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00, ++ 0x10,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd3,0x96,0xd2,0x68,0xd1,0x24,0xd0,0x06, ++ 0xcf,0x06,0x0b,0x00,0xcf,0x86,0x95,0x18,0x94,0x14,0x53,0x04,0x0b,0x00,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xd0,0x1e,0xcf,0x86,0x55,0x04,0x11,0x00,0x54,0x04,0x11,0x00,0x93,0x10,0x92,0x0c, ++ 0x51,0x04,0x11,0x00,0x10,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86, ++ 0x55,0x04,0x11,0x00,0x54,0x04,0x11,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x11,0x00, ++ 0x10,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0x92,0x08,0x11,0x04,0x00,0x00,0x11,0x00, ++ 0x11,0x00,0xd1,0x28,0xd0,0x22,0xcf,0x86,0x55,0x04,0x14,0x00,0xd4,0x0c,0x93,0x08, ++ 0x12,0x04,0x14,0x00,0x14,0xe6,0x00,0x00,0x53,0x04,0x14,0x00,0x92,0x08,0x11,0x04, ++ 0x14,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xd2,0x2a, ++ 0xd1,0x24,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04, ++ 0x0b,0x00,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04, ++ 0x0b,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1,0x58,0xd0,0x12,0xcf,0x86,0x55,0x04, ++ 0x14,0x00,0x94,0x08,0x13,0x04,0x14,0x00,0x00,0x00,0x14,0x00,0xcf,0x86,0x95,0x40, ++ 0xd4,0x24,0xd3,0x0c,0x52,0x04,0x14,0x00,0x11,0x04,0x14,0x00,0x14,0xdc,0xd2,0x0c, ++ 0x51,0x04,0x14,0xe6,0x10,0x04,0x14,0xe6,0x14,0xdc,0x91,0x08,0x10,0x04,0x14,0xe6, ++ 0x14,0xdc,0x14,0xdc,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0xdc,0x14,0x00, ++ 0x14,0x00,0x14,0x00,0x92,0x08,0x11,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x15,0x00, ++ 0x93,0x10,0x52,0x04,0x15,0x00,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00,0x00, ++ 0x00,0x00,0xcf,0x86,0xe5,0x0f,0x06,0xe4,0xf8,0x03,0xe3,0x02,0x02,0xd2,0xfb,0xd1, ++ 0x4c,0xd0,0x06,0xcf,0x06,0x0c,0x00,0xcf,0x86,0xd5,0x2c,0xd4,0x1c,0xd3,0x10,0x52, ++ 0x04,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x09,0x0c,0x00,0x52,0x04,0x0c, ++ 0x00,0x11,0x04,0x0c,0x00,0x00,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x0c, ++ 0x00,0x0c,0x00,0x0c,0x00,0x54,0x04,0x0c,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00, ++ 0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x09,0xd0,0x69,0xcf,0x86,0xd5, ++ 0x32,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00,0xd2,0x15,0x51,0x04,0x0b,0x00,0x10, ++ 0x0d,0x0b,0xff,0xf0,0x91,0x82,0x99,0xf0,0x91,0x82,0xba,0x00,0x0b,0x00,0x91,0x11, ++ 0x10,0x0d,0x0b,0xff,0xf0,0x91,0x82,0x9b,0xf0,0x91,0x82,0xba,0x00,0x0b,0x00,0x0b, ++ 0x00,0xd4,0x1d,0x53,0x04,0x0b,0x00,0x92,0x15,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b, ++ 0x00,0x0b,0xff,0xf0,0x91,0x82,0xa5,0xf0,0x91,0x82,0xba,0x00,0x0b,0x00,0x53,0x04, ++ 0x0b,0x00,0x92,0x10,0xd1,0x08,0x10,0x04,0x0b,0x00,0x0b,0x09,0x10,0x04,0x0b,0x07, ++ 0x0b,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x20,0x94,0x1c,0xd3,0x0c,0x92,0x08,0x11,0x04, ++ 0x0b,0x00,0x00,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x14,0x00,0x00,0x00,0x0d,0x00,0xd4,0x14,0x53,0x04,0x0d,0x00,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x0d,0x00,0x92,0x08, ++ 0x11,0x04,0x0d,0x00,0x00,0x00,0x00,0x00,0xd1,0x96,0xd0,0x5c,0xcf,0x86,0xd5,0x18, ++ 0x94,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x0d,0xe6,0x10,0x04,0x0d,0xe6,0x0d,0x00, ++ 0x0d,0x00,0x0d,0x00,0x0d,0x00,0xd4,0x26,0x53,0x04,0x0d,0x00,0x52,0x04,0x0d,0x00, ++ 0x51,0x04,0x0d,0x00,0x10,0x0d,0x0d,0xff,0xf0,0x91,0x84,0xb1,0xf0,0x91,0x84,0xa7, ++ 0x00,0x0d,0xff,0xf0,0x91,0x84,0xb2,0xf0,0x91,0x84,0xa7,0x00,0x93,0x18,0xd2,0x0c, ++ 0x51,0x04,0x0d,0x00,0x10,0x04,0x0d,0x00,0x0d,0x09,0x91,0x08,0x10,0x04,0x0d,0x09, ++ 0x00,0x00,0x0d,0x00,0x0d,0x00,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x52,0x04, ++ 0x0d,0x00,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x10,0x00, ++ 0x54,0x04,0x10,0x00,0x93,0x18,0xd2,0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00, ++ 0x10,0x07,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd0,0x06, ++ 0xcf,0x06,0x0d,0x00,0xcf,0x86,0xd5,0x40,0xd4,0x2c,0xd3,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0d,0x09,0x0d,0x00,0x0d,0x00,0x0d,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x0d,0x00,0x11,0x00,0x10,0x04,0x11,0x07,0x11,0x00,0x91,0x08,0x10,0x04,0x11,0x00, ++ 0x10,0x00,0x00,0x00,0x53,0x04,0x0d,0x00,0x92,0x0c,0x51,0x04,0x0d,0x00,0x10,0x04, ++ 0x10,0x00,0x11,0x00,0x11,0x00,0xd4,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x93,0x10,0x52,0x04,0x10,0x00, ++ 0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd2,0xc8,0xd1,0x48, ++ 0xd0,0x42,0xcf,0x86,0xd5,0x18,0x54,0x04,0x10,0x00,0x93,0x10,0x92,0x0c,0x51,0x04, ++ 0x10,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x54,0x04,0x10,0x00, ++ 0xd3,0x14,0x52,0x04,0x10,0x00,0xd1,0x08,0x10,0x04,0x10,0x00,0x10,0x09,0x10,0x04, ++ 0x10,0x07,0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x12,0x00, ++ 0x00,0x00,0xcf,0x06,0x00,0x00,0xd0,0x52,0xcf,0x86,0xd5,0x3c,0xd4,0x28,0xd3,0x10, ++ 0x52,0x04,0x11,0x00,0x51,0x04,0x11,0x00,0x10,0x04,0x11,0x00,0x00,0x00,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x11,0x00,0x00,0x00,0x11,0x00,0x51,0x04,0x11,0x00,0x10,0x04, ++ 0x00,0x00,0x11,0x00,0x53,0x04,0x11,0x00,0x52,0x04,0x11,0x00,0x51,0x04,0x11,0x00, ++ 0x10,0x04,0x00,0x00,0x11,0x00,0x94,0x10,0x53,0x04,0x11,0x00,0x92,0x08,0x11,0x04, ++ 0x11,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0xd4,0x18, ++ 0x53,0x04,0x10,0x00,0x92,0x10,0xd1,0x08,0x10,0x04,0x10,0x00,0x10,0x07,0x10,0x04, ++ 0x10,0x09,0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x92,0x08,0x11,0x04,0x10,0x00, ++ 0x00,0x00,0x00,0x00,0xe1,0x27,0x01,0xd0,0x8a,0xcf,0x86,0xd5,0x44,0xd4,0x2c,0xd3, ++ 0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x11,0x00,0x10,0x00,0x10,0x00,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x52,0x04,0x10,0x00,0xd1,0x08,0x10,0x04,0x10, ++ 0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x93,0x14,0x92,0x10,0xd1,0x08,0x10, ++ 0x04,0x10,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0xd4, ++ 0x14,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x10, ++ 0x00,0x10,0x00,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x10, ++ 0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0xd2,0x0c,0x51,0x04,0x10, ++ 0x00,0x10,0x04,0x00,0x00,0x14,0x07,0x91,0x08,0x10,0x04,0x10,0x07,0x10,0x00,0x10, ++ 0x00,0xcf,0x86,0xd5,0x6a,0xd4,0x42,0xd3,0x14,0x52,0x04,0x10,0x00,0xd1,0x08,0x10, ++ 0x04,0x10,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0xd2,0x19,0xd1,0x08,0x10, ++ 0x04,0x10,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0xff,0xf0,0x91,0x8d,0x87,0xf0, ++ 0x91,0x8c,0xbe,0x00,0x91,0x11,0x10,0x0d,0x10,0xff,0xf0,0x91,0x8d,0x87,0xf0,0x91, ++ 0x8d,0x97,0x00,0x10,0x09,0x00,0x00,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x11, ++ 0x00,0x00,0x00,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x52, ++ 0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0xd4,0x1c,0xd3, ++ 0x0c,0x52,0x04,0x10,0x00,0x11,0x04,0x00,0x00,0x10,0xe6,0x52,0x04,0x10,0xe6,0x91, ++ 0x08,0x10,0x04,0x10,0xe6,0x00,0x00,0x00,0x00,0x93,0x10,0x52,0x04,0x10,0xe6,0x91, ++ 0x08,0x10,0x04,0x10,0xe6,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xe3, ++ 0x30,0x01,0xd2,0xb7,0xd1,0x48,0xd0,0x06,0xcf,0x06,0x12,0x00,0xcf,0x86,0x95,0x3c, ++ 0xd4,0x1c,0x93,0x18,0xd2,0x0c,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x09,0x12,0x00, ++ 0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x07,0x12,0x00,0x12,0x00,0x53,0x04,0x12,0x00, ++ 0xd2,0x0c,0x51,0x04,0x12,0x00,0x10,0x04,0x00,0x00,0x12,0x00,0xd1,0x08,0x10,0x04, ++ 0x00,0x00,0x12,0x00,0x10,0x04,0x14,0xe6,0x15,0x00,0x00,0x00,0xd0,0x45,0xcf,0x86, ++ 0x55,0x04,0x10,0x00,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00,0xd2,0x15,0x51,0x04, ++ 0x10,0x00,0x10,0x04,0x10,0x00,0x10,0xff,0xf0,0x91,0x92,0xb9,0xf0,0x91,0x92,0xba, ++ 0x00,0xd1,0x11,0x10,0x0d,0x10,0xff,0xf0,0x91,0x92,0xb9,0xf0,0x91,0x92,0xb0,0x00, ++ 0x10,0x00,0x10,0x0d,0x10,0xff,0xf0,0x91,0x92,0xb9,0xf0,0x91,0x92,0xbd,0x00,0x10, ++ 0x00,0xcf,0x86,0x95,0x24,0xd4,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x10,0x00,0x10, ++ 0x04,0x10,0x09,0x10,0x07,0x10,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x92,0x08,0x11, ++ 0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0, ++ 0x40,0xcf,0x86,0x55,0x04,0x10,0x00,0x54,0x04,0x10,0x00,0xd3,0x0c,0x52,0x04,0x10, ++ 0x00,0x11,0x04,0x10,0x00,0x00,0x00,0xd2,0x1e,0x51,0x04,0x10,0x00,0x10,0x0d,0x10, ++ 0xff,0xf0,0x91,0x96,0xb8,0xf0,0x91,0x96,0xaf,0x00,0x10,0xff,0xf0,0x91,0x96,0xb9, ++ 0xf0,0x91,0x96,0xaf,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x10,0x09,0xcf, ++ 0x86,0x95,0x2c,0xd4,0x1c,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x07,0x10, ++ 0x00,0x10,0x00,0x10,0x00,0x92,0x08,0x11,0x04,0x10,0x00,0x11,0x00,0x11,0x00,0x53, ++ 0x04,0x11,0x00,0x52,0x04,0x11,0x00,0x11,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0xd2, ++ 0xa0,0xd1,0x5c,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x10,0x00,0x54,0x04,0x10,0x00,0x53, ++ 0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x10, ++ 0x09,0xcf,0x86,0xd5,0x24,0xd4,0x14,0x93,0x10,0x52,0x04,0x10,0x00,0x91,0x08,0x10, ++ 0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x92,0x08,0x11, ++ 0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x94,0x14,0x53,0x04,0x12,0x00,0x52,0x04,0x12, ++ 0x00,0x91,0x08,0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd0,0x2a,0xcf, ++ 0x86,0x55,0x04,0x0d,0x00,0x54,0x04,0x0d,0x00,0xd3,0x10,0x52,0x04,0x0d,0x00,0x51, ++ 0x04,0x0d,0x00,0x10,0x04,0x0d,0x09,0x0d,0x07,0x92,0x0c,0x91,0x08,0x10,0x04,0x15, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x95,0x14,0x94,0x10,0x53,0x04,0x0d, ++ 0x00,0x92,0x08,0x11,0x04,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1, ++ 0x40,0xd0,0x3a,0xcf,0x86,0xd5,0x20,0x54,0x04,0x11,0x00,0x53,0x04,0x11,0x00,0xd2, ++ 0x0c,0x51,0x04,0x11,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x00, ++ 0x00,0x11,0x00,0x11,0x00,0x94,0x14,0x53,0x04,0x11,0x00,0x92,0x0c,0x51,0x04,0x11, ++ 0x00,0x10,0x04,0x11,0x00,0x11,0x09,0x00,0x00,0x11,0x00,0xcf,0x06,0x00,0x00,0xcf, ++ 0x06,0x00,0x00,0xe4,0x59,0x01,0xd3,0xb2,0xd2,0x5c,0xd1,0x28,0xd0,0x22,0xcf,0x86, ++ 0x55,0x04,0x14,0x00,0x54,0x04,0x14,0x00,0x53,0x04,0x14,0x00,0x92,0x10,0xd1,0x08, ++ 0x10,0x04,0x14,0x00,0x14,0x09,0x10,0x04,0x14,0x07,0x14,0x00,0x00,0x00,0xcf,0x06, ++ 0x00,0x00,0xd0,0x0a,0xcf,0x86,0x15,0x04,0x00,0x00,0x10,0x00,0xcf,0x86,0x55,0x04, ++ 0x10,0x00,0x54,0x04,0x10,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x10,0x00,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x10,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x1a,0xcf,0x86,0x55,0x04, ++ 0x00,0x00,0x94,0x10,0x53,0x04,0x15,0x00,0x92,0x08,0x11,0x04,0x00,0x00,0x15,0x00, ++ 0x15,0x00,0x15,0x00,0xcf,0x86,0xd5,0x14,0x54,0x04,0x15,0x00,0x53,0x04,0x15,0x00, ++ 0x92,0x08,0x11,0x04,0x00,0x00,0x15,0x00,0x15,0x00,0x94,0x1c,0x93,0x18,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x15,0x09,0x15,0x00,0x15,0x00,0x91,0x08,0x10,0x04,0x15,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd2,0xa0,0xd1,0x3c,0xd0,0x1e,0xcf,0x86, ++ 0x55,0x04,0x13,0x00,0x54,0x04,0x13,0x00,0x93,0x10,0x52,0x04,0x13,0x00,0x91,0x08, ++ 0x10,0x04,0x13,0x09,0x13,0x00,0x13,0x00,0x13,0x00,0xcf,0x86,0x95,0x18,0x94,0x14, ++ 0x93,0x10,0x52,0x04,0x13,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x13,0x09, ++ 0x00,0x00,0x13,0x00,0x13,0x00,0xd0,0x46,0xcf,0x86,0xd5,0x2c,0xd4,0x10,0x93,0x0c, ++ 0x52,0x04,0x13,0x00,0x11,0x04,0x15,0x00,0x13,0x00,0x13,0x00,0x53,0x04,0x13,0x00, ++ 0xd2,0x0c,0x91,0x08,0x10,0x04,0x13,0x00,0x13,0x09,0x13,0x00,0x91,0x08,0x10,0x04, ++ 0x13,0x00,0x14,0x00,0x13,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x13,0x00, ++ 0x10,0x04,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x55,0x04, ++ 0x10,0x00,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xe3,0xa9,0x01,0xd2, ++ 0xb0,0xd1,0x6c,0xd0,0x3e,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x12,0x00,0x92, ++ 0x0c,0x91,0x08,0x10,0x04,0x12,0x00,0x00,0x00,0x12,0x00,0x12,0x00,0x12,0x00,0x54, ++ 0x04,0x12,0x00,0xd3,0x10,0x52,0x04,0x12,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12, ++ 0x00,0x00,0x00,0x52,0x04,0x12,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x12, ++ 0x09,0xcf,0x86,0xd5,0x14,0x94,0x10,0x93,0x0c,0x52,0x04,0x12,0x00,0x11,0x04,0x12, ++ 0x00,0x00,0x00,0x00,0x00,0x12,0x00,0x94,0x14,0x53,0x04,0x12,0x00,0x52,0x04,0x12, ++ 0x00,0x91,0x08,0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00,0x12,0x00,0xd0,0x3e,0xcf, ++ 0x86,0xd5,0x14,0x54,0x04,0x12,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x12, ++ 0x00,0x12,0x00,0x12,0x00,0xd4,0x14,0x53,0x04,0x12,0x00,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x12,0x00,0x12,0x00,0x12,0x00,0x93,0x10,0x52,0x04,0x12,0x00,0x51, ++ 0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1, ++ 0xa0,0xd0,0x52,0xcf,0x86,0xd5,0x24,0x94,0x20,0xd3,0x10,0x52,0x04,0x13,0x00,0x51, ++ 0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0x92,0x0c,0x51,0x04,0x13,0x00,0x10, ++ 0x04,0x00,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0x54,0x04,0x13,0x00,0xd3,0x10,0x52, ++ 0x04,0x13,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0xd2,0x0c,0x51, ++ 0x04,0x00,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x00, ++ 0x00,0x13,0x00,0xcf,0x86,0xd5,0x28,0xd4,0x18,0x93,0x14,0xd2,0x0c,0x51,0x04,0x13, ++ 0x00,0x10,0x04,0x13,0x07,0x13,0x00,0x11,0x04,0x13,0x09,0x13,0x00,0x00,0x00,0x53, ++ 0x04,0x13,0x00,0x92,0x08,0x11,0x04,0x13,0x00,0x00,0x00,0x00,0x00,0x94,0x20,0xd3, ++ 0x10,0x52,0x04,0x14,0x00,0x51,0x04,0x14,0x00,0x10,0x04,0x00,0x00,0x14,0x00,0x92, ++ 0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0xd0, ++ 0x52,0xcf,0x86,0xd5,0x3c,0xd4,0x14,0x53,0x04,0x14,0x00,0x52,0x04,0x14,0x00,0x51, ++ 0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x14, ++ 0x00,0x10,0x04,0x00,0x00,0x14,0x00,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x14, ++ 0x09,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x94, ++ 0x10,0x53,0x04,0x14,0x00,0x92,0x08,0x11,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0xcf,0x06,0x00,0x00,0xd2,0x2a,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf, ++ 0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x14,0x00,0x53,0x04,0x14, ++ 0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1, ++ 0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x15, ++ 0x00,0x54,0x04,0x15,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x15,0x00,0x00,0x00,0x00, ++ 0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x15,0x00,0xd0, ++ 0xca,0xcf,0x86,0xd5,0xc2,0xd4,0x54,0xd3,0x06,0xcf,0x06,0x09,0x00,0xd2,0x06,0xcf, ++ 0x06,0x09,0x00,0xd1,0x24,0xd0,0x06,0xcf,0x06,0x09,0x00,0xcf,0x86,0x55,0x04,0x09, ++ 0x00,0x94,0x14,0x53,0x04,0x09,0x00,0x52,0x04,0x09,0x00,0x51,0x04,0x09,0x00,0x10, ++ 0x04,0x09,0x00,0x10,0x00,0x10,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x10, ++ 0x00,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x11,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd3,0x68,0xd2,0x46,0xd1,0x40,0xd0, ++ 0x06,0xcf,0x06,0x09,0x00,0xcf,0x86,0x55,0x04,0x09,0x00,0xd4,0x20,0xd3,0x10,0x92, ++ 0x0c,0x51,0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x10,0x00,0x10,0x00,0x52,0x04,0x10, ++ 0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x93,0x10,0x52,0x04,0x09, ++ 0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x11, ++ 0x00,0xd1,0x1c,0xd0,0x06,0xcf,0x06,0x11,0x00,0xcf,0x86,0x95,0x10,0x94,0x0c,0x93, ++ 0x08,0x12,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00, ++ 0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0x4c,0xd4,0x06,0xcf, ++ 0x06,0x0b,0x00,0xd3,0x40,0xd2,0x3a,0xd1,0x34,0xd0,0x2e,0xcf,0x86,0x55,0x04,0x0b, ++ 0x00,0xd4,0x14,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10, ++ 0x04,0x0b,0x00,0x00,0x00,0x53,0x04,0x15,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x15, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf, +- 0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5, +- 0xa2,0xd4,0x9c,0xd3,0x74,0xd2,0x26,0xd1,0x20,0xd0,0x1a,0xcf,0x86,0x95,0x14,0x94, +- 0x10,0x93,0x0c,0x92,0x08,0x11,0x04,0x0c,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0x13, +- 0x00,0x13,0x00,0xcf,0x06,0x13,0x00,0xcf,0x06,0x13,0x00,0xd1,0x48,0xd0,0x1e,0xcf, +- 0x86,0x95,0x18,0x54,0x04,0x13,0x00,0x53,0x04,0x13,0x00,0x52,0x04,0x13,0x00,0x51, +- 0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x18,0x54, +- 0x04,0x00,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00, +- 0x00,0x00,0x00,0x00,0x00,0x94,0x0c,0x93,0x08,0x12,0x04,0x00,0x00,0x15,0x00,0x00, +- 0x00,0x13,0x00,0xcf,0x06,0x13,0x00,0xd2,0x22,0xd1,0x06,0xcf,0x06,0x13,0x00,0xd0, +- 0x06,0xcf,0x06,0x13,0x00,0xcf,0x86,0x55,0x04,0x13,0x00,0x54,0x04,0x13,0x00,0x53, +- 0x04,0x13,0x00,0x12,0x04,0x13,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00, +- 0x00,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x7e,0xd2,0x78,0xd1,0x34,0xd0,0x06,0xcf, +- 0x06,0x10,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0xd4,0x14,0x53,0x04,0x10,0x00,0x92, +- 0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x10, +- 0x00,0x52,0x04,0x10,0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd0, +- 0x3e,0xcf,0x86,0xd5,0x2c,0xd4,0x14,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10, +- 0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0xd2,0x08,0x11, +- 0x04,0x10,0x00,0x00,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x01,0x10,0x00,0x94, +- 0x0c,0x93,0x08,0x12,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00, +- 0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xe1,0x92,0x04,0xd0,0x08,0xcf,0x86, +- 0xcf,0x06,0x00,0x00,0xcf,0x86,0xe5,0x2f,0x04,0xe4,0x7f,0x02,0xe3,0xf4,0x01,0xd2, +- 0x26,0xd1,0x06,0xcf,0x06,0x05,0x00,0xd0,0x06,0xcf,0x06,0x05,0x00,0xcf,0x86,0x55, +- 0x04,0x05,0x00,0x54,0x04,0x05,0x00,0x93,0x0c,0x52,0x04,0x05,0x00,0x11,0x04,0x05, +- 0x00,0x00,0x00,0x00,0x00,0xd1,0xeb,0xd0,0x2a,0xcf,0x86,0x55,0x04,0x05,0x00,0x94, +- 0x20,0xd3,0x10,0x52,0x04,0x05,0x00,0x51,0x04,0x05,0x00,0x10,0x04,0x05,0x00,0x00, +- 0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0a,0x00,0x05,0x00,0x05,0x00,0x05, +- 0x00,0xcf,0x86,0xd5,0x2a,0x54,0x04,0x05,0x00,0x53,0x04,0x05,0x00,0x52,0x04,0x05, +- 0x00,0x51,0x04,0x05,0x00,0x10,0x0d,0x05,0xff,0xf0,0x9d,0x85,0x97,0xf0,0x9d,0x85, +- 0xa5,0x00,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0x00,0xd4,0x75,0xd3, +- 0x61,0xd2,0x44,0xd1,0x22,0x10,0x11,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85, +- 0xa5,0xf0,0x9d,0x85,0xae,0x00,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5, +- 0xf0,0x9d,0x85,0xaf,0x00,0x10,0x11,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85, +- 0xa5,0xf0,0x9d,0x85,0xb0,0x00,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5, +- 0xf0,0x9d,0x85,0xb1,0x00,0xd1,0x15,0x10,0x11,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0, +- 0x9d,0x85,0xa5,0xf0,0x9d,0x85,0xb2,0x00,0x05,0xd8,0x10,0x04,0x05,0xd8,0x05,0x01, +- 0xd2,0x08,0x11,0x04,0x05,0x01,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x05,0xe2, +- 0x05,0xd8,0xd3,0x10,0x92,0x0c,0x51,0x04,0x05,0xd8,0x10,0x04,0x05,0xd8,0x05,0x00, +- 0x05,0x00,0x92,0x0c,0x51,0x04,0x05,0x00,0x10,0x04,0x05,0x00,0x05,0xdc,0x05,0xdc, ++ 0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1,0x4c,0xd0,0x44,0xcf, ++ 0x86,0xd5,0x3c,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf,0x06,0x11,0x00,0xd2, ++ 0x2a,0xd1,0x24,0xd0,0x06,0xcf,0x06,0x11,0x00,0xcf,0x86,0x95,0x18,0x94,0x14,0x93, ++ 0x10,0x52,0x04,0x11,0x00,0x51,0x04,0x11,0x00,0x10,0x04,0x11,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00, ++ 0x00,0xcf,0x86,0xcf,0x06,0x00,0x00,0xe0,0xd2,0x01,0xcf,0x86,0xd5,0x06,0xcf,0x06, ++ 0x00,0x00,0xe4,0x0b,0x01,0xd3,0x06,0xcf,0x06,0x0c,0x00,0xd2,0x84,0xd1,0x50,0xd0, ++ 0x1e,0xcf,0x86,0x55,0x04,0x0c,0x00,0x54,0x04,0x0c,0x00,0x53,0x04,0x0c,0x00,0x92, ++ 0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5, ++ 0x18,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10, ++ 0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x94,0x14,0x53,0x04,0x10,0x00,0xd2,0x08,0x11, ++ 0x04,0x10,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x10,0x00,0x00,0x00,0xd0,0x06,0xcf, ++ 0x06,0x00,0x00,0xcf,0x86,0xd5,0x08,0x14,0x04,0x00,0x00,0x10,0x00,0xd4,0x10,0x53, ++ 0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00,0x00,0x00,0x93,0x10,0x52, ++ 0x04,0x10,0x01,0x91,0x08,0x10,0x04,0x10,0x01,0x10,0x00,0x00,0x00,0x00,0x00,0xd1, ++ 0x6c,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x10,0x00,0x54,0x04,0x10,0x00,0x93,0x10,0x52, ++ 0x04,0x10,0xe6,0x51,0x04,0x10,0xe6,0x10,0x04,0x10,0xe6,0x10,0x00,0x10,0x00,0xcf, ++ 0x86,0xd5,0x24,0xd4,0x10,0x93,0x0c,0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00,0x00, ++ 0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x92,0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x00, ++ 0x00,0x10,0x00,0x10,0x00,0xd4,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x10,0x00,0x10, ++ 0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x53,0x04,0x10,0x00,0x52,0x04,0x00, ++ 0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0xd0,0x0e,0xcf,0x86,0x95, ++ 0x08,0x14,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf, ++ 0x06,0x00,0x00,0xd2,0x30,0xd1,0x0c,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x06,0x14, ++ 0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x14,0x00,0x53,0x04,0x14,0x00,0x92, ++ 0x0c,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf, ++ 0x06,0x00,0x00,0xd1,0x4c,0xd0,0x06,0xcf,0x06,0x0d,0x00,0xcf,0x86,0xd5,0x2c,0x94, ++ 0x28,0xd3,0x10,0x52,0x04,0x0d,0x00,0x91,0x08,0x10,0x04,0x0d,0x00,0x15,0x00,0x15, ++ 0x00,0xd2,0x0c,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00,0x00,0x51,0x04,0x00, ++ 0x00,0x10,0x04,0x00,0x00,0x15,0x00,0x0d,0x00,0x54,0x04,0x0d,0x00,0x53,0x04,0x0d, ++ 0x00,0x52,0x04,0x0d,0x00,0x51,0x04,0x0d,0x00,0x10,0x04,0x0d,0x00,0x15,0x00,0xd0, ++ 0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x53,0x04,0x15,0x00,0x52,0x04,0x00,0x00,0x51, ++ 0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0d,0x00,0x0d,0x00,0x00,0x00,0xcf,0x86,0x55, ++ 0x04,0x00,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x12,0x00,0x13, ++ 0x00,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xcf,0x06,0x12,0x00,0xe2, ++ 0xc6,0x01,0xd1,0x8e,0xd0,0x86,0xcf,0x86,0xd5,0x48,0xd4,0x06,0xcf,0x06,0x12,0x00, ++ 0xd3,0x06,0xcf,0x06,0x12,0x00,0xd2,0x06,0xcf,0x06,0x12,0x00,0xd1,0x06,0xcf,0x06, ++ 0x12,0x00,0xd0,0x06,0xcf,0x06,0x12,0x00,0xcf,0x86,0x55,0x04,0x12,0x00,0xd4,0x14, ++ 0x53,0x04,0x12,0x00,0x52,0x04,0x12,0x00,0x91,0x08,0x10,0x04,0x12,0x00,0x14,0x00, ++ 0x14,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x14,0x00,0x15,0x00,0x15,0x00,0x00,0x00, ++ 0xd4,0x36,0xd3,0x06,0xcf,0x06,0x12,0x00,0xd2,0x2a,0xd1,0x06,0xcf,0x06,0x12,0x00, ++ 0xd0,0x06,0xcf,0x06,0x12,0x00,0xcf,0x86,0x55,0x04,0x12,0x00,0x54,0x04,0x12,0x00, ++ 0x93,0x10,0x92,0x0c,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x86,0xcf,0x06,0x00,0x00, ++ 0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0xa2,0xd4,0x9c,0xd3,0x74, ++ 0xd2,0x26,0xd1,0x20,0xd0,0x1a,0xcf,0x86,0x95,0x14,0x94,0x10,0x93,0x0c,0x92,0x08, ++ 0x11,0x04,0x0c,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0xcf,0x06, ++ 0x13,0x00,0xcf,0x06,0x13,0x00,0xd1,0x48,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04, ++ 0x13,0x00,0x53,0x04,0x13,0x00,0x52,0x04,0x13,0x00,0x51,0x04,0x13,0x00,0x10,0x04, ++ 0x13,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04,0x00,0x00,0x93,0x10, ++ 0x92,0x0c,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x94,0x0c,0x93,0x08,0x12,0x04,0x00,0x00,0x15,0x00,0x00,0x00,0x13,0x00,0xcf,0x06, ++ 0x13,0x00,0xd2,0x22,0xd1,0x06,0xcf,0x06,0x13,0x00,0xd0,0x06,0xcf,0x06,0x13,0x00, ++ 0xcf,0x86,0x55,0x04,0x13,0x00,0x54,0x04,0x13,0x00,0x53,0x04,0x13,0x00,0x12,0x04, ++ 0x13,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06, ++ 0x00,0x00,0xd3,0x7f,0xd2,0x79,0xd1,0x34,0xd0,0x06,0xcf,0x06,0x10,0x00,0xcf,0x86, ++ 0x55,0x04,0x10,0x00,0xd4,0x14,0x53,0x04,0x10,0x00,0x92,0x0c,0x51,0x04,0x10,0x00, ++ 0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x52,0x04,0x10,0x00, ++ 0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd0,0x3f,0xcf,0x86,0xd5,0x2c, ++ 0xd4,0x14,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0xd2,0x08,0x11,0x04,0x10,0x00,0x00,0x00, ++ 0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x01,0x10,0x00,0x94,0x0d,0x93,0x09,0x12,0x05, ++ 0x10,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00, ++ 0x00,0xcf,0x06,0x00,0x00,0xe1,0x96,0x04,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00, ++ 0xcf,0x86,0xe5,0x33,0x04,0xe4,0x83,0x02,0xe3,0xf8,0x01,0xd2,0x26,0xd1,0x06,0xcf, ++ 0x06,0x05,0x00,0xd0,0x06,0xcf,0x06,0x05,0x00,0xcf,0x86,0x55,0x04,0x05,0x00,0x54, ++ 0x04,0x05,0x00,0x93,0x0c,0x52,0x04,0x05,0x00,0x11,0x04,0x05,0x00,0x00,0x00,0x00, ++ 0x00,0xd1,0xef,0xd0,0x2a,0xcf,0x86,0x55,0x04,0x05,0x00,0x94,0x20,0xd3,0x10,0x52, ++ 0x04,0x05,0x00,0x51,0x04,0x05,0x00,0x10,0x04,0x05,0x00,0x00,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x0a,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0xcf,0x86,0xd5, ++ 0x2a,0x54,0x04,0x05,0x00,0x53,0x04,0x05,0x00,0x52,0x04,0x05,0x00,0x51,0x04,0x05, ++ 0x00,0x10,0x0d,0x05,0xff,0xf0,0x9d,0x85,0x97,0xf0,0x9d,0x85,0xa5,0x00,0x05,0xff, ++ 0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0x00,0xd4,0x75,0xd3,0x61,0xd2,0x44,0xd1, ++ 0x22,0x10,0x11,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0,0x9d,0x85, ++ 0xae,0x00,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0,0x9d,0x85,0xaf, ++ 0x00,0x10,0x11,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0,0x9d,0x85, ++ 0xb0,0x00,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0,0x9d,0x85,0xb1, ++ 0x00,0xd1,0x15,0x10,0x11,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0, ++ 0x9d,0x85,0xb2,0x00,0x05,0xd8,0x10,0x04,0x05,0xd8,0x05,0x01,0xd2,0x08,0x11,0x04, ++ 0x05,0x01,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x05,0xe2,0x05,0xd8,0xd3,0x12, ++ 0x92,0x0d,0x51,0x04,0x05,0xd8,0x10,0x04,0x05,0xd8,0x05,0xff,0x00,0x05,0xff,0x00, ++ 0x92,0x0e,0x51,0x05,0x05,0xff,0x00,0x10,0x05,0x05,0xff,0x00,0x05,0xdc,0x05,0xdc, + 0xd0,0x97,0xcf,0x86,0xd5,0x28,0x94,0x24,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x05,0xdc, + 0x10,0x04,0x05,0xdc,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x05,0xe6,0x05,0xe6, + 0x92,0x08,0x11,0x04,0x05,0xe6,0x05,0xdc,0x05,0x00,0x05,0x00,0xd4,0x14,0x53,0x04, +@@ -4080,20 +4090,21 @@ static const unsigned char utf8data[64080] = { + 0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf, + 0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54, + 0x04,0x00,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02, +- 0x00,0xd4,0xc8,0xd3,0x70,0xd2,0x68,0xd1,0x60,0xd0,0x58,0xcf,0x86,0xd5,0x50,0xd4, +- 0x4a,0xd3,0x44,0xd2,0x2a,0xd1,0x24,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x93, +- 0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x05,0x00,0x00,0x00,0x00,0x00,0x00, +- 0x00,0x00,0x00,0x05,0x00,0xcf,0x06,0x05,0x00,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf, +- 0x06,0x07,0x00,0xd0,0x06,0xcf,0x06,0x07,0x00,0xcf,0x86,0x55,0x04,0x07,0x00,0x14, +- 0x04,0x07,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00, +- 0x00,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xcf, +- 0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd1,0x08,0xcf,0x86,0xcf, +- 0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0x06,0xcf, +- 0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2, +- 0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00, +- 0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00,0x53,0x04,0x00,0x00,0x52, +- 0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00,0xcf,0x86,0xcf,0x06,0x02,0x00,0x81, +- 0x80,0xcf,0x86,0x85,0x84,0xcf,0x86,0xcf,0x06,0x02,0x00,0x00,0x00,0x00,0x00,0x00 ++ 0x00,0xd4,0xd9,0xd3,0x81,0xd2,0x79,0xd1,0x71,0xd0,0x69,0xcf,0x86,0xd5,0x60,0xd4, ++ 0x59,0xd3,0x52,0xd2,0x33,0xd1,0x2c,0xd0,0x25,0xcf,0x86,0x95,0x1e,0x94,0x19,0x93, ++ 0x14,0x92,0x0f,0x91,0x0a,0x10,0x05,0x00,0xff,0x00,0x05,0xff,0x00,0x00,0xff,0x00, ++ 0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x05,0xff,0x00,0xcf,0x06,0x05,0xff, ++ 0x00,0xcf,0x06,0x00,0xff,0x00,0xd1,0x07,0xcf,0x06,0x07,0xff,0x00,0xd0,0x07,0xcf, ++ 0x06,0x07,0xff,0x00,0xcf,0x86,0x55,0x05,0x07,0xff,0x00,0x14,0x05,0x07,0xff,0x00, ++ 0x00,0xff,0x00,0xcf,0x06,0x00,0xff,0x00,0xcf,0x06,0x00,0xff,0x00,0xcf,0x06,0x00, ++ 0xff,0x00,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86, ++ 0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd1,0x08,0xcf,0x86, ++ 0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0x06, ++ 0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf,0x06,0x00,0x00, ++ 0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf,0x06, ++ 0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00,0x53,0x04,0x00,0x00, ++ 0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00,0xcf,0x86,0xcf,0x06,0x02,0x00, ++ 0x81,0x80,0xcf,0x86,0x85,0x84,0xcf,0x86,0xcf,0x06,0x02,0x00,0x00,0x00,0x00,0x00 + }; + + struct utf8data_table utf8_data_table = { +diff --git a/include/acpi/pcc.h b/include/acpi/pcc.h +index 9b373d172a7760..699c1a37b8e784 100644 +--- a/include/acpi/pcc.h ++++ b/include/acpi/pcc.h +@@ -12,6 +12,7 @@ + struct pcc_mbox_chan { + struct mbox_chan *mchan; + u64 shmem_base_addr; ++ void __iomem *shmem; + u64 shmem_size; + u32 latency; + u32 max_access_rate; +@@ -31,11 +32,13 @@ struct pcc_mbox_chan { + #define PCC_CMD_COMPLETION_NOTIFY BIT(0) + + #define MAX_PCC_SUBSPACES 256 ++#define PCC_ACK_FLAG_MASK 0x1 + + #ifdef CONFIG_PCC + extern struct pcc_mbox_chan * + pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id); + extern void pcc_mbox_free_channel(struct pcc_mbox_chan *chan); ++extern int pcc_mbox_ioremap(struct mbox_chan *chan); + #else + static inline struct pcc_mbox_chan * + pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id) +@@ -43,6 +46,10 @@ pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id) + return ERR_PTR(-ENODEV); + } + static inline void pcc_mbox_free_channel(struct pcc_mbox_chan *chan) { } ++static inline int pcc_mbox_ioremap(struct mbox_chan *chan) ++{ ++ return 0; ++}; + #endif + + #endif /* _PCC_H */ +diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h +index f6a1cbb0f600fa..a80ba457a858f3 100644 +--- a/include/drm/display/drm_dp_mst_helper.h ++++ b/include/drm/display/drm_dp_mst_helper.h +@@ -699,6 +699,13 @@ struct drm_dp_mst_topology_mgr { + */ + bool payload_id_table_cleared : 1; + ++ /** ++ * @reset_rx_state: The down request's reply and up request message ++ * receiver state must be reset, after the topology manager got ++ * removed. Protected by @lock. ++ */ ++ bool reset_rx_state : 1; ++ + /** + * @payload_count: The number of currently active payloads in hardware. This value is only + * intended to be used internally by MST helpers for payload tracking, and is only safe to +diff --git a/include/drm/intel/xe_pciids.h b/include/drm/intel/xe_pciids.h +index 644872a35c3526..4ba88d2dccd4b3 100644 +--- a/include/drm/intel/xe_pciids.h ++++ b/include/drm/intel/xe_pciids.h +@@ -120,7 +120,6 @@ + + /* RPL-P */ + #define XE_RPLP_IDS(MACRO__, ...) \ +- XE_RPLU_IDS(MACRO__, ## __VA_ARGS__), \ + MACRO__(0xA720, ## __VA_ARGS__), \ + MACRO__(0xA7A0, ## __VA_ARGS__), \ + MACRO__(0xA7A8, ## __VA_ARGS__), \ +@@ -175,18 +174,38 @@ + XE_ATS_M150_IDS(MACRO__, ## __VA_ARGS__),\ + XE_ATS_M75_IDS(MACRO__, ## __VA_ARGS__) + +-/* MTL / ARL */ ++/* ARL */ ++#define XE_ARL_IDS(MACRO__, ...) \ ++ MACRO__(0x7D41, ## __VA_ARGS__), \ ++ MACRO__(0x7D51, ## __VA_ARGS__), \ ++ MACRO__(0x7D67, ## __VA_ARGS__), \ ++ MACRO__(0x7DD1, ## __VA_ARGS__), \ ++ MACRO__(0xB640, ## __VA_ARGS__) ++ ++/* MTL */ + #define XE_MTL_IDS(MACRO__, ...) \ + MACRO__(0x7D40, ## __VA_ARGS__), \ +- MACRO__(0x7D41, ## __VA_ARGS__), \ + MACRO__(0x7D45, ## __VA_ARGS__), \ +- MACRO__(0x7D51, ## __VA_ARGS__), \ + MACRO__(0x7D55, ## __VA_ARGS__), \ + MACRO__(0x7D60, ## __VA_ARGS__), \ +- MACRO__(0x7D67, ## __VA_ARGS__), \ +- MACRO__(0x7DD1, ## __VA_ARGS__), \ + MACRO__(0x7DD5, ## __VA_ARGS__) + ++/* PVC */ ++#define XE_PVC_IDS(MACRO__, ...) \ ++ MACRO__(0x0B69, ## __VA_ARGS__), \ ++ MACRO__(0x0B6E, ## __VA_ARGS__), \ ++ MACRO__(0x0BD4, ## __VA_ARGS__), \ ++ MACRO__(0x0BD5, ## __VA_ARGS__), \ ++ MACRO__(0x0BD6, ## __VA_ARGS__), \ ++ MACRO__(0x0BD7, ## __VA_ARGS__), \ ++ MACRO__(0x0BD8, ## __VA_ARGS__), \ ++ MACRO__(0x0BD9, ## __VA_ARGS__), \ ++ MACRO__(0x0BDA, ## __VA_ARGS__), \ ++ MACRO__(0x0BDB, ## __VA_ARGS__), \ ++ MACRO__(0x0BE0, ## __VA_ARGS__), \ ++ MACRO__(0x0BE1, ## __VA_ARGS__), \ ++ MACRO__(0x0BE5, ## __VA_ARGS__) ++ + #define XE_LNL_IDS(MACRO__, ...) \ + MACRO__(0x6420, ## __VA_ARGS__), \ + MACRO__(0x64A0, ## __VA_ARGS__), \ +diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h +index e84a93c4013207..6b4bc85f4999ba 100644 +--- a/include/linux/blkdev.h ++++ b/include/linux/blkdev.h +@@ -195,7 +195,7 @@ struct gendisk { + unsigned int nr_zones; + unsigned int zone_capacity; + unsigned int last_zone_capacity; +- unsigned long *conv_zones_bitmap; ++ unsigned long __rcu *conv_zones_bitmap; + unsigned int zone_wplugs_hash_bits; + spinlock_t zone_wplugs_lock; + struct mempool_s *zone_wplugs_pool; +diff --git a/include/linux/bpf.h b/include/linux/bpf.h +index bc2e3dab0487ea..cbe2350912460b 100644 +--- a/include/linux/bpf.h ++++ b/include/linux/bpf.h +@@ -1300,8 +1300,12 @@ void *__bpf_dynptr_data_rw(const struct bpf_dynptr_kern *ptr, u32 len); + bool __bpf_dynptr_is_rdonly(const struct bpf_dynptr_kern *ptr); + + #ifdef CONFIG_BPF_JIT +-int bpf_trampoline_link_prog(struct bpf_tramp_link *link, struct bpf_trampoline *tr); +-int bpf_trampoline_unlink_prog(struct bpf_tramp_link *link, struct bpf_trampoline *tr); ++int bpf_trampoline_link_prog(struct bpf_tramp_link *link, ++ struct bpf_trampoline *tr, ++ struct bpf_prog *tgt_prog); ++int bpf_trampoline_unlink_prog(struct bpf_tramp_link *link, ++ struct bpf_trampoline *tr, ++ struct bpf_prog *tgt_prog); + struct bpf_trampoline *bpf_trampoline_get(u64 key, + struct bpf_attach_target_info *tgt_info); + void bpf_trampoline_put(struct bpf_trampoline *tr); +@@ -1383,12 +1387,14 @@ void bpf_jit_uncharge_modmem(u32 size); + bool bpf_prog_has_trampoline(const struct bpf_prog *prog); + #else + static inline int bpf_trampoline_link_prog(struct bpf_tramp_link *link, +- struct bpf_trampoline *tr) ++ struct bpf_trampoline *tr, ++ struct bpf_prog *tgt_prog) + { + return -ENOTSUPP; + } + static inline int bpf_trampoline_unlink_prog(struct bpf_tramp_link *link, +- struct bpf_trampoline *tr) ++ struct bpf_trampoline *tr, ++ struct bpf_prog *tgt_prog) + { + return -ENOTSUPP; + } +@@ -1492,6 +1498,9 @@ struct bpf_prog_aux { + bool xdp_has_frags; + bool exception_cb; + bool exception_boundary; ++ bool is_extended; /* true if extended by freplace program */ ++ u64 prog_array_member_cnt; /* counts how many times as member of prog_array */ ++ struct mutex ext_mutex; /* mutex for is_extended and prog_array_member_cnt */ + struct bpf_arena *arena; + /* BTF_KIND_FUNC_PROTO for valid attach_btf_id */ + const struct btf_type *attach_func_proto; +diff --git a/include/linux/cleanup.h b/include/linux/cleanup.h +index 518bd1fd86fbe0..0cc66f8d28e7b6 100644 +--- a/include/linux/cleanup.h ++++ b/include/linux/cleanup.h +@@ -285,14 +285,20 @@ static inline class_##_name##_t class_##_name##ext##_constructor(_init_args) \ + * similar to scoped_guard(), except it does fail when the lock + * acquire fails. + * ++ * Only for conditional locks. + */ + ++#define __DEFINE_CLASS_IS_CONDITIONAL(_name, _is_cond) \ ++static __maybe_unused const bool class_##_name##_is_conditional = _is_cond ++ + #define DEFINE_GUARD(_name, _type, _lock, _unlock) \ ++ __DEFINE_CLASS_IS_CONDITIONAL(_name, false); \ + DEFINE_CLASS(_name, _type, if (_T) { _unlock; }, ({ _lock; _T; }), _type _T); \ + static inline void * class_##_name##_lock_ptr(class_##_name##_t *_T) \ + { return (void *)(__force unsigned long)*_T; } + + #define DEFINE_GUARD_COND(_name, _ext, _condlock) \ ++ __DEFINE_CLASS_IS_CONDITIONAL(_name##_ext, true); \ + EXTEND_CLASS(_name, _ext, \ + ({ void *_t = _T; if (_T && !(_condlock)) _t = NULL; _t; }), \ + class_##_name##_t _T) \ +@@ -303,17 +309,40 @@ static inline class_##_name##_t class_##_name##ext##_constructor(_init_args) \ + CLASS(_name, __UNIQUE_ID(guard)) + + #define __guard_ptr(_name) class_##_name##_lock_ptr ++#define __is_cond_ptr(_name) class_##_name##_is_conditional + +-#define scoped_guard(_name, args...) \ +- for (CLASS(_name, scope)(args), \ +- *done = NULL; __guard_ptr(_name)(&scope) && !done; done = (void *)1) +- +-#define scoped_cond_guard(_name, _fail, args...) \ +- for (CLASS(_name, scope)(args), \ +- *done = NULL; !done; done = (void *)1) \ +- if (!__guard_ptr(_name)(&scope)) _fail; \ +- else +- ++/* ++ * Helper macro for scoped_guard(). ++ * ++ * Note that the "!__is_cond_ptr(_name)" part of the condition ensures that ++ * compiler would be sure that for the unconditional locks the body of the ++ * loop (caller-provided code glued to the else clause) could not be skipped. ++ * It is needed because the other part - "__guard_ptr(_name)(&scope)" - is too ++ * hard to deduce (even if could be proven true for unconditional locks). ++ */ ++#define __scoped_guard(_name, _label, args...) \ ++ for (CLASS(_name, scope)(args); \ ++ __guard_ptr(_name)(&scope) || !__is_cond_ptr(_name); \ ++ ({ goto _label; })) \ ++ if (0) { \ ++_label: \ ++ break; \ ++ } else ++ ++#define scoped_guard(_name, args...) \ ++ __scoped_guard(_name, __UNIQUE_ID(label), args) ++ ++#define __scoped_cond_guard(_name, _fail, _label, args...) \ ++ for (CLASS(_name, scope)(args); true; ({ goto _label; })) \ ++ if (!__guard_ptr(_name)(&scope)) { \ ++ BUILD_BUG_ON(!__is_cond_ptr(_name)); \ ++ _fail; \ ++_label: \ ++ break; \ ++ } else ++ ++#define scoped_cond_guard(_name, _fail, args...) \ ++ __scoped_cond_guard(_name, _fail, __UNIQUE_ID(label), args) + /* + * Additional helper macros for generating lock guards with types, either for + * locks that don't have a native type (eg. RCU, preempt) or those that need a +@@ -369,14 +398,17 @@ static inline class_##_name##_t class_##_name##_constructor(void) \ + } + + #define DEFINE_LOCK_GUARD_1(_name, _type, _lock, _unlock, ...) \ ++__DEFINE_CLASS_IS_CONDITIONAL(_name, false); \ + __DEFINE_UNLOCK_GUARD(_name, _type, _unlock, __VA_ARGS__) \ + __DEFINE_LOCK_GUARD_1(_name, _type, _lock) + + #define DEFINE_LOCK_GUARD_0(_name, _lock, _unlock, ...) \ ++__DEFINE_CLASS_IS_CONDITIONAL(_name, false); \ + __DEFINE_UNLOCK_GUARD(_name, void, _unlock, __VA_ARGS__) \ + __DEFINE_LOCK_GUARD_0(_name, _lock) + + #define DEFINE_LOCK_GUARD_1_COND(_name, _ext, _condlock) \ ++ __DEFINE_CLASS_IS_CONDITIONAL(_name##_ext, true); \ + EXTEND_CLASS(_name, _ext, \ + ({ class_##_name##_t _t = { .lock = l }, *_T = &_t;\ + if (_T->lock && !(_condlock)) _T->lock = NULL; \ +diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h +index d35b677b08fe13..c846436b64593e 100644 +--- a/include/linux/clocksource.h ++++ b/include/linux/clocksource.h +@@ -49,6 +49,7 @@ struct module; + * @archdata: Optional arch-specific data + * @max_cycles: Maximum safe cycle value which won't overflow on + * multiplication ++ * @max_raw_delta: Maximum safe delta value for negative motion detection + * @name: Pointer to clocksource name + * @list: List head for registration (internal) + * @freq_khz: Clocksource frequency in khz. +@@ -109,6 +110,7 @@ struct clocksource { + struct arch_clocksource_data archdata; + #endif + u64 max_cycles; ++ u64 max_raw_delta; + const char *name; + struct list_head list; + u32 freq_khz; +diff --git a/include/linux/eeprom_93cx6.h b/include/linux/eeprom_93cx6.h +index c860c72a921d03..3a485cc0e0fa0b 100644 +--- a/include/linux/eeprom_93cx6.h ++++ b/include/linux/eeprom_93cx6.h +@@ -11,6 +11,8 @@ + Supported chipsets: 93c46, 93c56 and 93c66. + */ + ++#include ++ + /* + * EEPROM operation defines. + */ +@@ -34,6 +36,7 @@ + * @register_write(struct eeprom_93cx6 *eeprom): handler to + * write to the eeprom register by using all reg_* fields. + * @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines ++ * @quirks: eeprom or controller quirks + * @drive_data: Set if we're driving the data line. + * @reg_data_in: register field to indicate data input + * @reg_data_out: register field to indicate data output +@@ -50,6 +53,9 @@ struct eeprom_93cx6 { + void (*register_write)(struct eeprom_93cx6 *eeprom); + + int width; ++ unsigned int quirks; ++/* Some EEPROMs require an extra clock cycle before reading */ ++#define PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE BIT(0) + + char drive_data; + char reg_data_in; +@@ -71,3 +77,8 @@ extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable); + + extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom, + u8 addr, u16 data); ++ ++static inline bool has_quirk_extra_read_cycle(struct eeprom_93cx6 *eeprom) ++{ ++ return eeprom->quirks & PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE; ++} +diff --git a/include/linux/eventpoll.h b/include/linux/eventpoll.h +index 3337745d81bd69..0c0d00fcd131f9 100644 +--- a/include/linux/eventpoll.h ++++ b/include/linux/eventpoll.h +@@ -42,7 +42,7 @@ static inline void eventpoll_release(struct file *file) + * because the file in on the way to be removed and nobody ( but + * eventpoll ) has still a reference to this file. + */ +- if (likely(!file->f_ep)) ++ if (likely(!READ_ONCE(file->f_ep))) + return; + + /* +diff --git a/include/linux/f2fs_fs.h b/include/linux/f2fs_fs.h +index 3b2ad444c002ee..c24f8bc01045df 100644 +--- a/include/linux/f2fs_fs.h ++++ b/include/linux/f2fs_fs.h +@@ -24,6 +24,7 @@ + #define NEW_ADDR ((block_t)-1) /* used as block_t addresses */ + #define COMPRESS_ADDR ((block_t)-2) /* used as compressed data flag */ + ++#define F2FS_BLKSIZE_MASK (F2FS_BLKSIZE - 1) + #define F2FS_BYTES_TO_BLK(bytes) ((unsigned long long)(bytes) >> F2FS_BLKSIZE_BITS) + #define F2FS_BLK_TO_BYTES(blk) ((unsigned long long)(blk) << F2FS_BLKSIZE_BITS) + #define F2FS_BLK_END_BYTES(blk) (F2FS_BLK_TO_BYTES(blk + 1) - 1) +diff --git a/include/linux/fanotify.h b/include/linux/fanotify.h +index 4f1c4f60311808..89ff45bd6f01ba 100644 +--- a/include/linux/fanotify.h ++++ b/include/linux/fanotify.h +@@ -36,6 +36,7 @@ + #define FANOTIFY_ADMIN_INIT_FLAGS (FANOTIFY_PERM_CLASSES | \ + FAN_REPORT_TID | \ + FAN_REPORT_PIDFD | \ ++ FAN_REPORT_FD_ERROR | \ + FAN_UNLIMITED_QUEUE | \ + FAN_UNLIMITED_MARKS) + +diff --git a/include/linux/hid.h b/include/linux/hid.h +index 121d5b8bc86753..a7d60a1c72a09a 100644 +--- a/include/linux/hid.h ++++ b/include/linux/hid.h +@@ -359,6 +359,7 @@ struct hid_item { + * | @HID_QUIRK_NO_OUTPUT_REPORTS_ON_INTR_EP: + * | @HID_QUIRK_HAVE_SPECIAL_DRIVER: + * | @HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE: ++ * | @HID_QUIRK_IGNORE_SPECIAL_DRIVER + * | @HID_QUIRK_FULLSPEED_INTERVAL: + * | @HID_QUIRK_NO_INIT_REPORTS: + * | @HID_QUIRK_NO_IGNORE: +@@ -384,6 +385,7 @@ struct hid_item { + #define HID_QUIRK_HAVE_SPECIAL_DRIVER BIT(19) + #define HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE BIT(20) + #define HID_QUIRK_NOINVERT BIT(21) ++#define HID_QUIRK_IGNORE_SPECIAL_DRIVER BIT(22) + #define HID_QUIRK_FULLSPEED_INTERVAL BIT(28) + #define HID_QUIRK_NO_INIT_REPORTS BIT(29) + #define HID_QUIRK_NO_IGNORE BIT(30) +diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h +index 2a1ed05d5782a8..6e5328c6c6afd2 100644 +--- a/include/linux/i3c/master.h ++++ b/include/linux/i3c/master.h +@@ -298,7 +298,8 @@ enum i3c_open_drain_speed { + * @I3C_ADDR_SLOT_I2C_DEV: address is assigned to an I2C device + * @I3C_ADDR_SLOT_I3C_DEV: address is assigned to an I3C device + * @I3C_ADDR_SLOT_STATUS_MASK: address slot mask +- * ++ * @I3C_ADDR_SLOT_EXT_DESIRED: the bitmask represents addresses that are preferred by some devices, ++ * such as the "assigned-address" property in a device tree source. + * On an I3C bus, addresses are assigned dynamically, and we need to know which + * addresses are free to use and which ones are already assigned. + * +@@ -311,8 +312,12 @@ enum i3c_addr_slot_status { + I3C_ADDR_SLOT_I2C_DEV, + I3C_ADDR_SLOT_I3C_DEV, + I3C_ADDR_SLOT_STATUS_MASK = 3, ++ I3C_ADDR_SLOT_EXT_STATUS_MASK = 7, ++ I3C_ADDR_SLOT_EXT_DESIRED = BIT(2), + }; + ++#define I3C_ADDR_SLOT_STATUS_BITS 4 ++ + /** + * struct i3c_bus - I3C bus object + * @cur_master: I3C master currently driving the bus. Since I3C is multi-master +@@ -354,7 +359,7 @@ enum i3c_addr_slot_status { + struct i3c_bus { + struct i3c_dev_desc *cur_master; + int id; +- unsigned long addrslots[((I2C_MAX_ADDR + 1) * 2) / BITS_PER_LONG]; ++ unsigned long addrslots[((I2C_MAX_ADDR + 1) * I3C_ADDR_SLOT_STATUS_BITS) / BITS_PER_LONG]; + enum i3c_bus_mode mode; + struct { + unsigned long i3c; +diff --git a/include/linux/io_uring/cmd.h b/include/linux/io_uring/cmd.h +index c189d36ad55ea6..968de0cde25d58 100644 +--- a/include/linux/io_uring/cmd.h ++++ b/include/linux/io_uring/cmd.h +@@ -43,7 +43,7 @@ int io_uring_cmd_import_fixed(u64 ubuf, unsigned long len, int rw, + * Note: the caller should never hard code @issue_flags and is only allowed + * to pass the mask provided by the core io_uring code. + */ +-void io_uring_cmd_done(struct io_uring_cmd *cmd, ssize_t ret, ssize_t res2, ++void io_uring_cmd_done(struct io_uring_cmd *cmd, ssize_t ret, u64 res2, + unsigned issue_flags); + + void __io_uring_cmd_do_in_task(struct io_uring_cmd *ioucmd, +@@ -67,7 +67,7 @@ static inline int io_uring_cmd_import_fixed(u64 ubuf, unsigned long len, int rw, + return -EOPNOTSUPP; + } + static inline void io_uring_cmd_done(struct io_uring_cmd *cmd, ssize_t ret, +- ssize_t ret2, unsigned issue_flags) ++ u64 ret2, unsigned issue_flags) + { + } + static inline void __io_uring_cmd_do_in_task(struct io_uring_cmd *ioucmd, +diff --git a/include/linux/leds.h b/include/linux/leds.h +index e5968c3ed4ae08..2337f516fa7c2c 100644 +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -238,7 +238,7 @@ struct led_classdev { + struct kernfs_node *brightness_hw_changed_kn; + #endif + +- /* Ensures consistent access to the LED Flash Class device */ ++ /* Ensures consistent access to the LED class device */ + struct mutex led_access; + }; + +diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h +index f34407cc27888d..eb67d3d5ff5b22 100644 +--- a/include/linux/mmc/card.h ++++ b/include/linux/mmc/card.h +@@ -35,7 +35,7 @@ struct mmc_csd { + unsigned int wp_grp_size; + unsigned int read_blkbits; + unsigned int write_blkbits; +- unsigned int capacity; ++ sector_t capacity; + unsigned int read_partial:1, + read_misalign:1, + write_partial:1, +@@ -294,6 +294,7 @@ struct mmc_card { + #define MMC_QUIRK_BROKEN_SD_DISCARD (1<<14) /* Disable broken SD discard support */ + #define MMC_QUIRK_BROKEN_SD_CACHE (1<<15) /* Disable broken SD cache support */ + #define MMC_QUIRK_BROKEN_CACHE_FLUSH (1<<16) /* Don't flush cache until the write has occurred */ ++#define MMC_QUIRK_BROKEN_SD_POWEROFF_NOTIFY (1<<17) /* Disable broken SD poweroff notify support */ + + bool written_flag; /* Indicates eMMC has been written since power on */ + bool reenable_cmdq; /* Re-enable Command Queue */ +diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h +index 6727576a875559..865cc0ca8543d1 100644 +--- a/include/linux/mmc/sd.h ++++ b/include/linux/mmc/sd.h +@@ -36,6 +36,7 @@ + /* OCR bit definitions */ + #define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ + #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ ++#define SD_OCR_2T (1 << 27) /* HO2T/CO2T - SDUC support */ + #define SD_OCR_XPC (1 << 28) /* SDXC power control */ + #define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ + +diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h +index cc839e4365c182..74aa9fbbdae70b 100644 +--- a/include/linux/page-flags.h ++++ b/include/linux/page-flags.h +@@ -306,7 +306,7 @@ static const unsigned long *const_folio_flags(const struct folio *folio, + { + const struct page *page = &folio->page; + +- VM_BUG_ON_PGFLAGS(PageTail(page), page); ++ VM_BUG_ON_PGFLAGS(page->compound_head & 1, page); + VM_BUG_ON_PGFLAGS(n > 0 && !test_bit(PG_head, &page->flags), page); + return &page[n].flags; + } +@@ -315,7 +315,7 @@ static unsigned long *folio_flags(struct folio *folio, unsigned n) + { + struct page *page = &folio->page; + +- VM_BUG_ON_PGFLAGS(PageTail(page), page); ++ VM_BUG_ON_PGFLAGS(page->compound_head & 1, page); + VM_BUG_ON_PGFLAGS(n > 0 && !test_bit(PG_head, &page->flags), page); + return &page[n].flags; + } +diff --git a/include/linux/pci.h b/include/linux/pci.h +index 573b4c4c2be61f..4e77c4230c0a19 100644 +--- a/include/linux/pci.h ++++ b/include/linux/pci.h +@@ -2609,6 +2609,12 @@ pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) { return NULL; } + static inline bool pci_pr3_present(struct pci_dev *pdev) { return false; } + #endif + ++#if defined(CONFIG_X86) && defined(CONFIG_ACPI) ++bool arch_pci_dev_is_removable(struct pci_dev *pdev); ++#else ++static inline bool arch_pci_dev_is_removable(struct pci_dev *pdev) { return false; } ++#endif ++ + #ifdef CONFIG_EEH + static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) + { +diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h +index e61d164622db47..1bad36e3e4ef1f 100644 +--- a/include/linux/scatterlist.h ++++ b/include/linux/scatterlist.h +@@ -313,7 +313,7 @@ static inline void sg_dma_mark_bus_address(struct scatterlist *sg) + } + + /** +- * sg_unmark_bus_address - Unmark the scatterlist entry as a bus address ++ * sg_dma_unmark_bus_address - Unmark the scatterlist entry as a bus address + * @sg: SG entry + * + * Description: +diff --git a/include/linux/stackdepot.h b/include/linux/stackdepot.h +index e9ec32fb97d4a7..2cc21ffcdaf9e4 100644 +--- a/include/linux/stackdepot.h ++++ b/include/linux/stackdepot.h +@@ -147,7 +147,7 @@ static inline int stack_depot_early_init(void) { return 0; } + * If the provided stack trace comes from the interrupt context, only the part + * up to the interrupt entry is saved. + * +- * Context: Any context, but setting STACK_DEPOT_FLAG_CAN_ALLOC is required if ++ * Context: Any context, but unsetting STACK_DEPOT_FLAG_CAN_ALLOC is required if + * alloc_pages() cannot be used from the current context. Currently + * this is the case for contexts where neither %GFP_ATOMIC nor + * %GFP_NOWAIT can be used (NMI, raw_spin_lock). +@@ -156,7 +156,7 @@ static inline int stack_depot_early_init(void) { return 0; } + */ + depot_stack_handle_t stack_depot_save_flags(unsigned long *entries, + unsigned int nr_entries, +- gfp_t gfp_flags, ++ gfp_t alloc_flags, + depot_flags_t depot_flags); + + /** +@@ -175,7 +175,7 @@ depot_stack_handle_t stack_depot_save_flags(unsigned long *entries, + * Return: Handle of the stack trace stored in depot, 0 on failure + */ + depot_stack_handle_t stack_depot_save(unsigned long *entries, +- unsigned int nr_entries, gfp_t gfp_flags); ++ unsigned int nr_entries, gfp_t alloc_flags); + + /** + * __stack_depot_get_stack_record - Get a pointer to a stack_record struct +diff --git a/include/linux/timekeeper_internal.h b/include/linux/timekeeper_internal.h +index 902c20ef495acb..715e0919972e4c 100644 +--- a/include/linux/timekeeper_internal.h ++++ b/include/linux/timekeeper_internal.h +@@ -68,9 +68,6 @@ struct tk_read_base { + * shifted nano seconds. + * @ntp_error_shift: Shift conversion between clock shifted nano seconds and + * ntp shifted nano seconds. +- * @last_warning: Warning ratelimiter (DEBUG_TIMEKEEPING) +- * @underflow_seen: Underflow warning flag (DEBUG_TIMEKEEPING) +- * @overflow_seen: Overflow warning flag (DEBUG_TIMEKEEPING) + * + * Note: For timespec(64) based interfaces wall_to_monotonic is what + * we need to add to xtime (or xtime corrected for sub jiffy times) +@@ -124,18 +121,6 @@ struct timekeeper { + u32 ntp_err_mult; + /* Flag used to avoid updating NTP twice with same second */ + u32 skip_second_overflow; +-#ifdef CONFIG_DEBUG_TIMEKEEPING +- long last_warning; +- /* +- * These simple flag variables are managed +- * without locks, which is racy, but they are +- * ok since we don't really care about being +- * super precise about how many events were +- * seen, just that a problem was observed. +- */ +- int underflow_seen; +- int overflow_seen; +-#endif + }; + + #ifdef CONFIG_GENERIC_TIME_VSYSCALL +diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h +index 5a7f96684ea226..ebdfef124b2bc0 100644 +--- a/include/linux/usb/chipidea.h ++++ b/include/linux/usb/chipidea.h +@@ -65,6 +65,7 @@ struct ci_hdrc_platform_data { + #define CI_HDRC_PHY_VBUS_CONTROL BIT(16) + #define CI_HDRC_HAS_PORTSC_PEC_MISSED BIT(17) + #define CI_HDRC_FORCE_VBUS_ACTIVE_ALWAYS BIT(18) ++#define CI_HDRC_HAS_SHORT_PKT_LIMIT BIT(19) + enum usb_dr_mode dr_mode; + #define CI_HDRC_CONTROLLER_RESET_EVENT 0 + #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 +diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h +index a1864cff616aee..5bb4eaa52e14cf 100644 +--- a/include/net/bluetooth/hci.h ++++ b/include/net/bluetooth/hci.h +@@ -301,6 +301,20 @@ enum { + */ + HCI_QUIRK_BROKEN_SET_RPA_TIMEOUT, + ++ /* ++ * When this quirk is set, the HCI_OP_LE_EXT_CREATE_CONN command is ++ * disabled. This is required for the Actions Semiconductor ATS2851 ++ * based controllers, which erroneously claims to support it. ++ */ ++ HCI_QUIRK_BROKEN_EXT_CREATE_CONN, ++ ++ /* ++ * When this quirk is set, the command WRITE_AUTH_PAYLOAD_TIMEOUT is ++ * skipped. This is required for the Actions Semiconductor ATS2851 ++ * based controllers, due to a race condition in pairing process. ++ */ ++ HCI_QUIRK_BROKEN_WRITE_AUTH_PAYLOAD_TIMEOUT, ++ + /* When this quirk is set, MSFT extension monitor tracking by + * address filter is supported. Since tracking quantity of each + * pattern is limited, this feature supports tracking multiple +diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h +index 4c185a08c3a3af..c95f7e6ba25514 100644 +--- a/include/net/bluetooth/hci_core.h ++++ b/include/net/bluetooth/hci_core.h +@@ -1934,8 +1934,8 @@ void hci_conn_del_sysfs(struct hci_conn *conn); + !test_bit(HCI_QUIRK_BROKEN_EXT_SCAN, &(dev)->quirks)) + + /* Use ext create connection if command is supported */ +-#define use_ext_conn(dev) ((dev)->commands[37] & 0x80) +- ++#define use_ext_conn(dev) (((dev)->commands[37] & 0x80) && \ ++ !test_bit(HCI_QUIRK_BROKEN_EXT_CREATE_CONN, &(dev)->quirks)) + /* Extended advertising support */ + #define ext_adv_capable(dev) (((dev)->le_features[1] & HCI_LE_EXT_ADV)) + +@@ -1948,8 +1948,10 @@ void hci_conn_del_sysfs(struct hci_conn *conn); + * C24: Mandatory if the LE Controller supports Connection State and either + * LE Feature (LL Privacy) or LE Feature (Extended Advertising) is supported + */ +-#define use_enhanced_conn_complete(dev) (ll_privacy_capable(dev) || \ +- ext_adv_capable(dev)) ++#define use_enhanced_conn_complete(dev) ((ll_privacy_capable(dev) || \ ++ ext_adv_capable(dev)) && \ ++ !test_bit(HCI_QUIRK_BROKEN_EXT_CREATE_CONN, \ ++ &(dev)->quirks)) + + /* Periodic advertising support */ + #define per_adv_capable(dev) (((dev)->le_features[1] & HCI_LE_PERIODIC_ADV)) +diff --git a/include/net/netfilter/nf_tables_core.h b/include/net/netfilter/nf_tables_core.h +index ff27cb2e166207..03b6165756fc5d 100644 +--- a/include/net/netfilter/nf_tables_core.h ++++ b/include/net/netfilter/nf_tables_core.h +@@ -161,6 +161,7 @@ enum { + }; + + struct nft_inner_tun_ctx { ++ unsigned long cookie; + u16 type; + u16 inner_tunoff; + u16 inner_lloff; +diff --git a/include/net/tcp_ao.h b/include/net/tcp_ao.h +index 1d46460d0fefab..df655ce6987d37 100644 +--- a/include/net/tcp_ao.h ++++ b/include/net/tcp_ao.h +@@ -183,7 +183,8 @@ int tcp_ao_hash_skb(unsigned short int family, + const u8 *tkey, int hash_offset, u32 sne); + int tcp_parse_ao(struct sock *sk, int cmd, unsigned short int family, + sockptr_t optval, int optlen); +-struct tcp_ao_key *tcp_ao_established_key(struct tcp_ao_info *ao, ++struct tcp_ao_key *tcp_ao_established_key(const struct sock *sk, ++ struct tcp_ao_info *ao, + int sndid, int rcvid); + int tcp_ao_copy_all_matching(const struct sock *sk, struct sock *newsk, + struct request_sock *req, struct sk_buff *skb, +diff --git a/include/sound/soc_sdw_utils.h b/include/sound/soc_sdw_utils.h +index f68c1f193b3b46..0150b3735b4bd5 100644 +--- a/include/sound/soc_sdw_utils.h ++++ b/include/sound/soc_sdw_utils.h +@@ -28,6 +28,7 @@ + * - SOC_SDW_CODEC_SPKR | SOF_SIDECAR_AMPS - Not currently supported + */ + #define SOC_SDW_SIDECAR_AMPS BIT(16) ++#define SOC_SDW_CODEC_MIC BIT(17) + + #define SOC_SDW_UNUSED_DAI_ID -1 + #define SOC_SDW_JACK_OUT_DAI_ID 0 +@@ -59,6 +60,7 @@ struct asoc_sdw_dai_info { + int (*rtd_init)(struct snd_soc_pcm_runtime *rtd, struct snd_soc_dai *dai); + bool rtd_init_done; /* Indicate that the rtd_init callback is done */ + unsigned long quirk; ++ bool quirk_exclude; + }; + + struct asoc_sdw_codec_info { +diff --git a/include/trace/events/damon.h b/include/trace/events/damon.h +index 23200aabccacb1..da4bd9fd11625e 100644 +--- a/include/trace/events/damon.h ++++ b/include/trace/events/damon.h +@@ -15,7 +15,7 @@ TRACE_EVENT_CONDITION(damos_before_apply, + unsigned int target_idx, struct damon_region *r, + unsigned int nr_regions, bool do_trace), + +- TP_ARGS(context_idx, target_idx, scheme_idx, r, nr_regions, do_trace), ++ TP_ARGS(context_idx, scheme_idx, target_idx, r, nr_regions, do_trace), + + TP_CONDITION(do_trace), + +diff --git a/include/trace/trace_events.h b/include/trace/trace_events.h +index c2f9cabf154d11..fa0d51cad57a80 100644 +--- a/include/trace/trace_events.h ++++ b/include/trace/trace_events.h +@@ -244,6 +244,9 @@ static struct trace_event_fields trace_event_fields_##call[] = { \ + tstruct \ + {} }; + ++#undef DECLARE_EVENT_SYSCALL_CLASS ++#define DECLARE_EVENT_SYSCALL_CLASS DECLARE_EVENT_CLASS ++ + #undef DEFINE_EVENT_PRINT + #define DEFINE_EVENT_PRINT(template, name, proto, args, print) + +@@ -374,11 +377,11 @@ static inline notrace int trace_event_get_offsets_##call( \ + + #include "stages/stage6_event_callback.h" + +-#undef DECLARE_EVENT_CLASS +-#define DECLARE_EVENT_CLASS(call, proto, args, tstruct, assign, print) \ +- \ ++ ++#undef __DECLARE_EVENT_CLASS ++#define __DECLARE_EVENT_CLASS(call, proto, args, tstruct, assign, print) \ + static notrace void \ +-trace_event_raw_event_##call(void *__data, proto) \ ++do_trace_event_raw_event_##call(void *__data, proto) \ + { \ + struct trace_event_file *trace_file = __data; \ + struct trace_event_data_offsets_##call __maybe_unused __data_offsets;\ +@@ -403,6 +406,29 @@ trace_event_raw_event_##call(void *__data, proto) \ + \ + trace_event_buffer_commit(&fbuffer); \ + } ++ ++#undef DECLARE_EVENT_CLASS ++#define DECLARE_EVENT_CLASS(call, proto, args, tstruct, assign, print) \ ++__DECLARE_EVENT_CLASS(call, PARAMS(proto), PARAMS(args), PARAMS(tstruct), \ ++ PARAMS(assign), PARAMS(print)) \ ++static notrace void \ ++trace_event_raw_event_##call(void *__data, proto) \ ++{ \ ++ do_trace_event_raw_event_##call(__data, args); \ ++} ++ ++#undef DECLARE_EVENT_SYSCALL_CLASS ++#define DECLARE_EVENT_SYSCALL_CLASS(call, proto, args, tstruct, assign, print) \ ++__DECLARE_EVENT_CLASS(call, PARAMS(proto), PARAMS(args), PARAMS(tstruct), \ ++ PARAMS(assign), PARAMS(print)) \ ++static notrace void \ ++trace_event_raw_event_##call(void *__data, proto) \ ++{ \ ++ preempt_disable_notrace(); \ ++ do_trace_event_raw_event_##call(__data, args); \ ++ preempt_enable_notrace(); \ ++} ++ + /* + * The ftrace_test_probe is compiled out, it is only here as a build time check + * to make sure that if the tracepoint handling changes, the ftrace probe will +@@ -418,6 +444,8 @@ static inline void ftrace_test_probe_##call(void) \ + + #include TRACE_INCLUDE(TRACE_INCLUDE_FILE) + ++#undef __DECLARE_EVENT_CLASS ++ + #include "stages/stage7_class_define.h" + + #undef DECLARE_EVENT_CLASS +diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h +index b6fbe4988f2e9e..c4182e95a61955 100644 +--- a/include/uapi/drm/xe_drm.h ++++ b/include/uapi/drm/xe_drm.h +@@ -512,7 +512,9 @@ struct drm_xe_query_gt_list { + * containing the following in mask: + * ``DSS_COMPUTE ff ff ff ff 00 00 00 00`` + * means 32 DSS are available for compute. +- * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks ++ * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks. This type ++ * may be omitted if the driver is unable to query the mask from the ++ * hardware. + * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU) + * available per Dual Sub Slices (DSS). For example a query response + * containing the following in mask: +diff --git a/include/uapi/linux/fanotify.h b/include/uapi/linux/fanotify.h +index a37de58ca571ae..34f221d3a1b957 100644 +--- a/include/uapi/linux/fanotify.h ++++ b/include/uapi/linux/fanotify.h +@@ -60,6 +60,7 @@ + #define FAN_REPORT_DIR_FID 0x00000400 /* Report unique directory id */ + #define FAN_REPORT_NAME 0x00000800 /* Report events with name */ + #define FAN_REPORT_TARGET_FID 0x00001000 /* Report dirent target id */ ++#define FAN_REPORT_FD_ERROR 0x00002000 /* event->fd can report error */ + + /* Convenience macro - FAN_REPORT_NAME requires FAN_REPORT_DIR_FID */ + #define FAN_REPORT_DFID_NAME (FAN_REPORT_DIR_FID | FAN_REPORT_NAME) +diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h +index 3f68ae3e4330dc..8932ec5bd7c029 100644 +--- a/include/ufs/ufshcd.h ++++ b/include/ufs/ufshcd.h +@@ -299,6 +299,8 @@ struct ufs_pwr_mode_info { + * @max_num_rtt: maximum RTT supported by the host + * @init: called when the driver is initialized + * @exit: called to cleanup everything done in init ++ * @set_dma_mask: For setting another DMA mask than indicated by the 64AS ++ * capability bit. + * @get_ufs_hci_version: called to get UFS HCI version + * @clk_scale_notify: notifies that clks are scaled up/down + * @setup_clocks: called before touching any of the controller registers +@@ -308,7 +310,9 @@ struct ufs_pwr_mode_info { + * to allow variant specific Uni-Pro initialization. + * @pwr_change_notify: called before and after a power mode change + * is carried out to allow vendor spesific capabilities +- * to be set. ++ * to be set. PRE_CHANGE can modify final_params based ++ * on desired_pwr_mode, but POST_CHANGE must not alter ++ * the final_params parameter + * @setup_xfer_req: called before any transfer request is issued + * to set some things + * @setup_task_mgmt: called before any task management request is issued +@@ -341,6 +345,7 @@ struct ufs_hba_variant_ops { + int (*init)(struct ufs_hba *); + void (*exit)(struct ufs_hba *); + u32 (*get_ufs_hci_version)(struct ufs_hba *); ++ int (*set_dma_mask)(struct ufs_hba *); + int (*clk_scale_notify)(struct ufs_hba *, bool, + enum ufs_notify_change_status); + int (*setup_clocks)(struct ufs_hba *, bool, +@@ -350,9 +355,9 @@ struct ufs_hba_variant_ops { + int (*link_startup_notify)(struct ufs_hba *, + enum ufs_notify_change_status); + int (*pwr_change_notify)(struct ufs_hba *, +- enum ufs_notify_change_status status, +- struct ufs_pa_layer_attr *, +- struct ufs_pa_layer_attr *); ++ enum ufs_notify_change_status status, ++ struct ufs_pa_layer_attr *desired_pwr_mode, ++ struct ufs_pa_layer_attr *final_params); + void (*setup_xfer_req)(struct ufs_hba *hba, int tag, + bool is_scsi_cmd); + void (*setup_task_mgmt)(struct ufs_hba *, int, u8); +@@ -623,12 +628,6 @@ enum ufshcd_quirks { + */ + UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16, + +- /* +- * This quirk needs to be enabled if the host controller has +- * 64-bit addressing supported capability but it doesn't work. +- */ +- UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS = 1 << 17, +- + /* + * This quirk needs to be enabled if the host controller has + * auto-hibernate capability but it's FASTAUTO only. +diff --git a/io_uring/tctx.c b/io_uring/tctx.c +index c043fe93a3f232..84f6a838572040 100644 +--- a/io_uring/tctx.c ++++ b/io_uring/tctx.c +@@ -47,8 +47,19 @@ static struct io_wq *io_init_wq_offload(struct io_ring_ctx *ctx, + void __io_uring_free(struct task_struct *tsk) + { + struct io_uring_task *tctx = tsk->io_uring; ++ struct io_tctx_node *node; ++ unsigned long index; + +- WARN_ON_ONCE(!xa_empty(&tctx->xa)); ++ /* ++ * Fault injection forcing allocation errors in the xa_store() path ++ * can lead to xa_empty() returning false, even though no actual ++ * node is stored in the xarray. Until that gets sorted out, attempt ++ * an iteration here and warn if any entries are found. ++ */ ++ xa_for_each(&tctx->xa, index, node) { ++ WARN_ON_ONCE(1); ++ break; ++ } + WARN_ON_ONCE(tctx->io_wq); + WARN_ON_ONCE(tctx->cached_refs); + +diff --git a/io_uring/uring_cmd.c b/io_uring/uring_cmd.c +index 39c3c816ec7882..883510a3e8d075 100644 +--- a/io_uring/uring_cmd.c ++++ b/io_uring/uring_cmd.c +@@ -147,7 +147,7 @@ static inline void io_req_set_cqe32_extra(struct io_kiocb *req, + * Called by consumers of io_uring_cmd, if they originally returned + * -EIOCBQUEUED upon receiving the command. + */ +-void io_uring_cmd_done(struct io_uring_cmd *ioucmd, ssize_t ret, ssize_t res2, ++void io_uring_cmd_done(struct io_uring_cmd *ioucmd, ssize_t ret, u64 res2, + unsigned issue_flags) + { + struct io_kiocb *req = cmd_to_io_kiocb(ioucmd); +diff --git a/kernel/bpf/arraymap.c b/kernel/bpf/arraymap.c +index 79660e3fca4c1b..6cdbb4c33d31d5 100644 +--- a/kernel/bpf/arraymap.c ++++ b/kernel/bpf/arraymap.c +@@ -947,22 +947,44 @@ static void *prog_fd_array_get_ptr(struct bpf_map *map, + struct file *map_file, int fd) + { + struct bpf_prog *prog = bpf_prog_get(fd); ++ bool is_extended; + + if (IS_ERR(prog)) + return prog; + +- if (!bpf_prog_map_compatible(map, prog)) { ++ if (prog->type == BPF_PROG_TYPE_EXT || ++ !bpf_prog_map_compatible(map, prog)) { + bpf_prog_put(prog); + return ERR_PTR(-EINVAL); + } + ++ mutex_lock(&prog->aux->ext_mutex); ++ is_extended = prog->aux->is_extended; ++ if (!is_extended) ++ prog->aux->prog_array_member_cnt++; ++ mutex_unlock(&prog->aux->ext_mutex); ++ if (is_extended) { ++ /* Extended prog can not be tail callee. It's to prevent a ++ * potential infinite loop like: ++ * tail callee prog entry -> tail callee prog subprog -> ++ * freplace prog entry --tailcall-> tail callee prog entry. ++ */ ++ bpf_prog_put(prog); ++ return ERR_PTR(-EBUSY); ++ } ++ + return prog; + } + + static void prog_fd_array_put_ptr(struct bpf_map *map, void *ptr, bool need_defer) + { ++ struct bpf_prog *prog = ptr; ++ ++ mutex_lock(&prog->aux->ext_mutex); ++ prog->aux->prog_array_member_cnt--; ++ mutex_unlock(&prog->aux->ext_mutex); + /* bpf_prog is freed after one RCU or tasks trace grace period */ +- bpf_prog_put(ptr); ++ bpf_prog_put(prog); + } + + static u32 prog_fd_array_sys_lookup_elem(void *ptr) +diff --git a/kernel/bpf/core.c b/kernel/bpf/core.c +index 5e77c58e06010e..233ea78f8f1bd9 100644 +--- a/kernel/bpf/core.c ++++ b/kernel/bpf/core.c +@@ -131,6 +131,7 @@ struct bpf_prog *bpf_prog_alloc_no_stats(unsigned int size, gfp_t gfp_extra_flag + INIT_LIST_HEAD_RCU(&fp->aux->ksym_prefix.lnode); + #endif + mutex_init(&fp->aux->used_maps_mutex); ++ mutex_init(&fp->aux->ext_mutex); + mutex_init(&fp->aux->dst_mutex); + + return fp; +diff --git a/kernel/bpf/devmap.c b/kernel/bpf/devmap.c +index 7878be18e9d264..3aa002a47a9666 100644 +--- a/kernel/bpf/devmap.c ++++ b/kernel/bpf/devmap.c +@@ -184,7 +184,7 @@ static struct bpf_map *dev_map_alloc(union bpf_attr *attr) + static void dev_map_free(struct bpf_map *map) + { + struct bpf_dtab *dtab = container_of(map, struct bpf_dtab, map); +- int i; ++ u32 i; + + /* At this point bpf_prog->aux->refcnt == 0 and this map->refcnt == 0, + * so the programs (can be more than one that used this map) were +@@ -821,7 +821,7 @@ static long dev_map_delete_elem(struct bpf_map *map, void *key) + { + struct bpf_dtab *dtab = container_of(map, struct bpf_dtab, map); + struct bpf_dtab_netdev *old_dev; +- int k = *(u32 *)key; ++ u32 k = *(u32 *)key; + + if (k >= map->max_entries) + return -EINVAL; +@@ -838,7 +838,7 @@ static long dev_map_hash_delete_elem(struct bpf_map *map, void *key) + { + struct bpf_dtab *dtab = container_of(map, struct bpf_dtab, map); + struct bpf_dtab_netdev *old_dev; +- int k = *(u32 *)key; ++ u32 k = *(u32 *)key; + unsigned long flags; + int ret = -ENOENT; + +diff --git a/kernel/bpf/hashtab.c b/kernel/bpf/hashtab.c +index b14b87463ee04e..3ec941a0ea41c5 100644 +--- a/kernel/bpf/hashtab.c ++++ b/kernel/bpf/hashtab.c +@@ -896,9 +896,12 @@ static int htab_map_get_next_key(struct bpf_map *map, void *key, void *next_key) + static void htab_elem_free(struct bpf_htab *htab, struct htab_elem *l) + { + check_and_free_fields(htab, l); ++ ++ migrate_disable(); + if (htab->map.map_type == BPF_MAP_TYPE_PERCPU_HASH) + bpf_mem_cache_free(&htab->pcpu_ma, l->ptr_to_pptr); + bpf_mem_cache_free(&htab->ma, l); ++ migrate_enable(); + } + + static void htab_put_fd_value(struct bpf_htab *htab, struct htab_elem *l) +@@ -948,7 +951,7 @@ static void free_htab_elem(struct bpf_htab *htab, struct htab_elem *l) + if (htab_is_prealloc(htab)) { + bpf_map_dec_elem_count(&htab->map); + check_and_free_fields(htab, l); +- __pcpu_freelist_push(&htab->freelist, &l->fnode); ++ pcpu_freelist_push(&htab->freelist, &l->fnode); + } else { + dec_elem_count(htab); + htab_elem_free(htab, l); +@@ -1018,7 +1021,6 @@ static struct htab_elem *alloc_htab_elem(struct bpf_htab *htab, void *key, + */ + pl_new = this_cpu_ptr(htab->extra_elems); + l_new = *pl_new; +- htab_put_fd_value(htab, old_elem); + *pl_new = old_elem; + } else { + struct pcpu_freelist_node *l; +@@ -1105,6 +1107,7 @@ static long htab_map_update_elem(struct bpf_map *map, void *key, void *value, + struct htab_elem *l_new = NULL, *l_old; + struct hlist_nulls_head *head; + unsigned long flags; ++ void *old_map_ptr; + struct bucket *b; + u32 key_size, hash; + int ret; +@@ -1183,12 +1186,27 @@ static long htab_map_update_elem(struct bpf_map *map, void *key, void *value, + hlist_nulls_add_head_rcu(&l_new->hash_node, head); + if (l_old) { + hlist_nulls_del_rcu(&l_old->hash_node); ++ ++ /* l_old has already been stashed in htab->extra_elems, free ++ * its special fields before it is available for reuse. Also ++ * save the old map pointer in htab of maps before unlock ++ * and release it after unlock. ++ */ ++ old_map_ptr = NULL; ++ if (htab_is_prealloc(htab)) { ++ if (map->ops->map_fd_put_ptr) ++ old_map_ptr = fd_htab_map_get_ptr(map, l_old); ++ check_and_free_fields(htab, l_old); ++ } ++ } ++ htab_unlock_bucket(htab, b, hash, flags); ++ if (l_old) { ++ if (old_map_ptr) ++ map->ops->map_fd_put_ptr(map, old_map_ptr, true); + if (!htab_is_prealloc(htab)) + free_htab_elem(htab, l_old); +- else +- check_and_free_fields(htab, l_old); + } +- ret = 0; ++ return 0; + err: + htab_unlock_bucket(htab, b, hash, flags); + return ret; +@@ -1432,15 +1450,15 @@ static long htab_map_delete_elem(struct bpf_map *map, void *key) + return ret; + + l = lookup_elem_raw(head, hash, key, key_size); +- +- if (l) { ++ if (l) + hlist_nulls_del_rcu(&l->hash_node); +- free_htab_elem(htab, l); +- } else { ++ else + ret = -ENOENT; +- } + + htab_unlock_bucket(htab, b, hash, flags); ++ ++ if (l) ++ free_htab_elem(htab, l); + return ret; + } + +@@ -1853,13 +1871,14 @@ __htab_map_lookup_and_delete_batch(struct bpf_map *map, + * may cause deadlock. See comments in function + * prealloc_lru_pop(). Let us do bpf_lru_push_free() + * after releasing the bucket lock. ++ * ++ * For htab of maps, htab_put_fd_value() in ++ * free_htab_elem() may acquire a spinlock with bucket ++ * lock being held and it violates the lock rule, so ++ * invoke free_htab_elem() after unlock as well. + */ +- if (is_lru_map) { +- l->batch_flink = node_to_free; +- node_to_free = l; +- } else { +- free_htab_elem(htab, l); +- } ++ l->batch_flink = node_to_free; ++ node_to_free = l; + } + dst_key += key_size; + dst_val += value_size; +@@ -1871,7 +1890,10 @@ __htab_map_lookup_and_delete_batch(struct bpf_map *map, + while (node_to_free) { + l = node_to_free; + node_to_free = node_to_free->batch_flink; +- htab_lru_push_free(htab, l); ++ if (is_lru_map) ++ htab_lru_push_free(htab, l); ++ else ++ free_htab_elem(htab, l); + } + + next_batch: +diff --git a/kernel/bpf/lpm_trie.c b/kernel/bpf/lpm_trie.c +index 9b60eda0f727b3..010e91ac978e62 100644 +--- a/kernel/bpf/lpm_trie.c ++++ b/kernel/bpf/lpm_trie.c +@@ -310,12 +310,22 @@ static struct lpm_trie_node *lpm_trie_node_alloc(const struct lpm_trie *trie, + return node; + } + ++static int trie_check_add_elem(struct lpm_trie *trie, u64 flags) ++{ ++ if (flags == BPF_EXIST) ++ return -ENOENT; ++ if (trie->n_entries == trie->map.max_entries) ++ return -ENOSPC; ++ trie->n_entries++; ++ return 0; ++} ++ + /* Called from syscall or from eBPF program */ + static long trie_update_elem(struct bpf_map *map, + void *_key, void *value, u64 flags) + { + struct lpm_trie *trie = container_of(map, struct lpm_trie, map); +- struct lpm_trie_node *node, *im_node = NULL, *new_node = NULL; ++ struct lpm_trie_node *node, *im_node, *new_node = NULL; + struct lpm_trie_node *free_node = NULL; + struct lpm_trie_node __rcu **slot; + struct bpf_lpm_trie_key_u8 *key = _key; +@@ -333,20 +343,12 @@ static long trie_update_elem(struct bpf_map *map, + spin_lock_irqsave(&trie->lock, irq_flags); + + /* Allocate and fill a new node */ +- +- if (trie->n_entries == trie->map.max_entries) { +- ret = -ENOSPC; +- goto out; +- } +- + new_node = lpm_trie_node_alloc(trie, value); + if (!new_node) { + ret = -ENOMEM; + goto out; + } + +- trie->n_entries++; +- + new_node->prefixlen = key->prefixlen; + RCU_INIT_POINTER(new_node->child[0], NULL); + RCU_INIT_POINTER(new_node->child[1], NULL); +@@ -376,6 +378,10 @@ static long trie_update_elem(struct bpf_map *map, + * simply assign the @new_node to that slot and be done. + */ + if (!node) { ++ ret = trie_check_add_elem(trie, flags); ++ if (ret) ++ goto out; ++ + rcu_assign_pointer(*slot, new_node); + goto out; + } +@@ -384,18 +390,30 @@ static long trie_update_elem(struct bpf_map *map, + * which already has the correct data array set. + */ + if (node->prefixlen == matchlen) { ++ if (!(node->flags & LPM_TREE_NODE_FLAG_IM)) { ++ if (flags == BPF_NOEXIST) { ++ ret = -EEXIST; ++ goto out; ++ } ++ } else { ++ ret = trie_check_add_elem(trie, flags); ++ if (ret) ++ goto out; ++ } ++ + new_node->child[0] = node->child[0]; + new_node->child[1] = node->child[1]; + +- if (!(node->flags & LPM_TREE_NODE_FLAG_IM)) +- trie->n_entries--; +- + rcu_assign_pointer(*slot, new_node); + free_node = node; + + goto out; + } + ++ ret = trie_check_add_elem(trie, flags); ++ if (ret) ++ goto out; ++ + /* If the new node matches the prefix completely, it must be inserted + * as an ancestor. Simply insert it between @node and *@slot. + */ +@@ -408,6 +426,7 @@ static long trie_update_elem(struct bpf_map *map, + + im_node = lpm_trie_node_alloc(trie, NULL); + if (!im_node) { ++ trie->n_entries--; + ret = -ENOMEM; + goto out; + } +@@ -429,14 +448,8 @@ static long trie_update_elem(struct bpf_map *map, + rcu_assign_pointer(*slot, im_node); + + out: +- if (ret) { +- if (new_node) +- trie->n_entries--; +- ++ if (ret) + kfree(new_node); +- kfree(im_node); +- } +- + spin_unlock_irqrestore(&trie->lock, irq_flags); + kfree_rcu(free_node, rcu); + +@@ -633,7 +646,7 @@ static int trie_get_next_key(struct bpf_map *map, void *_key, void *_next_key) + struct lpm_trie_node **node_stack = NULL; + int err = 0, stack_ptr = -1; + unsigned int next_bit; +- size_t matchlen; ++ size_t matchlen = 0; + + /* The get_next_key follows postorder. For the 4 node example in + * the top of this file, the trie_get_next_key() returns the following +@@ -672,7 +685,7 @@ static int trie_get_next_key(struct bpf_map *map, void *_key, void *_next_key) + next_bit = extract_bit(key->data, node->prefixlen); + node = rcu_dereference(node->child[next_bit]); + } +- if (!node || node->prefixlen != key->prefixlen || ++ if (!node || node->prefixlen != matchlen || + (node->flags & LPM_TREE_NODE_FLAG_IM)) + goto find_leftmost; + +diff --git a/kernel/bpf/syscall.c b/kernel/bpf/syscall.c +index c5aa127ed4cc01..368ae8d231d417 100644 +--- a/kernel/bpf/syscall.c ++++ b/kernel/bpf/syscall.c +@@ -2976,12 +2976,24 @@ void bpf_link_inc(struct bpf_link *link) + atomic64_inc(&link->refcnt); + } + ++static void bpf_link_dealloc(struct bpf_link *link) ++{ ++ /* now that we know that bpf_link itself can't be reached, put underlying BPF program */ ++ if (link->prog) ++ bpf_prog_put(link->prog); ++ ++ /* free bpf_link and its containing memory */ ++ if (link->ops->dealloc_deferred) ++ link->ops->dealloc_deferred(link); ++ else ++ link->ops->dealloc(link); ++} ++ + static void bpf_link_defer_dealloc_rcu_gp(struct rcu_head *rcu) + { + struct bpf_link *link = container_of(rcu, struct bpf_link, rcu); + +- /* free bpf_link and its containing memory */ +- link->ops->dealloc_deferred(link); ++ bpf_link_dealloc(link); + } + + static void bpf_link_defer_dealloc_mult_rcu_gp(struct rcu_head *rcu) +@@ -3003,7 +3015,6 @@ static void bpf_link_free(struct bpf_link *link) + sleepable = link->prog->sleepable; + /* detach BPF program, clean up used resources */ + ops->release(link); +- bpf_prog_put(link->prog); + } + if (ops->dealloc_deferred) { + /* schedule BPF link deallocation; if underlying BPF program +@@ -3014,8 +3025,9 @@ static void bpf_link_free(struct bpf_link *link) + call_rcu_tasks_trace(&link->rcu, bpf_link_defer_dealloc_mult_rcu_gp); + else + call_rcu(&link->rcu, bpf_link_defer_dealloc_rcu_gp); +- } else if (ops->dealloc) +- ops->dealloc(link); ++ } else if (ops->dealloc) { ++ bpf_link_dealloc(link); ++ } + } + + static void bpf_link_put_deferred(struct work_struct *work) +@@ -3218,7 +3230,8 @@ static void bpf_tracing_link_release(struct bpf_link *link) + container_of(link, struct bpf_tracing_link, link.link); + + WARN_ON_ONCE(bpf_trampoline_unlink_prog(&tr_link->link, +- tr_link->trampoline)); ++ tr_link->trampoline, ++ tr_link->tgt_prog)); + + bpf_trampoline_put(tr_link->trampoline); + +@@ -3358,7 +3371,7 @@ static int bpf_tracing_prog_attach(struct bpf_prog *prog, + * in prog->aux + * + * - if prog->aux->dst_trampoline is NULL, the program has already been +- * attached to a target and its initial target was cleared (below) ++ * attached to a target and its initial target was cleared (below) + * + * - if tgt_prog != NULL, the caller specified tgt_prog_fd + + * target_btf_id using the link_create API. +@@ -3433,7 +3446,7 @@ static int bpf_tracing_prog_attach(struct bpf_prog *prog, + if (err) + goto out_unlock; + +- err = bpf_trampoline_link_prog(&link->link, tr); ++ err = bpf_trampoline_link_prog(&link->link, tr, tgt_prog); + if (err) { + bpf_link_cleanup(&link_primer); + link = NULL; +diff --git a/kernel/bpf/trampoline.c b/kernel/bpf/trampoline.c +index 1166d9dd3e8b5d..ecdd2660561f5b 100644 +--- a/kernel/bpf/trampoline.c ++++ b/kernel/bpf/trampoline.c +@@ -528,7 +528,27 @@ static enum bpf_tramp_prog_type bpf_attach_type_to_tramp(struct bpf_prog *prog) + } + } + +-static int __bpf_trampoline_link_prog(struct bpf_tramp_link *link, struct bpf_trampoline *tr) ++static int bpf_freplace_check_tgt_prog(struct bpf_prog *tgt_prog) ++{ ++ struct bpf_prog_aux *aux = tgt_prog->aux; ++ ++ guard(mutex)(&aux->ext_mutex); ++ if (aux->prog_array_member_cnt) ++ /* Program extensions can not extend target prog when the target ++ * prog has been updated to any prog_array map as tail callee. ++ * It's to prevent a potential infinite loop like: ++ * tgt prog entry -> tgt prog subprog -> freplace prog entry ++ * --tailcall-> tgt prog entry. ++ */ ++ return -EBUSY; ++ ++ aux->is_extended = true; ++ return 0; ++} ++ ++static int __bpf_trampoline_link_prog(struct bpf_tramp_link *link, ++ struct bpf_trampoline *tr, ++ struct bpf_prog *tgt_prog) + { + enum bpf_tramp_prog_type kind; + struct bpf_tramp_link *link_exiting; +@@ -549,6 +569,9 @@ static int __bpf_trampoline_link_prog(struct bpf_tramp_link *link, struct bpf_tr + /* Cannot attach extension if fentry/fexit are in use. */ + if (cnt) + return -EBUSY; ++ err = bpf_freplace_check_tgt_prog(tgt_prog); ++ if (err) ++ return err; + tr->extension_prog = link->link.prog; + return bpf_arch_text_poke(tr->func.addr, BPF_MOD_JUMP, NULL, + link->link.prog->bpf_func); +@@ -575,17 +598,21 @@ static int __bpf_trampoline_link_prog(struct bpf_tramp_link *link, struct bpf_tr + return err; + } + +-int bpf_trampoline_link_prog(struct bpf_tramp_link *link, struct bpf_trampoline *tr) ++int bpf_trampoline_link_prog(struct bpf_tramp_link *link, ++ struct bpf_trampoline *tr, ++ struct bpf_prog *tgt_prog) + { + int err; + + mutex_lock(&tr->mutex); +- err = __bpf_trampoline_link_prog(link, tr); ++ err = __bpf_trampoline_link_prog(link, tr, tgt_prog); + mutex_unlock(&tr->mutex); + return err; + } + +-static int __bpf_trampoline_unlink_prog(struct bpf_tramp_link *link, struct bpf_trampoline *tr) ++static int __bpf_trampoline_unlink_prog(struct bpf_tramp_link *link, ++ struct bpf_trampoline *tr, ++ struct bpf_prog *tgt_prog) + { + enum bpf_tramp_prog_type kind; + int err; +@@ -596,6 +623,8 @@ static int __bpf_trampoline_unlink_prog(struct bpf_tramp_link *link, struct bpf_ + err = bpf_arch_text_poke(tr->func.addr, BPF_MOD_JUMP, + tr->extension_prog->bpf_func, NULL); + tr->extension_prog = NULL; ++ guard(mutex)(&tgt_prog->aux->ext_mutex); ++ tgt_prog->aux->is_extended = false; + return err; + } + hlist_del_init(&link->tramp_hlist); +@@ -604,12 +633,14 @@ static int __bpf_trampoline_unlink_prog(struct bpf_tramp_link *link, struct bpf_ + } + + /* bpf_trampoline_unlink_prog() should never fail. */ +-int bpf_trampoline_unlink_prog(struct bpf_tramp_link *link, struct bpf_trampoline *tr) ++int bpf_trampoline_unlink_prog(struct bpf_tramp_link *link, ++ struct bpf_trampoline *tr, ++ struct bpf_prog *tgt_prog) + { + int err; + + mutex_lock(&tr->mutex); +- err = __bpf_trampoline_unlink_prog(link, tr); ++ err = __bpf_trampoline_unlink_prog(link, tr, tgt_prog); + mutex_unlock(&tr->mutex); + return err; + } +@@ -624,7 +655,7 @@ static void bpf_shim_tramp_link_release(struct bpf_link *link) + if (!shim_link->trampoline) + return; + +- WARN_ON_ONCE(bpf_trampoline_unlink_prog(&shim_link->link, shim_link->trampoline)); ++ WARN_ON_ONCE(bpf_trampoline_unlink_prog(&shim_link->link, shim_link->trampoline, NULL)); + bpf_trampoline_put(shim_link->trampoline); + } + +@@ -738,7 +769,7 @@ int bpf_trampoline_link_cgroup_shim(struct bpf_prog *prog, + goto err; + } + +- err = __bpf_trampoline_link_prog(&shim_link->link, tr); ++ err = __bpf_trampoline_link_prog(&shim_link->link, tr, NULL); + if (err) + goto err; + +diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c +index 91317857ea3ee5..b2008076df9c26 100644 +--- a/kernel/bpf/verifier.c ++++ b/kernel/bpf/verifier.c +@@ -1200,14 +1200,17 @@ static bool is_spilled_scalar_reg64(const struct bpf_stack_state *stack) + /* Mark stack slot as STACK_MISC, unless it is already STACK_INVALID, in which + * case they are equivalent, or it's STACK_ZERO, in which case we preserve + * more precise STACK_ZERO. +- * Note, in uprivileged mode leaving STACK_INVALID is wrong, so we take +- * env->allow_ptr_leaks into account and force STACK_MISC, if necessary. ++ * Regardless of allow_ptr_leaks setting (i.e., privileged or unprivileged ++ * mode), we won't promote STACK_INVALID to STACK_MISC. In privileged case it is ++ * unnecessary as both are considered equivalent when loading data and pruning, ++ * in case of unprivileged mode it will be incorrect to allow reads of invalid ++ * slots. + */ + static void mark_stack_slot_misc(struct bpf_verifier_env *env, u8 *stype) + { + if (*stype == STACK_ZERO) + return; +- if (env->allow_ptr_leaks && *stype == STACK_INVALID) ++ if (*stype == STACK_INVALID) + return; + *stype = STACK_MISC; + } +@@ -4646,6 +4649,7 @@ static int check_stack_write_fixed_off(struct bpf_verifier_env *env, + */ + if (!env->allow_ptr_leaks && + is_spilled_reg(&state->stack[spi]) && ++ !is_spilled_scalar_reg(&state->stack[spi]) && + size != BPF_REG_SIZE) { + verbose(env, "attempt to corrupt spilled pointer on stack\n"); + return -EACCES; +@@ -8021,6 +8025,11 @@ static int process_iter_arg(struct bpf_verifier_env *env, int regno, int insn_id + const struct btf_type *t; + int spi, err, i, nr_slots, btf_id; + ++ if (reg->type != PTR_TO_STACK) { ++ verbose(env, "arg#%d expected pointer to an iterator on stack\n", regno - 1); ++ return -EINVAL; ++ } ++ + /* For iter_{new,next,destroy} functions, btf_check_iter_kfuncs() + * ensures struct convention, so we wouldn't need to do any BTF + * validation here. But given iter state can be passed as a parameter +diff --git a/kernel/dma/debug.c b/kernel/dma/debug.c +index d570535342cb78..f6f0387761d05a 100644 +--- a/kernel/dma/debug.c ++++ b/kernel/dma/debug.c +@@ -1052,9 +1052,13 @@ static void check_unmap(struct dma_debug_entry *ref) + } + + hash_bucket_del(entry); +- dma_entry_free(entry); +- + put_hash_bucket(bucket, flags); ++ ++ /* ++ * Free the entry outside of bucket_lock to avoid ABBA deadlocks ++ * between that and radix_lock. ++ */ ++ dma_entry_free(entry); + } + + static void check_for_stack(struct device *dev, +diff --git a/kernel/kcsan/debugfs.c b/kernel/kcsan/debugfs.c +index 53b21ae30e00ee..b14072071889fb 100644 +--- a/kernel/kcsan/debugfs.c ++++ b/kernel/kcsan/debugfs.c +@@ -46,14 +46,8 @@ static struct { + int used; /* number of elements used */ + bool sorted; /* if elements are sorted */ + bool whitelist; /* if list is a blacklist or whitelist */ +-} report_filterlist = { +- .addrs = NULL, +- .size = 8, /* small initial size */ +- .used = 0, +- .sorted = false, +- .whitelist = false, /* default is blacklist */ +-}; +-static DEFINE_SPINLOCK(report_filterlist_lock); ++} report_filterlist; ++static DEFINE_RAW_SPINLOCK(report_filterlist_lock); + + /* + * The microbenchmark allows benchmarking KCSAN core runtime only. To run +@@ -110,7 +104,7 @@ bool kcsan_skip_report_debugfs(unsigned long func_addr) + return false; + func_addr -= offset; /* Get function start */ + +- spin_lock_irqsave(&report_filterlist_lock, flags); ++ raw_spin_lock_irqsave(&report_filterlist_lock, flags); + if (report_filterlist.used == 0) + goto out; + +@@ -127,7 +121,7 @@ bool kcsan_skip_report_debugfs(unsigned long func_addr) + ret = !ret; + + out: +- spin_unlock_irqrestore(&report_filterlist_lock, flags); ++ raw_spin_unlock_irqrestore(&report_filterlist_lock, flags); + return ret; + } + +@@ -135,9 +129,9 @@ static void set_report_filterlist_whitelist(bool whitelist) + { + unsigned long flags; + +- spin_lock_irqsave(&report_filterlist_lock, flags); ++ raw_spin_lock_irqsave(&report_filterlist_lock, flags); + report_filterlist.whitelist = whitelist; +- spin_unlock_irqrestore(&report_filterlist_lock, flags); ++ raw_spin_unlock_irqrestore(&report_filterlist_lock, flags); + } + + /* Returns 0 on success, error-code otherwise. */ +@@ -145,6 +139,9 @@ static ssize_t insert_report_filterlist(const char *func) + { + unsigned long flags; + unsigned long addr = kallsyms_lookup_name(func); ++ unsigned long *delay_free = NULL; ++ unsigned long *new_addrs = NULL; ++ size_t new_size = 0; + ssize_t ret = 0; + + if (!addr) { +@@ -152,32 +149,33 @@ static ssize_t insert_report_filterlist(const char *func) + return -ENOENT; + } + +- spin_lock_irqsave(&report_filterlist_lock, flags); ++retry_alloc: ++ /* ++ * Check if we need an allocation, and re-validate under the lock. Since ++ * the report_filterlist_lock is a raw, cannot allocate under the lock. ++ */ ++ if (data_race(report_filterlist.used == report_filterlist.size)) { ++ new_size = (report_filterlist.size ?: 4) * 2; ++ delay_free = new_addrs = kmalloc_array(new_size, sizeof(unsigned long), GFP_KERNEL); ++ if (!new_addrs) ++ return -ENOMEM; ++ } + +- if (report_filterlist.addrs == NULL) { +- /* initial allocation */ +- report_filterlist.addrs = +- kmalloc_array(report_filterlist.size, +- sizeof(unsigned long), GFP_ATOMIC); +- if (report_filterlist.addrs == NULL) { +- ret = -ENOMEM; +- goto out; +- } +- } else if (report_filterlist.used == report_filterlist.size) { +- /* resize filterlist */ +- size_t new_size = report_filterlist.size * 2; +- unsigned long *new_addrs = +- krealloc(report_filterlist.addrs, +- new_size * sizeof(unsigned long), GFP_ATOMIC); +- +- if (new_addrs == NULL) { +- /* leave filterlist itself untouched */ +- ret = -ENOMEM; +- goto out; ++ raw_spin_lock_irqsave(&report_filterlist_lock, flags); ++ if (report_filterlist.used == report_filterlist.size) { ++ /* Check we pre-allocated enough, and retry if not. */ ++ if (report_filterlist.used >= new_size) { ++ raw_spin_unlock_irqrestore(&report_filterlist_lock, flags); ++ kfree(new_addrs); /* kfree(NULL) is safe */ ++ delay_free = new_addrs = NULL; ++ goto retry_alloc; + } + ++ if (report_filterlist.used) ++ memcpy(new_addrs, report_filterlist.addrs, report_filterlist.used * sizeof(unsigned long)); ++ delay_free = report_filterlist.addrs; /* free the old list */ ++ report_filterlist.addrs = new_addrs; /* switch to the new list */ + report_filterlist.size = new_size; +- report_filterlist.addrs = new_addrs; + } + + /* Note: deduplicating should be done in userspace. */ +@@ -185,9 +183,9 @@ static ssize_t insert_report_filterlist(const char *func) + kallsyms_lookup_name(func); + report_filterlist.sorted = false; + +-out: +- spin_unlock_irqrestore(&report_filterlist_lock, flags); ++ raw_spin_unlock_irqrestore(&report_filterlist_lock, flags); + ++ kfree(delay_free); + return ret; + } + +@@ -204,13 +202,13 @@ static int show_info(struct seq_file *file, void *v) + } + + /* show filter functions, and filter type */ +- spin_lock_irqsave(&report_filterlist_lock, flags); ++ raw_spin_lock_irqsave(&report_filterlist_lock, flags); + seq_printf(file, "\n%s functions: %s\n", + report_filterlist.whitelist ? "whitelisted" : "blacklisted", + report_filterlist.used == 0 ? "none" : ""); + for (i = 0; i < report_filterlist.used; ++i) + seq_printf(file, " %ps\n", (void *)report_filterlist.addrs[i]); +- spin_unlock_irqrestore(&report_filterlist_lock, flags); ++ raw_spin_unlock_irqrestore(&report_filterlist_lock, flags); + + return 0; + } +diff --git a/kernel/sched/core.c b/kernel/sched/core.c +index 76b27b2a9c56ad..6cc12777bb11ab 100644 +--- a/kernel/sched/core.c ++++ b/kernel/sched/core.c +@@ -1242,9 +1242,9 @@ static void nohz_csd_func(void *info) + WARN_ON(!(flags & NOHZ_KICK_MASK)); + + rq->idle_balance = idle_cpu(cpu); +- if (rq->idle_balance && !need_resched()) { ++ if (rq->idle_balance) { + rq->nohz_idle_balance = flags; +- raise_softirq_irqoff(SCHED_SOFTIRQ); ++ __raise_softirq_irqoff(SCHED_SOFTIRQ); + } + } + +diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c +index be1b917dc8ce4c..40a1ad4493b4d9 100644 +--- a/kernel/sched/deadline.c ++++ b/kernel/sched/deadline.c +@@ -2042,6 +2042,7 @@ enqueue_dl_entity(struct sched_dl_entity *dl_se, int flags) + } else if (flags & ENQUEUE_REPLENISH) { + replenish_dl_entity(dl_se); + } else if ((flags & ENQUEUE_RESTORE) && ++ !is_dl_boosted(dl_se) && + dl_time_before(dl_se->deadline, rq_clock(rq_of_dl_se(dl_se)))) { + setup_new_dl_entity(dl_se); + } +diff --git a/kernel/sched/ext.c b/kernel/sched/ext.c +index 16613631543f18..79bb18651cdb8b 100644 +--- a/kernel/sched/ext.c ++++ b/kernel/sched/ext.c +@@ -3105,6 +3105,12 @@ static s32 scx_select_cpu_dfl(struct task_struct *p, s32 prev_cpu, + + *found = false; + ++ ++ /* ++ * This is necessary to protect llc_cpus. ++ */ ++ rcu_read_lock(); ++ + /* + * If WAKE_SYNC, the waker's local DSQ is empty, and the system is + * under utilized, wake up @p to the local DSQ of the waker. Checking +@@ -3147,9 +3153,12 @@ static s32 scx_select_cpu_dfl(struct task_struct *p, s32 prev_cpu, + if (cpu >= 0) + goto cpu_found; + ++ rcu_read_unlock(); + return prev_cpu; + + cpu_found: ++ rcu_read_unlock(); ++ + *found = true; + return cpu; + } +diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c +index 2d16c8545c71ed..782ce70ebd1b08 100644 +--- a/kernel/sched/fair.c ++++ b/kernel/sched/fair.c +@@ -3399,10 +3399,16 @@ static void task_numa_work(struct callback_head *work) + + /* Initialise new per-VMA NUMAB state. */ + if (!vma->numab_state) { +- vma->numab_state = kzalloc(sizeof(struct vma_numab_state), +- GFP_KERNEL); +- if (!vma->numab_state) ++ struct vma_numab_state *ptr; ++ ++ ptr = kzalloc(sizeof(*ptr), GFP_KERNEL); ++ if (!ptr) ++ continue; ++ ++ if (cmpxchg(&vma->numab_state, NULL, ptr)) { ++ kfree(ptr); + continue; ++ } + + vma->numab_state->start_scan_seq = mm->numa_scan_seq; + +@@ -12574,7 +12580,7 @@ static void _nohz_idle_balance(struct rq *this_rq, unsigned int flags) + * work being done for other CPUs. Next load + * balancing owner will pick it up. + */ +- if (need_resched()) { ++ if (!idle_cpu(this_cpu) && need_resched()) { + if (flags & NOHZ_STATS_KICK) + has_blocked_load = true; + if (flags & NOHZ_NEXT_KICK) +diff --git a/kernel/sched/syscalls.c b/kernel/sched/syscalls.c +index 24f9f90b6574e5..1784ed1fb3fe5d 100644 +--- a/kernel/sched/syscalls.c ++++ b/kernel/sched/syscalls.c +@@ -1238,7 +1238,7 @@ int __sched_setaffinity(struct task_struct *p, struct affinity_context *ctx) + bool empty = !cpumask_and(new_mask, new_mask, + ctx->user_mask); + +- if (WARN_ON_ONCE(empty)) ++ if (empty) + cpumask_copy(new_mask, cpus_allowed); + } + __set_cpus_allowed_ptr(p, ctx); +diff --git a/kernel/softirq.c b/kernel/softirq.c +index d082e7840f8802..8c4524ce65fafe 100644 +--- a/kernel/softirq.c ++++ b/kernel/softirq.c +@@ -280,17 +280,24 @@ static inline void invoke_softirq(void) + wakeup_softirqd(); + } + ++#define SCHED_SOFTIRQ_MASK BIT(SCHED_SOFTIRQ) ++ + /* + * flush_smp_call_function_queue() can raise a soft interrupt in a function +- * call. On RT kernels this is undesired and the only known functionality +- * in the block layer which does this is disabled on RT. If soft interrupts +- * get raised which haven't been raised before the flush, warn so it can be ++ * call. On RT kernels this is undesired and the only known functionalities ++ * are in the block layer which is disabled on RT, and in the scheduler for ++ * idle load balancing. If soft interrupts get raised which haven't been ++ * raised before the flush, warn if it is not a SCHED_SOFTIRQ so it can be + * investigated. + */ + void do_softirq_post_smp_call_flush(unsigned int was_pending) + { +- if (WARN_ON_ONCE(was_pending != local_softirq_pending())) ++ unsigned int is_pending = local_softirq_pending(); ++ ++ if (unlikely(was_pending != is_pending)) { ++ WARN_ON_ONCE(was_pending != (is_pending & ~SCHED_SOFTIRQ_MASK)); + invoke_softirq(); ++ } + } + + #else /* CONFIG_PREEMPT_RT */ +diff --git a/kernel/time/Kconfig b/kernel/time/Kconfig +index 8ebb6d5a106bea..b0b97a60aaa6fc 100644 +--- a/kernel/time/Kconfig ++++ b/kernel/time/Kconfig +@@ -17,11 +17,6 @@ config ARCH_CLOCKSOURCE_DATA + config ARCH_CLOCKSOURCE_INIT + bool + +-# Clocksources require validation of the clocksource against the last +-# cycle update - x86/TSC misfeature +-config CLOCKSOURCE_VALIDATE_LAST_CYCLE +- bool +- + # Timekeeping vsyscall support + config GENERIC_TIME_VSYSCALL + bool +diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c +index 23336eecb4f43b..8a40a616288b81 100644 +--- a/kernel/time/clocksource.c ++++ b/kernel/time/clocksource.c +@@ -22,7 +22,7 @@ + + static noinline u64 cycles_to_nsec_safe(struct clocksource *cs, u64 start, u64 end) + { +- u64 delta = clocksource_delta(end, start, cs->mask); ++ u64 delta = clocksource_delta(end, start, cs->mask, cs->max_raw_delta); + + if (likely(delta < cs->max_cycles)) + return clocksource_cyc2ns(delta, cs->mult, cs->shift); +@@ -985,6 +985,15 @@ static inline void clocksource_update_max_deferment(struct clocksource *cs) + cs->max_idle_ns = clocks_calc_max_nsecs(cs->mult, cs->shift, + cs->maxadj, cs->mask, + &cs->max_cycles); ++ ++ /* ++ * Threshold for detecting negative motion in clocksource_delta(). ++ * ++ * Allow for 0.875 of the counter width so that overly long idle ++ * sleeps, which go slightly over mask/2, do not trigger the ++ * negative motion detection. ++ */ ++ cs->max_raw_delta = (cs->mask >> 1) + (cs->mask >> 2) + (cs->mask >> 3); + } + + static struct clocksource *clocksource_find_best(bool oneshot, bool skipcur) +diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c +index 802b336f4b8c2f..de3547d63aa975 100644 +--- a/kernel/time/ntp.c ++++ b/kernel/time/ntp.c +@@ -804,7 +804,7 @@ int __do_adjtimex(struct __kernel_timex *txc, const struct timespec64 *ts, + txc->offset = shift_right(time_offset * NTP_INTERVAL_FREQ, + NTP_SCALE_SHIFT); + if (!(time_status & STA_NANO)) +- txc->offset = (u32)txc->offset / NSEC_PER_USEC; ++ txc->offset = div_s64(txc->offset, NSEC_PER_USEC); + } + + result = time_state; /* mostly `TIME_OK' */ +diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c +index 7e6f409bf3114a..96933082431fe0 100644 +--- a/kernel/time/timekeeping.c ++++ b/kernel/time/timekeeping.c +@@ -195,97 +195,6 @@ static inline u64 tk_clock_read(const struct tk_read_base *tkr) + return clock->read(clock); + } + +-#ifdef CONFIG_DEBUG_TIMEKEEPING +-#define WARNING_FREQ (HZ*300) /* 5 minute rate-limiting */ +- +-static void timekeeping_check_update(struct timekeeper *tk, u64 offset) +-{ +- +- u64 max_cycles = tk->tkr_mono.clock->max_cycles; +- const char *name = tk->tkr_mono.clock->name; +- +- if (offset > max_cycles) { +- printk_deferred("WARNING: timekeeping: Cycle offset (%lld) is larger than allowed by the '%s' clock's max_cycles value (%lld): time overflow danger\n", +- offset, name, max_cycles); +- printk_deferred(" timekeeping: Your kernel is sick, but tries to cope by capping time updates\n"); +- } else { +- if (offset > (max_cycles >> 1)) { +- printk_deferred("INFO: timekeeping: Cycle offset (%lld) is larger than the '%s' clock's 50%% safety margin (%lld)\n", +- offset, name, max_cycles >> 1); +- printk_deferred(" timekeeping: Your kernel is still fine, but is feeling a bit nervous\n"); +- } +- } +- +- if (tk->underflow_seen) { +- if (jiffies - tk->last_warning > WARNING_FREQ) { +- printk_deferred("WARNING: Underflow in clocksource '%s' observed, time update ignored.\n", name); +- printk_deferred(" Please report this, consider using a different clocksource, if possible.\n"); +- printk_deferred(" Your kernel is probably still fine.\n"); +- tk->last_warning = jiffies; +- } +- tk->underflow_seen = 0; +- } +- +- if (tk->overflow_seen) { +- if (jiffies - tk->last_warning > WARNING_FREQ) { +- printk_deferred("WARNING: Overflow in clocksource '%s' observed, time update capped.\n", name); +- printk_deferred(" Please report this, consider using a different clocksource, if possible.\n"); +- printk_deferred(" Your kernel is probably still fine.\n"); +- tk->last_warning = jiffies; +- } +- tk->overflow_seen = 0; +- } +-} +- +-static inline u64 timekeeping_cycles_to_ns(const struct tk_read_base *tkr, u64 cycles); +- +-static inline u64 timekeeping_debug_get_ns(const struct tk_read_base *tkr) +-{ +- struct timekeeper *tk = &tk_core.timekeeper; +- u64 now, last, mask, max, delta; +- unsigned int seq; +- +- /* +- * Since we're called holding a seqcount, the data may shift +- * under us while we're doing the calculation. This can cause +- * false positives, since we'd note a problem but throw the +- * results away. So nest another seqcount here to atomically +- * grab the points we are checking with. +- */ +- do { +- seq = read_seqcount_begin(&tk_core.seq); +- now = tk_clock_read(tkr); +- last = tkr->cycle_last; +- mask = tkr->mask; +- max = tkr->clock->max_cycles; +- } while (read_seqcount_retry(&tk_core.seq, seq)); +- +- delta = clocksource_delta(now, last, mask); +- +- /* +- * Try to catch underflows by checking if we are seeing small +- * mask-relative negative values. +- */ +- if (unlikely((~delta & mask) < (mask >> 3))) +- tk->underflow_seen = 1; +- +- /* Check for multiplication overflows */ +- if (unlikely(delta > max)) +- tk->overflow_seen = 1; +- +- /* timekeeping_cycles_to_ns() handles both under and overflow */ +- return timekeeping_cycles_to_ns(tkr, now); +-} +-#else +-static inline void timekeeping_check_update(struct timekeeper *tk, u64 offset) +-{ +-} +-static inline u64 timekeeping_debug_get_ns(const struct tk_read_base *tkr) +-{ +- BUG(); +-} +-#endif +- + /** + * tk_setup_internals - Set up internals to use clocksource clock. + * +@@ -390,19 +299,11 @@ static inline u64 timekeeping_cycles_to_ns(const struct tk_read_base *tkr, u64 c + return ((delta * tkr->mult) + tkr->xtime_nsec) >> tkr->shift; + } + +-static __always_inline u64 __timekeeping_get_ns(const struct tk_read_base *tkr) ++static __always_inline u64 timekeeping_get_ns(const struct tk_read_base *tkr) + { + return timekeeping_cycles_to_ns(tkr, tk_clock_read(tkr)); + } + +-static inline u64 timekeeping_get_ns(const struct tk_read_base *tkr) +-{ +- if (IS_ENABLED(CONFIG_DEBUG_TIMEKEEPING)) +- return timekeeping_debug_get_ns(tkr); +- +- return __timekeeping_get_ns(tkr); +-} +- + /** + * update_fast_timekeeper - Update the fast and NMI safe monotonic timekeeper. + * @tkr: Timekeeping readout base from which we take the update +@@ -446,7 +347,7 @@ static __always_inline u64 __ktime_get_fast_ns(struct tk_fast *tkf) + seq = raw_read_seqcount_latch(&tkf->seq); + tkr = tkf->base + (seq & 0x01); + now = ktime_to_ns(tkr->base); +- now += __timekeeping_get_ns(tkr); ++ now += timekeeping_get_ns(tkr); + } while (raw_read_seqcount_latch_retry(&tkf->seq, seq)); + + return now; +@@ -562,7 +463,7 @@ static __always_inline u64 __ktime_get_real_fast(struct tk_fast *tkf, u64 *mono) + tkr = tkf->base + (seq & 0x01); + basem = ktime_to_ns(tkr->base); + baser = ktime_to_ns(tkr->base_real); +- delta = __timekeeping_get_ns(tkr); ++ delta = timekeeping_get_ns(tkr); + } while (raw_read_seqcount_latch_retry(&tkf->seq, seq)); + + if (mono) +@@ -793,7 +694,8 @@ static void timekeeping_forward_now(struct timekeeper *tk) + u64 cycle_now, delta; + + cycle_now = tk_clock_read(&tk->tkr_mono); +- delta = clocksource_delta(cycle_now, tk->tkr_mono.cycle_last, tk->tkr_mono.mask); ++ delta = clocksource_delta(cycle_now, tk->tkr_mono.cycle_last, tk->tkr_mono.mask, ++ tk->tkr_mono.clock->max_raw_delta); + tk->tkr_mono.cycle_last = cycle_now; + tk->tkr_raw.cycle_last = cycle_now; + +@@ -2292,15 +2194,13 @@ static bool timekeeping_advance(enum timekeeping_adv_mode mode) + goto out; + + offset = clocksource_delta(tk_clock_read(&tk->tkr_mono), +- tk->tkr_mono.cycle_last, tk->tkr_mono.mask); ++ tk->tkr_mono.cycle_last, tk->tkr_mono.mask, ++ tk->tkr_mono.clock->max_raw_delta); + + /* Check if there's really nothing to do */ + if (offset < real_tk->cycle_interval && mode == TK_ADV_TICK) + goto out; + +- /* Do some additional sanity checking */ +- timekeeping_check_update(tk, offset); +- + /* + * With NO_HZ we may have to accumulate many cycle_intervals + * (think "ticks") worth of time at once. To do this efficiently, +diff --git a/kernel/time/timekeeping_internal.h b/kernel/time/timekeeping_internal.h +index 4ca2787d1642e2..feb366b0142887 100644 +--- a/kernel/time/timekeeping_internal.h ++++ b/kernel/time/timekeeping_internal.h +@@ -15,23 +15,16 @@ extern void tk_debug_account_sleep_time(const struct timespec64 *t); + #define tk_debug_account_sleep_time(x) + #endif + +-#ifdef CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE +-static inline u64 clocksource_delta(u64 now, u64 last, u64 mask) ++static inline u64 clocksource_delta(u64 now, u64 last, u64 mask, u64 max_delta) + { + u64 ret = (now - last) & mask; + + /* +- * Prevent time going backwards by checking the MSB of mask in +- * the result. If set, return 0. ++ * Prevent time going backwards by checking the result against ++ * @max_delta. If greater, return 0. + */ +- return ret & ~(mask >> 1) ? 0 : ret; ++ return ret > max_delta ? 0 : ret; + } +-#else +-static inline u64 clocksource_delta(u64 now, u64 last, u64 mask) +-{ +- return (now - last) & mask; +-} +-#endif + + /* Semi public for serialization of non timekeeper VDSO updates. */ + extern raw_spinlock_t timekeeper_lock; +diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c +index 5807116bcd0bf7..366eb4c4f28e57 100644 +--- a/kernel/trace/ring_buffer.c ++++ b/kernel/trace/ring_buffer.c +@@ -482,6 +482,8 @@ struct ring_buffer_per_cpu { + unsigned long nr_pages; + unsigned int current_context; + struct list_head *pages; ++ /* pages generation counter, incremented when the list changes */ ++ unsigned long cnt; + struct buffer_page *head_page; /* read from head */ + struct buffer_page *tail_page; /* write to tail */ + struct buffer_page *commit_page; /* committed pages */ +@@ -1475,40 +1477,87 @@ static void rb_check_bpage(struct ring_buffer_per_cpu *cpu_buffer, + RB_WARN_ON(cpu_buffer, val & RB_FLAG_MASK); + } + ++static bool rb_check_links(struct ring_buffer_per_cpu *cpu_buffer, ++ struct list_head *list) ++{ ++ if (RB_WARN_ON(cpu_buffer, ++ rb_list_head(rb_list_head(list->next)->prev) != list)) ++ return false; ++ ++ if (RB_WARN_ON(cpu_buffer, ++ rb_list_head(rb_list_head(list->prev)->next) != list)) ++ return false; ++ ++ return true; ++} ++ + /** + * rb_check_pages - integrity check of buffer pages + * @cpu_buffer: CPU buffer with pages to test + * + * As a safety measure we check to make sure the data pages have not + * been corrupted. +- * +- * Callers of this function need to guarantee that the list of pages doesn't get +- * modified during the check. In particular, if it's possible that the function +- * is invoked with concurrent readers which can swap in a new reader page then +- * the caller should take cpu_buffer->reader_lock. + */ + static void rb_check_pages(struct ring_buffer_per_cpu *cpu_buffer) + { +- struct list_head *head = rb_list_head(cpu_buffer->pages); +- struct list_head *tmp; ++ struct list_head *head, *tmp; ++ unsigned long buffer_cnt; ++ unsigned long flags; ++ int nr_loops = 0; + +- if (RB_WARN_ON(cpu_buffer, +- rb_list_head(rb_list_head(head->next)->prev) != head)) ++ /* ++ * Walk the linked list underpinning the ring buffer and validate all ++ * its next and prev links. ++ * ++ * The check acquires the reader_lock to avoid concurrent processing ++ * with code that could be modifying the list. However, the lock cannot ++ * be held for the entire duration of the walk, as this would make the ++ * time when interrupts are disabled non-deterministic, dependent on the ++ * ring buffer size. Therefore, the code releases and re-acquires the ++ * lock after checking each page. The ring_buffer_per_cpu.cnt variable ++ * is then used to detect if the list was modified while the lock was ++ * not held, in which case the check needs to be restarted. ++ * ++ * The code attempts to perform the check at most three times before ++ * giving up. This is acceptable because this is only a self-validation ++ * to detect problems early on. In practice, the list modification ++ * operations are fairly spaced, and so this check typically succeeds at ++ * most on the second try. ++ */ ++again: ++ if (++nr_loops > 3) + return; + +- if (RB_WARN_ON(cpu_buffer, +- rb_list_head(rb_list_head(head->prev)->next) != head)) +- return; ++ raw_spin_lock_irqsave(&cpu_buffer->reader_lock, flags); ++ head = rb_list_head(cpu_buffer->pages); ++ if (!rb_check_links(cpu_buffer, head)) ++ goto out_locked; ++ buffer_cnt = cpu_buffer->cnt; ++ tmp = head; ++ raw_spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags); + +- for (tmp = rb_list_head(head->next); tmp != head; tmp = rb_list_head(tmp->next)) { +- if (RB_WARN_ON(cpu_buffer, +- rb_list_head(rb_list_head(tmp->next)->prev) != tmp)) +- return; ++ while (true) { ++ raw_spin_lock_irqsave(&cpu_buffer->reader_lock, flags); + +- if (RB_WARN_ON(cpu_buffer, +- rb_list_head(rb_list_head(tmp->prev)->next) != tmp)) +- return; ++ if (buffer_cnt != cpu_buffer->cnt) { ++ /* The list was updated, try again. */ ++ raw_spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags); ++ goto again; ++ } ++ ++ tmp = rb_list_head(tmp->next); ++ if (tmp == head) ++ /* The iteration circled back, all is done. */ ++ goto out_locked; ++ ++ if (!rb_check_links(cpu_buffer, tmp)) ++ goto out_locked; ++ ++ raw_spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags); + } ++ ++out_locked: ++ raw_spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags); + } + + /* +@@ -2532,6 +2581,7 @@ rb_remove_pages(struct ring_buffer_per_cpu *cpu_buffer, unsigned long nr_pages) + + /* make sure pages points to a valid page in the ring buffer */ + cpu_buffer->pages = next_page; ++ cpu_buffer->cnt++; + + /* update head page */ + if (head_bit) +@@ -2638,6 +2688,7 @@ rb_insert_pages(struct ring_buffer_per_cpu *cpu_buffer) + * pointer to point to end of list + */ + head_page->prev = last_page; ++ cpu_buffer->cnt++; + success = true; + break; + } +@@ -2873,12 +2924,8 @@ int ring_buffer_resize(struct trace_buffer *buffer, unsigned long size, + */ + synchronize_rcu(); + for_each_buffer_cpu(buffer, cpu) { +- unsigned long flags; +- + cpu_buffer = buffer->buffers[cpu]; +- raw_spin_lock_irqsave(&cpu_buffer->reader_lock, flags); + rb_check_pages(cpu_buffer); +- raw_spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags); + } + atomic_dec(&buffer->record_disabled); + } +@@ -5296,6 +5343,7 @@ rb_get_reader_page(struct ring_buffer_per_cpu *cpu_buffer) + rb_list_head(reader->list.next)->prev = &cpu_buffer->reader_page->list; + rb_inc_page(&cpu_buffer->head_page); + ++ cpu_buffer->cnt++; + local_inc(&cpu_buffer->pages_read); + + /* Finally update the reader page to the new head */ +@@ -5835,12 +5883,9 @@ void + ring_buffer_read_finish(struct ring_buffer_iter *iter) + { + struct ring_buffer_per_cpu *cpu_buffer = iter->cpu_buffer; +- unsigned long flags; + + /* Use this opportunity to check the integrity of the ring buffer. */ +- raw_spin_lock_irqsave(&cpu_buffer->reader_lock, flags); + rb_check_pages(cpu_buffer); +- raw_spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags); + + atomic_dec(&cpu_buffer->resize_disabled); + kfree(iter->event); +@@ -6757,6 +6802,7 @@ int ring_buffer_subbuf_order_set(struct trace_buffer *buffer, int order) + /* Install the new pages, remove the head from the list */ + cpu_buffer->pages = cpu_buffer->new_pages.next; + list_del_init(&cpu_buffer->new_pages); ++ cpu_buffer->cnt++; + + cpu_buffer->head_page + = list_entry(cpu_buffer->pages, struct buffer_page, list); +diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c +index 6a891e00aa7f46..17d2ffde0bb604 100644 +--- a/kernel/trace/trace.c ++++ b/kernel/trace/trace.c +@@ -988,7 +988,8 @@ static inline void trace_access_lock_init(void) + #endif + + #ifdef CONFIG_STACKTRACE +-static void __ftrace_trace_stack(struct trace_buffer *buffer, ++static void __ftrace_trace_stack(struct trace_array *tr, ++ struct trace_buffer *buffer, + unsigned int trace_ctx, + int skip, struct pt_regs *regs); + static inline void ftrace_trace_stack(struct trace_array *tr, +@@ -997,7 +998,8 @@ static inline void ftrace_trace_stack(struct trace_array *tr, + int skip, struct pt_regs *regs); + + #else +-static inline void __ftrace_trace_stack(struct trace_buffer *buffer, ++static inline void __ftrace_trace_stack(struct trace_array *tr, ++ struct trace_buffer *buffer, + unsigned int trace_ctx, + int skip, struct pt_regs *regs) + { +@@ -2947,7 +2949,8 @@ struct ftrace_stacks { + static DEFINE_PER_CPU(struct ftrace_stacks, ftrace_stacks); + static DEFINE_PER_CPU(int, ftrace_stack_reserve); + +-static void __ftrace_trace_stack(struct trace_buffer *buffer, ++static void __ftrace_trace_stack(struct trace_array *tr, ++ struct trace_buffer *buffer, + unsigned int trace_ctx, + int skip, struct pt_regs *regs) + { +@@ -2994,6 +2997,20 @@ static void __ftrace_trace_stack(struct trace_buffer *buffer, + nr_entries = stack_trace_save(fstack->calls, size, skip); + } + ++#ifdef CONFIG_DYNAMIC_FTRACE ++ /* Mark entry of stack trace as trampoline code */ ++ if (tr->ops && tr->ops->trampoline) { ++ unsigned long tramp_start = tr->ops->trampoline; ++ unsigned long tramp_end = tramp_start + tr->ops->trampoline_size; ++ unsigned long *calls = fstack->calls; ++ ++ for (int i = 0; i < nr_entries; i++) { ++ if (calls[i] >= tramp_start && calls[i] < tramp_end) ++ calls[i] = FTRACE_TRAMPOLINE_MARKER; ++ } ++ } ++#endif ++ + event = __trace_buffer_lock_reserve(buffer, TRACE_STACK, + struct_size(entry, caller, nr_entries), + trace_ctx); +@@ -3024,7 +3041,7 @@ static inline void ftrace_trace_stack(struct trace_array *tr, + if (!(tr->trace_flags & TRACE_ITER_STACKTRACE)) + return; + +- __ftrace_trace_stack(buffer, trace_ctx, skip, regs); ++ __ftrace_trace_stack(tr, buffer, trace_ctx, skip, regs); + } + + void __trace_stack(struct trace_array *tr, unsigned int trace_ctx, +@@ -3033,7 +3050,7 @@ void __trace_stack(struct trace_array *tr, unsigned int trace_ctx, + struct trace_buffer *buffer = tr->array_buffer.buffer; + + if (rcu_is_watching()) { +- __ftrace_trace_stack(buffer, trace_ctx, skip, NULL); ++ __ftrace_trace_stack(tr, buffer, trace_ctx, skip, NULL); + return; + } + +@@ -3050,7 +3067,7 @@ void __trace_stack(struct trace_array *tr, unsigned int trace_ctx, + return; + + ct_irq_enter_irqson(); +- __ftrace_trace_stack(buffer, trace_ctx, skip, NULL); ++ __ftrace_trace_stack(tr, buffer, trace_ctx, skip, NULL); + ct_irq_exit_irqson(); + } + +@@ -3067,8 +3084,8 @@ void trace_dump_stack(int skip) + /* Skip 1 to skip this function. */ + skip++; + #endif +- __ftrace_trace_stack(printk_trace->array_buffer.buffer, +- tracing_gen_ctx(), skip, NULL); ++ __ftrace_trace_stack(printk_trace, printk_trace->array_buffer.buffer, ++ tracing_gen_ctx(), skip, NULL); + } + EXPORT_SYMBOL_GPL(trace_dump_stack); + +diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h +index c866991b9c78bf..30d6675c78cfe1 100644 +--- a/kernel/trace/trace.h ++++ b/kernel/trace/trace.h +@@ -2176,4 +2176,11 @@ static inline int rv_init_interface(void) + } + #endif + ++/* ++ * This is used only to distinguish ++ * function address from trampoline code. ++ * So this value has no meaning. ++ */ ++#define FTRACE_TRAMPOLINE_MARKER ((unsigned long) INT_MAX) ++ + #endif /* _LINUX_KERNEL_TRACE_H */ +diff --git a/kernel/trace/trace_clock.c b/kernel/trace/trace_clock.c +index 4702efb00ff21e..4cb2ebc439be68 100644 +--- a/kernel/trace/trace_clock.c ++++ b/kernel/trace/trace_clock.c +@@ -154,5 +154,5 @@ static atomic64_t trace_counter; + */ + u64 notrace trace_clock_counter(void) + { +- return atomic64_add_return(1, &trace_counter); ++ return atomic64_inc_return(&trace_counter); + } +diff --git a/kernel/trace/trace_eprobe.c b/kernel/trace/trace_eprobe.c +index ebda68ee9abff9..be8be0c1aaf0f1 100644 +--- a/kernel/trace/trace_eprobe.c ++++ b/kernel/trace/trace_eprobe.c +@@ -963,6 +963,11 @@ static int __trace_eprobe_create(int argc, const char *argv[]) + goto error; + } + ret = dyn_event_add(&ep->devent, &ep->tp.event->call); ++ if (ret < 0) { ++ trace_probe_unregister_event_call(&ep->tp); ++ mutex_unlock(&event_mutex); ++ goto error; ++ } + mutex_unlock(&event_mutex); + return ret; + parse_error: +diff --git a/kernel/trace/trace_output.c b/kernel/trace/trace_output.c +index 868f2f912f2809..c14573e5a90337 100644 +--- a/kernel/trace/trace_output.c ++++ b/kernel/trace/trace_output.c +@@ -1246,6 +1246,10 @@ static enum print_line_t trace_stack_print(struct trace_iterator *iter, + break; + + trace_seq_puts(s, " => "); ++ if ((*p) == FTRACE_TRAMPOLINE_MARKER) { ++ trace_seq_puts(s, "[FTRACE TRAMPOLINE]\n"); ++ continue; ++ } + seq_print_ip_sym(s, (*p) + delta, flags); + trace_seq_putc(s, '\n'); + } +diff --git a/kernel/trace/trace_syscalls.c b/kernel/trace/trace_syscalls.c +index 785733245eadf5..f9b21bac9d45e6 100644 +--- a/kernel/trace/trace_syscalls.c ++++ b/kernel/trace/trace_syscalls.c +@@ -299,6 +299,12 @@ static void ftrace_syscall_enter(void *data, struct pt_regs *regs, long id) + int syscall_nr; + int size; + ++ /* ++ * Syscall probe called with preemption enabled, but the ring ++ * buffer and per-cpu data require preemption to be disabled. ++ */ ++ guard(preempt_notrace)(); ++ + syscall_nr = trace_get_syscall_nr(current, regs); + if (syscall_nr < 0 || syscall_nr >= NR_syscalls) + return; +@@ -338,6 +344,12 @@ static void ftrace_syscall_exit(void *data, struct pt_regs *regs, long ret) + struct trace_event_buffer fbuffer; + int syscall_nr; + ++ /* ++ * Syscall probe called with preemption enabled, but the ring ++ * buffer and per-cpu data require preemption to be disabled. ++ */ ++ guard(preempt_notrace)(); ++ + syscall_nr = trace_get_syscall_nr(current, regs); + if (syscall_nr < 0 || syscall_nr >= NR_syscalls) + return; +diff --git a/kernel/trace/tracing_map.c b/kernel/trace/tracing_map.c +index 3a56e7c8aa4f67..1921ade45be38b 100644 +--- a/kernel/trace/tracing_map.c ++++ b/kernel/trace/tracing_map.c +@@ -845,15 +845,11 @@ int tracing_map_init(struct tracing_map *map) + static int cmp_entries_dup(const void *A, const void *B) + { + const struct tracing_map_sort_entry *a, *b; +- int ret = 0; + + a = *(const struct tracing_map_sort_entry **)A; + b = *(const struct tracing_map_sort_entry **)B; + +- if (memcmp(a->key, b->key, a->elt->map->key_size)) +- ret = 1; +- +- return ret; ++ return memcmp(a->key, b->key, a->elt->map->key_size); + } + + static int cmp_entries_sum(const void *A, const void *B) +diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug +index 7312ae7c3cc57b..3f9c238bb58ea3 100644 +--- a/lib/Kconfig.debug ++++ b/lib/Kconfig.debug +@@ -1328,19 +1328,6 @@ config SCHEDSTATS + + endmenu + +-config DEBUG_TIMEKEEPING +- bool "Enable extra timekeeping sanity checking" +- help +- This option will enable additional timekeeping sanity checks +- which may be helpful when diagnosing issues where timekeeping +- problems are suspected. +- +- This may include checks in the timekeeping hotpaths, so this +- option may have a (very small) performance impact to some +- workloads. +- +- If unsure, say N. +- + config DEBUG_PREEMPT + bool "Debug preemptible kernel" + depends on DEBUG_KERNEL && PREEMPTION && TRACE_IRQFLAGS_SUPPORT +diff --git a/lib/stackdepot.c b/lib/stackdepot.c +index 5ed34cc963fc38..245d5b41669995 100644 +--- a/lib/stackdepot.c ++++ b/lib/stackdepot.c +@@ -630,7 +630,15 @@ depot_stack_handle_t stack_depot_save_flags(unsigned long *entries, + prealloc = page_address(page); + } + +- raw_spin_lock_irqsave(&pool_lock, flags); ++ if (in_nmi()) { ++ /* We can never allocate in NMI context. */ ++ WARN_ON_ONCE(can_alloc); ++ /* Best effort; bail if we fail to take the lock. */ ++ if (!raw_spin_trylock_irqsave(&pool_lock, flags)) ++ goto exit; ++ } else { ++ raw_spin_lock_irqsave(&pool_lock, flags); ++ } + printk_deferred_enter(); + + /* Try to find again, to avoid concurrently inserting duplicates. */ +diff --git a/lib/stackinit_kunit.c b/lib/stackinit_kunit.c +index c14c6f8e6308df..c40818ec9c1801 100644 +--- a/lib/stackinit_kunit.c ++++ b/lib/stackinit_kunit.c +@@ -212,6 +212,7 @@ static noinline void test_ ## name (struct kunit *test) \ + static noinline DO_NOTHING_TYPE_ ## which(var_type) \ + do_nothing_ ## name(var_type *ptr) \ + { \ ++ OPTIMIZER_HIDE_VAR(ptr); \ + /* Will always be true, but compiler doesn't know. */ \ + if ((unsigned long)ptr > 0x2) \ + return DO_NOTHING_RETURN_ ## which(ptr); \ +diff --git a/mm/debug.c b/mm/debug.c +index aa57d3ffd4edf6..95b6ab809c0ee6 100644 +--- a/mm/debug.c ++++ b/mm/debug.c +@@ -124,19 +124,22 @@ static void __dump_page(const struct page *page) + { + struct folio *foliop, folio; + struct page precise; ++ unsigned long head; + unsigned long pfn = page_to_pfn(page); + unsigned long idx, nr_pages = 1; + int loops = 5; + + again: + memcpy(&precise, page, sizeof(*page)); +- foliop = page_folio(&precise); +- if (foliop == (struct folio *)&precise) { ++ head = precise.compound_head; ++ if ((head & 1) == 0) { ++ foliop = (struct folio *)&precise; + idx = 0; + if (!folio_test_large(foliop)) + goto dump; + foliop = (struct folio *)page; + } else { ++ foliop = (struct folio *)(head - 1); + idx = folio_page_idx(foliop, page); + } + +diff --git a/mm/gup.c b/mm/gup.c +index ad0c8922dac3cb..7053f8114e0127 100644 +--- a/mm/gup.c ++++ b/mm/gup.c +@@ -52,7 +52,12 @@ static inline void sanity_check_pinned_pages(struct page **pages, + */ + for (; npages; npages--, pages++) { + struct page *page = *pages; +- struct folio *folio = page_folio(page); ++ struct folio *folio; ++ ++ if (!page) ++ continue; ++ ++ folio = page_folio(page); + + if (is_zero_page(page) || + !folio_test_anon(folio)) +@@ -409,6 +414,10 @@ void unpin_user_pages(struct page **pages, unsigned long npages) + + sanity_check_pinned_pages(pages, npages); + for (i = 0; i < npages; i += nr) { ++ if (!pages[i]) { ++ nr = 1; ++ continue; ++ } + folio = gup_folio_next(pages, npages, i, &nr); + gup_put_folio(folio, nr, FOLL_PIN); + } +diff --git a/mm/kasan/report.c b/mm/kasan/report.c +index b48c768acc84d2..c7c0083203cb73 100644 +--- a/mm/kasan/report.c ++++ b/mm/kasan/report.c +@@ -200,7 +200,7 @@ static inline void fail_non_kasan_kunit_test(void) { } + + #endif /* CONFIG_KUNIT */ + +-static DEFINE_SPINLOCK(report_lock); ++static DEFINE_RAW_SPINLOCK(report_lock); + + static void start_report(unsigned long *flags, bool sync) + { +@@ -211,7 +211,7 @@ static void start_report(unsigned long *flags, bool sync) + lockdep_off(); + /* Make sure we don't end up in loop. */ + report_suppress_start(); +- spin_lock_irqsave(&report_lock, *flags); ++ raw_spin_lock_irqsave(&report_lock, *flags); + pr_err("==================================================================\n"); + } + +@@ -221,7 +221,7 @@ static void end_report(unsigned long *flags, const void *addr, bool is_write) + trace_error_report_end(ERROR_DETECTOR_KASAN, + (unsigned long)addr); + pr_err("==================================================================\n"); +- spin_unlock_irqrestore(&report_lock, *flags); ++ raw_spin_unlock_irqrestore(&report_lock, *flags); + if (!test_bit(KASAN_BIT_MULTI_SHOT, &kasan_flags)) + check_panic_on_warn("KASAN"); + switch (kasan_arg_fault) { +diff --git a/mm/memblock.c b/mm/memblock.c +index 0389ce5cd281e1..095c18b5c430da 100644 +--- a/mm/memblock.c ++++ b/mm/memblock.c +@@ -735,7 +735,7 @@ int __init_memblock memblock_add(phys_addr_t base, phys_addr_t size) + /** + * memblock_validate_numa_coverage - check if amount of memory with + * no node ID assigned is less than a threshold +- * @threshold_bytes: maximal number of pages that can have unassigned node ++ * @threshold_bytes: maximal memory size that can have unassigned node + * ID (in bytes). + * + * A buggy firmware may report memory that does not belong to any node. +@@ -755,7 +755,7 @@ bool __init_memblock memblock_validate_numa_coverage(unsigned long threshold_byt + nr_pages += end_pfn - start_pfn; + } + +- if ((nr_pages << PAGE_SHIFT) >= threshold_bytes) { ++ if ((nr_pages << PAGE_SHIFT) > threshold_bytes) { + mem_size_mb = memblock_phys_mem_size() >> 20; + pr_err("NUMA: no nodes coverage for %luMB of %luMB RAM\n", + (nr_pages << PAGE_SHIFT) >> 20, mem_size_mb); +diff --git a/mm/memcontrol-v1.h b/mm/memcontrol-v1.h +index c0672e25bcdb20..6fbc78e0e440ce 100644 +--- a/mm/memcontrol-v1.h ++++ b/mm/memcontrol-v1.h +@@ -38,7 +38,7 @@ void mem_cgroup_id_put_many(struct mem_cgroup *memcg, unsigned int n); + iter = mem_cgroup_iter(NULL, iter, NULL)) + + /* Whether legacy memory+swap accounting is active */ +-static bool do_memsw_account(void) ++static inline bool do_memsw_account(void) + { + return !cgroup_subsys_on_dfl(memory_cgrp_subsys); + } +diff --git a/mm/mempolicy.c b/mm/mempolicy.c +index b646fab3e45e10..7b908c4cc7eecb 100644 +--- a/mm/mempolicy.c ++++ b/mm/mempolicy.c +@@ -1080,6 +1080,10 @@ static long migrate_to_node(struct mm_struct *mm, int source, int dest, + + mmap_read_lock(mm); + vma = find_vma(mm, 0); ++ if (unlikely(!vma)) { ++ mmap_read_unlock(mm); ++ return 0; ++ } + + /* + * This does not migrate the range, but isolates all pages that +diff --git a/mm/mmap.c b/mm/mmap.c +index 4f6e566d52faa6..7fb4c1e97175f9 100644 +--- a/mm/mmap.c ++++ b/mm/mmap.c +@@ -901,6 +901,7 @@ __get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, + if (get_area) { + addr = get_area(file, addr, len, pgoff, flags); + } else if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE) ++ && !addr /* no hint */ + && IS_ALIGNED(len, PMD_SIZE)) { + /* Ensures that larger anonymous mappings are THP aligned. */ + addr = thp_get_unmapped_area_vmflags(file, addr, len, +diff --git a/mm/readahead.c b/mm/readahead.c +index 3dc6c7a128dd35..99fdb2b5b56862 100644 +--- a/mm/readahead.c ++++ b/mm/readahead.c +@@ -453,8 +453,7 @@ void page_cache_ra_order(struct readahead_control *ractl, + struct file_ra_state *ra, unsigned int new_order) + { + struct address_space *mapping = ractl->mapping; +- pgoff_t start = readahead_index(ractl); +- pgoff_t index = start; ++ pgoff_t index = readahead_index(ractl); + unsigned int min_order = mapping_min_folio_order(mapping); + pgoff_t limit = (i_size_read(mapping->host) - 1) >> PAGE_SHIFT; + pgoff_t mark = index + ra->size - ra->async_size; +@@ -517,7 +516,7 @@ void page_cache_ra_order(struct readahead_control *ractl, + if (!err) + return; + fallback: +- do_page_cache_ra(ractl, ra->size - (index - start), ra->async_size); ++ do_page_cache_ra(ractl, ra->size, ra->async_size); + } + + static unsigned long ractl_max_pages(struct readahead_control *ractl, +diff --git a/mm/vmalloc.c b/mm/vmalloc.c +index 5480b77f4167d7..0161cb4391e1d1 100644 +--- a/mm/vmalloc.c ++++ b/mm/vmalloc.c +@@ -4093,7 +4093,8 @@ void *vrealloc_noprof(const void *p, size_t size, gfp_t flags) + /* Zero out spare memory. */ + if (want_init_on_alloc(flags)) + memset((void *)p + size, 0, old_size - size); +- ++ kasan_poison_vmalloc(p + size, old_size - size); ++ kasan_unpoison_vmalloc(p, size, KASAN_VMALLOC_PROT_NORMAL); + return (void *)p; + } + +diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c +index 6354cdf9c2b372..e6591f487a5119 100644 +--- a/net/bluetooth/hci_conn.c ++++ b/net/bluetooth/hci_conn.c +@@ -1128,9 +1128,9 @@ void hci_conn_del(struct hci_conn *conn) + + hci_conn_unlink(conn); + +- cancel_delayed_work_sync(&conn->disc_work); +- cancel_delayed_work_sync(&conn->auto_accept_work); +- cancel_delayed_work_sync(&conn->idle_work); ++ disable_delayed_work_sync(&conn->disc_work); ++ disable_delayed_work_sync(&conn->auto_accept_work); ++ disable_delayed_work_sync(&conn->idle_work); + + if (conn->type == ACL_LINK) { + /* Unacked frames */ +@@ -2345,13 +2345,9 @@ struct hci_conn *hci_bind_bis(struct hci_dev *hdev, bdaddr_t *dst, + conn->iso_qos.bcast.big); + if (parent && parent != conn) { + link = hci_conn_link(parent, conn); +- if (!link) { +- hci_conn_drop(conn); +- return ERR_PTR(-ENOLINK); +- } +- +- /* Link takes the refcount */ + hci_conn_drop(conn); ++ if (!link) ++ return ERR_PTR(-ENOLINK); + } + + return conn; +@@ -2441,15 +2437,12 @@ struct hci_conn *hci_connect_cis(struct hci_dev *hdev, bdaddr_t *dst, + } + + link = hci_conn_link(le, cis); ++ hci_conn_drop(cis); + if (!link) { + hci_conn_drop(le); +- hci_conn_drop(cis); + return ERR_PTR(-ENOLINK); + } + +- /* Link takes the refcount */ +- hci_conn_drop(cis); +- + cis->state = BT_CONNECT; + + hci_le_create_cis_pending(hdev); +diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c +index 0ac354db817794..72439764186ed2 100644 +--- a/net/bluetooth/hci_core.c ++++ b/net/bluetooth/hci_core.c +@@ -3771,18 +3771,22 @@ static void hci_tx_work(struct work_struct *work) + /* ACL data packet */ + static void hci_acldata_packet(struct hci_dev *hdev, struct sk_buff *skb) + { +- struct hci_acl_hdr *hdr = (void *) skb->data; ++ struct hci_acl_hdr *hdr; + struct hci_conn *conn; + __u16 handle, flags; + +- skb_pull(skb, HCI_ACL_HDR_SIZE); ++ hdr = skb_pull_data(skb, sizeof(*hdr)); ++ if (!hdr) { ++ bt_dev_err(hdev, "ACL packet too small"); ++ goto drop; ++ } + + handle = __le16_to_cpu(hdr->handle); + flags = hci_flags(handle); + handle = hci_handle(handle); + +- BT_DBG("%s len %d handle 0x%4.4x flags 0x%4.4x", hdev->name, skb->len, +- handle, flags); ++ bt_dev_dbg(hdev, "len %d handle 0x%4.4x flags 0x%4.4x", skb->len, ++ handle, flags); + + hdev->stat.acl_rx++; + +@@ -3801,6 +3805,7 @@ static void hci_acldata_packet(struct hci_dev *hdev, struct sk_buff *skb) + handle); + } + ++drop: + kfree_skb(skb); + } + +diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c +index 2e4bd3e961ce09..2b5ba8acd1d84a 100644 +--- a/net/bluetooth/hci_event.c ++++ b/net/bluetooth/hci_event.c +@@ -3626,6 +3626,13 @@ static void hci_encrypt_change_evt(struct hci_dev *hdev, void *data, + goto unlock; + } + ++ /* We skip the WRITE_AUTH_PAYLOAD_TIMEOUT for ATS2851 based controllers ++ * to avoid unexpected SMP command errors when pairing. ++ */ ++ if (test_bit(HCI_QUIRK_BROKEN_WRITE_AUTH_PAYLOAD_TIMEOUT, ++ &hdev->quirks)) ++ goto notify; ++ + /* Set the default Authenticated Payload Timeout after + * an LE Link is established. As per Core Spec v5.0, Vol 2, Part B + * Section 3.3, the HCI command WRITE_AUTH_PAYLOAD_TIMEOUT should be +diff --git a/net/bluetooth/hci_sync.c b/net/bluetooth/hci_sync.c +index c0203a2b510756..c86f4e42e69cab 100644 +--- a/net/bluetooth/hci_sync.c ++++ b/net/bluetooth/hci_sync.c +@@ -4842,6 +4842,13 @@ static const struct { + HCI_QUIRK_BROKEN(SET_RPA_TIMEOUT, + "HCI LE Set Random Private Address Timeout command is " + "advertised, but not supported."), ++ HCI_QUIRK_BROKEN(EXT_CREATE_CONN, ++ "HCI LE Extended Create Connection command is " ++ "advertised, but not supported."), ++ HCI_QUIRK_BROKEN(WRITE_AUTH_PAYLOAD_TIMEOUT, ++ "HCI WRITE AUTH PAYLOAD TIMEOUT command leads " ++ "to unexpected SMP errors when pairing " ++ "and will not be used."), + HCI_QUIRK_BROKEN(LE_CODED, + "HCI LE Coded PHY feature bit is set, " + "but its usage is not supported.") +@@ -6477,7 +6484,7 @@ static int hci_le_create_conn_sync(struct hci_dev *hdev, void *data) + &own_addr_type); + if (err) + goto done; +- ++ /* Send command LE Extended Create Connection if supported */ + if (use_ext_conn(hdev)) { + err = hci_le_ext_create_conn_sync(hdev, conn, own_addr_type); + goto done; +diff --git a/net/bluetooth/l2cap_sock.c b/net/bluetooth/l2cap_sock.c +index ba437c6f6ee591..18e89e764f3b42 100644 +--- a/net/bluetooth/l2cap_sock.c ++++ b/net/bluetooth/l2cap_sock.c +@@ -1886,6 +1886,7 @@ static struct sock *l2cap_sock_alloc(struct net *net, struct socket *sock, + chan = l2cap_chan_create(); + if (!chan) { + sk_free(sk); ++ sock->sk = NULL; + return NULL; + } + +diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c +index 8af1bf518321fd..40766f8119ed9c 100644 +--- a/net/bluetooth/rfcomm/sock.c ++++ b/net/bluetooth/rfcomm/sock.c +@@ -274,13 +274,13 @@ static struct sock *rfcomm_sock_alloc(struct net *net, struct socket *sock, + struct rfcomm_dlc *d; + struct sock *sk; + +- sk = bt_sock_alloc(net, sock, &rfcomm_proto, proto, prio, kern); +- if (!sk) ++ d = rfcomm_dlc_alloc(prio); ++ if (!d) + return NULL; + +- d = rfcomm_dlc_alloc(prio); +- if (!d) { +- sk_free(sk); ++ sk = bt_sock_alloc(net, sock, &rfcomm_proto, proto, prio, kern); ++ if (!sk) { ++ rfcomm_dlc_free(d); + return NULL; + } + +diff --git a/net/can/af_can.c b/net/can/af_can.c +index 707576eeeb5823..01f3fbb3b67dc6 100644 +--- a/net/can/af_can.c ++++ b/net/can/af_can.c +@@ -171,6 +171,7 @@ static int can_create(struct net *net, struct socket *sock, int protocol, + /* release sk on errors */ + sock_orphan(sk); + sock_put(sk); ++ sock->sk = NULL; + } + + errout: +diff --git a/net/can/j1939/transport.c b/net/can/j1939/transport.c +index 319f47df33300c..95f7a7e65a73fa 100644 +--- a/net/can/j1939/transport.c ++++ b/net/can/j1939/transport.c +@@ -1505,7 +1505,7 @@ static struct j1939_session *j1939_session_new(struct j1939_priv *priv, + session->state = J1939_SESSION_NEW; + + skb_queue_head_init(&session->skb_queue); +- skb_queue_tail(&session->skb_queue, skb); ++ skb_queue_tail(&session->skb_queue, skb_get(skb)); + + skcb = j1939_skb_to_cb(skb); + memcpy(&session->skcb, skcb, sizeof(session->skcb)); +diff --git a/net/core/link_watch.c b/net/core/link_watch.c +index ab150641142aa1..1b4d39e3808427 100644 +--- a/net/core/link_watch.c ++++ b/net/core/link_watch.c +@@ -45,9 +45,14 @@ static unsigned int default_operstate(const struct net_device *dev) + int iflink = dev_get_iflink(dev); + struct net_device *peer; + +- if (iflink == dev->ifindex) ++ /* If called from netdev_run_todo()/linkwatch_sync_dev(), ++ * dev_net(dev) can be already freed, and RTNL is not held. ++ */ ++ if (dev->reg_state == NETREG_UNREGISTERED || ++ iflink == dev->ifindex) + return IF_OPER_DOWN; + ++ ASSERT_RTNL(); + peer = __dev_get_by_index(dev_net(dev), iflink); + if (!peer) + return IF_OPER_DOWN; +diff --git a/net/core/neighbour.c b/net/core/neighbour.c +index 77b819cd995b25..cc58315a40a79c 100644 +--- a/net/core/neighbour.c ++++ b/net/core/neighbour.c +@@ -2876,6 +2876,7 @@ static int neigh_dump_info(struct sk_buff *skb, struct netlink_callback *cb) + err = neigh_valid_dump_req(nlh, cb->strict_check, &filter, cb->extack); + if (err < 0 && cb->strict_check) + return err; ++ err = 0; + + s_t = cb->args[0]; + +diff --git a/net/core/netpoll.c b/net/core/netpoll.c +index aa49b92e9194ba..45fb60bc480395 100644 +--- a/net/core/netpoll.c ++++ b/net/core/netpoll.c +@@ -626,7 +626,7 @@ int __netpoll_setup(struct netpoll *np, struct net_device *ndev) + goto out; + } + +- if (!ndev->npinfo) { ++ if (!rcu_access_pointer(ndev->npinfo)) { + npinfo = kmalloc(sizeof(*npinfo), GFP_KERNEL); + if (!npinfo) { + err = -ENOMEM; +diff --git a/net/dccp/feat.c b/net/dccp/feat.c +index 54086bb05c42cd..f7554dcdaaba93 100644 +--- a/net/dccp/feat.c ++++ b/net/dccp/feat.c +@@ -1166,8 +1166,12 @@ static u8 dccp_feat_change_recv(struct list_head *fn, u8 is_mandatory, u8 opt, + goto not_valid_or_not_known; + } + +- return dccp_feat_push_confirm(fn, feat, local, &fval); ++ if (dccp_feat_push_confirm(fn, feat, local, &fval)) { ++ kfree(fval.sp.vec); ++ return DCCP_RESET_CODE_TOO_BUSY; ++ } + ++ return 0; + } else if (entry->state == FEAT_UNSTABLE) { /* 6.6.2 */ + return 0; + } +diff --git a/net/ethtool/bitset.c b/net/ethtool/bitset.c +index 0515d6604b3b9d..f0883357d12e52 100644 +--- a/net/ethtool/bitset.c ++++ b/net/ethtool/bitset.c +@@ -425,12 +425,32 @@ static int ethnl_parse_bit(unsigned int *index, bool *val, unsigned int nbits, + return 0; + } + ++/** ++ * ethnl_bitmap32_equal() - Compare two bitmaps ++ * @map1: first bitmap ++ * @map2: second bitmap ++ * @nbits: bit size to compare ++ * ++ * Return: true if first @nbits are equal, false if not ++ */ ++static bool ethnl_bitmap32_equal(const u32 *map1, const u32 *map2, ++ unsigned int nbits) ++{ ++ if (memcmp(map1, map2, nbits / 32 * sizeof(u32))) ++ return false; ++ if (nbits % 32 == 0) ++ return true; ++ return !((map1[nbits / 32] ^ map2[nbits / 32]) & ++ ethnl_lower_bits(nbits % 32)); ++} ++ + static int + ethnl_update_bitset32_verbose(u32 *bitmap, unsigned int nbits, + const struct nlattr *attr, struct nlattr **tb, + ethnl_string_array_t names, + struct netlink_ext_ack *extack, bool *mod) + { ++ u32 *saved_bitmap = NULL; + struct nlattr *bit_attr; + bool no_mask; + int rem; +@@ -448,8 +468,20 @@ ethnl_update_bitset32_verbose(u32 *bitmap, unsigned int nbits, + } + + no_mask = tb[ETHTOOL_A_BITSET_NOMASK]; +- if (no_mask) +- ethnl_bitmap32_clear(bitmap, 0, nbits, mod); ++ if (no_mask) { ++ unsigned int nwords = DIV_ROUND_UP(nbits, 32); ++ unsigned int nbytes = nwords * sizeof(u32); ++ bool dummy; ++ ++ /* The bitmap size is only the size of the map part without ++ * its mask part. ++ */ ++ saved_bitmap = kcalloc(nwords, sizeof(u32), GFP_KERNEL); ++ if (!saved_bitmap) ++ return -ENOMEM; ++ memcpy(saved_bitmap, bitmap, nbytes); ++ ethnl_bitmap32_clear(bitmap, 0, nbits, &dummy); ++ } + + nla_for_each_nested(bit_attr, tb[ETHTOOL_A_BITSET_BITS], rem) { + bool old_val, new_val; +@@ -458,22 +490,30 @@ ethnl_update_bitset32_verbose(u32 *bitmap, unsigned int nbits, + if (nla_type(bit_attr) != ETHTOOL_A_BITSET_BITS_BIT) { + NL_SET_ERR_MSG_ATTR(extack, bit_attr, + "only ETHTOOL_A_BITSET_BITS_BIT allowed in ETHTOOL_A_BITSET_BITS"); ++ kfree(saved_bitmap); + return -EINVAL; + } + ret = ethnl_parse_bit(&idx, &new_val, nbits, bit_attr, no_mask, + names, extack); +- if (ret < 0) ++ if (ret < 0) { ++ kfree(saved_bitmap); + return ret; ++ } + old_val = bitmap[idx / 32] & ((u32)1 << (idx % 32)); + if (new_val != old_val) { + if (new_val) + bitmap[idx / 32] |= ((u32)1 << (idx % 32)); + else + bitmap[idx / 32] &= ~((u32)1 << (idx % 32)); +- *mod = true; ++ if (!no_mask) ++ *mod = true; + } + } + ++ if (no_mask && !ethnl_bitmap32_equal(saved_bitmap, bitmap, nbits)) ++ *mod = true; ++ ++ kfree(saved_bitmap); + return 0; + } + +diff --git a/net/hsr/hsr_device.c b/net/hsr/hsr_device.c +index f630d6645636dd..44048d7538ddc3 100644 +--- a/net/hsr/hsr_device.c ++++ b/net/hsr/hsr_device.c +@@ -246,20 +246,22 @@ static const struct header_ops hsr_header_ops = { + .parse = eth_header_parse, + }; + +-static struct sk_buff *hsr_init_skb(struct hsr_port *master) ++static struct sk_buff *hsr_init_skb(struct hsr_port *master, int extra) + { + struct hsr_priv *hsr = master->hsr; + struct sk_buff *skb; + int hlen, tlen; ++ int len; + + hlen = LL_RESERVED_SPACE(master->dev); + tlen = master->dev->needed_tailroom; ++ len = sizeof(struct hsr_sup_tag) + sizeof(struct hsr_sup_payload); + /* skb size is same for PRP/HSR frames, only difference + * being, for PRP it is a trailer and for HSR it is a +- * header ++ * header. ++ * RedBox might use @extra more bytes. + */ +- skb = dev_alloc_skb(sizeof(struct hsr_sup_tag) + +- sizeof(struct hsr_sup_payload) + hlen + tlen); ++ skb = dev_alloc_skb(len + extra + hlen + tlen); + + if (!skb) + return skb; +@@ -295,6 +297,7 @@ static void send_hsr_supervision_frame(struct hsr_port *port, + struct hsr_sup_tlv *hsr_stlv; + struct hsr_sup_tag *hsr_stag; + struct sk_buff *skb; ++ int extra = 0; + + *interval = msecs_to_jiffies(HSR_LIFE_CHECK_INTERVAL); + if (hsr->announce_count < 3 && hsr->prot_version == 0) { +@@ -303,7 +306,11 @@ static void send_hsr_supervision_frame(struct hsr_port *port, + hsr->announce_count++; + } + +- skb = hsr_init_skb(port); ++ if (hsr->redbox) ++ extra = sizeof(struct hsr_sup_tlv) + ++ sizeof(struct hsr_sup_payload); ++ ++ skb = hsr_init_skb(port, extra); + if (!skb) { + netdev_warn_once(port->dev, "HSR: Could not send supervision frame\n"); + return; +@@ -362,7 +369,7 @@ static void send_prp_supervision_frame(struct hsr_port *master, + struct hsr_sup_tag *hsr_stag; + struct sk_buff *skb; + +- skb = hsr_init_skb(master); ++ skb = hsr_init_skb(master, 0); + if (!skb) { + netdev_warn_once(master->dev, "PRP: Could not send supervision frame\n"); + return; +diff --git a/net/hsr/hsr_forward.c b/net/hsr/hsr_forward.c +index b38060246e62e8..40c5fbbd155d66 100644 +--- a/net/hsr/hsr_forward.c ++++ b/net/hsr/hsr_forward.c +@@ -688,6 +688,8 @@ static int fill_frame_info(struct hsr_frame_info *frame, + frame->is_vlan = true; + + if (frame->is_vlan) { ++ if (skb->mac_len < offsetofend(struct hsr_vlan_ethhdr, vlanhdr)) ++ return -EINVAL; + vlan_hdr = (struct hsr_vlan_ethhdr *)ethhdr; + proto = vlan_hdr->vlanhdr.h_vlan_encapsulated_proto; + /* FIXME: */ +diff --git a/net/ieee802154/socket.c b/net/ieee802154/socket.c +index 990a83455dcfb5..18d267921bb531 100644 +--- a/net/ieee802154/socket.c ++++ b/net/ieee802154/socket.c +@@ -1043,19 +1043,21 @@ static int ieee802154_create(struct net *net, struct socket *sock, + + if (sk->sk_prot->hash) { + rc = sk->sk_prot->hash(sk); +- if (rc) { +- sk_common_release(sk); +- goto out; +- } ++ if (rc) ++ goto out_sk_release; + } + + if (sk->sk_prot->init) { + rc = sk->sk_prot->init(sk); + if (rc) +- sk_common_release(sk); ++ goto out_sk_release; + } + out: + return rc; ++out_sk_release: ++ sk_common_release(sk); ++ sock->sk = NULL; ++ goto out; + } + + static const struct net_proto_family ieee802154_family_ops = { +diff --git a/net/ipv4/af_inet.c b/net/ipv4/af_inet.c +index b24d74616637a0..8095e82de8083d 100644 +--- a/net/ipv4/af_inet.c ++++ b/net/ipv4/af_inet.c +@@ -376,32 +376,30 @@ static int inet_create(struct net *net, struct socket *sock, int protocol, + inet->inet_sport = htons(inet->inet_num); + /* Add to protocol hash chains. */ + err = sk->sk_prot->hash(sk); +- if (err) { +- sk_common_release(sk); +- goto out; +- } ++ if (err) ++ goto out_sk_release; + } + + if (sk->sk_prot->init) { + err = sk->sk_prot->init(sk); +- if (err) { +- sk_common_release(sk); +- goto out; +- } ++ if (err) ++ goto out_sk_release; + } + + if (!kern) { + err = BPF_CGROUP_RUN_PROG_INET_SOCK(sk); +- if (err) { +- sk_common_release(sk); +- goto out; +- } ++ if (err) ++ goto out_sk_release; + } + out: + return err; + out_rcu_unlock: + rcu_read_unlock(); + goto out; ++out_sk_release: ++ sk_common_release(sk); ++ sock->sk = NULL; ++ goto out; + } + + +diff --git a/net/ipv4/icmp.c b/net/ipv4/icmp.c +index e1384e7331d82f..c3ad41573b33ea 100644 +--- a/net/ipv4/icmp.c ++++ b/net/ipv4/icmp.c +@@ -519,6 +519,9 @@ static struct rtable *icmp_route_lookup(struct net *net, + if (!IS_ERR(dst)) { + if (rt != rt2) + return rt; ++ if (inet_addr_type_dev_table(net, route_lookup_dev, ++ fl4->daddr) == RTN_LOCAL) ++ return rt; + } else if (PTR_ERR(dst) == -EPERM) { + rt = NULL; + } else { +diff --git a/net/ipv4/tcp_ao.c b/net/ipv4/tcp_ao.c +index db6516092daf5b..bbb8d5f0eae7d3 100644 +--- a/net/ipv4/tcp_ao.c ++++ b/net/ipv4/tcp_ao.c +@@ -109,12 +109,13 @@ bool tcp_ao_ignore_icmp(const struct sock *sk, int family, int type, int code) + * it's known that the keys in ao_info are matching peer's + * family/address/VRF/etc. + */ +-struct tcp_ao_key *tcp_ao_established_key(struct tcp_ao_info *ao, ++struct tcp_ao_key *tcp_ao_established_key(const struct sock *sk, ++ struct tcp_ao_info *ao, + int sndid, int rcvid) + { + struct tcp_ao_key *key; + +- hlist_for_each_entry_rcu(key, &ao->head, node) { ++ hlist_for_each_entry_rcu(key, &ao->head, node, lockdep_sock_is_held(sk)) { + if ((sndid >= 0 && key->sndid != sndid) || + (rcvid >= 0 && key->rcvid != rcvid)) + continue; +@@ -205,7 +206,7 @@ static struct tcp_ao_key *__tcp_ao_do_lookup(const struct sock *sk, int l3index, + if (!ao) + return NULL; + +- hlist_for_each_entry_rcu(key, &ao->head, node) { ++ hlist_for_each_entry_rcu(key, &ao->head, node, lockdep_sock_is_held(sk)) { + u8 prefixlen = min(prefix, key->prefixlen); + + if (!tcp_ao_key_cmp(key, l3index, addr, prefixlen, +@@ -793,7 +794,7 @@ int tcp_ao_prepare_reset(const struct sock *sk, struct sk_buff *skb, + if (!ao_info) + return -ENOENT; + +- *key = tcp_ao_established_key(ao_info, aoh->rnext_keyid, -1); ++ *key = tcp_ao_established_key(sk, ao_info, aoh->rnext_keyid, -1); + if (!*key) + return -ENOENT; + *traffic_key = snd_other_key(*key); +@@ -979,7 +980,7 @@ tcp_inbound_ao_hash(struct sock *sk, const struct sk_buff *skb, + */ + key = READ_ONCE(info->rnext_key); + if (key->rcvid != aoh->keyid) { +- key = tcp_ao_established_key(info, -1, aoh->keyid); ++ key = tcp_ao_established_key(sk, info, -1, aoh->keyid); + if (!key) + goto key_not_found; + } +@@ -1003,7 +1004,7 @@ tcp_inbound_ao_hash(struct sock *sk, const struct sk_buff *skb, + aoh->rnext_keyid, + tcp_ao_hdr_maclen(aoh)); + /* If the key is not found we do nothing. */ +- key = tcp_ao_established_key(info, aoh->rnext_keyid, -1); ++ key = tcp_ao_established_key(sk, info, aoh->rnext_keyid, -1); + if (key) + /* pairs with tcp_ao_del_cmd */ + WRITE_ONCE(info->current_key, key); +@@ -1163,7 +1164,7 @@ void tcp_ao_established(struct sock *sk) + if (!ao) + return; + +- hlist_for_each_entry_rcu(key, &ao->head, node) ++ hlist_for_each_entry_rcu(key, &ao->head, node, lockdep_sock_is_held(sk)) + tcp_ao_cache_traffic_keys(sk, ao, key); + } + +@@ -1180,7 +1181,7 @@ void tcp_ao_finish_connect(struct sock *sk, struct sk_buff *skb) + WRITE_ONCE(ao->risn, tcp_hdr(skb)->seq); + ao->rcv_sne = 0; + +- hlist_for_each_entry_rcu(key, &ao->head, node) ++ hlist_for_each_entry_rcu(key, &ao->head, node, lockdep_sock_is_held(sk)) + tcp_ao_cache_traffic_keys(sk, ao, key); + } + +@@ -1256,14 +1257,14 @@ int tcp_ao_copy_all_matching(const struct sock *sk, struct sock *newsk, + key_head = rcu_dereference(hlist_first_rcu(&new_ao->head)); + first_key = hlist_entry_safe(key_head, struct tcp_ao_key, node); + +- key = tcp_ao_established_key(new_ao, tcp_rsk(req)->ao_keyid, -1); ++ key = tcp_ao_established_key(req_to_sk(req), new_ao, tcp_rsk(req)->ao_keyid, -1); + if (key) + new_ao->current_key = key; + else + new_ao->current_key = first_key; + + /* set rnext_key */ +- key = tcp_ao_established_key(new_ao, -1, tcp_rsk(req)->ao_rcv_next); ++ key = tcp_ao_established_key(req_to_sk(req), new_ao, -1, tcp_rsk(req)->ao_rcv_next); + if (key) + new_ao->rnext_key = key; + else +@@ -1857,12 +1858,12 @@ static int tcp_ao_del_cmd(struct sock *sk, unsigned short int family, + * if there's any. + */ + if (cmd.set_current) { +- new_current = tcp_ao_established_key(ao_info, cmd.current_key, -1); ++ new_current = tcp_ao_established_key(sk, ao_info, cmd.current_key, -1); + if (!new_current) + return -ENOENT; + } + if (cmd.set_rnext) { +- new_rnext = tcp_ao_established_key(ao_info, -1, cmd.rnext); ++ new_rnext = tcp_ao_established_key(sk, ao_info, -1, cmd.rnext); + if (!new_rnext) + return -ENOENT; + } +@@ -1902,7 +1903,8 @@ static int tcp_ao_del_cmd(struct sock *sk, unsigned short int family, + * "It is presumed that an MKT affecting a particular + * connection cannot be destroyed during an active connection" + */ +- hlist_for_each_entry_rcu(key, &ao_info->head, node) { ++ hlist_for_each_entry_rcu(key, &ao_info->head, node, ++ lockdep_sock_is_held(sk)) { + if (cmd.sndid != key->sndid || + cmd.rcvid != key->rcvid) + continue; +@@ -2000,14 +2002,14 @@ static int tcp_ao_info_cmd(struct sock *sk, unsigned short int family, + * if there's any. + */ + if (cmd.set_current) { +- new_current = tcp_ao_established_key(ao_info, cmd.current_key, -1); ++ new_current = tcp_ao_established_key(sk, ao_info, cmd.current_key, -1); + if (!new_current) { + err = -ENOENT; + goto out; + } + } + if (cmd.set_rnext) { +- new_rnext = tcp_ao_established_key(ao_info, -1, cmd.rnext); ++ new_rnext = tcp_ao_established_key(sk, ao_info, -1, cmd.rnext); + if (!new_rnext) { + err = -ENOENT; + goto out; +@@ -2101,7 +2103,8 @@ int tcp_v4_parse_ao(struct sock *sk, int cmd, sockptr_t optval, int optlen) + * The layout of the fields in the user and kernel structures is expected to + * be the same (including in the 32bit vs 64bit case). + */ +-static int tcp_ao_copy_mkts_to_user(struct tcp_ao_info *ao_info, ++static int tcp_ao_copy_mkts_to_user(const struct sock *sk, ++ struct tcp_ao_info *ao_info, + sockptr_t optval, sockptr_t optlen) + { + struct tcp_ao_getsockopt opt_in, opt_out; +@@ -2229,7 +2232,8 @@ static int tcp_ao_copy_mkts_to_user(struct tcp_ao_info *ao_info, + /* May change in RX, while we're dumping, pre-fetch it */ + current_key = READ_ONCE(ao_info->current_key); + +- hlist_for_each_entry_rcu(key, &ao_info->head, node) { ++ hlist_for_each_entry_rcu(key, &ao_info->head, node, ++ lockdep_sock_is_held(sk)) { + if (opt_in.get_all) + goto match; + +@@ -2309,7 +2313,7 @@ int tcp_ao_get_mkts(struct sock *sk, sockptr_t optval, sockptr_t optlen) + if (!ao_info) + return -ENOENT; + +- return tcp_ao_copy_mkts_to_user(ao_info, optval, optlen); ++ return tcp_ao_copy_mkts_to_user(sk, ao_info, optval, optlen); + } + + int tcp_ao_get_sock_info(struct sock *sk, sockptr_t optval, sockptr_t optlen) +@@ -2396,7 +2400,7 @@ int tcp_ao_set_repair(struct sock *sk, sockptr_t optval, unsigned int optlen) + WRITE_ONCE(ao->snd_sne, cmd.snd_sne); + WRITE_ONCE(ao->rcv_sne, cmd.rcv_sne); + +- hlist_for_each_entry_rcu(key, &ao->head, node) ++ hlist_for_each_entry_rcu(key, &ao->head, node, lockdep_sock_is_held(sk)) + tcp_ao_cache_traffic_keys(sk, ao, key); + + return 0; +diff --git a/net/ipv4/tcp_bpf.c b/net/ipv4/tcp_bpf.c +index 370993c03d3136..99cef92e6290cf 100644 +--- a/net/ipv4/tcp_bpf.c ++++ b/net/ipv4/tcp_bpf.c +@@ -441,7 +441,6 @@ static int tcp_bpf_send_verdict(struct sock *sk, struct sk_psock *psock, + cork = true; + psock->cork = NULL; + } +- sk_msg_return(sk, msg, tosend); + release_sock(sk); + + origsize = msg->sg.size; +@@ -453,8 +452,9 @@ static int tcp_bpf_send_verdict(struct sock *sk, struct sk_psock *psock, + sock_put(sk_redir); + + lock_sock(sk); ++ sk_mem_uncharge(sk, sent); + if (unlikely(ret < 0)) { +- int free = sk_msg_free_nocharge(sk, msg); ++ int free = sk_msg_free(sk, msg); + + if (!cork) + *copied -= free; +@@ -468,7 +468,7 @@ static int tcp_bpf_send_verdict(struct sock *sk, struct sk_psock *psock, + break; + case __SK_DROP: + default: +- sk_msg_free_partial(sk, msg, tosend); ++ sk_msg_free(sk, msg); + sk_msg_apply_bytes(psock, tosend); + *copied -= (tosend + delta); + return -EACCES; +@@ -484,11 +484,8 @@ static int tcp_bpf_send_verdict(struct sock *sk, struct sk_psock *psock, + } + if (msg && + msg->sg.data[msg->sg.start].page_link && +- msg->sg.data[msg->sg.start].length) { +- if (eval == __SK_REDIRECT) +- sk_mem_charge(sk, tosend - sent); ++ msg->sg.data[msg->sg.start].length) + goto more_data; +- } + } + return ret; + } +diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c +index 5afe5e57c89b5c..a7cd433a54c9ae 100644 +--- a/net/ipv4/tcp_ipv4.c ++++ b/net/ipv4/tcp_ipv4.c +@@ -1053,7 +1053,8 @@ static void tcp_v4_timewait_ack(struct sock *sk, struct sk_buff *skb) + } + + if (aoh) +- key.ao_key = tcp_ao_established_key(ao_info, aoh->rnext_keyid, -1); ++ key.ao_key = tcp_ao_established_key(sk, ao_info, ++ aoh->rnext_keyid, -1); + } + } + if (key.ao_key) { +diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c +index 2849b273b13107..ff85242720a0a9 100644 +--- a/net/ipv4/udp.c ++++ b/net/ipv4/udp.c +@@ -1516,7 +1516,6 @@ int __udp_enqueue_schedule_skb(struct sock *sk, struct sk_buff *skb) + struct sk_buff_head *list = &sk->sk_receive_queue; + int rmem, err = -ENOMEM; + spinlock_t *busy = NULL; +- bool becomes_readable; + int size, rcvbuf; + + /* Immediately drop when the receive queue is full. +@@ -1557,19 +1556,12 @@ int __udp_enqueue_schedule_skb(struct sock *sk, struct sk_buff *skb) + */ + sock_skb_set_dropcount(sk, skb); + +- becomes_readable = skb_queue_empty(list); + __skb_queue_tail(list, skb); + spin_unlock(&list->lock); + +- if (!sock_flag(sk, SOCK_DEAD)) { +- if (becomes_readable || +- sk->sk_data_ready != sock_def_readable || +- READ_ONCE(sk->sk_peek_off) >= 0) +- INDIRECT_CALL_1(sk->sk_data_ready, +- sock_def_readable, sk); +- else +- sk_wake_async_rcu(sk, SOCK_WAKE_WAITD, POLL_IN); +- } ++ if (!sock_flag(sk, SOCK_DEAD)) ++ INDIRECT_CALL_1(sk->sk_data_ready, sock_def_readable, sk); ++ + busylock_release(busy); + return 0; + +diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c +index 01115e1a34cb66..f7c17388ff6aaf 100644 +--- a/net/ipv6/addrconf.c ++++ b/net/ipv6/addrconf.c +@@ -4821,7 +4821,7 @@ inet6_rtm_deladdr(struct sk_buff *skb, struct nlmsghdr *nlh, + ifm->ifa_prefixlen, extack); + } + +-static int modify_prefix_route(struct inet6_ifaddr *ifp, ++static int modify_prefix_route(struct net *net, struct inet6_ifaddr *ifp, + unsigned long expires, u32 flags, + bool modify_peer) + { +@@ -4845,7 +4845,9 @@ static int modify_prefix_route(struct inet6_ifaddr *ifp, + ifp->prefix_len, + ifp->rt_priority, ifp->idev->dev, + expires, flags, GFP_KERNEL); +- } else { ++ return 0; ++ } ++ if (f6i != net->ipv6.fib6_null_entry) { + table = f6i->fib6_table; + spin_lock_bh(&table->tb6_lock); + +@@ -4858,9 +4860,8 @@ static int modify_prefix_route(struct inet6_ifaddr *ifp, + } + + spin_unlock_bh(&table->tb6_lock); +- +- fib6_info_release(f6i); + } ++ fib6_info_release(f6i); + + return 0; + } +@@ -4939,7 +4940,7 @@ static int inet6_addr_modify(struct net *net, struct inet6_ifaddr *ifp, + int rc = -ENOENT; + + if (had_prefixroute) +- rc = modify_prefix_route(ifp, expires, flags, false); ++ rc = modify_prefix_route(net, ifp, expires, flags, false); + + /* prefix route could have been deleted; if so restore it */ + if (rc == -ENOENT) { +@@ -4949,7 +4950,7 @@ static int inet6_addr_modify(struct net *net, struct inet6_ifaddr *ifp, + } + + if (had_prefixroute && !ipv6_addr_any(&ifp->peer_addr)) +- rc = modify_prefix_route(ifp, expires, flags, true); ++ rc = modify_prefix_route(net, ifp, expires, flags, true); + + if (rc == -ENOENT && !ipv6_addr_any(&ifp->peer_addr)) { + addrconf_prefix_route(&ifp->peer_addr, ifp->prefix_len, +diff --git a/net/ipv6/af_inet6.c b/net/ipv6/af_inet6.c +index ba69b86f1c7d5e..f60ec8b0f8ea40 100644 +--- a/net/ipv6/af_inet6.c ++++ b/net/ipv6/af_inet6.c +@@ -252,31 +252,29 @@ static int inet6_create(struct net *net, struct socket *sock, int protocol, + */ + inet->inet_sport = htons(inet->inet_num); + err = sk->sk_prot->hash(sk); +- if (err) { +- sk_common_release(sk); +- goto out; +- } ++ if (err) ++ goto out_sk_release; + } + if (sk->sk_prot->init) { + err = sk->sk_prot->init(sk); +- if (err) { +- sk_common_release(sk); +- goto out; +- } ++ if (err) ++ goto out_sk_release; + } + + if (!kern) { + err = BPF_CGROUP_RUN_PROG_INET_SOCK(sk); +- if (err) { +- sk_common_release(sk); +- goto out; +- } ++ if (err) ++ goto out_sk_release; + } + out: + return err; + out_rcu_unlock: + rcu_read_unlock(); + goto out; ++out_sk_release: ++ sk_common_release(sk); ++ sock->sk = NULL; ++ goto out; + } + + static int __inet6_bind(struct sock *sk, struct sockaddr *uaddr, int addr_len, +diff --git a/net/ipv6/route.c b/net/ipv6/route.c +index cff4fbbc66efb2..8ebfed5d63232e 100644 +--- a/net/ipv6/route.c ++++ b/net/ipv6/route.c +@@ -2780,10 +2780,10 @@ static void ip6_negative_advice(struct sock *sk, + if (rt->rt6i_flags & RTF_CACHE) { + rcu_read_lock(); + if (rt6_check_expired(rt)) { +- /* counteract the dst_release() in sk_dst_reset() */ +- dst_hold(dst); ++ /* rt/dst can not be destroyed yet, ++ * because of rcu_read_lock() ++ */ + sk_dst_reset(sk); +- + rt6_remove_exception_rt(rt); + } + rcu_read_unlock(); +diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c +index c9de5ef8f26750..59173f58ce9923 100644 +--- a/net/ipv6/tcp_ipv6.c ++++ b/net/ipv6/tcp_ipv6.c +@@ -1169,8 +1169,8 @@ static void tcp_v6_timewait_ack(struct sock *sk, struct sk_buff *skb) + if (tcp_parse_auth_options(tcp_hdr(skb), NULL, &aoh)) + goto out; + if (aoh) +- key.ao_key = tcp_ao_established_key(ao_info, +- aoh->rnext_keyid, -1); ++ key.ao_key = tcp_ao_established_key(sk, ao_info, ++ aoh->rnext_keyid, -1); + } + } + if (key.ao_key) { +diff --git a/net/mptcp/diag.c b/net/mptcp/diag.c +index 2d3efb405437d8..02205f7994d752 100644 +--- a/net/mptcp/diag.c ++++ b/net/mptcp/diag.c +@@ -47,7 +47,7 @@ static int subflow_get_info(struct sock *sk, struct sk_buff *skb) + flags |= MPTCP_SUBFLOW_FLAG_BKUP_REM; + if (sf->request_bkup) + flags |= MPTCP_SUBFLOW_FLAG_BKUP_LOC; +- if (sf->fully_established) ++ if (READ_ONCE(sf->fully_established)) + flags |= MPTCP_SUBFLOW_FLAG_FULLY_ESTABLISHED; + if (sf->conn_finished) + flags |= MPTCP_SUBFLOW_FLAG_CONNECTED; +diff --git a/net/mptcp/options.c b/net/mptcp/options.c +index 370c3836b7712f..1603b3702e2207 100644 +--- a/net/mptcp/options.c ++++ b/net/mptcp/options.c +@@ -461,7 +461,7 @@ static bool mptcp_established_options_mp(struct sock *sk, struct sk_buff *skb, + return false; + + /* MPC/MPJ needed only on 3rd ack packet, DATA_FIN and TCP shutdown take precedence */ +- if (subflow->fully_established || snd_data_fin_enable || ++ if (READ_ONCE(subflow->fully_established) || snd_data_fin_enable || + subflow->snd_isn != TCP_SKB_CB(skb)->seq || + sk->sk_state != TCP_ESTABLISHED) + return false; +@@ -930,7 +930,7 @@ static bool check_fully_established(struct mptcp_sock *msk, struct sock *ssk, + /* here we can process OoO, in-window pkts, only in-sequence 4th ack + * will make the subflow fully established + */ +- if (likely(subflow->fully_established)) { ++ if (likely(READ_ONCE(subflow->fully_established))) { + /* on passive sockets, check for 3rd ack retransmission + * note that msk is always set by subflow_syn_recv_sock() + * for mp_join subflows +diff --git a/net/mptcp/protocol.c b/net/mptcp/protocol.c +index 48d480982b7870..8a8e8fee337f5e 100644 +--- a/net/mptcp/protocol.c ++++ b/net/mptcp/protocol.c +@@ -2728,8 +2728,8 @@ void mptcp_reset_tout_timer(struct mptcp_sock *msk, unsigned long fail_tout) + if (!fail_tout && !inet_csk(sk)->icsk_mtup.probe_timestamp) + return; + +- close_timeout = inet_csk(sk)->icsk_mtup.probe_timestamp - tcp_jiffies32 + jiffies + +- mptcp_close_timeout(sk); ++ close_timeout = (unsigned long)inet_csk(sk)->icsk_mtup.probe_timestamp - ++ tcp_jiffies32 + jiffies + mptcp_close_timeout(sk); + + /* the close timeout takes precedence on the fail one, and here at least one of + * them is active +@@ -3519,7 +3519,7 @@ static void schedule_3rdack_retransmission(struct sock *ssk) + struct tcp_sock *tp = tcp_sk(ssk); + unsigned long timeout; + +- if (mptcp_subflow_ctx(ssk)->fully_established) ++ if (READ_ONCE(mptcp_subflow_ctx(ssk)->fully_established)) + return; + + /* reschedule with a timeout above RTT, as we must look only for drop */ +diff --git a/net/mptcp/protocol.h b/net/mptcp/protocol.h +index 568a72702b080d..a93e661ef5c435 100644 +--- a/net/mptcp/protocol.h ++++ b/net/mptcp/protocol.h +@@ -513,7 +513,6 @@ struct mptcp_subflow_context { + request_bkup : 1, + mp_capable : 1, /* remote is MPTCP capable */ + mp_join : 1, /* remote is JOINing */ +- fully_established : 1, /* path validated */ + pm_notified : 1, /* PM hook called for established status */ + conn_finished : 1, + map_valid : 1, +@@ -532,10 +531,11 @@ struct mptcp_subflow_context { + is_mptfo : 1, /* subflow is doing TFO */ + close_event_done : 1, /* has done the post-closed part */ + mpc_drop : 1, /* the MPC option has been dropped in a rtx */ +- __unused : 8; ++ __unused : 9; + bool data_avail; + bool scheduled; + bool pm_listener; /* a listener managed by the kernel PM? */ ++ bool fully_established; /* path validated */ + u32 remote_nonce; + u64 thmac; + u32 local_nonce; +@@ -780,7 +780,7 @@ static inline bool __tcp_can_send(const struct sock *ssk) + static inline bool __mptcp_subflow_active(struct mptcp_subflow_context *subflow) + { + /* can't send if JOIN hasn't completed yet (i.e. is usable for mptcp) */ +- if (subflow->request_join && !subflow->fully_established) ++ if (subflow->request_join && !READ_ONCE(subflow->fully_established)) + return false; + + return __tcp_can_send(mptcp_subflow_tcp_sock(subflow)); +diff --git a/net/mptcp/subflow.c b/net/mptcp/subflow.c +index 6170f2fff71e4f..860903e0642255 100644 +--- a/net/mptcp/subflow.c ++++ b/net/mptcp/subflow.c +@@ -800,7 +800,7 @@ void __mptcp_subflow_fully_established(struct mptcp_sock *msk, + const struct mptcp_options_received *mp_opt) + { + subflow_set_remote_key(msk, subflow, mp_opt); +- subflow->fully_established = 1; ++ WRITE_ONCE(subflow->fully_established, true); + WRITE_ONCE(msk->fully_established, true); + + if (subflow->is_mptfo) +@@ -2062,7 +2062,7 @@ static void subflow_ulp_clone(const struct request_sock *req, + } else if (subflow_req->mp_join) { + new_ctx->ssn_offset = subflow_req->ssn_offset; + new_ctx->mp_join = 1; +- new_ctx->fully_established = 1; ++ WRITE_ONCE(new_ctx->fully_established, true); + new_ctx->remote_key_valid = 1; + new_ctx->backup = subflow_req->backup; + new_ctx->request_bkup = subflow_req->request_bkup; +diff --git a/net/netfilter/ipset/ip_set_core.c b/net/netfilter/ipset/ip_set_core.c +index 61431690cbd5f1..cc20e6d56807c6 100644 +--- a/net/netfilter/ipset/ip_set_core.c ++++ b/net/netfilter/ipset/ip_set_core.c +@@ -104,14 +104,19 @@ find_set_type(const char *name, u8 family, u8 revision) + static bool + load_settype(const char *name) + { ++ if (!try_module_get(THIS_MODULE)) ++ return false; ++ + nfnl_unlock(NFNL_SUBSYS_IPSET); + pr_debug("try to load ip_set_%s\n", name); + if (request_module("ip_set_%s", name) < 0) { + pr_warn("Can't find ip_set type %s\n", name); + nfnl_lock(NFNL_SUBSYS_IPSET); ++ module_put(THIS_MODULE); + return false; + } + nfnl_lock(NFNL_SUBSYS_IPSET); ++ module_put(THIS_MODULE); + return true; + } + +diff --git a/net/netfilter/ipvs/ip_vs_proto.c b/net/netfilter/ipvs/ip_vs_proto.c +index f100da4ba3bc3c..a9fd1d3fc2cbfe 100644 +--- a/net/netfilter/ipvs/ip_vs_proto.c ++++ b/net/netfilter/ipvs/ip_vs_proto.c +@@ -340,7 +340,7 @@ void __net_exit ip_vs_protocol_net_cleanup(struct netns_ipvs *ipvs) + + int __init ip_vs_protocol_init(void) + { +- char protocols[64]; ++ char protocols[64] = { 0 }; + #define REGISTER_PROTOCOL(p) \ + do { \ + register_ip_vs_protocol(p); \ +@@ -348,8 +348,6 @@ int __init ip_vs_protocol_init(void) + strcat(protocols, (p)->name); \ + } while (0) + +- protocols[0] = '\0'; +- protocols[2] = '\0'; + #ifdef CONFIG_IP_VS_PROTO_TCP + REGISTER_PROTOCOL(&ip_vs_protocol_tcp); + #endif +diff --git a/net/netfilter/nft_inner.c b/net/netfilter/nft_inner.c +index 928312d01eb1d6..817ab978d24a19 100644 +--- a/net/netfilter/nft_inner.c ++++ b/net/netfilter/nft_inner.c +@@ -210,35 +210,66 @@ static int nft_inner_parse(const struct nft_inner *priv, + struct nft_pktinfo *pkt, + struct nft_inner_tun_ctx *tun_ctx) + { +- struct nft_inner_tun_ctx ctx = {}; + u32 off = pkt->inneroff; + + if (priv->flags & NFT_INNER_HDRSIZE && +- nft_inner_parse_tunhdr(priv, pkt, &ctx, &off) < 0) ++ nft_inner_parse_tunhdr(priv, pkt, tun_ctx, &off) < 0) + return -1; + + if (priv->flags & (NFT_INNER_LL | NFT_INNER_NH)) { +- if (nft_inner_parse_l2l3(priv, pkt, &ctx, off) < 0) ++ if (nft_inner_parse_l2l3(priv, pkt, tun_ctx, off) < 0) + return -1; + } else if (priv->flags & NFT_INNER_TH) { +- ctx.inner_thoff = off; +- ctx.flags |= NFT_PAYLOAD_CTX_INNER_TH; ++ tun_ctx->inner_thoff = off; ++ tun_ctx->flags |= NFT_PAYLOAD_CTX_INNER_TH; + } + +- *tun_ctx = ctx; + tun_ctx->type = priv->type; ++ tun_ctx->cookie = (unsigned long)pkt->skb; + pkt->flags |= NFT_PKTINFO_INNER_FULL; + + return 0; + } + ++static bool nft_inner_restore_tun_ctx(const struct nft_pktinfo *pkt, ++ struct nft_inner_tun_ctx *tun_ctx) ++{ ++ struct nft_inner_tun_ctx *this_cpu_tun_ctx; ++ ++ local_bh_disable(); ++ this_cpu_tun_ctx = this_cpu_ptr(&nft_pcpu_tun_ctx); ++ if (this_cpu_tun_ctx->cookie != (unsigned long)pkt->skb) { ++ local_bh_enable(); ++ return false; ++ } ++ *tun_ctx = *this_cpu_tun_ctx; ++ local_bh_enable(); ++ ++ return true; ++} ++ ++static void nft_inner_save_tun_ctx(const struct nft_pktinfo *pkt, ++ const struct nft_inner_tun_ctx *tun_ctx) ++{ ++ struct nft_inner_tun_ctx *this_cpu_tun_ctx; ++ ++ local_bh_disable(); ++ this_cpu_tun_ctx = this_cpu_ptr(&nft_pcpu_tun_ctx); ++ if (this_cpu_tun_ctx->cookie != tun_ctx->cookie) ++ *this_cpu_tun_ctx = *tun_ctx; ++ local_bh_enable(); ++} ++ + static bool nft_inner_parse_needed(const struct nft_inner *priv, + const struct nft_pktinfo *pkt, +- const struct nft_inner_tun_ctx *tun_ctx) ++ struct nft_inner_tun_ctx *tun_ctx) + { + if (!(pkt->flags & NFT_PKTINFO_INNER_FULL)) + return true; + ++ if (!nft_inner_restore_tun_ctx(pkt, tun_ctx)) ++ return true; ++ + if (priv->type != tun_ctx->type) + return true; + +@@ -248,27 +279,29 @@ static bool nft_inner_parse_needed(const struct nft_inner *priv, + static void nft_inner_eval(const struct nft_expr *expr, struct nft_regs *regs, + const struct nft_pktinfo *pkt) + { +- struct nft_inner_tun_ctx *tun_ctx = this_cpu_ptr(&nft_pcpu_tun_ctx); + const struct nft_inner *priv = nft_expr_priv(expr); ++ struct nft_inner_tun_ctx tun_ctx = {}; + + if (nft_payload_inner_offset(pkt) < 0) + goto err; + +- if (nft_inner_parse_needed(priv, pkt, tun_ctx) && +- nft_inner_parse(priv, (struct nft_pktinfo *)pkt, tun_ctx) < 0) ++ if (nft_inner_parse_needed(priv, pkt, &tun_ctx) && ++ nft_inner_parse(priv, (struct nft_pktinfo *)pkt, &tun_ctx) < 0) + goto err; + + switch (priv->expr_type) { + case NFT_INNER_EXPR_PAYLOAD: +- nft_payload_inner_eval((struct nft_expr *)&priv->expr, regs, pkt, tun_ctx); ++ nft_payload_inner_eval((struct nft_expr *)&priv->expr, regs, pkt, &tun_ctx); + break; + case NFT_INNER_EXPR_META: +- nft_meta_inner_eval((struct nft_expr *)&priv->expr, regs, pkt, tun_ctx); ++ nft_meta_inner_eval((struct nft_expr *)&priv->expr, regs, pkt, &tun_ctx); + break; + default: + WARN_ON_ONCE(1); + goto err; + } ++ nft_inner_save_tun_ctx(pkt, &tun_ctx); ++ + return; + err: + regs->verdict.code = NFT_BREAK; +diff --git a/net/netfilter/nft_set_hash.c b/net/netfilter/nft_set_hash.c +index daa56dda737ae2..b93f046ac7d1e1 100644 +--- a/net/netfilter/nft_set_hash.c ++++ b/net/netfilter/nft_set_hash.c +@@ -24,11 +24,13 @@ + struct nft_rhash { + struct rhashtable ht; + struct delayed_work gc_work; ++ u32 wq_gc_seq; + }; + + struct nft_rhash_elem { + struct nft_elem_priv priv; + struct rhash_head node; ++ u32 wq_gc_seq; + struct nft_set_ext ext; + }; + +@@ -338,6 +340,10 @@ static void nft_rhash_gc(struct work_struct *work) + if (!gc) + goto done; + ++ /* Elements never collected use a zero gc worker sequence number. */ ++ if (unlikely(++priv->wq_gc_seq == 0)) ++ priv->wq_gc_seq++; ++ + rhashtable_walk_enter(&priv->ht, &hti); + rhashtable_walk_start(&hti); + +@@ -355,6 +361,14 @@ static void nft_rhash_gc(struct work_struct *work) + goto try_later; + } + ++ /* rhashtable walk is unstable, already seen in this gc run? ++ * Then, skip this element. In case of (unlikely) sequence ++ * wraparound and stale element wq_gc_seq, next gc run will ++ * just find this expired element. ++ */ ++ if (he->wq_gc_seq == priv->wq_gc_seq) ++ continue; ++ + if (nft_set_elem_is_dead(&he->ext)) + goto dead_elem; + +@@ -371,6 +385,8 @@ static void nft_rhash_gc(struct work_struct *work) + if (!gc) + goto try_later; + ++ /* annotate gc sequence for this attempt. */ ++ he->wq_gc_seq = priv->wq_gc_seq; + nft_trans_gc_elem_add(gc, he); + } + +diff --git a/net/netfilter/nft_socket.c b/net/netfilter/nft_socket.c +index f5da0c1775f2e7..35d0409b009501 100644 +--- a/net/netfilter/nft_socket.c ++++ b/net/netfilter/nft_socket.c +@@ -68,7 +68,7 @@ static noinline int nft_socket_cgroup_subtree_level(void) + + cgroup_put(cgrp); + +- if (WARN_ON_ONCE(level > 255)) ++ if (level > 255) + return -ERANGE; + + if (WARN_ON_ONCE(level < 0)) +diff --git a/net/netfilter/xt_LED.c b/net/netfilter/xt_LED.c +index f7b0286d106ac1..8a80fd76fe45b2 100644 +--- a/net/netfilter/xt_LED.c ++++ b/net/netfilter/xt_LED.c +@@ -96,7 +96,9 @@ static int led_tg_check(const struct xt_tgchk_param *par) + struct xt_led_info_internal *ledinternal; + int err; + +- if (ledinfo->id[0] == '\0') ++ /* Bail out if empty string or not a string at all. */ ++ if (ledinfo->id[0] == '\0' || ++ !memchr(ledinfo->id, '\0', sizeof(ledinfo->id))) + return -EINVAL; + + mutex_lock(&xt_led_mutex); +diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c +index a705ec21425409..97774bd4b6cb11 100644 +--- a/net/packet/af_packet.c ++++ b/net/packet/af_packet.c +@@ -3421,17 +3421,17 @@ static int packet_create(struct net *net, struct socket *sock, int protocol, + if (sock->type == SOCK_PACKET) + sock->ops = &packet_ops_spkt; + ++ po = pkt_sk(sk); ++ err = packet_alloc_pending(po); ++ if (err) ++ goto out_sk_free; ++ + sock_init_data(sock, sk); + +- po = pkt_sk(sk); + init_completion(&po->skb_completion); + sk->sk_family = PF_PACKET; + po->num = proto; + +- err = packet_alloc_pending(po); +- if (err) +- goto out2; +- + packet_cached_dev_reset(po); + + sk->sk_destruct = packet_sock_destruct; +@@ -3463,7 +3463,7 @@ static int packet_create(struct net *net, struct socket *sock, int protocol, + sock_prot_inuse_add(net, &packet_proto, 1); + + return 0; +-out2: ++out_sk_free: + sk_free(sk); + out: + return err; +diff --git a/net/sched/cls_flower.c b/net/sched/cls_flower.c +index e280c27cb9f9af..1008ec8a464c93 100644 +--- a/net/sched/cls_flower.c ++++ b/net/sched/cls_flower.c +@@ -1369,7 +1369,6 @@ static int fl_set_erspan_opt(const struct nlattr *nla, struct fl_flow_key *key, + int err; + + md = (struct erspan_metadata *)&key->enc_opts.data[key->enc_opts.len]; +- memset(md, 0xff, sizeof(*md)); + md->version = 1; + + if (!depth) +@@ -1398,9 +1397,9 @@ static int fl_set_erspan_opt(const struct nlattr *nla, struct fl_flow_key *key, + NL_SET_ERR_MSG(extack, "Missing tunnel key erspan option index"); + return -EINVAL; + } ++ memset(&md->u.index, 0xff, sizeof(md->u.index)); + if (tb[TCA_FLOWER_KEY_ENC_OPT_ERSPAN_INDEX]) { + nla = tb[TCA_FLOWER_KEY_ENC_OPT_ERSPAN_INDEX]; +- memset(&md->u, 0x00, sizeof(md->u)); + md->u.index = nla_get_be32(nla); + } + } else if (md->version == 2) { +@@ -1409,10 +1408,12 @@ static int fl_set_erspan_opt(const struct nlattr *nla, struct fl_flow_key *key, + NL_SET_ERR_MSG(extack, "Missing tunnel key erspan option dir or hwid"); + return -EINVAL; + } ++ md->u.md2.dir = 1; + if (tb[TCA_FLOWER_KEY_ENC_OPT_ERSPAN_DIR]) { + nla = tb[TCA_FLOWER_KEY_ENC_OPT_ERSPAN_DIR]; + md->u.md2.dir = nla_get_u8(nla); + } ++ set_hwid(&md->u.md2, 0xff); + if (tb[TCA_FLOWER_KEY_ENC_OPT_ERSPAN_HWID]) { + nla = tb[TCA_FLOWER_KEY_ENC_OPT_ERSPAN_HWID]; + set_hwid(&md->u.md2, nla_get_u8(nla)); +diff --git a/net/sched/sch_cbs.c b/net/sched/sch_cbs.c +index 939425da18955b..8c9a0400c8622c 100644 +--- a/net/sched/sch_cbs.c ++++ b/net/sched/sch_cbs.c +@@ -310,7 +310,7 @@ static void cbs_set_port_rate(struct net_device *dev, struct cbs_sched_data *q) + { + struct ethtool_link_ksettings ecmd; + int speed = SPEED_10; +- int port_rate; ++ s64 port_rate; + int err; + + err = __ethtool_get_link_ksettings(dev, &ecmd); +diff --git a/net/sched/sch_tbf.c b/net/sched/sch_tbf.c +index f1d09183ae632d..dc26b22d53c734 100644 +--- a/net/sched/sch_tbf.c ++++ b/net/sched/sch_tbf.c +@@ -208,7 +208,7 @@ static int tbf_segment(struct sk_buff *skb, struct Qdisc *sch, + struct tbf_sched_data *q = qdisc_priv(sch); + struct sk_buff *segs, *nskb; + netdev_features_t features = netif_skb_features(skb); +- unsigned int len = 0, prev_len = qdisc_pkt_len(skb); ++ unsigned int len = 0, prev_len = qdisc_pkt_len(skb), seg_len; + int ret, nb; + + segs = skb_gso_segment(skb, features & ~NETIF_F_GSO_MASK); +@@ -219,21 +219,27 @@ static int tbf_segment(struct sk_buff *skb, struct Qdisc *sch, + nb = 0; + skb_list_walk_safe(segs, segs, nskb) { + skb_mark_not_on_list(segs); +- qdisc_skb_cb(segs)->pkt_len = segs->len; +- len += segs->len; ++ seg_len = segs->len; ++ qdisc_skb_cb(segs)->pkt_len = seg_len; + ret = qdisc_enqueue(segs, q->qdisc, to_free); + if (ret != NET_XMIT_SUCCESS) { + if (net_xmit_drop_count(ret)) + qdisc_qstats_drop(sch); + } else { + nb++; ++ len += seg_len; + } + } + sch->q.qlen += nb; +- if (nb > 1) ++ sch->qstats.backlog += len; ++ if (nb > 0) { + qdisc_tree_reduce_backlog(sch, 1 - nb, prev_len - len); +- consume_skb(skb); +- return nb > 0 ? NET_XMIT_SUCCESS : NET_XMIT_DROP; ++ consume_skb(skb); ++ return NET_XMIT_SUCCESS; ++ } ++ ++ kfree_skb(skb); ++ return NET_XMIT_DROP; + } + + static int tbf_enqueue(struct sk_buff *skb, struct Qdisc *sch, +diff --git a/net/smc/af_smc.c b/net/smc/af_smc.c +index 9d76e902fd770f..9e6c69d18581ce 100644 +--- a/net/smc/af_smc.c ++++ b/net/smc/af_smc.c +@@ -383,6 +383,7 @@ void smc_sk_init(struct net *net, struct sock *sk, int protocol) + smc->limit_smc_hs = net->smc.limit_smc_hs; + smc->use_fallback = false; /* assume rdma capability first */ + smc->fallback_rsn = 0; ++ smc_close_init(smc); + } + + static struct sock *smc_sock_alloc(struct net *net, struct socket *sock, +@@ -1299,7 +1300,6 @@ static int smc_connect_rdma(struct smc_sock *smc, + goto connect_abort; + } + +- smc_close_init(smc); + smc_rx_init(smc); + + if (ini->first_contact_local) { +@@ -1435,7 +1435,6 @@ static int smc_connect_ism(struct smc_sock *smc, + goto connect_abort; + } + } +- smc_close_init(smc); + smc_rx_init(smc); + smc_tx_init(smc); + +@@ -1901,6 +1900,7 @@ static void smc_listen_out(struct smc_sock *new_smc) + if (tcp_sk(new_smc->clcsock->sk)->syn_smc) + atomic_dec(&lsmc->queued_smc_hs); + ++ release_sock(newsmcsk); /* lock in smc_listen_work() */ + if (lsmc->sk.sk_state == SMC_LISTEN) { + lock_sock_nested(&lsmc->sk, SINGLE_DEPTH_NESTING); + smc_accept_enqueue(&lsmc->sk, newsmcsk); +@@ -2422,6 +2422,7 @@ static void smc_listen_work(struct work_struct *work) + u8 accept_version; + int rc = 0; + ++ lock_sock(&new_smc->sk); /* release in smc_listen_out() */ + if (new_smc->listen_smc->sk.sk_state != SMC_LISTEN) + return smc_listen_out_err(new_smc); + +@@ -2479,7 +2480,6 @@ static void smc_listen_work(struct work_struct *work) + goto out_decl; + + mutex_lock(&smc_server_lgr_pending); +- smc_close_init(new_smc); + smc_rx_init(new_smc); + smc_tx_init(new_smc); + +diff --git a/net/tipc/udp_media.c b/net/tipc/udp_media.c +index 439f7553997728..b7e25e7e9933b6 100644 +--- a/net/tipc/udp_media.c ++++ b/net/tipc/udp_media.c +@@ -814,10 +814,10 @@ static void cleanup_bearer(struct work_struct *work) + kfree_rcu(rcast, rcu); + } + +- atomic_dec(&tipc_net(sock_net(ub->ubsock->sk))->wq_count); + dst_cache_destroy(&ub->rcast.dst_cache); + udp_tunnel_sock_release(ub->ubsock); + synchronize_net(); ++ atomic_dec(&tipc_net(sock_net(ub->ubsock->sk))->wq_count); + kfree(ub); + } + +diff --git a/net/vmw_vsock/af_vsock.c b/net/vmw_vsock/af_vsock.c +index dfd29160fe11c4..b52b798aa4c292 100644 +--- a/net/vmw_vsock/af_vsock.c ++++ b/net/vmw_vsock/af_vsock.c +@@ -117,12 +117,14 @@ + static int __vsock_bind(struct sock *sk, struct sockaddr_vm *addr); + static void vsock_sk_destruct(struct sock *sk); + static int vsock_queue_rcv_skb(struct sock *sk, struct sk_buff *skb); ++static void vsock_close(struct sock *sk, long timeout); + + /* Protocol family. */ + struct proto vsock_proto = { + .name = "AF_VSOCK", + .owner = THIS_MODULE, + .obj_size = sizeof(struct vsock_sock), ++ .close = vsock_close, + #ifdef CONFIG_BPF_SYSCALL + .psock_update_sk_prot = vsock_bpf_update_proto, + #endif +@@ -797,39 +799,37 @@ static bool sock_type_connectible(u16 type) + + static void __vsock_release(struct sock *sk, int level) + { +- if (sk) { +- struct sock *pending; +- struct vsock_sock *vsk; +- +- vsk = vsock_sk(sk); +- pending = NULL; /* Compiler warning. */ ++ struct vsock_sock *vsk; ++ struct sock *pending; + +- /* When "level" is SINGLE_DEPTH_NESTING, use the nested +- * version to avoid the warning "possible recursive locking +- * detected". When "level" is 0, lock_sock_nested(sk, level) +- * is the same as lock_sock(sk). +- */ +- lock_sock_nested(sk, level); ++ vsk = vsock_sk(sk); ++ pending = NULL; /* Compiler warning. */ + +- if (vsk->transport) +- vsk->transport->release(vsk); +- else if (sock_type_connectible(sk->sk_type)) +- vsock_remove_sock(vsk); ++ /* When "level" is SINGLE_DEPTH_NESTING, use the nested ++ * version to avoid the warning "possible recursive locking ++ * detected". When "level" is 0, lock_sock_nested(sk, level) ++ * is the same as lock_sock(sk). ++ */ ++ lock_sock_nested(sk, level); + +- sock_orphan(sk); +- sk->sk_shutdown = SHUTDOWN_MASK; ++ if (vsk->transport) ++ vsk->transport->release(vsk); ++ else if (sock_type_connectible(sk->sk_type)) ++ vsock_remove_sock(vsk); + +- skb_queue_purge(&sk->sk_receive_queue); ++ sock_orphan(sk); ++ sk->sk_shutdown = SHUTDOWN_MASK; + +- /* Clean up any sockets that never were accepted. */ +- while ((pending = vsock_dequeue_accept(sk)) != NULL) { +- __vsock_release(pending, SINGLE_DEPTH_NESTING); +- sock_put(pending); +- } ++ skb_queue_purge(&sk->sk_receive_queue); + +- release_sock(sk); +- sock_put(sk); ++ /* Clean up any sockets that never were accepted. */ ++ while ((pending = vsock_dequeue_accept(sk)) != NULL) { ++ __vsock_release(pending, SINGLE_DEPTH_NESTING); ++ sock_put(pending); + } ++ ++ release_sock(sk); ++ sock_put(sk); + } + + static void vsock_sk_destruct(struct sock *sk) +@@ -901,9 +901,22 @@ void vsock_data_ready(struct sock *sk) + } + EXPORT_SYMBOL_GPL(vsock_data_ready); + ++/* Dummy callback required by sockmap. ++ * See unconditional call of saved_close() in sock_map_close(). ++ */ ++static void vsock_close(struct sock *sk, long timeout) ++{ ++} ++ + static int vsock_release(struct socket *sock) + { +- __vsock_release(sock->sk, 0); ++ struct sock *sk = sock->sk; ++ ++ if (!sk) ++ return 0; ++ ++ sk->sk_prot->close(sk, 0); ++ __vsock_release(sk, 0); + sock->sk = NULL; + sock->state = SS_FREE; + +@@ -1054,6 +1067,9 @@ static __poll_t vsock_poll(struct file *file, struct socket *sock, + mask |= EPOLLRDHUP; + } + ++ if (sk_is_readable(sk)) ++ mask |= EPOLLIN | EPOLLRDNORM; ++ + if (sock->type == SOCK_DGRAM) { + /* For datagram sockets we can read if there is something in + * the queue and write as long as the socket isn't shutdown for +diff --git a/net/xdp/xsk_buff_pool.c b/net/xdp/xsk_buff_pool.c +index 521a2938e50a12..0662d34b09ee78 100644 +--- a/net/xdp/xsk_buff_pool.c ++++ b/net/xdp/xsk_buff_pool.c +@@ -387,10 +387,9 @@ void xp_dma_unmap(struct xsk_buff_pool *pool, unsigned long attrs) + return; + } + +- if (!refcount_dec_and_test(&dma_map->users)) +- return; ++ if (refcount_dec_and_test(&dma_map->users)) ++ __xp_dma_unmap(dma_map, attrs); + +- __xp_dma_unmap(dma_map, attrs); + kvfree(pool->dma_pages); + pool->dma_pages = NULL; + pool->dma_pages_cnt = 0; +diff --git a/net/xdp/xskmap.c b/net/xdp/xskmap.c +index e1c526f97ce31f..afa457506274c1 100644 +--- a/net/xdp/xskmap.c ++++ b/net/xdp/xskmap.c +@@ -224,7 +224,7 @@ static long xsk_map_delete_elem(struct bpf_map *map, void *key) + struct xsk_map *m = container_of(map, struct xsk_map, map); + struct xdp_sock __rcu **map_entry; + struct xdp_sock *old_xs; +- int k = *(u32 *)key; ++ u32 k = *(u32 *)key; + + if (k >= map->max_entries) + return -EINVAL; +diff --git a/rust/kernel/lib.rs b/rust/kernel/lib.rs +index 032c9089e6862d..e936254531fd0a 100644 +--- a/rust/kernel/lib.rs ++++ b/rust/kernel/lib.rs +@@ -12,10 +12,10 @@ + //! do so first instead of bypassing this crate. + + #![no_std] ++#![feature(arbitrary_self_types)] + #![feature(coerce_unsized)] + #![feature(dispatch_from_dyn)] + #![feature(new_uninit)] +-#![feature(receiver_trait)] + #![feature(unsize)] + + // Ensure conditional compilation based on the kernel configuration works; +diff --git a/rust/kernel/list/arc.rs b/rust/kernel/list/arc.rs +index d801b9dc6291db..3483d8c232c4f1 100644 +--- a/rust/kernel/list/arc.rs ++++ b/rust/kernel/list/arc.rs +@@ -441,9 +441,6 @@ fn as_ref(&self) -> &Arc { + } + } + +-// This is to allow [`ListArc`] (and variants) to be used as the type of `self`. +-impl core::ops::Receiver for ListArc where T: ListArcSafe + ?Sized {} +- + // This is to allow coercion from `ListArc` to `ListArc` if `T` can be converted to the + // dynamically-sized type (DST) `U`. + impl core::ops::CoerceUnsized> for ListArc +diff --git a/rust/kernel/sync/arc.rs b/rust/kernel/sync/arc.rs +index 3021f30fd822f6..28743a7c74a847 100644 +--- a/rust/kernel/sync/arc.rs ++++ b/rust/kernel/sync/arc.rs +@@ -171,9 +171,6 @@ unsafe fn container_of(ptr: *const T) -> NonNull> { + } + } + +-// This is to allow [`Arc`] (and variants) to be used as the type of `self`. +-impl core::ops::Receiver for Arc {} +- + // This is to allow coercion from `Arc` to `Arc` if `T` can be converted to the + // dynamically-sized type (DST) `U`. + impl, U: ?Sized> core::ops::CoerceUnsized> for Arc {} +@@ -480,9 +477,6 @@ pub struct ArcBorrow<'a, T: ?Sized + 'a> { + _p: PhantomData<&'a ()>, + } + +-// This is to allow [`ArcBorrow`] (and variants) to be used as the type of `self`. +-impl core::ops::Receiver for ArcBorrow<'_, T> {} +- + // This is to allow `ArcBorrow` to be dispatched on when `ArcBorrow` can be coerced into + // `ArcBorrow`. + impl, U: ?Sized> core::ops::DispatchFromDyn> +diff --git a/samples/bpf/test_cgrp2_sock.c b/samples/bpf/test_cgrp2_sock.c +index a0811df888f453..8ca2a445ffa155 100644 +--- a/samples/bpf/test_cgrp2_sock.c ++++ b/samples/bpf/test_cgrp2_sock.c +@@ -178,8 +178,10 @@ static int show_sockopts(int family) + return 1; + } + +- if (get_bind_to_device(sd, name, sizeof(name)) < 0) ++ if (get_bind_to_device(sd, name, sizeof(name)) < 0) { ++ close(sd); + return 1; ++ } + + mark = get_somark(sd); + prio = get_priority(sd); +diff --git a/scripts/Makefile.build b/scripts/Makefile.build +index 8f423a1faf5077..880785b52c04ad 100644 +--- a/scripts/Makefile.build ++++ b/scripts/Makefile.build +@@ -248,7 +248,7 @@ $(obj)/%.lst: $(obj)/%.c FORCE + # Compile Rust sources (.rs) + # --------------------------------------------------------------------------- + +-rust_allowed_features := new_uninit ++rust_allowed_features := arbitrary_self_types,new_uninit + + # `--out-dir` is required to avoid temporaries being created by `rustc` in the + # current working directory, which may be not accessible in the out-of-tree +diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c +index 107393a8c48a59..971eda0c6ba737 100644 +--- a/scripts/mod/modpost.c ++++ b/scripts/mod/modpost.c +@@ -785,7 +785,7 @@ static void check_section(const char *modname, struct elf_info *elf, + ".ltext", ".ltext.*" + #define OTHER_TEXT_SECTIONS ".ref.text", ".head.text", ".spinlock.text", \ + ".fixup", ".entry.text", ".exception.text", \ +- ".coldtext", ".softirqentry.text" ++ ".coldtext", ".softirqentry.text", ".irqentry.text" + + #define ALL_TEXT_SECTIONS ".init.text", ".exit.text", \ + TEXT_SECTIONS, OTHER_TEXT_SECTIONS +diff --git a/scripts/setlocalversion b/scripts/setlocalversion +index 38b96c6797f408..5818465abba984 100755 +--- a/scripts/setlocalversion ++++ b/scripts/setlocalversion +@@ -30,6 +30,27 @@ if test $# -gt 0 -o ! -d "$srctree"; then + usage + fi + ++try_tag() { ++ tag="$1" ++ ++ # Is $tag an annotated tag? ++ [ "$(git cat-file -t "$tag" 2> /dev/null)" = tag ] || return 1 ++ ++ # Is it an ancestor of HEAD, and if so, how many commits are in $tag..HEAD? ++ # shellcheck disable=SC2046 # word splitting is the point here ++ set -- $(git rev-list --count --left-right "$tag"...HEAD 2> /dev/null) ++ ++ # $1 is 0 if and only if $tag is an ancestor of HEAD. Use ++ # string comparison, because $1 is empty if the 'git rev-list' ++ # command somehow failed. ++ [ "$1" = 0 ] || return 1 ++ ++ # $2 is the number of commits in the range $tag..HEAD, possibly 0. ++ count="$2" ++ ++ return 0 ++} ++ + scm_version() + { + local short=false +@@ -61,33 +82,33 @@ scm_version() + # stable kernel: 6.1.7 -> v6.1.7 + version_tag=v$(echo "${KERNELVERSION}" | sed -E 's/^([0-9]+\.[0-9]+)\.0(.*)$/\1\2/') + ++ # try_tag initializes count if the tag is usable. ++ count= ++ + # If a localversion* file exists, and the corresponding + # annotated tag exists and is an ancestor of HEAD, use + # it. This is the case in linux-next. +- tag=${file_localversion#-} +- desc= +- if [ -n "${tag}" ]; then +- desc=$(git describe --match=$tag 2>/dev/null) ++ if [ -n "${file_localversion#-}" ] ; then ++ try_tag "${file_localversion#-}" + fi + + # Otherwise, if a localversion* file exists, and the tag + # obtained by appending it to the tag derived from + # KERNELVERSION exists and is an ancestor of HEAD, use + # it. This is e.g. the case in linux-rt. +- if [ -z "${desc}" ] && [ -n "${file_localversion}" ]; then +- tag="${version_tag}${file_localversion}" +- desc=$(git describe --match=$tag 2>/dev/null) ++ if [ -z "${count}" ] && [ -n "${file_localversion}" ]; then ++ try_tag "${version_tag}${file_localversion}" + fi + + # Otherwise, default to the annotated tag derived from KERNELVERSION. +- if [ -z "${desc}" ]; then +- tag="${version_tag}" +- desc=$(git describe --match=$tag 2>/dev/null) ++ if [ -z "${count}" ]; then ++ try_tag "${version_tag}" + fi + +- # If we are at the tagged commit, we ignore it because the version is +- # well-defined. +- if [ "${tag}" != "${desc}" ]; then ++ # If we are at the tagged commit, we ignore it because the ++ # version is well-defined. If none of the attempted tags exist ++ # or were usable, $count is still empty. ++ if [ -z "${count}" ] || [ "${count}" -gt 0 ]; then + + # If only the short version is requested, don't bother + # running further git commands +@@ -95,14 +116,15 @@ scm_version() + echo "+" + return + fi ++ + # If we are past the tagged commit, we pretty print it. + # (like 6.1.0-14595-g292a089d78d3) +- if [ -n "${desc}" ]; then +- echo "${desc}" | awk -F- '{printf("-%05d", $(NF-1))}' ++ if [ -n "${count}" ]; then ++ printf "%s%05d" "-" "${count}" + fi + + # Add -g and exactly 12 hex chars. +- printf '%s%s' -g "$(echo $head | cut -c1-12)" ++ printf '%s%.12s' -g "$head" + fi + + if ${no_dirty}; then +diff --git a/sound/core/seq/seq_ump_client.c b/sound/core/seq/seq_ump_client.c +index e5d3f4d206bf6a..e956f17f379282 100644 +--- a/sound/core/seq/seq_ump_client.c ++++ b/sound/core/seq/seq_ump_client.c +@@ -257,12 +257,12 @@ static void update_port_infos(struct seq_ump_client *client) + continue; + + old->addr.client = client->seq_client; +- old->addr.port = i; ++ old->addr.port = ump_group_to_seq_port(i); + err = snd_seq_kernel_client_ctl(client->seq_client, + SNDRV_SEQ_IOCTL_GET_PORT_INFO, + old); + if (err < 0) +- return; ++ continue; + fill_port_info(new, client, &client->ump->groups[i]); + if (old->capability == new->capability && + !strcmp(old->name, new->name)) +@@ -271,7 +271,7 @@ static void update_port_infos(struct seq_ump_client *client) + SNDRV_SEQ_IOCTL_SET_PORT_INFO, + new); + if (err < 0) +- return; ++ continue; + /* notify to system port */ + snd_seq_system_client_ev_port_change(client->seq_client, i); + } +diff --git a/sound/pci/hda/hda_auto_parser.c b/sound/pci/hda/hda_auto_parser.c +index 7c6b1fe8dfcce3..8e74be038b0fad 100644 +--- a/sound/pci/hda/hda_auto_parser.c ++++ b/sound/pci/hda/hda_auto_parser.c +@@ -956,6 +956,28 @@ void snd_hda_pick_pin_fixup(struct hda_codec *codec, + } + EXPORT_SYMBOL_GPL(snd_hda_pick_pin_fixup); + ++/* check whether the given quirk entry matches with vendor/device pair */ ++static bool hda_quirk_match(u16 vendor, u16 device, const struct hda_quirk *q) ++{ ++ if (q->subvendor != vendor) ++ return false; ++ return !q->subdevice || ++ (device & q->subdevice_mask) == q->subdevice; ++} ++ ++/* look through the quirk list and return the matching entry */ ++static const struct hda_quirk * ++hda_quirk_lookup_id(u16 vendor, u16 device, const struct hda_quirk *list) ++{ ++ const struct hda_quirk *q; ++ ++ for (q = list; q->subvendor || q->subdevice; q++) { ++ if (hda_quirk_match(vendor, device, q)) ++ return q; ++ } ++ return NULL; ++} ++ + /** + * snd_hda_pick_fixup - Pick up a fixup matching with PCI/codec SSID or model string + * @codec: the HDA codec +@@ -975,14 +997,16 @@ EXPORT_SYMBOL_GPL(snd_hda_pick_pin_fixup); + */ + void snd_hda_pick_fixup(struct hda_codec *codec, + const struct hda_model_fixup *models, +- const struct snd_pci_quirk *quirk, ++ const struct hda_quirk *quirk, + const struct hda_fixup *fixlist) + { +- const struct snd_pci_quirk *q; ++ const struct hda_quirk *q; + int id = HDA_FIXUP_ID_NOT_SET; + const char *name = NULL; + const char *type = NULL; + unsigned int vendor, device; ++ u16 pci_vendor, pci_device; ++ u16 codec_vendor, codec_device; + + if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET) + return; +@@ -1013,27 +1037,42 @@ void snd_hda_pick_fixup(struct hda_codec *codec, + if (!quirk) + return; + ++ if (codec->bus->pci) { ++ pci_vendor = codec->bus->pci->subsystem_vendor; ++ pci_device = codec->bus->pci->subsystem_device; ++ } ++ ++ codec_vendor = codec->core.subsystem_id >> 16; ++ codec_device = codec->core.subsystem_id & 0xffff; ++ + /* match with the SSID alias given by the model string "XXXX:YYYY" */ + if (codec->modelname && + sscanf(codec->modelname, "%04x:%04x", &vendor, &device) == 2) { +- q = snd_pci_quirk_lookup_id(vendor, device, quirk); ++ q = hda_quirk_lookup_id(vendor, device, quirk); + if (q) { + type = "alias SSID"; + goto found_device; + } + } + +- /* match with the PCI SSID */ +- q = snd_pci_quirk_lookup(codec->bus->pci, quirk); +- if (q) { +- type = "PCI SSID"; +- goto found_device; ++ /* match primarily with the PCI SSID */ ++ for (q = quirk; q->subvendor || q->subdevice; q++) { ++ /* if the entry is specific to codec SSID, check with it */ ++ if (!codec->bus->pci || q->match_codec_ssid) { ++ if (hda_quirk_match(codec_vendor, codec_device, q)) { ++ type = "codec SSID"; ++ goto found_device; ++ } ++ } else { ++ if (hda_quirk_match(pci_vendor, pci_device, q)) { ++ type = "PCI SSID"; ++ goto found_device; ++ } ++ } + } + + /* match with the codec SSID */ +- q = snd_pci_quirk_lookup_id(codec->core.subsystem_id >> 16, +- codec->core.subsystem_id & 0xffff, +- quirk); ++ q = hda_quirk_lookup_id(codec_vendor, codec_device, quirk); + if (q) { + type = "codec SSID"; + goto found_device; +diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h +index 53a5a62b78fa98..763f79f6f32e70 100644 +--- a/sound/pci/hda/hda_local.h ++++ b/sound/pci/hda/hda_local.h +@@ -292,6 +292,32 @@ struct hda_fixup { + } v; + }; + ++/* ++ * extended form of snd_pci_quirk: ++ * for PCI SSID matching, use SND_PCI_QUIRK() like before; ++ * for codec SSID matching, use the new HDA_CODEC_QUIRK() instead ++ */ ++struct hda_quirk { ++ unsigned short subvendor; /* PCI subvendor ID */ ++ unsigned short subdevice; /* PCI subdevice ID */ ++ unsigned short subdevice_mask; /* bitmask to match */ ++ bool match_codec_ssid; /* match only with codec SSID */ ++ int value; /* value */ ++#ifdef CONFIG_SND_DEBUG_VERBOSE ++ const char *name; /* name of the device (optional) */ ++#endif ++}; ++ ++#ifdef CONFIG_SND_DEBUG_VERBOSE ++#define HDA_CODEC_QUIRK(vend, dev, xname, val) \ ++ { _SND_PCI_QUIRK_ID(vend, dev), .value = (val), .name = (xname),\ ++ .match_codec_ssid = true } ++#else ++#define HDA_CODEC_QUIRK(vend, dev, xname, val) \ ++ { _SND_PCI_QUIRK_ID(vend, dev), .value = (val), \ ++ .match_codec_ssid = true } ++#endif ++ + struct snd_hda_pin_quirk { + unsigned int codec; /* Codec vendor/device ID */ + unsigned short subvendor; /* PCI subvendor ID */ +@@ -351,7 +377,7 @@ void snd_hda_apply_fixup(struct hda_codec *codec, int action); + void __snd_hda_apply_fixup(struct hda_codec *codec, int id, int action, int depth); + void snd_hda_pick_fixup(struct hda_codec *codec, + const struct hda_model_fixup *models, +- const struct snd_pci_quirk *quirk, ++ const struct hda_quirk *quirk, + const struct hda_fixup *fixlist); + void snd_hda_pick_pin_fixup(struct hda_codec *codec, + const struct snd_hda_pin_quirk *pin_quirk, +diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c +index 1e9dadcdc51be2..56354fe060a1aa 100644 +--- a/sound/pci/hda/patch_analog.c ++++ b/sound/pci/hda/patch_analog.c +@@ -345,7 +345,7 @@ static const struct hda_fixup ad1986a_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk ad1986a_fixup_tbl[] = { ++static const struct hda_quirk ad1986a_fixup_tbl[] = { + SND_PCI_QUIRK(0x103c, 0x30af, "HP B2800", AD1986A_FIXUP_LAPTOP_IMIC), + SND_PCI_QUIRK(0x1043, 0x1153, "ASUS M9V", AD1986A_FIXUP_LAPTOP_IMIC), + SND_PCI_QUIRK(0x1043, 0x1443, "ASUS Z99He", AD1986A_FIXUP_EAPD), +@@ -588,7 +588,7 @@ static const struct hda_fixup ad1981_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk ad1981_fixup_tbl[] = { ++static const struct hda_quirk ad1981_fixup_tbl[] = { + SND_PCI_QUIRK_VENDOR(0x1014, "Lenovo", AD1981_FIXUP_AMP_OVERRIDE), + SND_PCI_QUIRK_VENDOR(0x103c, "HP", AD1981_FIXUP_HP_EAPD), + SND_PCI_QUIRK_VENDOR(0x17aa, "Lenovo", AD1981_FIXUP_AMP_OVERRIDE), +@@ -1061,7 +1061,7 @@ static const struct hda_fixup ad1884_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk ad1884_fixup_tbl[] = { ++static const struct hda_quirk ad1884_fixup_tbl[] = { + SND_PCI_QUIRK(0x103c, 0x2a82, "HP Touchsmart", AD1884_FIXUP_HP_TOUCHSMART), + SND_PCI_QUIRK_VENDOR(0x103c, "HP", AD1884_FIXUP_HP_EAPD), + SND_PCI_QUIRK_VENDOR(0x17aa, "Lenovo Thinkpad", AD1884_FIXUP_THINKPAD), +diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c +index 654724559355ef..06e046214a4134 100644 +--- a/sound/pci/hda/patch_cirrus.c ++++ b/sound/pci/hda/patch_cirrus.c +@@ -385,7 +385,7 @@ static const struct hda_model_fixup cs420x_models[] = { + {} + }; + +-static const struct snd_pci_quirk cs420x_fixup_tbl[] = { ++static const struct hda_quirk cs420x_fixup_tbl[] = { + SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53), + SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55), + SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55), +@@ -634,13 +634,13 @@ static const struct hda_model_fixup cs4208_models[] = { + {} + }; + +-static const struct snd_pci_quirk cs4208_fixup_tbl[] = { ++static const struct hda_quirk cs4208_fixup_tbl[] = { + SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO), + {} /* terminator */ + }; + + /* codec SSID matching */ +-static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = { ++static const struct hda_quirk cs4208_mac_fixup_tbl[] = { + SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11), + SND_PCI_QUIRK(0x106b, 0x6c00, "MacMini 7,1", CS4208_MACMINI), + SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6), +@@ -818,7 +818,7 @@ static const struct hda_model_fixup cs421x_models[] = { + {} + }; + +-static const struct snd_pci_quirk cs421x_fixup_tbl[] = { ++static const struct hda_quirk cs421x_fixup_tbl[] = { + /* Test Intel board + CDB2410 */ + SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210), + {} /* terminator */ +diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c +index b2bcdf76da3058..2e9f817b948eb3 100644 +--- a/sound/pci/hda/patch_conexant.c ++++ b/sound/pci/hda/patch_conexant.c +@@ -828,23 +828,6 @@ static const struct hda_pintbl cxt_pincfg_sws_js201d[] = { + {} + }; + +-/* pincfg quirk for Tuxedo Sirius; +- * unfortunately the (PCI) SSID conflicts with System76 Pangolin pang14, +- * which has incompatible pin setup, so we check the codec SSID (luckily +- * different one!) and conditionally apply the quirk here +- */ +-static void cxt_fixup_sirius_top_speaker(struct hda_codec *codec, +- const struct hda_fixup *fix, +- int action) +-{ +- /* ignore for incorrectly picked-up pang14 */ +- if (codec->core.subsystem_id == 0x278212b3) +- return; +- /* set up the top speaker pin */ +- if (action == HDA_FIXUP_ACT_PRE_PROBE) +- snd_hda_codec_set_pincfg(codec, 0x1d, 0x82170111); +-} +- + static const struct hda_fixup cxt_fixups[] = { + [CXT_PINCFG_LENOVO_X200] = { + .type = HDA_FIXUP_PINS, +@@ -1009,12 +992,15 @@ static const struct hda_fixup cxt_fixups[] = { + .v.pins = cxt_pincfg_sws_js201d, + }, + [CXT_PINCFG_TOP_SPEAKER] = { +- .type = HDA_FIXUP_FUNC, +- .v.func = cxt_fixup_sirius_top_speaker, ++ .type = HDA_FIXUP_PINS, ++ .v.pins = (const struct hda_pintbl[]) { ++ { 0x1d, 0x82170111 }, ++ { } ++ }, + }, + }; + +-static const struct snd_pci_quirk cxt5045_fixups[] = { ++static const struct hda_quirk cxt5045_fixups[] = { + SND_PCI_QUIRK(0x103c, 0x30d5, "HP 530", CXT_FIXUP_HP_530), + SND_PCI_QUIRK(0x1179, 0xff31, "Toshiba P105", CXT_FIXUP_TOSHIBA_P105), + /* HP, Packard Bell, Fujitsu-Siemens & Lenovo laptops have +@@ -1034,7 +1020,7 @@ static const struct hda_model_fixup cxt5045_fixup_models[] = { + {} + }; + +-static const struct snd_pci_quirk cxt5047_fixups[] = { ++static const struct hda_quirk cxt5047_fixups[] = { + /* HP laptops have really bad sound over 0 dB on NID 0x10. + */ + SND_PCI_QUIRK_VENDOR(0x103c, "HP", CXT_FIXUP_CAP_MIX_AMP_5047), +@@ -1046,7 +1032,7 @@ static const struct hda_model_fixup cxt5047_fixup_models[] = { + {} + }; + +-static const struct snd_pci_quirk cxt5051_fixups[] = { ++static const struct hda_quirk cxt5051_fixups[] = { + SND_PCI_QUIRK(0x103c, 0x360b, "Compaq CQ60", CXT_PINCFG_COMPAQ_CQ60), + SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo X200", CXT_PINCFG_LENOVO_X200), + {} +@@ -1057,7 +1043,7 @@ static const struct hda_model_fixup cxt5051_fixup_models[] = { + {} + }; + +-static const struct snd_pci_quirk cxt5066_fixups[] = { ++static const struct hda_quirk cxt5066_fixups[] = { + SND_PCI_QUIRK(0x1025, 0x0543, "Acer Aspire One 522", CXT_FIXUP_STEREO_DMIC), + SND_PCI_QUIRK(0x1025, 0x054c, "Acer Aspire 3830TG", CXT_FIXUP_ASPIRE_DMIC), + SND_PCI_QUIRK(0x1025, 0x054f, "Acer Aspire 4830T", CXT_FIXUP_ASPIRE_DMIC), +@@ -1109,8 +1095,8 @@ static const struct snd_pci_quirk cxt5066_fixups[] = { + SND_PCI_QUIRK_VENDOR(0x17aa, "Thinkpad", CXT_FIXUP_THINKPAD_ACPI), + SND_PCI_QUIRK(0x1c06, 0x2011, "Lemote A1004", CXT_PINCFG_LEMOTE_A1004), + SND_PCI_QUIRK(0x1c06, 0x2012, "Lemote A1205", CXT_PINCFG_LEMOTE_A1205), +- SND_PCI_QUIRK(0x2782, 0x12c3, "Sirius Gen1", CXT_PINCFG_TOP_SPEAKER), +- SND_PCI_QUIRK(0x2782, 0x12c5, "Sirius Gen2", CXT_PINCFG_TOP_SPEAKER), ++ HDA_CODEC_QUIRK(0x2782, 0x12c3, "Sirius Gen1", CXT_PINCFG_TOP_SPEAKER), ++ HDA_CODEC_QUIRK(0x2782, 0x12c5, "Sirius Gen2", CXT_PINCFG_TOP_SPEAKER), + {} + }; + +diff --git a/sound/pci/hda/patch_cs8409-tables.c b/sound/pci/hda/patch_cs8409-tables.c +index 36b411d1a9609a..759f48038273df 100644 +--- a/sound/pci/hda/patch_cs8409-tables.c ++++ b/sound/pci/hda/patch_cs8409-tables.c +@@ -473,7 +473,7 @@ struct sub_codec dolphin_cs42l42_1 = { + * Arrays Used for all projects using CS8409 + ******************************************************************************/ + +-const struct snd_pci_quirk cs8409_fixup_tbl[] = { ++const struct hda_quirk cs8409_fixup_tbl[] = { + SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE), +diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h +index 937e9387abdc7a..5e48115caf096b 100644 +--- a/sound/pci/hda/patch_cs8409.h ++++ b/sound/pci/hda/patch_cs8409.h +@@ -355,7 +355,7 @@ int cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uc + + extern const struct hda_pcm_stream cs42l42_48k_pcm_analog_playback; + extern const struct hda_pcm_stream cs42l42_48k_pcm_analog_capture; +-extern const struct snd_pci_quirk cs8409_fixup_tbl[]; ++extern const struct hda_quirk cs8409_fixup_tbl[]; + extern const struct hda_model_fixup cs8409_models[]; + extern const struct hda_fixup cs8409_fixups[]; + extern const struct hda_verb cs8409_cs42l42_init_verbs[]; +diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c +index 18e6779a83be2f..973671e0cdb09d 100644 +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -1567,7 +1567,7 @@ static const struct hda_fixup alc880_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk alc880_fixup_tbl[] = { ++static const struct hda_quirk alc880_fixup_tbl[] = { + SND_PCI_QUIRK(0x1019, 0x0f69, "Coeus G610P", ALC880_FIXUP_W810), + SND_PCI_QUIRK(0x1043, 0x10c3, "ASUS W5A", ALC880_FIXUP_ASUS_W5A), + SND_PCI_QUIRK(0x1043, 0x1964, "ASUS Z71V", ALC880_FIXUP_Z71V), +@@ -1876,7 +1876,7 @@ static const struct hda_fixup alc260_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk alc260_fixup_tbl[] = { ++static const struct hda_quirk alc260_fixup_tbl[] = { + SND_PCI_QUIRK(0x1025, 0x007b, "Acer C20x", ALC260_FIXUP_GPIO1), + SND_PCI_QUIRK(0x1025, 0x007f, "Acer Aspire 9500", ALC260_FIXUP_COEF), + SND_PCI_QUIRK(0x1025, 0x008f, "Acer", ALC260_FIXUP_GPIO1), +@@ -2568,7 +2568,7 @@ static const struct hda_fixup alc882_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk alc882_fixup_tbl[] = { ++static const struct hda_quirk alc882_fixup_tbl[] = { + SND_PCI_QUIRK(0x1025, 0x006c, "Acer Aspire 9810", ALC883_FIXUP_ACER_EAPD), + SND_PCI_QUIRK(0x1025, 0x0090, "Acer Aspire", ALC883_FIXUP_ACER_EAPD), + SND_PCI_QUIRK(0x1025, 0x0107, "Acer Aspire", ALC883_FIXUP_ACER_EAPD), +@@ -2912,7 +2912,7 @@ static const struct hda_fixup alc262_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk alc262_fixup_tbl[] = { ++static const struct hda_quirk alc262_fixup_tbl[] = { + SND_PCI_QUIRK(0x103c, 0x170b, "HP Z200", ALC262_FIXUP_HP_Z200), + SND_PCI_QUIRK(0x10cf, 0x1397, "Fujitsu Lifebook S7110", ALC262_FIXUP_FSC_S7110), + SND_PCI_QUIRK(0x10cf, 0x142d, "Fujitsu Lifebook E8410", ALC262_FIXUP_BENQ), +@@ -3073,7 +3073,7 @@ static const struct hda_model_fixup alc268_fixup_models[] = { + {} + }; + +-static const struct snd_pci_quirk alc268_fixup_tbl[] = { ++static const struct hda_quirk alc268_fixup_tbl[] = { + SND_PCI_QUIRK(0x1025, 0x0139, "Acer TravelMate 6293", ALC268_FIXUP_SPDIF), + SND_PCI_QUIRK(0x1025, 0x015b, "Acer AOA 150 (ZG5)", ALC268_FIXUP_INV_DMIC), + /* below is codec SSID since multiple Toshiba laptops have the +@@ -7726,8 +7726,6 @@ enum { + ALC287_FIXUP_LEGION_15IMHG05_AUTOMUTE, + ALC287_FIXUP_YOGA7_14ITL_SPEAKERS, + ALC298_FIXUP_LENOVO_C940_DUET7, +- ALC287_FIXUP_LENOVO_14IRP8_DUETITL, +- ALC287_FIXUP_LENOVO_LEGION_7, + ALC287_FIXUP_13S_GEN2_SPEAKERS, + ALC256_FIXUP_SET_COEF_DEFAULTS, + ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE, +@@ -7772,8 +7770,6 @@ enum { + ALC285_FIXUP_ASUS_GU605_SPI_SPEAKER2_TO_DAC1, + ALC287_FIXUP_LENOVO_THKPAD_WH_ALC1318, + ALC256_FIXUP_CHROME_BOOK, +- ALC287_FIXUP_LENOVO_14ARP8_LEGION_IAH7, +- ALC287_FIXUP_LENOVO_SSID_17AA3820, + ALC245_FIXUP_CLEVO_NOISY_MIC, + ALC269_FIXUP_VAIO_VJFH52_MIC_NO_PRESENCE, + ALC233_FIXUP_MEDION_MTL_SPK, +@@ -7796,72 +7792,6 @@ static void alc298_fixup_lenovo_c940_duet7(struct hda_codec *codec, + __snd_hda_apply_fixup(codec, id, action, 0); + } + +-/* A special fixup for Lenovo Slim/Yoga Pro 9 14IRP8 and Yoga DuetITL 2021; +- * 14IRP8 PCI SSID will mistakenly be matched with the DuetITL codec SSID, +- * so we need to apply a different fixup in this case. The only DuetITL codec +- * SSID reported so far is the 17aa:3802 while the 14IRP8 has the 17aa:38be +- * and 17aa:38bf. If it weren't for the PCI SSID, the 14IRP8 models would +- * have matched correctly by their codecs. +- */ +-static void alc287_fixup_lenovo_14irp8_duetitl(struct hda_codec *codec, +- const struct hda_fixup *fix, +- int action) +-{ +- int id; +- +- if (codec->core.subsystem_id == 0x17aa3802) +- id = ALC287_FIXUP_YOGA7_14ITL_SPEAKERS; /* DuetITL */ +- else +- id = ALC287_FIXUP_TAS2781_I2C; /* 14IRP8 */ +- __snd_hda_apply_fixup(codec, id, action, 0); +-} +- +-/* Similar to above the Lenovo Yoga Pro 7 14ARP8 PCI SSID matches the codec SSID of the +- Legion Y9000X 2022 IAH7.*/ +-static void alc287_fixup_lenovo_14arp8_legion_iah7(struct hda_codec *codec, +- const struct hda_fixup *fix, +- int action) +-{ +- int id; +- +- if (codec->core.subsystem_id == 0x17aa386e) +- id = ALC287_FIXUP_CS35L41_I2C_2; /* Legion Y9000X 2022 IAH7 */ +- else +- id = ALC285_FIXUP_SPEAKER2_TO_DAC1; /* Yoga Pro 7 14ARP8 */ +- __snd_hda_apply_fixup(codec, id, action, 0); +-} +- +-/* Another hilarious PCI SSID conflict with Lenovo Legion Pro 7 16ARX8H (with +- * TAS2781 codec) and Legion 7i 16IAX7 (with CS35L41 codec); +- * we apply a corresponding fixup depending on the codec SSID instead +- */ +-static void alc287_fixup_lenovo_legion_7(struct hda_codec *codec, +- const struct hda_fixup *fix, +- int action) +-{ +- int id; +- +- if (codec->core.subsystem_id == 0x17aa38a8) +- id = ALC287_FIXUP_TAS2781_I2C; /* Legion Pro 7 16ARX8H */ +- else +- id = ALC287_FIXUP_CS35L41_I2C_2; /* Legion 7i 16IAX7 */ +- __snd_hda_apply_fixup(codec, id, action, 0); +-} +- +-/* Yet more conflicting PCI SSID (17aa:3820) on two Lenovo models */ +-static void alc287_fixup_lenovo_ssid_17aa3820(struct hda_codec *codec, +- const struct hda_fixup *fix, +- int action) +-{ +- int id; +- +- if (codec->core.subsystem_id == 0x17aa3820) +- id = ALC269_FIXUP_ASPIRE_HEADSET_MIC; /* IdeaPad 330-17IKB 81DM */ +- else /* 0x17aa3802 */ +- id = ALC287_FIXUP_YOGA7_14ITL_SPEAKERS; /* "Yoga Duet 7 13ITL6 */ +- __snd_hda_apply_fixup(codec, id, action, 0); +-} +- + static const struct hda_fixup alc269_fixups[] = { + [ALC269_FIXUP_GPIO2] = { + .type = HDA_FIXUP_FUNC, +@@ -9810,14 +9740,6 @@ static const struct hda_fixup alc269_fixups[] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc298_fixup_lenovo_c940_duet7, + }, +- [ALC287_FIXUP_LENOVO_14IRP8_DUETITL] = { +- .type = HDA_FIXUP_FUNC, +- .v.func = alc287_fixup_lenovo_14irp8_duetitl, +- }, +- [ALC287_FIXUP_LENOVO_LEGION_7] = { +- .type = HDA_FIXUP_FUNC, +- .v.func = alc287_fixup_lenovo_legion_7, +- }, + [ALC287_FIXUP_13S_GEN2_SPEAKERS] = { + .type = HDA_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { +@@ -10002,10 +9924,6 @@ static const struct hda_fixup alc269_fixups[] = { + .chained = true, + .chain_id = ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK, + }, +- [ALC287_FIXUP_LENOVO_14ARP8_LEGION_IAH7] = { +- .type = HDA_FIXUP_FUNC, +- .v.func = alc287_fixup_lenovo_14arp8_legion_iah7, +- }, + [ALC287_FIXUP_YOGA9_14IMH9_BASS_SPK_PIN] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc287_fixup_yoga9_14iap7_bass_spk_pin, +@@ -10140,10 +10058,6 @@ static const struct hda_fixup alc269_fixups[] = { + .chained = true, + .chain_id = ALC225_FIXUP_HEADSET_JACK + }, +- [ALC287_FIXUP_LENOVO_SSID_17AA3820] = { +- .type = HDA_FIXUP_FUNC, +- .v.func = alc287_fixup_lenovo_ssid_17aa3820, +- }, + [ALC245_FIXUP_CLEVO_NOISY_MIC] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc269_fixup_limit_int_mic_boost, +@@ -10169,7 +10083,7 @@ static const struct hda_fixup alc269_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk alc269_fixup_tbl[] = { ++static const struct hda_quirk alc269_fixup_tbl[] = { + SND_PCI_QUIRK(0x1025, 0x0283, "Acer TravelMate 8371", ALC269_FIXUP_INV_DMIC), + SND_PCI_QUIRK(0x1025, 0x029b, "Acer 1810TZ", ALC269_FIXUP_INV_DMIC), + SND_PCI_QUIRK(0x1025, 0x0349, "Acer AOD260", ALC269_FIXUP_INV_DMIC), +@@ -10411,6 +10325,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { + SND_PCI_QUIRK(0x103c, 0x87b7, "HP Laptop 14-fq0xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2), + SND_PCI_QUIRK(0x103c, 0x87c8, "HP", ALC287_FIXUP_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x87d3, "HP Laptop 15-gw0xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2), ++ SND_PCI_QUIRK(0x103c, 0x87df, "HP ProBook 430 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x87e5, "HP ProBook 440 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x87e7, "HP ProBook 450 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x87f1, "HP ProBook 630 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED), +@@ -10592,7 +10507,13 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { + SND_PCI_QUIRK(0x103c, 0x8cdf, "HP SnowWhite", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x8ce0, "HP SnowWhite", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x8cf5, "HP ZBook Studio 16", ALC245_FIXUP_CS35L41_SPI_4_HP_GPIO_LED), ++ SND_PCI_QUIRK(0x103c, 0x8d01, "HP ZBook Power 14 G12", ALC285_FIXUP_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x8d84, "HP EliteBook X G1i", ALC285_FIXUP_HP_GPIO_LED), ++ SND_PCI_QUIRK(0x103c, 0x8d91, "HP ZBook Firefly 14 G12", ALC285_FIXUP_HP_GPIO_LED), ++ SND_PCI_QUIRK(0x103c, 0x8d92, "HP ZBook Firefly 16 G12", ALC285_FIXUP_HP_GPIO_LED), ++ SND_PCI_QUIRK(0x103c, 0x8e18, "HP ZBook Firefly 14 G12A", ALC285_FIXUP_HP_GPIO_LED), ++ SND_PCI_QUIRK(0x103c, 0x8e19, "HP ZBook Firefly 14 G12A", ALC285_FIXUP_HP_GPIO_LED), ++ SND_PCI_QUIRK(0x103c, 0x8e1a, "HP ZBook Firefly 14 G12A", ALC285_FIXUP_HP_GPIO_LED), + SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC), + SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300), + SND_PCI_QUIRK(0x1043, 0x106d, "Asus K53BE", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), +@@ -10746,6 +10667,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { + SND_PCI_QUIRK(0x144d, 0xc830, "Samsung Galaxy Book Ion (NT950XCJ-X716A)", ALC298_FIXUP_SAMSUNG_AMP), + SND_PCI_QUIRK(0x144d, 0xc832, "Samsung Galaxy Book Flex Alpha (NP730QCJ)", ALC256_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), + SND_PCI_QUIRK(0x144d, 0xca03, "Samsung Galaxy Book2 Pro 360 (NP930QED)", ALC298_FIXUP_SAMSUNG_AMP), ++ SND_PCI_QUIRK(0x144d, 0xca06, "Samsung Galaxy Book3 360 (NP730QFG)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET), + SND_PCI_QUIRK(0x144d, 0xc868, "Samsung Galaxy Book2 Pro (NP930XED)", ALC298_FIXUP_SAMSUNG_AMP), + SND_PCI_QUIRK(0x144d, 0xc870, "Samsung Galaxy Book2 Pro (NP950XED)", ALC298_FIXUP_SAMSUNG_AMP_V2_2_AMPS), + SND_PCI_QUIRK(0x144d, 0xc872, "Samsung Galaxy Book2 Pro (NP950XEE)", ALC298_FIXUP_SAMSUNG_AMP_V2_2_AMPS), +@@ -10903,11 +10825,13 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { + SND_PCI_QUIRK(0x17aa, 0x31af, "ThinkCentre Station", ALC623_FIXUP_LENOVO_THINKSTATION_P340), + SND_PCI_QUIRK(0x17aa, 0x334b, "Lenovo ThinkCentre M70 Gen5", ALC283_FIXUP_HEADSET_MIC), + SND_PCI_QUIRK(0x17aa, 0x3801, "Lenovo Yoga9 14IAP7", ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN), +- SND_PCI_QUIRK(0x17aa, 0x3802, "Lenovo Yoga Pro 9 14IRP8 / DuetITL 2021", ALC287_FIXUP_LENOVO_14IRP8_DUETITL), ++ HDA_CODEC_QUIRK(0x17aa, 0x3802, "DuetITL 2021", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS), ++ SND_PCI_QUIRK(0x17aa, 0x3802, "Lenovo Yoga Pro 9 14IRP8", ALC287_FIXUP_TAS2781_I2C), + SND_PCI_QUIRK(0x17aa, 0x3813, "Legion 7i 15IMHG05", ALC287_FIXUP_LEGION_15IMHG05_SPEAKERS), + SND_PCI_QUIRK(0x17aa, 0x3818, "Lenovo C940 / Yoga Duet 7", ALC298_FIXUP_LENOVO_C940_DUET7), + SND_PCI_QUIRK(0x17aa, 0x3819, "Lenovo 13s Gen2 ITL", ALC287_FIXUP_13S_GEN2_SPEAKERS), +- SND_PCI_QUIRK(0x17aa, 0x3820, "IdeaPad 330 / Yoga Duet 7", ALC287_FIXUP_LENOVO_SSID_17AA3820), ++ HDA_CODEC_QUIRK(0x17aa, 0x3820, "IdeaPad 330-17IKB 81DM", ALC269_FIXUP_ASPIRE_HEADSET_MIC), ++ SND_PCI_QUIRK(0x17aa, 0x3820, "Yoga Duet 7 13ITL6", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS), + SND_PCI_QUIRK(0x17aa, 0x3824, "Legion Y9000X 2020", ALC285_FIXUP_LEGION_Y9000X_SPEAKERS), + SND_PCI_QUIRK(0x17aa, 0x3827, "Ideapad S740", ALC285_FIXUP_IDEAPAD_S740_COEF), + SND_PCI_QUIRK(0x17aa, 0x3834, "Lenovo IdeaPad Slim 9i 14ITL5", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS), +@@ -10921,8 +10845,10 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { + SND_PCI_QUIRK(0x17aa, 0x3865, "Lenovo 13X", ALC287_FIXUP_CS35L41_I2C_2), + SND_PCI_QUIRK(0x17aa, 0x3866, "Lenovo 13X", ALC287_FIXUP_CS35L41_I2C_2), + SND_PCI_QUIRK(0x17aa, 0x3869, "Lenovo Yoga7 14IAL7", ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN), +- SND_PCI_QUIRK(0x17aa, 0x386e, "Legion Y9000X 2022 IAH7 / Yoga Pro 7 14ARP8", ALC287_FIXUP_LENOVO_14ARP8_LEGION_IAH7), +- SND_PCI_QUIRK(0x17aa, 0x386f, "Legion Pro 7/7i", ALC287_FIXUP_LENOVO_LEGION_7), ++ HDA_CODEC_QUIRK(0x17aa, 0x386e, "Legion Y9000X 2022 IAH7", ALC287_FIXUP_CS35L41_I2C_2), ++ SND_PCI_QUIRK(0x17aa, 0x386e, "Yoga Pro 7 14ARP8", ALC285_FIXUP_SPEAKER2_TO_DAC1), ++ HDA_CODEC_QUIRK(0x17aa, 0x386f, "Legion Pro 7 16ARX8H", ALC287_FIXUP_TAS2781_I2C), ++ SND_PCI_QUIRK(0x17aa, 0x386f, "Legion Pro 7i 16IAX7", ALC287_FIXUP_CS35L41_I2C_2), + SND_PCI_QUIRK(0x17aa, 0x3870, "Lenovo Yoga 7 14ARB7", ALC287_FIXUP_YOGA7_14ARB7_I2C), + SND_PCI_QUIRK(0x17aa, 0x3877, "Lenovo Legion 7 Slim 16ARHA7", ALC287_FIXUP_CS35L41_I2C_2), + SND_PCI_QUIRK(0x17aa, 0x3878, "Lenovo Legion 7 Slim 16ARHA7", ALC287_FIXUP_CS35L41_I2C_2), +@@ -11096,7 +11022,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { + {} + }; + +-static const struct snd_pci_quirk alc269_fixup_vendor_tbl[] = { ++static const struct hda_quirk alc269_fixup_vendor_tbl[] = { + SND_PCI_QUIRK_VENDOR(0x1025, "Acer Aspire", ALC271_FIXUP_DMIC), + SND_PCI_QUIRK_VENDOR(0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED), + SND_PCI_QUIRK_VENDOR(0x104d, "Sony VAIO", ALC269_FIXUP_SONY_VAIO), +@@ -12032,7 +11958,7 @@ static const struct hda_fixup alc861_fixups[] = { + } + }; + +-static const struct snd_pci_quirk alc861_fixup_tbl[] = { ++static const struct hda_quirk alc861_fixup_tbl[] = { + SND_PCI_QUIRK(0x1043, 0x1253, "ASUS W7J", ALC660_FIXUP_ASUS_W7J), + SND_PCI_QUIRK(0x1043, 0x1263, "ASUS Z35HL", ALC660_FIXUP_ASUS_W7J), + SND_PCI_QUIRK(0x1043, 0x1393, "ASUS A6Rp", ALC861_FIXUP_ASUS_A6RP), +@@ -12136,7 +12062,7 @@ static const struct hda_fixup alc861vd_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk alc861vd_fixup_tbl[] = { ++static const struct hda_quirk alc861vd_fixup_tbl[] = { + SND_PCI_QUIRK(0x103c, 0x30bf, "HP TX1000", ALC861VD_FIX_DALLAS), + SND_PCI_QUIRK(0x1043, 0x1339, "ASUS A7-K", ALC660VD_FIX_ASUS_GPIO1), + SND_PCI_QUIRK(0x1179, 0xff31, "Toshiba L30-149", ALC861VD_FIX_DALLAS), +@@ -12937,7 +12863,7 @@ static const struct hda_fixup alc662_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk alc662_fixup_tbl[] = { ++static const struct hda_quirk alc662_fixup_tbl[] = { + SND_PCI_QUIRK(0x1019, 0x9087, "ECS", ALC662_FIXUP_ASUS_MODE2), + SND_PCI_QUIRK(0x1019, 0x9859, "JP-IK LEAP W502", ALC897_FIXUP_HEADSET_MIC_PIN3), + SND_PCI_QUIRK(0x1025, 0x022f, "Acer Aspire One", ALC662_FIXUP_INV_DMIC), +diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c +index ae1a34c68c6161..bde6b737385831 100644 +--- a/sound/pci/hda/patch_sigmatel.c ++++ b/sound/pci/hda/patch_sigmatel.c +@@ -1462,7 +1462,7 @@ static const struct hda_model_fixup stac9200_models[] = { + {} + }; + +-static const struct snd_pci_quirk stac9200_fixup_tbl[] = { ++static const struct hda_quirk stac9200_fixup_tbl[] = { + /* SigmaTel reference board */ + SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, + "DFI LanParty", STAC_REF), +@@ -1683,7 +1683,7 @@ static const struct hda_model_fixup stac925x_models[] = { + {} + }; + +-static const struct snd_pci_quirk stac925x_fixup_tbl[] = { ++static const struct hda_quirk stac925x_fixup_tbl[] = { + /* SigmaTel reference board */ + SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), + SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), +@@ -1957,7 +1957,7 @@ static const struct hda_model_fixup stac92hd73xx_models[] = { + {} + }; + +-static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = { ++static const struct hda_quirk stac92hd73xx_fixup_tbl[] = { + /* SigmaTel reference board */ + SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, + "DFI LanParty", STAC_92HD73XX_REF), +@@ -2753,7 +2753,7 @@ static const struct hda_model_fixup stac92hd83xxx_models[] = { + {} + }; + +-static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = { ++static const struct hda_quirk stac92hd83xxx_fixup_tbl[] = { + /* SigmaTel reference board */ + SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, + "DFI LanParty", STAC_92HD83XXX_REF), +@@ -3236,7 +3236,7 @@ static const struct hda_model_fixup stac92hd71bxx_models[] = { + {} + }; + +-static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = { ++static const struct hda_quirk stac92hd71bxx_fixup_tbl[] = { + /* SigmaTel reference board */ + SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, + "DFI LanParty", STAC_92HD71BXX_REF), +@@ -3496,7 +3496,7 @@ static const struct hda_pintbl ecs202_pin_configs[] = { + }; + + /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */ +-static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = { ++static const struct hda_quirk stac922x_intel_mac_fixup_tbl[] = { + SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3), + SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1), + SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2), +@@ -3640,7 +3640,7 @@ static const struct hda_model_fixup stac922x_models[] = { + {} + }; + +-static const struct snd_pci_quirk stac922x_fixup_tbl[] = { ++static const struct hda_quirk stac922x_fixup_tbl[] = { + /* SigmaTel reference board */ + SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, + "DFI LanParty", STAC_D945_REF), +@@ -3968,7 +3968,7 @@ static const struct hda_model_fixup stac927x_models[] = { + {} + }; + +-static const struct snd_pci_quirk stac927x_fixup_tbl[] = { ++static const struct hda_quirk stac927x_fixup_tbl[] = { + /* SigmaTel reference board */ + SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, + "DFI LanParty", STAC_D965_REF), +@@ -4178,7 +4178,7 @@ static const struct hda_model_fixup stac9205_models[] = { + {} + }; + +-static const struct snd_pci_quirk stac9205_fixup_tbl[] = { ++static const struct hda_quirk stac9205_fixup_tbl[] = { + /* SigmaTel reference board */ + SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, + "DFI LanParty", STAC_9205_REF), +@@ -4255,7 +4255,7 @@ static const struct hda_fixup stac92hd95_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = { ++static const struct hda_quirk stac92hd95_fixup_tbl[] = { + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS), + {} /* terminator */ + }; +@@ -5002,7 +5002,7 @@ static const struct hda_fixup stac9872_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk stac9872_fixup_tbl[] = { ++static const struct hda_quirk stac9872_fixup_tbl[] = { + SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, + "Sony VAIO F/S", STAC_9872_VAIO), + {} /* terminator */ +diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c +index a8ef4bb70dd057..d0893059b1b9b7 100644 +--- a/sound/pci/hda/patch_via.c ++++ b/sound/pci/hda/patch_via.c +@@ -1035,7 +1035,7 @@ static const struct hda_fixup via_fixups[] = { + }, + }; + +-static const struct snd_pci_quirk vt2002p_fixups[] = { ++static const struct hda_quirk vt2002p_fixups[] = { + SND_PCI_QUIRK(0x1043, 0x13f7, "Asus B23E", VIA_FIXUP_POWER_SAVE), + SND_PCI_QUIRK(0x1043, 0x1487, "Asus G75", VIA_FIXUP_ASUS_G75), + SND_PCI_QUIRK(0x1043, 0x8532, "Asus X202E", VIA_FIXUP_INTMIC_BOOST), +diff --git a/sound/soc/amd/yc/acp6x-mach.c b/sound/soc/amd/yc/acp6x-mach.c +index 5153a68d8c0795..e38c5885dadfbc 100644 +--- a/sound/soc/amd/yc/acp6x-mach.c ++++ b/sound/soc/amd/yc/acp6x-mach.c +@@ -220,6 +220,13 @@ static const struct dmi_system_id yc_acp_quirk_table[] = { + DMI_MATCH(DMI_PRODUCT_NAME, "21J6"), + } + }, ++ { ++ .driver_data = &acp6x_card, ++ .matches = { ++ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "21M1"), ++ } ++ }, + { + .driver_data = &acp6x_card, + .matches = { +@@ -416,6 +423,13 @@ static const struct dmi_system_id yc_acp_quirk_table[] = { + DMI_MATCH(DMI_PRODUCT_NAME, "Xiaomi Book Pro 14 2022"), + } + }, ++ { ++ .driver_data = &acp6x_card, ++ .matches = { ++ DMI_MATCH(DMI_BOARD_VENDOR, "TIMI"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "Redmi G 2022"), ++ } ++ }, + { + .driver_data = &acp6x_card, + .matches = { +diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c +index 74caae52e1273f..d9df29a26f4f21 100644 +--- a/sound/soc/codecs/hdmi-codec.c ++++ b/sound/soc/codecs/hdmi-codec.c +@@ -185,84 +185,97 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = { + /* + * hdmi_codec_channel_alloc: speaker configuration available for CEA + * +- * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct ++ * This is an ordered list where ca_id must exist in hdmi_codec_8ch_chmaps + * The preceding ones have better chances to be selected by + * hdmi_codec_get_ch_alloc_table_idx(). + */ + static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = { + { .ca_id = 0x00, .n_ch = 2, +- .mask = FL | FR}, +- /* 2.1 */ +- { .ca_id = 0x01, .n_ch = 4, +- .mask = FL | FR | LFE}, +- /* Dolby Surround */ ++ .mask = FL | FR }, ++ { .ca_id = 0x03, .n_ch = 4, ++ .mask = FL | FR | LFE | FC }, + { .ca_id = 0x02, .n_ch = 4, + .mask = FL | FR | FC }, +- /* surround51 */ ++ { .ca_id = 0x01, .n_ch = 4, ++ .mask = FL | FR | LFE }, + { .ca_id = 0x0b, .n_ch = 6, +- .mask = FL | FR | LFE | FC | RL | RR}, +- /* surround40 */ +- { .ca_id = 0x08, .n_ch = 6, +- .mask = FL | FR | RL | RR }, +- /* surround41 */ +- { .ca_id = 0x09, .n_ch = 6, +- .mask = FL | FR | LFE | RL | RR }, +- /* surround50 */ ++ .mask = FL | FR | LFE | FC | RL | RR }, + { .ca_id = 0x0a, .n_ch = 6, + .mask = FL | FR | FC | RL | RR }, +- /* 6.1 */ +- { .ca_id = 0x0f, .n_ch = 8, +- .mask = FL | FR | LFE | FC | RL | RR | RC }, +- /* surround71 */ ++ { .ca_id = 0x09, .n_ch = 6, ++ .mask = FL | FR | LFE | RL | RR }, ++ { .ca_id = 0x08, .n_ch = 6, ++ .mask = FL | FR | RL | RR }, ++ { .ca_id = 0x07, .n_ch = 6, ++ .mask = FL | FR | LFE | FC | RC }, ++ { .ca_id = 0x06, .n_ch = 6, ++ .mask = FL | FR | FC | RC }, ++ { .ca_id = 0x05, .n_ch = 6, ++ .mask = FL | FR | LFE | RC }, ++ { .ca_id = 0x04, .n_ch = 6, ++ .mask = FL | FR | RC }, + { .ca_id = 0x13, .n_ch = 8, + .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC }, +- /* others */ +- { .ca_id = 0x03, .n_ch = 8, +- .mask = FL | FR | LFE | FC }, +- { .ca_id = 0x04, .n_ch = 8, +- .mask = FL | FR | RC}, +- { .ca_id = 0x05, .n_ch = 8, +- .mask = FL | FR | LFE | RC }, +- { .ca_id = 0x06, .n_ch = 8, +- .mask = FL | FR | FC | RC }, +- { .ca_id = 0x07, .n_ch = 8, +- .mask = FL | FR | LFE | FC | RC }, +- { .ca_id = 0x0c, .n_ch = 8, +- .mask = FL | FR | RC | RL | RR }, +- { .ca_id = 0x0d, .n_ch = 8, +- .mask = FL | FR | LFE | RL | RR | RC }, +- { .ca_id = 0x0e, .n_ch = 8, +- .mask = FL | FR | FC | RL | RR | RC }, +- { .ca_id = 0x10, .n_ch = 8, +- .mask = FL | FR | RL | RR | RLC | RRC }, +- { .ca_id = 0x11, .n_ch = 8, +- .mask = FL | FR | LFE | RL | RR | RLC | RRC }, ++ { .ca_id = 0x1f, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, + { .ca_id = 0x12, .n_ch = 8, + .mask = FL | FR | FC | RL | RR | RLC | RRC }, +- { .ca_id = 0x14, .n_ch = 8, +- .mask = FL | FR | FLC | FRC }, +- { .ca_id = 0x15, .n_ch = 8, +- .mask = FL | FR | LFE | FLC | FRC }, +- { .ca_id = 0x16, .n_ch = 8, +- .mask = FL | FR | FC | FLC | FRC }, +- { .ca_id = 0x17, .n_ch = 8, +- .mask = FL | FR | LFE | FC | FLC | FRC }, +- { .ca_id = 0x18, .n_ch = 8, +- .mask = FL | FR | RC | FLC | FRC }, +- { .ca_id = 0x19, .n_ch = 8, +- .mask = FL | FR | LFE | RC | FLC | FRC }, +- { .ca_id = 0x1a, .n_ch = 8, +- .mask = FL | FR | RC | FC | FLC | FRC }, +- { .ca_id = 0x1b, .n_ch = 8, +- .mask = FL | FR | LFE | RC | FC | FLC | FRC }, +- { .ca_id = 0x1c, .n_ch = 8, +- .mask = FL | FR | RL | RR | FLC | FRC }, +- { .ca_id = 0x1d, .n_ch = 8, +- .mask = FL | FR | LFE | RL | RR | FLC | FRC }, + { .ca_id = 0x1e, .n_ch = 8, + .mask = FL | FR | FC | RL | RR | FLC | FRC }, +- { .ca_id = 0x1f, .n_ch = 8, +- .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, ++ { .ca_id = 0x11, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR | RLC | RRC }, ++ { .ca_id = 0x1d, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR | FLC | FRC }, ++ { .ca_id = 0x10, .n_ch = 8, ++ .mask = FL | FR | RL | RR | RLC | RRC }, ++ { .ca_id = 0x1c, .n_ch = 8, ++ .mask = FL | FR | RL | RR | FLC | FRC }, ++ { .ca_id = 0x0f, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RL | RR | RC }, ++ { .ca_id = 0x1b, .n_ch = 8, ++ .mask = FL | FR | LFE | RC | FC | FLC | FRC }, ++ { .ca_id = 0x0e, .n_ch = 8, ++ .mask = FL | FR | FC | RL | RR | RC }, ++ { .ca_id = 0x1a, .n_ch = 8, ++ .mask = FL | FR | RC | FC | FLC | FRC }, ++ { .ca_id = 0x0d, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR | RC }, ++ { .ca_id = 0x19, .n_ch = 8, ++ .mask = FL | FR | LFE | RC | FLC | FRC }, ++ { .ca_id = 0x0c, .n_ch = 8, ++ .mask = FL | FR | RC | RL | RR }, ++ { .ca_id = 0x18, .n_ch = 8, ++ .mask = FL | FR | RC | FLC | FRC }, ++ { .ca_id = 0x17, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | FLC | FRC }, ++ { .ca_id = 0x16, .n_ch = 8, ++ .mask = FL | FR | FC | FLC | FRC }, ++ { .ca_id = 0x15, .n_ch = 8, ++ .mask = FL | FR | LFE | FLC | FRC }, ++ { .ca_id = 0x14, .n_ch = 8, ++ .mask = FL | FR | FLC | FRC }, ++ { .ca_id = 0x0b, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RL | RR }, ++ { .ca_id = 0x0a, .n_ch = 8, ++ .mask = FL | FR | FC | RL | RR }, ++ { .ca_id = 0x09, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR }, ++ { .ca_id = 0x08, .n_ch = 8, ++ .mask = FL | FR | RL | RR }, ++ { .ca_id = 0x07, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RC }, ++ { .ca_id = 0x06, .n_ch = 8, ++ .mask = FL | FR | FC | RC }, ++ { .ca_id = 0x05, .n_ch = 8, ++ .mask = FL | FR | LFE | RC }, ++ { .ca_id = 0x04, .n_ch = 8, ++ .mask = FL | FR | RC }, ++ { .ca_id = 0x03, .n_ch = 8, ++ .mask = FL | FR | LFE | FC }, ++ { .ca_id = 0x02, .n_ch = 8, ++ .mask = FL | FR | FC }, ++ { .ca_id = 0x01, .n_ch = 8, ++ .mask = FL | FR | LFE }, + }; + + struct hdmi_codec_priv { +@@ -371,7 +384,8 @@ static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol, + struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); + struct hdmi_codec_priv *hcp = info->private_data; + +- map = info->chmap[hcp->chmap_idx].map; ++ if (hcp->chmap_idx != HDMI_CODEC_CHMAP_IDX_UNKNOWN) ++ map = info->chmap[hcp->chmap_idx].map; + + for (i = 0; i < info->max_channels; i++) { + if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN) +diff --git a/sound/soc/intel/avs/pcm.c b/sound/soc/intel/avs/pcm.c +index 4af81158035681..945f9c0a6a5455 100644 +--- a/sound/soc/intel/avs/pcm.c ++++ b/sound/soc/intel/avs/pcm.c +@@ -509,7 +509,7 @@ static int avs_pcm_hw_constraints_init(struct snd_pcm_substream *substream) + SNDRV_PCM_HW_PARAM_FORMAT, SNDRV_PCM_HW_PARAM_CHANNELS, + SNDRV_PCM_HW_PARAM_RATE, -1); + +- return ret; ++ return 0; + } + + static int avs_dai_fe_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) +diff --git a/sound/soc/intel/boards/sof_rt5682.c b/sound/soc/intel/boards/sof_rt5682.c +index bc581fea0e3a16..866589fece7a3d 100644 +--- a/sound/soc/intel/boards/sof_rt5682.c ++++ b/sound/soc/intel/boards/sof_rt5682.c +@@ -870,6 +870,13 @@ static const struct platform_device_id board_ids[] = { + SOF_SSP_PORT_BT_OFFLOAD(2) | + SOF_BT_OFFLOAD_PRESENT), + }, ++ { ++ .name = "mtl_rt5682_c1_h02", ++ .driver_data = (kernel_ulong_t)(SOF_RT5682_MCLK_EN | ++ SOF_SSP_PORT_CODEC(1) | ++ /* SSP 0 and SSP 2 are used for HDMI IN */ ++ SOF_SSP_MASK_HDMI_CAPTURE(0x5)), ++ }, + { + .name = "arl_rt5682_c1_h02", + .driver_data = (kernel_ulong_t)(SOF_RT5682_MCLK_EN | +diff --git a/sound/soc/intel/boards/sof_sdw.c b/sound/soc/intel/boards/sof_sdw.c +index 4a0ab50d1e50dc..a58842a8c8a641 100644 +--- a/sound/soc/intel/boards/sof_sdw.c ++++ b/sound/soc/intel/boards/sof_sdw.c +@@ -580,6 +580,47 @@ static const struct dmi_system_id sof_sdw_quirk_table[] = { + }, + .driver_data = (void *)(SOC_SDW_CODEC_SPKR), + }, ++ { ++ .callback = sof_sdw_quirk_cb, ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "3838") ++ }, ++ .driver_data = (void *)(SOC_SDW_SIDECAR_AMPS), ++ }, ++ { ++ .callback = sof_sdw_quirk_cb, ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "3832") ++ }, ++ .driver_data = (void *)(SOC_SDW_SIDECAR_AMPS), ++ }, ++ { ++ .callback = sof_sdw_quirk_cb, ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "380E") ++ }, ++ .driver_data = (void *)(SOC_SDW_SIDECAR_AMPS), ++ }, ++ { ++ .callback = sof_sdw_quirk_cb, ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "233C") ++ }, ++ /* Note this quirk excludes the CODEC mic */ ++ .driver_data = (void *)(SOC_SDW_CODEC_MIC), ++ }, ++ { ++ .callback = sof_sdw_quirk_cb, ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), ++ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "233B") ++ }, ++ .driver_data = (void *)(SOC_SDW_SIDECAR_AMPS), ++ }, + + /* ArrowLake devices */ + { +diff --git a/sound/soc/intel/common/soc-acpi-intel-arl-match.c b/sound/soc/intel/common/soc-acpi-intel-arl-match.c +index 072b8486d0727c..24d850df77ca8e 100644 +--- a/sound/soc/intel/common/soc-acpi-intel-arl-match.c ++++ b/sound/soc/intel/common/soc-acpi-intel-arl-match.c +@@ -44,6 +44,31 @@ static const struct snd_soc_acpi_endpoint spk_3_endpoint = { + .group_id = 1, + }; + ++/* ++ * RT722 is a multi-function codec, three endpoints are created for ++ * its headset, amp and dmic functions. ++ */ ++static const struct snd_soc_acpi_endpoint rt722_endpoints[] = { ++ { ++ .num = 0, ++ .aggregated = 0, ++ .group_position = 0, ++ .group_id = 0, ++ }, ++ { ++ .num = 1, ++ .aggregated = 0, ++ .group_position = 0, ++ .group_id = 0, ++ }, ++ { ++ .num = 2, ++ .aggregated = 0, ++ .group_position = 0, ++ .group_id = 0, ++ }, ++}; ++ + static const struct snd_soc_acpi_adr_device cs35l56_2_lr_adr[] = { + { + .adr = 0x00023001FA355601ull, +@@ -185,6 +210,24 @@ static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = { + } + }; + ++static const struct snd_soc_acpi_adr_device rt722_0_single_adr[] = { ++ { ++ .adr = 0x000030025D072201ull, ++ .num_endpoints = ARRAY_SIZE(rt722_endpoints), ++ .endpoints = rt722_endpoints, ++ .name_prefix = "rt722" ++ } ++}; ++ ++static const struct snd_soc_acpi_adr_device rt1320_2_single_adr[] = { ++ { ++ .adr = 0x000230025D132001ull, ++ .num_endpoints = 1, ++ .endpoints = &single_endpoint, ++ .name_prefix = "rt1320-1" ++ } ++}; ++ + static const struct snd_soc_acpi_link_adr arl_cs42l43_l0[] = { + { + .mask = BIT(0), +@@ -287,6 +330,20 @@ static const struct snd_soc_acpi_link_adr arl_sdca_rvp[] = { + {} + }; + ++static const struct snd_soc_acpi_link_adr arl_rt722_l0_rt1320_l2[] = { ++ { ++ .mask = BIT(0), ++ .num_adr = ARRAY_SIZE(rt722_0_single_adr), ++ .adr_d = rt722_0_single_adr, ++ }, ++ { ++ .mask = BIT(2), ++ .num_adr = ARRAY_SIZE(rt1320_2_single_adr), ++ .adr_d = rt1320_2_single_adr, ++ }, ++ {} ++}; ++ + static const struct snd_soc_acpi_codecs arl_essx_83x6 = { + .num_codecs = 3, + .codecs = { "ESSX8316", "ESSX8326", "ESSX8336"}, +@@ -385,6 +442,12 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_arl_sdw_machines[] = { + .drv_name = "sof_sdw", + .sof_tplg_filename = "sof-arl-rt711-l0.tplg", + }, ++ { ++ .link_mask = BIT(0) | BIT(2), ++ .links = arl_rt722_l0_rt1320_l2, ++ .drv_name = "sof_sdw", ++ .sof_tplg_filename = "sof-arl-rt722-l0_rt1320-l2.tplg", ++ }, + {}, + }; + EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_arl_sdw_machines); +diff --git a/sound/soc/intel/common/soc-acpi-intel-mtl-match.c b/sound/soc/intel/common/soc-acpi-intel-mtl-match.c +index d4435a34a3a3f4..fd02c864e25ef9 100644 +--- a/sound/soc/intel/common/soc-acpi-intel-mtl-match.c ++++ b/sound/soc/intel/common/soc-acpi-intel-mtl-match.c +@@ -42,6 +42,13 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_mtl_machines[] = { + SND_SOC_ACPI_TPLG_INTEL_SSP_MSB | + SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER, + }, ++ { ++ .comp_ids = &mtl_rt5682_rt5682s_hp, ++ .drv_name = "mtl_rt5682_c1_h02", ++ .machine_quirk = snd_soc_acpi_codec_list, ++ .quirk_data = &mtl_lt6911_hdmi, ++ .sof_tplg_filename = "sof-mtl-rt5682-ssp1-hdmi-ssp02.tplg", ++ }, + /* place boards for each headphone codec: sof driver will complete the + * tplg name and machine driver will detect the amp type + */ +diff --git a/sound/soc/mediatek/mt8188/mt8188-mt6359.c b/sound/soc/mediatek/mt8188/mt8188-mt6359.c +index 4eed90d13a5326..62429e8e57b559 100644 +--- a/sound/soc/mediatek/mt8188/mt8188-mt6359.c ++++ b/sound/soc/mediatek/mt8188/mt8188-mt6359.c +@@ -188,9 +188,7 @@ SND_SOC_DAILINK_DEFS(pcm1, + SND_SOC_DAILINK_DEFS(ul_src, + DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC")), + DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", +- "mt6359-snd-codec-aif1"), +- COMP_CODEC("dmic-codec", +- "dmic-hifi")), ++ "mt6359-snd-codec-aif1")), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + + SND_SOC_DAILINK_DEFS(AFE_SOF_DL2, +diff --git a/sound/soc/sdw_utils/soc_sdw_utils.c b/sound/soc/sdw_utils/soc_sdw_utils.c +index a6070f822eb9e4..e6ac5c0fd3bec8 100644 +--- a/sound/soc/sdw_utils/soc_sdw_utils.c ++++ b/sound/soc/sdw_utils/soc_sdw_utils.c +@@ -363,6 +363,8 @@ struct asoc_sdw_codec_info codec_info_list[] = { + .num_controls = ARRAY_SIZE(generic_spk_controls), + .widgets = generic_spk_widgets, + .num_widgets = ARRAY_SIZE(generic_spk_widgets), ++ .quirk = SOC_SDW_CODEC_SPKR, ++ .quirk_exclude = true, + }, + { + .direction = {false, true}, +@@ -487,6 +489,8 @@ struct asoc_sdw_codec_info codec_info_list[] = { + .rtd_init = asoc_sdw_cs42l43_dmic_rtd_init, + .widgets = generic_dmic_widgets, + .num_widgets = ARRAY_SIZE(generic_dmic_widgets), ++ .quirk = SOC_SDW_CODEC_MIC, ++ .quirk_exclude = true, + }, + { + .direction = {false, true}, +@@ -1112,7 +1116,8 @@ int asoc_sdw_parse_sdw_endpoints(struct snd_soc_card *card, + dai_info = &codec_info->dais[adr_end->num]; + soc_dai = asoc_sdw_find_dailink(soc_dais, adr_end); + +- if (dai_info->quirk && !(dai_info->quirk & ctx->mc_quirk)) ++ if (dai_info->quirk && ++ !(dai_info->quirk_exclude ^ !!(dai_info->quirk & ctx->mc_quirk))) + continue; + + dev_dbg(dev, +diff --git a/sound/soc/sof/ipc3-topology.c b/sound/soc/sof/ipc3-topology.c +index be61e377e59e03..e98b53b67d12b9 100644 +--- a/sound/soc/sof/ipc3-topology.c ++++ b/sound/soc/sof/ipc3-topology.c +@@ -20,6 +20,9 @@ + /* size of tplg ABI in bytes */ + #define SOF_IPC3_TPLG_ABI_SIZE 3 + ++/* Base of SOF_DAI_INTEL_ALH, this should be aligned with SOC_SDW_INTEL_BIDIR_PDI_BASE */ ++#define INTEL_ALH_DAI_INDEX_BASE 2 ++ + struct sof_widget_data { + int ctrl_type; + int ipc_cmd; +@@ -1585,14 +1588,26 @@ static int sof_ipc3_widget_setup_comp_dai(struct snd_sof_widget *swidget) + ret = sof_update_ipc_object(scomp, comp_dai, SOF_DAI_TOKENS, swidget->tuples, + swidget->num_tuples, sizeof(*comp_dai), 1); + if (ret < 0) +- goto free; ++ goto free_comp; + + /* update comp_tokens */ + ret = sof_update_ipc_object(scomp, &comp_dai->config, SOF_COMP_TOKENS, + swidget->tuples, swidget->num_tuples, + sizeof(comp_dai->config), 1); + if (ret < 0) +- goto free; ++ goto free_comp; ++ ++ /* Subtract the base to match the FW dai index. */ ++ if (comp_dai->type == SOF_DAI_INTEL_ALH) { ++ if (comp_dai->dai_index < INTEL_ALH_DAI_INDEX_BASE) { ++ dev_err(sdev->dev, ++ "Invalid ALH dai index %d, only Pin numbers >= %d can be used\n", ++ comp_dai->dai_index, INTEL_ALH_DAI_INDEX_BASE); ++ ret = -EINVAL; ++ goto free_comp; ++ } ++ comp_dai->dai_index -= INTEL_ALH_DAI_INDEX_BASE; ++ } + + dev_dbg(scomp->dev, "dai %s: type %d index %d\n", + swidget->widget->name, comp_dai->type, comp_dai->dai_index); +@@ -2167,8 +2182,16 @@ static int sof_ipc3_dai_config(struct snd_sof_dev *sdev, struct snd_sof_widget * + case SOF_DAI_INTEL_ALH: + if (data) { + /* save the dai_index during hw_params and reuse it for hw_free */ +- if (flags & SOF_DAI_CONFIG_FLAGS_HW_PARAMS) +- config->dai_index = data->dai_index; ++ if (flags & SOF_DAI_CONFIG_FLAGS_HW_PARAMS) { ++ /* Subtract the base to match the FW dai index. */ ++ if (data->dai_index < INTEL_ALH_DAI_INDEX_BASE) { ++ dev_err(sdev->dev, ++ "Invalid ALH dai index %d, only Pin numbers >= %d can be used\n", ++ config->dai_index, INTEL_ALH_DAI_INDEX_BASE); ++ return -EINVAL; ++ } ++ config->dai_index = data->dai_index - INTEL_ALH_DAI_INDEX_BASE; ++ } + config->alh.stream_id = data->dai_data; + } + break; +diff --git a/sound/usb/endpoint.c b/sound/usb/endpoint.c +index 568099467dbbcc..a29f28eb7d0c64 100644 +--- a/sound/usb/endpoint.c ++++ b/sound/usb/endpoint.c +@@ -403,10 +403,15 @@ static int prepare_inbound_urb(struct snd_usb_endpoint *ep, + static void notify_xrun(struct snd_usb_endpoint *ep) + { + struct snd_usb_substream *data_subs; ++ struct snd_pcm_substream *psubs; + + data_subs = READ_ONCE(ep->data_subs); +- if (data_subs && data_subs->pcm_substream) +- snd_pcm_stop_xrun(data_subs->pcm_substream); ++ if (!data_subs) ++ return; ++ psubs = data_subs->pcm_substream; ++ if (psubs && psubs->runtime && ++ psubs->runtime->state == SNDRV_PCM_STATE_RUNNING) ++ snd_pcm_stop_xrun(psubs); + } + + static struct snd_usb_packet_info * +@@ -562,7 +567,10 @@ static void snd_complete_urb(struct urb *urb) + push_back_to_ready_list(ep, ctx); + clear_bit(ctx->index, &ep->active_mask); + snd_usb_queue_pending_output_urbs(ep, false); +- atomic_dec(&ep->submitted_urbs); /* decrement at last */ ++ /* decrement at last, and check xrun */ ++ if (atomic_dec_and_test(&ep->submitted_urbs) && ++ !snd_usb_endpoint_implicit_feedback_sink(ep)) ++ notify_xrun(ep); + return; + } + +diff --git a/sound/usb/mixer.c b/sound/usb/mixer.c +index bd67027c767751..0591da2839269b 100644 +--- a/sound/usb/mixer.c ++++ b/sound/usb/mixer.c +@@ -1084,6 +1084,21 @@ static void volume_control_quirks(struct usb_mixer_elem_info *cval, + struct snd_kcontrol *kctl) + { + struct snd_usb_audio *chip = cval->head.mixer->chip; ++ ++ if (chip->quirk_flags & QUIRK_FLAG_MIC_RES_384) { ++ if (!strcmp(kctl->id.name, "Mic Capture Volume")) { ++ usb_audio_info(chip, ++ "set resolution quirk: cval->res = 384\n"); ++ cval->res = 384; ++ } ++ } else if (chip->quirk_flags & QUIRK_FLAG_MIC_RES_16) { ++ if (!strcmp(kctl->id.name, "Mic Capture Volume")) { ++ usb_audio_info(chip, ++ "set resolution quirk: cval->res = 16\n"); ++ cval->res = 16; ++ } ++ } ++ + switch (chip->usb_id) { + case USB_ID(0x0763, 0x2030): /* M-Audio Fast Track C400 */ + case USB_ID(0x0763, 0x2031): /* M-Audio Fast Track C600 */ +@@ -1168,27 +1183,6 @@ static void volume_control_quirks(struct usb_mixer_elem_info *cval, + } + break; + +- case USB_ID(0x046d, 0x0807): /* Logitech Webcam C500 */ +- case USB_ID(0x046d, 0x0808): +- case USB_ID(0x046d, 0x0809): +- case USB_ID(0x046d, 0x0819): /* Logitech Webcam C210 */ +- case USB_ID(0x046d, 0x081b): /* HD Webcam c310 */ +- case USB_ID(0x046d, 0x081d): /* HD Webcam c510 */ +- case USB_ID(0x046d, 0x0825): /* HD Webcam c270 */ +- case USB_ID(0x046d, 0x0826): /* HD Webcam c525 */ +- case USB_ID(0x046d, 0x08ca): /* Logitech Quickcam Fusion */ +- case USB_ID(0x046d, 0x0991): +- case USB_ID(0x046d, 0x09a2): /* QuickCam Communicate Deluxe/S7500 */ +- /* Most audio usb devices lie about volume resolution. +- * Most Logitech webcams have res = 384. +- * Probably there is some logitech magic behind this number --fishor +- */ +- if (!strcmp(kctl->id.name, "Mic Capture Volume")) { +- usb_audio_info(chip, +- "set resolution quirk: cval->res = 384\n"); +- cval->res = 384; +- } +- break; + case USB_ID(0x0495, 0x3042): /* ESS Technology Asus USB DAC */ + if ((strstr(kctl->id.name, "Playback Volume") != NULL) || + strstr(kctl->id.name, "Capture Volume") != NULL) { +@@ -1197,28 +1191,6 @@ static void volume_control_quirks(struct usb_mixer_elem_info *cval, + cval->res = 1; + } + break; +- case USB_ID(0x1224, 0x2a25): /* Jieli Technology USB PHY 2.0 */ +- if (!strcmp(kctl->id.name, "Mic Capture Volume")) { +- usb_audio_info(chip, +- "set resolution quirk: cval->res = 16\n"); +- cval->res = 16; +- } +- break; +- case USB_ID(0x1bcf, 0x2283): /* NexiGo N930AF FHD Webcam */ +- case USB_ID(0x03f0, 0x654a): /* HP 320 FHD Webcam */ +- if (!strcmp(kctl->id.name, "Mic Capture Volume")) { +- usb_audio_info(chip, +- "set resolution quirk: cval->res = 16\n"); +- cval->res = 16; +- } +- break; +- case USB_ID(0x1bcf, 0x2281): /* HD Webcam */ +- if (!strcmp(kctl->id.name, "Mic Capture Volume")) { +- usb_audio_info(chip, +- "set resolution quirk: cval->res = 16\n"); +- cval->res = 16; +- } +- break; + } + } + +diff --git a/sound/usb/mixer_maps.c b/sound/usb/mixer_maps.c +index 23260aa1919d32..0e9b5431a47f20 100644 +--- a/sound/usb/mixer_maps.c ++++ b/sound/usb/mixer_maps.c +@@ -621,6 +621,16 @@ static const struct usbmix_ctl_map usbmix_ctl_maps[] = { + .id = USB_ID(0x1b1c, 0x0a42), + .map = corsair_virtuoso_map, + }, ++ { ++ /* Corsair HS80 RGB Wireless (wired mode) */ ++ .id = USB_ID(0x1b1c, 0x0a6a), ++ .map = corsair_virtuoso_map, ++ }, ++ { ++ /* Corsair HS80 RGB Wireless (wireless mode) */ ++ .id = USB_ID(0x1b1c, 0x0a6b), ++ .map = corsair_virtuoso_map, ++ }, + { /* Gigabyte TRX40 Aorus Master (rear panel + front mic) */ + .id = USB_ID(0x0414, 0xa001), + .map = aorus_master_alc1220vb_map, +diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c +index 6456e87e2f3974..a95ebcf4e46e76 100644 +--- a/sound/usb/mixer_quirks.c ++++ b/sound/usb/mixer_quirks.c +@@ -4059,6 +4059,7 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) + err = snd_bbfpro_controls_create(mixer); + break; + case USB_ID(0x2a39, 0x3f8c): /* RME Digiface USB */ ++ case USB_ID(0x2a39, 0x3fa0): /* RME Digiface USB (alternate) */ + err = snd_rme_digiface_controls_create(mixer); + break; + case USB_ID(0x2b73, 0x0017): /* Pioneer DJ DJM-250MK2 */ +diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h +index 199d0603cf8e59..3f8beacca27a17 100644 +--- a/sound/usb/quirks-table.h ++++ b/sound/usb/quirks-table.h +@@ -3616,176 +3616,181 @@ YAMAHA_DEVICE(0x7010, "UB99"), + } + } + }, +-{ +- /* Only claim interface 0 */ +- .match_flags = USB_DEVICE_ID_MATCH_VENDOR | +- USB_DEVICE_ID_MATCH_PRODUCT | +- USB_DEVICE_ID_MATCH_INT_CLASS | +- USB_DEVICE_ID_MATCH_INT_NUMBER, +- .idVendor = 0x2a39, +- .idProduct = 0x3f8c, +- .bInterfaceClass = USB_CLASS_VENDOR_SPEC, +- .bInterfaceNumber = 0, +- QUIRK_DRIVER_INFO { +- QUIRK_DATA_COMPOSITE { ++#define QUIRK_RME_DIGIFACE(pid) \ ++{ \ ++ /* Only claim interface 0 */ \ ++ .match_flags = USB_DEVICE_ID_MATCH_VENDOR | \ ++ USB_DEVICE_ID_MATCH_PRODUCT | \ ++ USB_DEVICE_ID_MATCH_INT_CLASS | \ ++ USB_DEVICE_ID_MATCH_INT_NUMBER, \ ++ .idVendor = 0x2a39, \ ++ .idProduct = pid, \ ++ .bInterfaceClass = USB_CLASS_VENDOR_SPEC, \ ++ .bInterfaceNumber = 0, \ ++ QUIRK_DRIVER_INFO { \ ++ QUIRK_DATA_COMPOSITE { \ + /* + * Three modes depending on sample rate band, + * with different channel counts for in/out +- */ +- { QUIRK_DATA_STANDARD_MIXER(0) }, +- { +- QUIRK_DATA_AUDIOFORMAT(0) { +- .formats = SNDRV_PCM_FMTBIT_S32_LE, +- .channels = 34, // outputs +- .fmt_bits = 24, +- .iface = 0, +- .altsetting = 1, +- .altset_idx = 1, +- .endpoint = 0x02, +- .ep_idx = 1, +- .ep_attr = USB_ENDPOINT_XFER_ISOC | +- USB_ENDPOINT_SYNC_ASYNC, +- .rates = SNDRV_PCM_RATE_32000 | +- SNDRV_PCM_RATE_44100 | +- SNDRV_PCM_RATE_48000, +- .rate_min = 32000, +- .rate_max = 48000, +- .nr_rates = 3, +- .rate_table = (unsigned int[]) { +- 32000, 44100, 48000, +- }, +- .sync_ep = 0x81, +- .sync_iface = 0, +- .sync_altsetting = 1, +- .sync_ep_idx = 0, +- .implicit_fb = 1, +- }, +- }, +- { +- QUIRK_DATA_AUDIOFORMAT(0) { +- .formats = SNDRV_PCM_FMTBIT_S32_LE, +- .channels = 18, // outputs +- .fmt_bits = 24, +- .iface = 0, +- .altsetting = 1, +- .altset_idx = 1, +- .endpoint = 0x02, +- .ep_idx = 1, +- .ep_attr = USB_ENDPOINT_XFER_ISOC | +- USB_ENDPOINT_SYNC_ASYNC, +- .rates = SNDRV_PCM_RATE_64000 | +- SNDRV_PCM_RATE_88200 | +- SNDRV_PCM_RATE_96000, +- .rate_min = 64000, +- .rate_max = 96000, +- .nr_rates = 3, +- .rate_table = (unsigned int[]) { +- 64000, 88200, 96000, +- }, +- .sync_ep = 0x81, +- .sync_iface = 0, +- .sync_altsetting = 1, +- .sync_ep_idx = 0, +- .implicit_fb = 1, +- }, +- }, +- { +- QUIRK_DATA_AUDIOFORMAT(0) { +- .formats = SNDRV_PCM_FMTBIT_S32_LE, +- .channels = 10, // outputs +- .fmt_bits = 24, +- .iface = 0, +- .altsetting = 1, +- .altset_idx = 1, +- .endpoint = 0x02, +- .ep_idx = 1, +- .ep_attr = USB_ENDPOINT_XFER_ISOC | +- USB_ENDPOINT_SYNC_ASYNC, +- .rates = SNDRV_PCM_RATE_KNOT | +- SNDRV_PCM_RATE_176400 | +- SNDRV_PCM_RATE_192000, +- .rate_min = 128000, +- .rate_max = 192000, +- .nr_rates = 3, +- .rate_table = (unsigned int[]) { +- 128000, 176400, 192000, +- }, +- .sync_ep = 0x81, +- .sync_iface = 0, +- .sync_altsetting = 1, +- .sync_ep_idx = 0, +- .implicit_fb = 1, +- }, +- }, +- { +- QUIRK_DATA_AUDIOFORMAT(0) { +- .formats = SNDRV_PCM_FMTBIT_S32_LE, +- .channels = 32, // inputs +- .fmt_bits = 24, +- .iface = 0, +- .altsetting = 1, +- .altset_idx = 1, +- .endpoint = 0x81, +- .ep_attr = USB_ENDPOINT_XFER_ISOC | +- USB_ENDPOINT_SYNC_ASYNC, +- .rates = SNDRV_PCM_RATE_32000 | +- SNDRV_PCM_RATE_44100 | +- SNDRV_PCM_RATE_48000, +- .rate_min = 32000, +- .rate_max = 48000, +- .nr_rates = 3, +- .rate_table = (unsigned int[]) { +- 32000, 44100, 48000, +- } +- } +- }, +- { +- QUIRK_DATA_AUDIOFORMAT(0) { +- .formats = SNDRV_PCM_FMTBIT_S32_LE, +- .channels = 16, // inputs +- .fmt_bits = 24, +- .iface = 0, +- .altsetting = 1, +- .altset_idx = 1, +- .endpoint = 0x81, +- .ep_attr = USB_ENDPOINT_XFER_ISOC | +- USB_ENDPOINT_SYNC_ASYNC, +- .rates = SNDRV_PCM_RATE_64000 | +- SNDRV_PCM_RATE_88200 | +- SNDRV_PCM_RATE_96000, +- .rate_min = 64000, +- .rate_max = 96000, +- .nr_rates = 3, +- .rate_table = (unsigned int[]) { +- 64000, 88200, 96000, +- } +- } +- }, +- { +- QUIRK_DATA_AUDIOFORMAT(0) { +- .formats = SNDRV_PCM_FMTBIT_S32_LE, +- .channels = 8, // inputs +- .fmt_bits = 24, +- .iface = 0, +- .altsetting = 1, +- .altset_idx = 1, +- .endpoint = 0x81, +- .ep_attr = USB_ENDPOINT_XFER_ISOC | +- USB_ENDPOINT_SYNC_ASYNC, +- .rates = SNDRV_PCM_RATE_KNOT | +- SNDRV_PCM_RATE_176400 | +- SNDRV_PCM_RATE_192000, +- .rate_min = 128000, +- .rate_max = 192000, +- .nr_rates = 3, +- .rate_table = (unsigned int[]) { +- 128000, 176400, 192000, +- } +- } +- }, +- QUIRK_COMPOSITE_END +- } +- } +-}, ++ */ \ ++ { QUIRK_DATA_STANDARD_MIXER(0) }, \ ++ { \ ++ QUIRK_DATA_AUDIOFORMAT(0) { \ ++ .formats = SNDRV_PCM_FMTBIT_S32_LE, \ ++ .channels = 34, /* outputs */ \ ++ .fmt_bits = 24, \ ++ .iface = 0, \ ++ .altsetting = 1, \ ++ .altset_idx = 1, \ ++ .endpoint = 0x02, \ ++ .ep_idx = 1, \ ++ .ep_attr = USB_ENDPOINT_XFER_ISOC | \ ++ USB_ENDPOINT_SYNC_ASYNC, \ ++ .rates = SNDRV_PCM_RATE_32000 | \ ++ SNDRV_PCM_RATE_44100 | \ ++ SNDRV_PCM_RATE_48000, \ ++ .rate_min = 32000, \ ++ .rate_max = 48000, \ ++ .nr_rates = 3, \ ++ .rate_table = (unsigned int[]) { \ ++ 32000, 44100, 48000, \ ++ }, \ ++ .sync_ep = 0x81, \ ++ .sync_iface = 0, \ ++ .sync_altsetting = 1, \ ++ .sync_ep_idx = 0, \ ++ .implicit_fb = 1, \ ++ }, \ ++ }, \ ++ { \ ++ QUIRK_DATA_AUDIOFORMAT(0) { \ ++ .formats = SNDRV_PCM_FMTBIT_S32_LE, \ ++ .channels = 18, /* outputs */ \ ++ .fmt_bits = 24, \ ++ .iface = 0, \ ++ .altsetting = 1, \ ++ .altset_idx = 1, \ ++ .endpoint = 0x02, \ ++ .ep_idx = 1, \ ++ .ep_attr = USB_ENDPOINT_XFER_ISOC | \ ++ USB_ENDPOINT_SYNC_ASYNC, \ ++ .rates = SNDRV_PCM_RATE_64000 | \ ++ SNDRV_PCM_RATE_88200 | \ ++ SNDRV_PCM_RATE_96000, \ ++ .rate_min = 64000, \ ++ .rate_max = 96000, \ ++ .nr_rates = 3, \ ++ .rate_table = (unsigned int[]) { \ ++ 64000, 88200, 96000, \ ++ }, \ ++ .sync_ep = 0x81, \ ++ .sync_iface = 0, \ ++ .sync_altsetting = 1, \ ++ .sync_ep_idx = 0, \ ++ .implicit_fb = 1, \ ++ }, \ ++ }, \ ++ { \ ++ QUIRK_DATA_AUDIOFORMAT(0) { \ ++ .formats = SNDRV_PCM_FMTBIT_S32_LE, \ ++ .channels = 10, /* outputs */ \ ++ .fmt_bits = 24, \ ++ .iface = 0, \ ++ .altsetting = 1, \ ++ .altset_idx = 1, \ ++ .endpoint = 0x02, \ ++ .ep_idx = 1, \ ++ .ep_attr = USB_ENDPOINT_XFER_ISOC | \ ++ USB_ENDPOINT_SYNC_ASYNC, \ ++ .rates = SNDRV_PCM_RATE_KNOT | \ ++ SNDRV_PCM_RATE_176400 | \ ++ SNDRV_PCM_RATE_192000, \ ++ .rate_min = 128000, \ ++ .rate_max = 192000, \ ++ .nr_rates = 3, \ ++ .rate_table = (unsigned int[]) { \ ++ 128000, 176400, 192000, \ ++ }, \ ++ .sync_ep = 0x81, \ ++ .sync_iface = 0, \ ++ .sync_altsetting = 1, \ ++ .sync_ep_idx = 0, \ ++ .implicit_fb = 1, \ ++ }, \ ++ }, \ ++ { \ ++ QUIRK_DATA_AUDIOFORMAT(0) { \ ++ .formats = SNDRV_PCM_FMTBIT_S32_LE, \ ++ .channels = 32, /* inputs */ \ ++ .fmt_bits = 24, \ ++ .iface = 0, \ ++ .altsetting = 1, \ ++ .altset_idx = 1, \ ++ .endpoint = 0x81, \ ++ .ep_attr = USB_ENDPOINT_XFER_ISOC | \ ++ USB_ENDPOINT_SYNC_ASYNC, \ ++ .rates = SNDRV_PCM_RATE_32000 | \ ++ SNDRV_PCM_RATE_44100 | \ ++ SNDRV_PCM_RATE_48000, \ ++ .rate_min = 32000, \ ++ .rate_max = 48000, \ ++ .nr_rates = 3, \ ++ .rate_table = (unsigned int[]) { \ ++ 32000, 44100, 48000, \ ++ } \ ++ } \ ++ }, \ ++ { \ ++ QUIRK_DATA_AUDIOFORMAT(0) { \ ++ .formats = SNDRV_PCM_FMTBIT_S32_LE, \ ++ .channels = 16, /* inputs */ \ ++ .fmt_bits = 24, \ ++ .iface = 0, \ ++ .altsetting = 1, \ ++ .altset_idx = 1, \ ++ .endpoint = 0x81, \ ++ .ep_attr = USB_ENDPOINT_XFER_ISOC | \ ++ USB_ENDPOINT_SYNC_ASYNC, \ ++ .rates = SNDRV_PCM_RATE_64000 | \ ++ SNDRV_PCM_RATE_88200 | \ ++ SNDRV_PCM_RATE_96000, \ ++ .rate_min = 64000, \ ++ .rate_max = 96000, \ ++ .nr_rates = 3, \ ++ .rate_table = (unsigned int[]) { \ ++ 64000, 88200, 96000, \ ++ } \ ++ } \ ++ }, \ ++ { \ ++ QUIRK_DATA_AUDIOFORMAT(0) { \ ++ .formats = SNDRV_PCM_FMTBIT_S32_LE, \ ++ .channels = 8, /* inputs */ \ ++ .fmt_bits = 24, \ ++ .iface = 0, \ ++ .altsetting = 1, \ ++ .altset_idx = 1, \ ++ .endpoint = 0x81, \ ++ .ep_attr = USB_ENDPOINT_XFER_ISOC | \ ++ USB_ENDPOINT_SYNC_ASYNC, \ ++ .rates = SNDRV_PCM_RATE_KNOT | \ ++ SNDRV_PCM_RATE_176400 | \ ++ SNDRV_PCM_RATE_192000, \ ++ .rate_min = 128000, \ ++ .rate_max = 192000, \ ++ .nr_rates = 3, \ ++ .rate_table = (unsigned int[]) { \ ++ 128000, 176400, 192000, \ ++ } \ ++ } \ ++ }, \ ++ QUIRK_COMPOSITE_END \ ++ } \ ++ } \ ++} ++ ++QUIRK_RME_DIGIFACE(0x3f8c), ++QUIRK_RME_DIGIFACE(0x3fa0), ++ + #undef USB_DEVICE_VENDOR_SPEC + #undef USB_AUDIO_DEVICE +diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c +index 8538fdfce3535b..00101875d9a8d5 100644 +--- a/sound/usb/quirks.c ++++ b/sound/usb/quirks.c +@@ -555,7 +555,7 @@ int snd_usb_create_quirk(struct snd_usb_audio *chip, + static int snd_usb_extigy_boot_quirk(struct usb_device *dev, struct usb_interface *intf) + { + struct usb_host_config *config = dev->actconfig; +- struct usb_device_descriptor new_device_descriptor; ++ struct usb_device_descriptor *new_device_descriptor __free(kfree) = NULL; + int err; + + if (le16_to_cpu(get_cfg_desc(config)->wTotalLength) == EXTIGY_FIRMWARE_SIZE_OLD || +@@ -566,15 +566,19 @@ static int snd_usb_extigy_boot_quirk(struct usb_device *dev, struct usb_interfac + 0x10, 0x43, 0x0001, 0x000a, NULL, 0); + if (err < 0) + dev_dbg(&dev->dev, "error sending boot message: %d\n", err); ++ ++ new_device_descriptor = kmalloc(sizeof(*new_device_descriptor), GFP_KERNEL); ++ if (!new_device_descriptor) ++ return -ENOMEM; + err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, +- &new_device_descriptor, sizeof(new_device_descriptor)); ++ new_device_descriptor, sizeof(*new_device_descriptor)); + if (err < 0) + dev_dbg(&dev->dev, "error usb_get_descriptor: %d\n", err); +- if (new_device_descriptor.bNumConfigurations > dev->descriptor.bNumConfigurations) ++ if (new_device_descriptor->bNumConfigurations > dev->descriptor.bNumConfigurations) + dev_dbg(&dev->dev, "error too large bNumConfigurations: %d\n", +- new_device_descriptor.bNumConfigurations); ++ new_device_descriptor->bNumConfigurations); + else +- memcpy(&dev->descriptor, &new_device_descriptor, sizeof(dev->descriptor)); ++ memcpy(&dev->descriptor, new_device_descriptor, sizeof(dev->descriptor)); + err = usb_reset_configuration(dev); + if (err < 0) + dev_dbg(&dev->dev, "error usb_reset_configuration: %d\n", err); +@@ -906,7 +910,7 @@ static void mbox2_setup_48_24_magic(struct usb_device *dev) + static int snd_usb_mbox2_boot_quirk(struct usb_device *dev) + { + struct usb_host_config *config = dev->actconfig; +- struct usb_device_descriptor new_device_descriptor; ++ struct usb_device_descriptor *new_device_descriptor __free(kfree) = NULL; + int err; + u8 bootresponse[0x12]; + int fwsize; +@@ -941,15 +945,19 @@ static int snd_usb_mbox2_boot_quirk(struct usb_device *dev) + + dev_dbg(&dev->dev, "device initialised!\n"); + ++ new_device_descriptor = kmalloc(sizeof(*new_device_descriptor), GFP_KERNEL); ++ if (!new_device_descriptor) ++ return -ENOMEM; ++ + err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, +- &new_device_descriptor, sizeof(new_device_descriptor)); ++ new_device_descriptor, sizeof(*new_device_descriptor)); + if (err < 0) + dev_dbg(&dev->dev, "error usb_get_descriptor: %d\n", err); +- if (new_device_descriptor.bNumConfigurations > dev->descriptor.bNumConfigurations) ++ if (new_device_descriptor->bNumConfigurations > dev->descriptor.bNumConfigurations) + dev_dbg(&dev->dev, "error too large bNumConfigurations: %d\n", +- new_device_descriptor.bNumConfigurations); ++ new_device_descriptor->bNumConfigurations); + else +- memcpy(&dev->descriptor, &new_device_descriptor, sizeof(dev->descriptor)); ++ memcpy(&dev->descriptor, new_device_descriptor, sizeof(dev->descriptor)); + + err = usb_reset_configuration(dev); + if (err < 0) +@@ -1259,7 +1267,7 @@ static void mbox3_setup_defaults(struct usb_device *dev) + static int snd_usb_mbox3_boot_quirk(struct usb_device *dev) + { + struct usb_host_config *config = dev->actconfig; +- struct usb_device_descriptor new_device_descriptor; ++ struct usb_device_descriptor *new_device_descriptor __free(kfree) = NULL; + int err; + int descriptor_size; + +@@ -1272,15 +1280,19 @@ static int snd_usb_mbox3_boot_quirk(struct usb_device *dev) + + dev_dbg(&dev->dev, "MBOX3: device initialised!\n"); + ++ new_device_descriptor = kmalloc(sizeof(*new_device_descriptor), GFP_KERNEL); ++ if (!new_device_descriptor) ++ return -ENOMEM; ++ + err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, +- &new_device_descriptor, sizeof(new_device_descriptor)); ++ new_device_descriptor, sizeof(*new_device_descriptor)); + if (err < 0) + dev_dbg(&dev->dev, "MBOX3: error usb_get_descriptor: %d\n", err); +- if (new_device_descriptor.bNumConfigurations > dev->descriptor.bNumConfigurations) ++ if (new_device_descriptor->bNumConfigurations > dev->descriptor.bNumConfigurations) + dev_dbg(&dev->dev, "MBOX3: error too large bNumConfigurations: %d\n", +- new_device_descriptor.bNumConfigurations); ++ new_device_descriptor->bNumConfigurations); + else +- memcpy(&dev->descriptor, &new_device_descriptor, sizeof(dev->descriptor)); ++ memcpy(&dev->descriptor, new_device_descriptor, sizeof(dev->descriptor)); + + err = usb_reset_configuration(dev); + if (err < 0) +@@ -1653,6 +1665,7 @@ int snd_usb_apply_boot_quirk(struct usb_device *dev, + return snd_usb_motu_microbookii_boot_quirk(dev); + break; + case USB_ID(0x2a39, 0x3f8c): /* RME Digiface USB */ ++ case USB_ID(0x2a39, 0x3fa0): /* RME Digiface USB (alternate) */ + return snd_usb_rme_digiface_boot_quirk(dev); + } + +@@ -1866,6 +1879,7 @@ void snd_usb_set_format_quirk(struct snd_usb_substream *subs, + mbox3_set_format_quirk(subs, fmt); /* Digidesign Mbox 3 */ + break; + case USB_ID(0x2a39, 0x3f8c): /* RME Digiface USB */ ++ case USB_ID(0x2a39, 0x3fa0): /* RME Digiface USB (alternate) */ + rme_digiface_set_format_quirk(subs); + break; + } +@@ -2130,7 +2144,7 @@ struct usb_audio_quirk_flags_table { + static const struct usb_audio_quirk_flags_table quirk_flags_table[] = { + /* Device matches */ + DEVICE_FLG(0x03f0, 0x654a, /* HP 320 FHD Webcam */ +- QUIRK_FLAG_GET_SAMPLE_RATE), ++ QUIRK_FLAG_GET_SAMPLE_RATE | QUIRK_FLAG_MIC_RES_16), + DEVICE_FLG(0x041e, 0x3000, /* Creative SB Extigy */ + QUIRK_FLAG_IGNORE_CTL_ERROR), + DEVICE_FLG(0x041e, 0x4080, /* Creative Live Cam VF0610 */ +@@ -2138,10 +2152,31 @@ static const struct usb_audio_quirk_flags_table quirk_flags_table[] = { + DEVICE_FLG(0x045e, 0x083c, /* MS USB Link headset */ + QUIRK_FLAG_GET_SAMPLE_RATE | QUIRK_FLAG_CTL_MSG_DELAY | + QUIRK_FLAG_DISABLE_AUTOSUSPEND), ++ DEVICE_FLG(0x046d, 0x0807, /* Logitech Webcam C500 */ ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), ++ DEVICE_FLG(0x046d, 0x0808, /* Logitech Webcam C600 */ ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), ++ DEVICE_FLG(0x046d, 0x0809, ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), ++ DEVICE_FLG(0x046d, 0x0819, /* Logitech Webcam C210 */ ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), ++ DEVICE_FLG(0x046d, 0x081b, /* HD Webcam c310 */ ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), ++ DEVICE_FLG(0x046d, 0x081d, /* HD Webcam c510 */ ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), ++ DEVICE_FLG(0x046d, 0x0825, /* HD Webcam c270 */ ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), ++ DEVICE_FLG(0x046d, 0x0826, /* HD Webcam c525 */ ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), + DEVICE_FLG(0x046d, 0x084c, /* Logitech ConferenceCam Connect */ + QUIRK_FLAG_GET_SAMPLE_RATE | QUIRK_FLAG_CTL_MSG_DELAY_1M), ++ DEVICE_FLG(0x046d, 0x08ca, /* Logitech Quickcam Fusion */ ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), + DEVICE_FLG(0x046d, 0x0991, /* Logitech QuickCam Pro */ +- QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_IGNORE_CTL_ERROR), ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_IGNORE_CTL_ERROR | ++ QUIRK_FLAG_MIC_RES_384), ++ DEVICE_FLG(0x046d, 0x09a2, /* QuickCam Communicate Deluxe/S7500 */ ++ QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_MIC_RES_384), + DEVICE_FLG(0x046d, 0x09a4, /* Logitech QuickCam E 3500 */ + QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_IGNORE_CTL_ERROR), + DEVICE_FLG(0x0499, 0x1509, /* Steinberg UR22 */ +@@ -2209,7 +2244,7 @@ static const struct usb_audio_quirk_flags_table quirk_flags_table[] = { + DEVICE_FLG(0x0fd9, 0x0008, /* Hauppauge HVR-950Q */ + QUIRK_FLAG_SHARE_MEDIA_DEVICE | QUIRK_FLAG_ALIGN_TRANSFER), + DEVICE_FLG(0x1224, 0x2a25, /* Jieli Technology USB PHY 2.0 */ +- QUIRK_FLAG_GET_SAMPLE_RATE), ++ QUIRK_FLAG_GET_SAMPLE_RATE | QUIRK_FLAG_MIC_RES_16), + DEVICE_FLG(0x1395, 0x740a, /* Sennheiser DECT */ + QUIRK_FLAG_GET_SAMPLE_RATE), + DEVICE_FLG(0x1397, 0x0507, /* Behringer UMC202HD */ +@@ -2247,9 +2282,9 @@ static const struct usb_audio_quirk_flags_table quirk_flags_table[] = { + DEVICE_FLG(0x19f7, 0x0035, /* RODE NT-USB+ */ + QUIRK_FLAG_GET_SAMPLE_RATE), + DEVICE_FLG(0x1bcf, 0x2281, /* HD Webcam */ +- QUIRK_FLAG_GET_SAMPLE_RATE), ++ QUIRK_FLAG_GET_SAMPLE_RATE | QUIRK_FLAG_MIC_RES_16), + DEVICE_FLG(0x1bcf, 0x2283, /* NexiGo N930AF FHD Webcam */ +- QUIRK_FLAG_GET_SAMPLE_RATE), ++ QUIRK_FLAG_GET_SAMPLE_RATE | QUIRK_FLAG_MIC_RES_16), + DEVICE_FLG(0x2040, 0x7200, /* Hauppauge HVR-950Q */ + QUIRK_FLAG_SHARE_MEDIA_DEVICE | QUIRK_FLAG_ALIGN_TRANSFER), + DEVICE_FLG(0x2040, 0x7201, /* Hauppauge HVR-950Q-MXL */ +diff --git a/sound/usb/usbaudio.h b/sound/usb/usbaudio.h +index b0f042c996087e..158ec053dc44dd 100644 +--- a/sound/usb/usbaudio.h ++++ b/sound/usb/usbaudio.h +@@ -194,6 +194,8 @@ extern bool snd_usb_skip_validation; + * QUIRK_FLAG_FIXED_RATE + * Do not set PCM rate (frequency) when only one rate is available + * for the given endpoint. ++ * QUIRK_FLAG_MIC_RES_16 and QUIRK_FLAG_MIC_RES_384 ++ * Set the fixed resolution for Mic Capture Volume (mostly for webcams) + */ + + #define QUIRK_FLAG_GET_SAMPLE_RATE (1U << 0) +@@ -218,5 +220,7 @@ extern bool snd_usb_skip_validation; + #define QUIRK_FLAG_IFACE_SKIP_CLOSE (1U << 19) + #define QUIRK_FLAG_FORCE_IFACE_RESET (1U << 20) + #define QUIRK_FLAG_FIXED_RATE (1U << 21) ++#define QUIRK_FLAG_MIC_RES_16 (1U << 22) ++#define QUIRK_FLAG_MIC_RES_384 (1U << 23) + + #endif /* __USBAUDIO_H */ +diff --git a/tools/bpf/bpftool/prog.c b/tools/bpf/bpftool/prog.c +index 2ff949ea82fa66..e71be67f1d8658 100644 +--- a/tools/bpf/bpftool/prog.c ++++ b/tools/bpf/bpftool/prog.c +@@ -822,11 +822,18 @@ prog_dump(struct bpf_prog_info *info, enum dump_mode mode, + printf("%s:\n", sym_name); + } + +- if (disasm_print_insn(img, lens[i], opcodes, +- name, disasm_opt, btf, +- prog_linfo, ksyms[i], i, +- linum)) +- goto exit_free; ++ if (ksyms) { ++ if (disasm_print_insn(img, lens[i], opcodes, ++ name, disasm_opt, btf, ++ prog_linfo, ksyms[i], i, ++ linum)) ++ goto exit_free; ++ } else { ++ if (disasm_print_insn(img, lens[i], opcodes, ++ name, disasm_opt, btf, ++ NULL, 0, 0, false)) ++ goto exit_free; ++ } + + img += lens[i]; + +diff --git a/tools/scripts/Makefile.arch b/tools/scripts/Makefile.arch +index f6a50f06dfc453..eabfe9f411d914 100644 +--- a/tools/scripts/Makefile.arch ++++ b/tools/scripts/Makefile.arch +@@ -7,8 +7,8 @@ HOSTARCH := $(shell uname -m | sed -e s/i.86/x86/ -e s/x86_64/x86/ \ + -e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ \ + -e s/riscv.*/riscv/ -e s/loongarch.*/loongarch/) + +-ifndef ARCH +-ARCH := $(HOSTARCH) ++ifeq ($(strip $(ARCH)),) ++override ARCH := $(HOSTARCH) + endif + + SRCARCH := $(ARCH) +diff --git a/tools/testing/selftests/arm64/fp/fp-stress.c b/tools/testing/selftests/arm64/fp/fp-stress.c +index faac24bdefeb94..80f22789504d66 100644 +--- a/tools/testing/selftests/arm64/fp/fp-stress.c ++++ b/tools/testing/selftests/arm64/fp/fp-stress.c +@@ -79,7 +79,7 @@ static void child_start(struct child_data *child, const char *program) + */ + ret = dup2(pipefd[1], 1); + if (ret == -1) { +- fprintf(stderr, "dup2() %d\n", errno); ++ printf("dup2() %d\n", errno); + exit(EXIT_FAILURE); + } + +@@ -89,7 +89,7 @@ static void child_start(struct child_data *child, const char *program) + */ + ret = dup2(startup_pipe[0], 3); + if (ret == -1) { +- fprintf(stderr, "dup2() %d\n", errno); ++ printf("dup2() %d\n", errno); + exit(EXIT_FAILURE); + } + +@@ -107,16 +107,15 @@ static void child_start(struct child_data *child, const char *program) + */ + ret = read(3, &i, sizeof(i)); + if (ret < 0) +- fprintf(stderr, "read(startp pipe) failed: %s (%d)\n", +- strerror(errno), errno); ++ printf("read(startp pipe) failed: %s (%d)\n", ++ strerror(errno), errno); + if (ret > 0) +- fprintf(stderr, "%d bytes of data on startup pipe\n", +- ret); ++ printf("%d bytes of data on startup pipe\n", ret); + close(3); + + ret = execl(program, program, NULL); +- fprintf(stderr, "execl(%s) failed: %d (%s)\n", +- program, errno, strerror(errno)); ++ printf("execl(%s) failed: %d (%s)\n", ++ program, errno, strerror(errno)); + + exit(EXIT_FAILURE); + } else { +diff --git a/tools/testing/selftests/arm64/pauth/pac.c b/tools/testing/selftests/arm64/pauth/pac.c +index b743daa772f55f..5a07b3958fbf29 100644 +--- a/tools/testing/selftests/arm64/pauth/pac.c ++++ b/tools/testing/selftests/arm64/pauth/pac.c +@@ -182,6 +182,9 @@ int exec_sign_all(struct signatures *signed_vals, size_t val) + return -1; + } + ++ close(new_stdin[1]); ++ close(new_stdout[0]); ++ + return 0; + } + +diff --git a/tools/testing/selftests/bpf/progs/verifier_bits_iter.c b/tools/testing/selftests/bpf/progs/verifier_bits_iter.c +index 7c881bca9af5c7..a7a6ae6c162fe0 100644 +--- a/tools/testing/selftests/bpf/progs/verifier_bits_iter.c ++++ b/tools/testing/selftests/bpf/progs/verifier_bits_iter.c +@@ -35,9 +35,9 @@ __description("uninitialized iter in ->next()") + __failure __msg("expected an initialized iter_bits as arg #1") + int BPF_PROG(next_uninit, struct bpf_iter_meta *meta, struct cgroup *cgrp) + { +- struct bpf_iter_bits *it = NULL; ++ struct bpf_iter_bits it = {}; + +- bpf_iter_bits_next(it); ++ bpf_iter_bits_next(&it); + return 0; + } + +diff --git a/tools/testing/selftests/damon/Makefile b/tools/testing/selftests/damon/Makefile +index 5b2a6a5dd1af7f..812f656260fba9 100644 +--- a/tools/testing/selftests/damon/Makefile ++++ b/tools/testing/selftests/damon/Makefile +@@ -6,7 +6,7 @@ TEST_GEN_FILES += debugfs_target_ids_read_before_terminate_race + TEST_GEN_FILES += debugfs_target_ids_pid_leak + TEST_GEN_FILES += access_memory access_memory_even + +-TEST_FILES = _chk_dependency.sh _debugfs_common.sh ++TEST_FILES = _chk_dependency.sh _debugfs_common.sh _damon_sysfs.py + + # functionality tests + TEST_PROGS = debugfs_attrs.sh debugfs_schemes.sh debugfs_target_ids.sh +diff --git a/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_syntax_errors.tc b/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_syntax_errors.tc +index a16c6a6f6055cf..8f1c58f0c2397f 100644 +--- a/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_syntax_errors.tc ++++ b/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_syntax_errors.tc +@@ -111,7 +111,7 @@ check_error 'p vfs_read $arg* ^$arg*' # DOUBLE_ARGS + if !grep -q 'kernel return probes support:' README; then + check_error 'r vfs_read ^$arg*' # NOFENTRY_ARGS + fi +-check_error 'p vfs_read+8 ^$arg*' # NOFENTRY_ARGS ++check_error 'p vfs_read+20 ^$arg*' # NOFENTRY_ARGS + check_error 'p vfs_read ^hoge' # NO_BTFARG + check_error 'p kfree ^$arg10' # NO_BTFARG (exceed the number of parameters) + check_error 'r kfree ^$retval' # NO_RETVAL +diff --git a/tools/testing/selftests/hid/run-hid-tools-tests.sh b/tools/testing/selftests/hid/run-hid-tools-tests.sh +index bdae8464da8656..af1682a53c27e1 100755 +--- a/tools/testing/selftests/hid/run-hid-tools-tests.sh ++++ b/tools/testing/selftests/hid/run-hid-tools-tests.sh +@@ -2,24 +2,26 @@ + # SPDX-License-Identifier: GPL-2.0 + # Runs tests for the HID subsystem + ++KSELFTEST_SKIP_TEST=4 ++ + if ! command -v python3 > /dev/null 2>&1; then + echo "hid-tools: [SKIP] python3 not installed" +- exit 77 ++ exit $KSELFTEST_SKIP_TEST + fi + + if ! python3 -c "import pytest" > /dev/null 2>&1; then +- echo "hid: [SKIP/ pytest module not installed" +- exit 77 ++ echo "hid: [SKIP] pytest module not installed" ++ exit $KSELFTEST_SKIP_TEST + fi + + if ! python3 -c "import pytest_tap" > /dev/null 2>&1; then +- echo "hid: [SKIP/ pytest_tap module not installed" +- exit 77 ++ echo "hid: [SKIP] pytest_tap module not installed" ++ exit $KSELFTEST_SKIP_TEST + fi + + if ! python3 -c "import hidtools" > /dev/null 2>&1; then +- echo "hid: [SKIP/ hid-tools module not installed" +- exit 77 ++ echo "hid: [SKIP] hid-tools module not installed" ++ exit $KSELFTEST_SKIP_TEST + fi + + TARGET=${TARGET:=.} +diff --git a/tools/testing/selftests/mm/hugetlb_dio.c b/tools/testing/selftests/mm/hugetlb_dio.c +index 432d5af15e66b7..db63abe5ee5e85 100644 +--- a/tools/testing/selftests/mm/hugetlb_dio.c ++++ b/tools/testing/selftests/mm/hugetlb_dio.c +@@ -76,19 +76,15 @@ void run_dio_using_hugetlb(unsigned int start_off, unsigned int end_off) + /* Get the free huge pages after unmap*/ + free_hpage_a = get_free_hugepages(); + ++ ksft_print_msg("No. Free pages before allocation : %d\n", free_hpage_b); ++ ksft_print_msg("No. Free pages after munmap : %d\n", free_hpage_a); ++ + /* + * If the no. of free hugepages before allocation and after unmap does + * not match - that means there could still be a page which is pinned. + */ +- if (free_hpage_a != free_hpage_b) { +- ksft_print_msg("No. Free pages before allocation : %d\n", free_hpage_b); +- ksft_print_msg("No. Free pages after munmap : %d\n", free_hpage_a); +- ksft_test_result_fail(": Huge pages not freed!\n"); +- } else { +- ksft_print_msg("No. Free pages before allocation : %d\n", free_hpage_b); +- ksft_print_msg("No. Free pages after munmap : %d\n", free_hpage_a); +- ksft_test_result_pass(": Huge pages freed successfully !\n"); +- } ++ ksft_test_result(free_hpage_a == free_hpage_b, ++ "free huge pages from %u-%u\n", start_off, end_off); + } + + int main(void) +diff --git a/tools/testing/selftests/resctrl/resctrl_val.c b/tools/testing/selftests/resctrl/resctrl_val.c +index f118f659e89600..e92e4f463f37bb 100644 +--- a/tools/testing/selftests/resctrl/resctrl_val.c ++++ b/tools/testing/selftests/resctrl/resctrl_val.c +@@ -159,7 +159,7 @@ static int read_from_imc_dir(char *imc_dir, int count) + + return -1; + } +- if (fscanf(fp, "%s", cas_count_cfg) <= 0) { ++ if (fscanf(fp, "%1023s", cas_count_cfg) <= 0) { + ksft_perror("Could not get iMC cas count read"); + fclose(fp); + +@@ -177,7 +177,7 @@ static int read_from_imc_dir(char *imc_dir, int count) + + return -1; + } +- if (fscanf(fp, "%s", cas_count_cfg) <= 0) { ++ if (fscanf(fp, "%1023s", cas_count_cfg) <= 0) { + ksft_perror("Could not get iMC cas count write"); + fclose(fp); + +diff --git a/tools/testing/selftests/resctrl/resctrlfs.c b/tools/testing/selftests/resctrl/resctrlfs.c +index 250c320349a785..a53cd1cb6e0c64 100644 +--- a/tools/testing/selftests/resctrl/resctrlfs.c ++++ b/tools/testing/selftests/resctrl/resctrlfs.c +@@ -182,7 +182,7 @@ int get_cache_size(int cpu_no, const char *cache_type, unsigned long *cache_size + + return -1; + } +- if (fscanf(fp, "%s", cache_str) <= 0) { ++ if (fscanf(fp, "%63s", cache_str) <= 0) { + ksft_perror("Could not get cache_size"); + fclose(fp); + +diff --git a/tools/testing/selftests/wireguard/qemu/debug.config b/tools/testing/selftests/wireguard/qemu/debug.config +index 9d172210e2c63f..139fd9aa8b1218 100644 +--- a/tools/testing/selftests/wireguard/qemu/debug.config ++++ b/tools/testing/selftests/wireguard/qemu/debug.config +@@ -31,7 +31,6 @@ CONFIG_SCHED_DEBUG=y + CONFIG_SCHED_INFO=y + CONFIG_SCHEDSTATS=y + CONFIG_SCHED_STACK_END_CHECK=y +-CONFIG_DEBUG_TIMEKEEPING=y + CONFIG_DEBUG_PREEMPT=y + CONFIG_DEBUG_RT_MUTEXES=y + CONFIG_DEBUG_SPINLOCK=y +diff --git a/tools/testing/vsock/vsock_perf.c b/tools/testing/vsock/vsock_perf.c +index 4e8578f815e08a..8e0a6c0770d372 100644 +--- a/tools/testing/vsock/vsock_perf.c ++++ b/tools/testing/vsock/vsock_perf.c +@@ -33,7 +33,7 @@ + + static unsigned int port = DEFAULT_PORT; + static unsigned long buf_size_bytes = DEFAULT_BUF_SIZE_BYTES; +-static unsigned long vsock_buf_bytes = DEFAULT_VSOCK_BUF_BYTES; ++static unsigned long long vsock_buf_bytes = DEFAULT_VSOCK_BUF_BYTES; + static bool zerocopy; + + static void error(const char *s) +@@ -133,7 +133,7 @@ static float get_gbps(unsigned long bits, time_t ns_delta) + ((float)ns_delta / NSEC_PER_SEC); + } + +-static void run_receiver(unsigned long rcvlowat_bytes) ++static void run_receiver(int rcvlowat_bytes) + { + unsigned int read_cnt; + time_t rx_begin_ns; +@@ -162,8 +162,8 @@ static void run_receiver(unsigned long rcvlowat_bytes) + printf("Run as receiver\n"); + printf("Listen port %u\n", port); + printf("RX buffer %lu bytes\n", buf_size_bytes); +- printf("vsock buffer %lu bytes\n", vsock_buf_bytes); +- printf("SO_RCVLOWAT %lu bytes\n", rcvlowat_bytes); ++ printf("vsock buffer %llu bytes\n", vsock_buf_bytes); ++ printf("SO_RCVLOWAT %d bytes\n", rcvlowat_bytes); + + fd = socket(AF_VSOCK, SOCK_STREAM, 0); + +@@ -439,7 +439,7 @@ static long strtolx(const char *arg) + int main(int argc, char **argv) + { + unsigned long to_send_bytes = DEFAULT_TO_SEND_BYTES; +- unsigned long rcvlowat_bytes = DEFAULT_RCVLOWAT_BYTES; ++ int rcvlowat_bytes = DEFAULT_RCVLOWAT_BYTES; + int peer_cid = -1; + bool sender = false; + +diff --git a/tools/testing/vsock/vsock_test.c b/tools/testing/vsock/vsock_test.c +index 8d38dbf8f41f04..0b7f5bf546da56 100644 +--- a/tools/testing/vsock/vsock_test.c ++++ b/tools/testing/vsock/vsock_test.c +@@ -429,7 +429,7 @@ static void test_seqpacket_msg_bounds_client(const struct test_opts *opts) + + static void test_seqpacket_msg_bounds_server(const struct test_opts *opts) + { +- unsigned long sock_buf_size; ++ unsigned long long sock_buf_size; + unsigned long remote_hash; + unsigned long curr_hash; + int fd; +@@ -634,7 +634,8 @@ static void test_seqpacket_timeout_server(const struct test_opts *opts) + + static void test_seqpacket_bigmsg_client(const struct test_opts *opts) + { +- unsigned long sock_buf_size; ++ unsigned long long sock_buf_size; ++ size_t buf_size; + socklen_t len; + void *data; + int fd; +@@ -655,13 +656,20 @@ static void test_seqpacket_bigmsg_client(const struct test_opts *opts) + + sock_buf_size++; + +- data = malloc(sock_buf_size); ++ /* size_t can be < unsigned long long */ ++ buf_size = (size_t)sock_buf_size; ++ if (buf_size != sock_buf_size) { ++ fprintf(stderr, "Returned BUFFER_SIZE too large\n"); ++ exit(EXIT_FAILURE); ++ } ++ ++ data = malloc(buf_size); + if (!data) { + perror("malloc"); + exit(EXIT_FAILURE); + } + +- send_buf(fd, data, sock_buf_size, 0, -EMSGSIZE); ++ send_buf(fd, data, buf_size, 0, -EMSGSIZE); + + control_writeln("CLISENT"); + +@@ -835,7 +843,7 @@ static void test_stream_poll_rcvlowat_server(const struct test_opts *opts) + + static void test_stream_poll_rcvlowat_client(const struct test_opts *opts) + { +- unsigned long lowat_val = RCVLOWAT_BUF_SIZE; ++ int lowat_val = RCVLOWAT_BUF_SIZE; + char buf[RCVLOWAT_BUF_SIZE]; + struct pollfd fds; + short poll_flags; +@@ -1357,9 +1365,10 @@ static void test_stream_rcvlowat_def_cred_upd_client(const struct test_opts *opt + static void test_stream_credit_update_test(const struct test_opts *opts, + bool low_rx_bytes_test) + { +- size_t recv_buf_size; ++ int recv_buf_size; + struct pollfd fds; + size_t buf_size; ++ unsigned long long sock_buf_size; + void *buf; + int fd; + +@@ -1371,8 +1380,11 @@ static void test_stream_credit_update_test(const struct test_opts *opts, + + buf_size = RCVLOWAT_CREDIT_UPD_BUF_SIZE; + ++ /* size_t can be < unsigned long long */ ++ sock_buf_size = buf_size; ++ + if (setsockopt(fd, AF_VSOCK, SO_VM_SOCKETS_BUFFER_SIZE, +- &buf_size, sizeof(buf_size))) { ++ &sock_buf_size, sizeof(sock_buf_size))) { + perror("setsockopt(SO_VM_SOCKETS_BUFFER_SIZE)"); + exit(EXIT_FAILURE); + } +diff --git a/tools/tracing/rtla/sample/timerlat_load.py b/tools/tracing/rtla/sample/timerlat_load.py +index 8cc5eb2d2e69e5..52eccb6225f92d 100644 +--- a/tools/tracing/rtla/sample/timerlat_load.py ++++ b/tools/tracing/rtla/sample/timerlat_load.py +@@ -25,13 +25,12 @@ import sys + import os + + parser = argparse.ArgumentParser(description='user-space timerlat thread in Python') +-parser.add_argument("cpu", help='CPU to run timerlat thread') +-parser.add_argument("-p", "--prio", help='FIFO priority') +- ++parser.add_argument("cpu", type=int, help='CPU to run timerlat thread') ++parser.add_argument("-p", "--prio", type=int, help='FIFO priority') + args = parser.parse_args() + + try: +- affinity_mask = { int(args.cpu) } ++ affinity_mask = {args.cpu} + except: + print("Invalid cpu: " + args.cpu) + exit(1) +@@ -44,7 +43,7 @@ except: + + if (args.prio): + try: +- param = os.sched_param(int(args.prio)) ++ param = os.sched_param(args.prio) + os.sched_setscheduler(0, os.SCHED_FIFO, param) + except: + print("Error setting priority") +diff --git a/tools/tracing/rtla/src/timerlat_hist.c b/tools/tracing/rtla/src/timerlat_hist.c +index 829511a712224f..ae55cd79128336 100644 +--- a/tools/tracing/rtla/src/timerlat_hist.c ++++ b/tools/tracing/rtla/src/timerlat_hist.c +@@ -62,9 +62,9 @@ struct timerlat_hist_cpu { + int *thread; + int *user; + +- int irq_count; +- int thread_count; +- int user_count; ++ unsigned long long irq_count; ++ unsigned long long thread_count; ++ unsigned long long user_count; + + unsigned long long min_irq; + unsigned long long sum_irq; +@@ -304,15 +304,15 @@ timerlat_print_summary(struct timerlat_hist_params *params, + continue; + + if (!params->no_irq) +- trace_seq_printf(trace->seq, "%9d ", ++ trace_seq_printf(trace->seq, "%9llu ", + data->hist[cpu].irq_count); + + if (!params->no_thread) +- trace_seq_printf(trace->seq, "%9d ", ++ trace_seq_printf(trace->seq, "%9llu ", + data->hist[cpu].thread_count); + + if (params->user_hist) +- trace_seq_printf(trace->seq, "%9d ", ++ trace_seq_printf(trace->seq, "%9llu ", + data->hist[cpu].user_count); + } + trace_seq_printf(trace->seq, "\n"); +@@ -488,15 +488,15 @@ timerlat_print_stats_all(struct timerlat_hist_params *params, + trace_seq_printf(trace->seq, "count:"); + + if (!params->no_irq) +- trace_seq_printf(trace->seq, "%9d ", ++ trace_seq_printf(trace->seq, "%9llu ", + sum.irq_count); + + if (!params->no_thread) +- trace_seq_printf(trace->seq, "%9d ", ++ trace_seq_printf(trace->seq, "%9llu ", + sum.thread_count); + + if (params->user_hist) +- trace_seq_printf(trace->seq, "%9d ", ++ trace_seq_printf(trace->seq, "%9llu ", + sum.user_count); + + trace_seq_printf(trace->seq, "\n"); +@@ -778,7 +778,7 @@ static struct timerlat_hist_params + /* getopt_long stores the option index here. */ + int option_index = 0; + +- c = getopt_long(argc, argv, "a:c:C::b:d:e:E:DhH:i:knp:P:s:t::T:uU0123456:7:8:9\1\2:\3", ++ c = getopt_long(argc, argv, "a:c:C::b:d:e:E:DhH:i:knp:P:s:t::T:uU0123456:7:8:9\1\2:\3:", + long_options, &option_index); + + /* detect the end of the options. */ +diff --git a/tools/tracing/rtla/src/timerlat_top.c b/tools/tracing/rtla/src/timerlat_top.c +index 3b62519a412fc9..ac2ff38a57ee55 100644 +--- a/tools/tracing/rtla/src/timerlat_top.c ++++ b/tools/tracing/rtla/src/timerlat_top.c +@@ -54,9 +54,9 @@ struct timerlat_top_params { + }; + + struct timerlat_top_cpu { +- int irq_count; +- int thread_count; +- int user_count; ++ unsigned long long irq_count; ++ unsigned long long thread_count; ++ unsigned long long user_count; + + unsigned long long cur_irq; + unsigned long long min_irq; +@@ -280,7 +280,7 @@ static void timerlat_top_print(struct osnoise_tool *top, int cpu) + /* + * Unless trace is being lost, IRQ counter is always the max. + */ +- trace_seq_printf(s, "%3d #%-9d |", cpu, cpu_data->irq_count); ++ trace_seq_printf(s, "%3d #%-9llu |", cpu, cpu_data->irq_count); + + if (!cpu_data->irq_count) { + trace_seq_printf(s, "%s %s %s %s |", no_value, no_value, no_value, no_value); +diff --git a/tools/tracing/rtla/src/utils.c b/tools/tracing/rtla/src/utils.c +index 9ac71a66840c1b..0735fcb827ed76 100644 +--- a/tools/tracing/rtla/src/utils.c ++++ b/tools/tracing/rtla/src/utils.c +@@ -233,7 +233,7 @@ long parse_ns_duration(char *val) + + #define SCHED_DEADLINE 6 + +-static inline int sched_setattr(pid_t pid, const struct sched_attr *attr, ++static inline int syscall_sched_setattr(pid_t pid, const struct sched_attr *attr, + unsigned int flags) { + return syscall(__NR_sched_setattr, pid, attr, flags); + } +@@ -243,7 +243,7 @@ int __set_sched_attr(int pid, struct sched_attr *attr) + int flags = 0; + int retval; + +- retval = sched_setattr(pid, attr, flags); ++ retval = syscall_sched_setattr(pid, attr, flags); + if (retval < 0) { + err_msg("Failed to set sched attributes to the pid %d: %s\n", + pid, strerror(errno)); +diff --git a/tools/tracing/rtla/src/utils.h b/tools/tracing/rtla/src/utils.h +index d44513e6c66a01..99c9cf81bcd02c 100644 +--- a/tools/tracing/rtla/src/utils.h ++++ b/tools/tracing/rtla/src/utils.h +@@ -46,6 +46,7 @@ update_sum(unsigned long long *a, unsigned long long *b) + *a += *b; + } + ++#ifndef SCHED_ATTR_SIZE_VER0 + struct sched_attr { + uint32_t size; + uint32_t sched_policy; +@@ -56,6 +57,7 @@ struct sched_attr { + uint64_t sched_deadline; + uint64_t sched_period; + }; ++#endif /* SCHED_ATTR_SIZE_VER0 */ + + int parse_prio(char *arg, struct sched_attr *sched_param); + int parse_cpu_set(char *cpu_list, cpu_set_t *set); +diff --git a/tools/verification/dot2/automata.py b/tools/verification/dot2/automata.py +index baffeb960ff0b3..bdeb98baa8b065 100644 +--- a/tools/verification/dot2/automata.py ++++ b/tools/verification/dot2/automata.py +@@ -29,11 +29,11 @@ class Automata: + + def __get_model_name(self): + basename = ntpath.basename(self.__dot_path) +- if basename.endswith(".dot") == False: ++ if not basename.endswith(".dot") and not basename.endswith(".gv"): + print("not a dot file") + raise Exception("not a dot file: %s" % self.__dot_path) + +- model_name = basename[0:-4] ++ model_name = ntpath.splitext(basename)[0] + if model_name.__len__() == 0: + raise Exception("not a dot file: %s" % self.__dot_path) + +@@ -68,9 +68,9 @@ class Automata: + def __get_cursor_begin_events(self): + cursor = 0 + while self.__dot_lines[cursor].split()[0] != "{node": +- cursor += 1 ++ cursor += 1 + while self.__dot_lines[cursor].split()[0] == "{node": +- cursor += 1 ++ cursor += 1 + # skip initial state transition + cursor += 1 + return cursor +@@ -94,11 +94,11 @@ class Automata: + initial_state = state[7:] + else: + states.append(state) +- if self.__dot_lines[cursor].__contains__("doublecircle") == True: ++ if "doublecircle" in self.__dot_lines[cursor]: + final_states.append(state) + has_final_states = True + +- if self.__dot_lines[cursor].__contains__("ellipse") == True: ++ if "ellipse" in self.__dot_lines[cursor]: + final_states.append(state) + has_final_states = True + +@@ -110,7 +110,7 @@ class Automata: + # Insert the initial state at the bein og the states + states.insert(0, initial_state) + +- if has_final_states == False: ++ if not has_final_states: + final_states.append(initial_state) + + return states, initial_state, final_states +@@ -120,7 +120,7 @@ class Automata: + cursor = self.__get_cursor_begin_events() + + events = [] +- while self.__dot_lines[cursor][1] == '"': ++ while self.__dot_lines[cursor].lstrip()[0] == '"': + # transitions have the format: + # "all_fired" -> "both_fired" [ label = "disable_irq" ]; + # ------------ event is here ------------^^^^^ +@@ -161,7 +161,7 @@ class Automata: + # and we are back! Let's fill the matrix + cursor = self.__get_cursor_begin_events() + +- while self.__dot_lines[cursor][1] == '"': ++ while self.__dot_lines[cursor].lstrip()[0] == '"': + if self.__dot_lines[cursor].split()[1] == "->": + line = self.__dot_lines[cursor].split() + origin_state = line[0].replace('"','').replace(',','_')