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From: "Andreas K. Hüttel" <dilfridge@gentoo.org>
To: gentoo-commits@lists.gentoo.org
Subject: [gentoo-commits] proj/releng:master commit in: releases/specs/riscv/
Date: Mon, 21 Dec 2020 14:12:13 +0000 (UTC)	[thread overview]
Message-ID: <1608559921.4b84f01d9b1de5fa06918c52f8a87f5ba8e1041d.dilfridge@gentoo> (raw)

commit:     4b84f01d9b1de5fa06918c52f8a87f5ba8e1041d
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Mon Dec 21 14:11:43 2020 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Mon Dec 21 14:12:01 2020 +0000
URL:        https://gitweb.gentoo.org/proj/releng.git/commit/?id=4b84f01d

Add rv32 ilp32 specs

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 releases/specs/riscv/stage1-ilp32.spec | 15 +++++++++++++++
 releases/specs/riscv/stage2-ilp32.spec | 13 +++++++++++++
 releases/specs/riscv/stage3-ilp32.spec | 13 +++++++++++++
 3 files changed, 41 insertions(+)

diff --git a/releases/specs/riscv/stage1-ilp32.spec b/releases/specs/riscv/stage1-ilp32.spec
new file mode 100644
index 00000000..76fdef1d
--- /dev/null
+++ b/releases/specs/riscv/stage1-ilp32.spec
@@ -0,0 +1,15 @@
+subarch: rv32_ilp32
+target: stage1
+version_stamp: @TIMESTAMP@
+cflags: -O2 -pipe
+interpreter: /usr/bin/qemu-riscv32
+rel_type: default
+profile: default/linux/riscv/17.0/rv32imac/ilp32
+snapshot: @TIMESTAMP@
+source_subpath: default/stage3-rv32_ilp32-latest
+compression_mode: pixz
+decompressor_search_order: xz bzip2
+update_seed: yes
+update_seed_command: -uDN @world
+portage_confdir: @REPO_DIR@/releases/portage/stages-qemu
+portage_prefix: releng

diff --git a/releases/specs/riscv/stage2-ilp32.spec b/releases/specs/riscv/stage2-ilp32.spec
new file mode 100644
index 00000000..c1ffdbf7
--- /dev/null
+++ b/releases/specs/riscv/stage2-ilp32.spec
@@ -0,0 +1,13 @@
+subarch: rv32_ilp32
+target: stage2
+version_stamp: @TIMESTAMP@
+cflags: -O2 -pipe
+interpreter: /usr/bin/qemu-riscv32
+rel_type: default
+profile: default/linux/riscv/17.0/rv32imac/ilp32
+snapshot: @TIMESTAMP@
+source_subpath: default/stage1-rv32_ilp32-@TIMESTAMP@
+compression_mode: pixz
+decompressor_search_order: xz bzip2
+portage_confdir: @REPO_DIR@/releases/portage/stages-qemu
+portage_prefix: releng

diff --git a/releases/specs/riscv/stage3-ilp32.spec b/releases/specs/riscv/stage3-ilp32.spec
new file mode 100644
index 00000000..b477807e
--- /dev/null
+++ b/releases/specs/riscv/stage3-ilp32.spec
@@ -0,0 +1,13 @@
+subarch: rv32_ilp32
+target: stage3
+version_stamp: @TIMESTAMP@
+cflags: -O2 -pipe
+interpreter: /usr/bin/qemu-riscv32
+rel_type: default
+profile: default/linux/riscv/17.0/rv32imac/ilp32
+snapshot: @TIMESTAMP@
+source_subpath: default/stage2-rv32_ilp32-@TIMESTAMP@
+compression_mode: pixz
+decompressor_search_order: xz bzip2
+portage_confdir: @REPO_DIR@/releases/portage/stages-qemu
+portage_prefix: releng


             reply	other threads:[~2020-12-21 14:12 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-21 14:12 Andreas K. Hüttel [this message]
  -- strict thread matches above, loose matches on Subject: below --
2020-12-04 14:43 [gentoo-commits] proj/releng:master commit in: releases/specs/riscv/ Andreas K. Hüttel
2020-11-29 23:47 Andreas K. Hüttel
2020-09-18 18:17 Andreas K. Hüttel
2020-07-27 22:13 Andreas K. Hüttel
2020-07-17  0:04 Andreas K. Hüttel
2020-07-15 17:43 Andreas K. Hüttel

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