From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from lists.gentoo.org (pigeon.gentoo.org [208.92.234.80]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by finch.gentoo.org (Postfix) with ESMTPS id 7F3C2139085 for ; Fri, 20 Jan 2017 11:33:17 +0000 (UTC) Received: from pigeon.gentoo.org (localhost [127.0.0.1]) by pigeon.gentoo.org (Postfix) with SMTP id B0209E0C38; Fri, 20 Jan 2017 11:33:15 +0000 (UTC) Received: from smtp.gentoo.org (smtp.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by pigeon.gentoo.org (Postfix) with ESMTPS id 6F739E0C38 for ; Fri, 20 Jan 2017 11:33:15 +0000 (UTC) Received: from oystercatcher.gentoo.org (oystercatcher.gentoo.org [148.251.78.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id 08B413411D7 for ; Fri, 20 Jan 2017 11:33:14 +0000 (UTC) Received: from localhost.localdomain (localhost [127.0.0.1]) by oystercatcher.gentoo.org (Postfix) with ESMTP id 1F30A2A24 for ; Fri, 20 Jan 2017 11:33:11 +0000 (UTC) From: "Alice Ferrazzi" To: gentoo-commits@lists.gentoo.org Content-Transfer-Encoding: 8bit Content-type: text/plain; charset=UTF-8 Reply-To: gentoo-dev@lists.gentoo.org, "Alice Ferrazzi" Message-ID: <1484911479.27a9fbad130aae1ca8b3433e490b299c35a48398.alicef@gentoo> Subject: [gentoo-commits] proj/linux-patches:4.9 commit in: / X-VCS-Repository: proj/linux-patches X-VCS-Files: 0000_README 1004_linux-4.9.5.patch X-VCS-Directories: / X-VCS-Committer: alicef X-VCS-Committer-Name: Alice Ferrazzi X-VCS-Revision: 27a9fbad130aae1ca8b3433e490b299c35a48398 X-VCS-Branch: 4.9 Date: Fri, 20 Jan 2017 11:33:11 +0000 (UTC) Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-commits@lists.gentoo.org X-Archives-Salt: 1132dbc0-49e7-46dd-b7c0-13a5d7036fab X-Archives-Hash: 314ef662ca1fe61a5b649d6d37bd35fd commit: 27a9fbad130aae1ca8b3433e490b299c35a48398 Author: Alice Ferrazzi gentoo org> AuthorDate: Fri Jan 20 11:24:39 2017 +0000 Commit: Alice Ferrazzi gentoo org> CommitDate: Fri Jan 20 11:24:39 2017 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=27a9fbad Linux patch 4.9.5 0000_README | 4 + 1004_linux-4.9.5.patch | 5162 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 5166 insertions(+) diff --git a/0000_README b/0000_README index ffd4b57..a0a0324 100644 --- a/0000_README +++ b/0000_README @@ -59,6 +59,10 @@ Patch: 1003_linux-4.9.4.patch From: http://www.kernel.org Desc: Linux 4.9.4 +Patch: 1004_linux-4.9.5.patch +From: http://www.kernel.org +Desc: Linux 4.9.5 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1004_linux-4.9.5.patch b/1004_linux-4.9.5.patch new file mode 100644 index 0000000..4e11732 --- /dev/null +++ b/1004_linux-4.9.5.patch @@ -0,0 +1,5162 @@ +diff --git a/Documentation/devicetree/bindings/mfd/tps65086.txt b/Documentation/devicetree/bindings/mfd/tps65086.txt +index d3705612a846..9cfa886fe99f 100644 +--- a/Documentation/devicetree/bindings/mfd/tps65086.txt ++++ b/Documentation/devicetree/bindings/mfd/tps65086.txt +@@ -23,7 +23,7 @@ Required properties: + defined below. + + Optional regulator properties: +- - ti,regulator-step-size-25mv : This is applicable for buck[1,2,6], set this ++ - ti,regulator-step-size-25mv : This is applicable for buck[1-6], set this + if the regulator is factory set with a 25mv + step voltage mapping. + - ti,regulator-decay : This is applicable for buck[1-6], set this if +diff --git a/Makefile b/Makefile +index 9175706bfe7f..2a8af8af7b27 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,6 +1,6 @@ + VERSION = 4 + PATCHLEVEL = 9 +-SUBLEVEL = 4 ++SUBLEVEL = 5 + EXTRAVERSION = + NAME = Roaring Lionus + +diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c +index 2e49bd252fe7..45bec627bae3 100644 +--- a/arch/arm64/mm/hugetlbpage.c ++++ b/arch/arm64/mm/hugetlbpage.c +@@ -51,20 +51,8 @@ static int find_num_contig(struct mm_struct *mm, unsigned long addr, + *pgsize = PAGE_SIZE; + if (!pte_cont(pte)) + return 1; +- if (!pgd_present(*pgd)) { +- VM_BUG_ON(!pgd_present(*pgd)); +- return 1; +- } + pud = pud_offset(pgd, addr); +- if (!pud_present(*pud)) { +- VM_BUG_ON(!pud_present(*pud)); +- return 1; +- } + pmd = pmd_offset(pud, addr); +- if (!pmd_present(*pmd)) { +- VM_BUG_ON(!pmd_present(*pmd)); +- return 1; +- } + if ((pte_t *)pmd == ptep) { + *pgsize = PMD_SIZE; + return CONT_PMDS; +@@ -212,7 +200,7 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm, + ncontig = find_num_contig(mm, addr, cpte, *cpte, &pgsize); + /* save the 1st pte to return */ + pte = ptep_get_and_clear(mm, addr, cpte); +- for (i = 1; i < ncontig; ++i) { ++ for (i = 1, addr += pgsize; i < ncontig; ++i, addr += pgsize) { + /* + * If HW_AFDBM is enabled, then the HW could + * turn on the dirty bit for any of the page +@@ -250,8 +238,8 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma, + pfn = pte_pfn(*cpte); + ncontig = find_num_contig(vma->vm_mm, addr, cpte, + *cpte, &pgsize); +- for (i = 0; i < ncontig; ++i, ++cpte) { +- changed = ptep_set_access_flags(vma, addr, cpte, ++ for (i = 0; i < ncontig; ++i, ++cpte, addr += pgsize) { ++ changed |= ptep_set_access_flags(vma, addr, cpte, + pfn_pte(pfn, + hugeprot), + dirty); +@@ -273,7 +261,7 @@ void huge_ptep_set_wrprotect(struct mm_struct *mm, + + cpte = huge_pte_offset(mm, addr); + ncontig = find_num_contig(mm, addr, cpte, *cpte, &pgsize); +- for (i = 0; i < ncontig; ++i, ++cpte) ++ for (i = 0; i < ncontig; ++i, ++cpte, addr += pgsize) + ptep_set_wrprotect(mm, addr, cpte); + } else { + ptep_set_wrprotect(mm, addr, ptep); +@@ -291,7 +279,7 @@ void huge_ptep_clear_flush(struct vm_area_struct *vma, + cpte = huge_pte_offset(vma->vm_mm, addr); + ncontig = find_num_contig(vma->vm_mm, addr, cpte, + *cpte, &pgsize); +- for (i = 0; i < ncontig; ++i, ++cpte) ++ for (i = 0; i < ncontig; ++i, ++cpte, addr += pgsize) + ptep_clear_flush(vma, addr, cpte); + } else { + ptep_clear_flush(vma, addr, ptep); +diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h +index e407af2b7333..2e6a823fa502 100644 +--- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h ++++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h +@@ -70,7 +70,9 @@ + + #define HPTE_V_SSIZE_SHIFT 62 + #define HPTE_V_AVPN_SHIFT 7 ++#define HPTE_V_COMMON_BITS ASM_CONST(0x000fffffffffffff) + #define HPTE_V_AVPN ASM_CONST(0x3fffffffffffff80) ++#define HPTE_V_AVPN_3_0 ASM_CONST(0x000fffffffffff80) + #define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT) + #define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & 0xffffffffffffff80UL)) + #define HPTE_V_BOLTED ASM_CONST(0x0000000000000010) +@@ -80,14 +82,16 @@ + #define HPTE_V_VALID ASM_CONST(0x0000000000000001) + + /* +- * ISA 3.0 have a different HPTE format. ++ * ISA 3.0 has a different HPTE format. + */ + #define HPTE_R_3_0_SSIZE_SHIFT 58 ++#define HPTE_R_3_0_SSIZE_MASK (3ull << HPTE_R_3_0_SSIZE_SHIFT) + #define HPTE_R_PP0 ASM_CONST(0x8000000000000000) + #define HPTE_R_TS ASM_CONST(0x4000000000000000) + #define HPTE_R_KEY_HI ASM_CONST(0x3000000000000000) + #define HPTE_R_RPN_SHIFT 12 + #define HPTE_R_RPN ASM_CONST(0x0ffffffffffff000) ++#define HPTE_R_RPN_3_0 ASM_CONST(0x01fffffffffff000) + #define HPTE_R_PP ASM_CONST(0x0000000000000003) + #define HPTE_R_PPP ASM_CONST(0x8000000000000003) + #define HPTE_R_N ASM_CONST(0x0000000000000004) +@@ -316,12 +320,43 @@ static inline unsigned long hpte_encode_avpn(unsigned long vpn, int psize, + */ + v = (vpn >> (23 - VPN_SHIFT)) & ~(mmu_psize_defs[psize].avpnm); + v <<= HPTE_V_AVPN_SHIFT; +- if (!cpu_has_feature(CPU_FTR_ARCH_300)) +- v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT; ++ v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT; + return v; + } + + /* ++ * ISA v3.0 defines a new HPTE format, which differs from the old ++ * format in having smaller AVPN and ARPN fields, and the B field ++ * in the second dword instead of the first. ++ */ ++static inline unsigned long hpte_old_to_new_v(unsigned long v) ++{ ++ /* trim AVPN, drop B */ ++ return v & HPTE_V_COMMON_BITS; ++} ++ ++static inline unsigned long hpte_old_to_new_r(unsigned long v, unsigned long r) ++{ ++ /* move B field from 1st to 2nd dword, trim ARPN */ ++ return (r & ~HPTE_R_3_0_SSIZE_MASK) | ++ (((v) >> HPTE_V_SSIZE_SHIFT) << HPTE_R_3_0_SSIZE_SHIFT); ++} ++ ++static inline unsigned long hpte_new_to_old_v(unsigned long v, unsigned long r) ++{ ++ /* insert B field */ ++ return (v & HPTE_V_COMMON_BITS) | ++ ((r & HPTE_R_3_0_SSIZE_MASK) << ++ (HPTE_V_SSIZE_SHIFT - HPTE_R_3_0_SSIZE_SHIFT)); ++} ++ ++static inline unsigned long hpte_new_to_old_r(unsigned long r) ++{ ++ /* clear out B field */ ++ return r & ~HPTE_R_3_0_SSIZE_MASK; ++} ++ ++/* + * This function sets the AVPN and L fields of the HPTE appropriately + * using the base page size and actual page size. + */ +@@ -341,12 +376,8 @@ static inline unsigned long hpte_encode_v(unsigned long vpn, int base_psize, + * aligned for the requested page size + */ + static inline unsigned long hpte_encode_r(unsigned long pa, int base_psize, +- int actual_psize, int ssize) ++ int actual_psize) + { +- +- if (cpu_has_feature(CPU_FTR_ARCH_300)) +- pa |= ((unsigned long) ssize) << HPTE_R_3_0_SSIZE_SHIFT; +- + /* A 4K page needs no special encoding */ + if (actual_psize == MMU_PAGE_4K) + return pa & HPTE_R_RPN; +diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c +index 6ca9a2ffaac7..35f5244782d9 100644 +--- a/arch/powerpc/kernel/ibmebus.c ++++ b/arch/powerpc/kernel/ibmebus.c +@@ -180,6 +180,7 @@ static int ibmebus_create_device(struct device_node *dn) + static int ibmebus_create_devices(const struct of_device_id *matches) + { + struct device_node *root, *child; ++ struct device *dev; + int ret = 0; + + root = of_find_node_by_path("/"); +@@ -188,9 +189,12 @@ static int ibmebus_create_devices(const struct of_device_id *matches) + if (!of_match_node(matches, child)) + continue; + +- if (bus_find_device(&ibmebus_bus_type, NULL, child, +- ibmebus_match_node)) ++ dev = bus_find_device(&ibmebus_bus_type, NULL, child, ++ ibmebus_match_node); ++ if (dev) { ++ put_device(dev); + continue; ++ } + + ret = ibmebus_create_device(child); + if (ret) { +@@ -262,6 +266,7 @@ static ssize_t ibmebus_store_probe(struct bus_type *bus, + const char *buf, size_t count) + { + struct device_node *dn = NULL; ++ struct device *dev; + char *path; + ssize_t rc = 0; + +@@ -269,8 +274,10 @@ static ssize_t ibmebus_store_probe(struct bus_type *bus, + if (!path) + return -ENOMEM; + +- if (bus_find_device(&ibmebus_bus_type, NULL, path, +- ibmebus_match_path)) { ++ dev = bus_find_device(&ibmebus_bus_type, NULL, path, ++ ibmebus_match_path); ++ if (dev) { ++ put_device(dev); + printk(KERN_WARNING "%s: %s has already been probed\n", + __func__, path); + rc = -EEXIST; +@@ -307,6 +314,7 @@ static ssize_t ibmebus_store_remove(struct bus_type *bus, + if ((dev = bus_find_device(&ibmebus_bus_type, NULL, path, + ibmebus_match_path))) { + of_device_unregister(to_platform_device(dev)); ++ put_device(dev); + + kfree(path); + return count; +diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c +index 83ddc0e171b0..ad9fd5245be2 100644 +--- a/arch/powerpc/mm/hash_native_64.c ++++ b/arch/powerpc/mm/hash_native_64.c +@@ -221,13 +221,18 @@ static long native_hpte_insert(unsigned long hpte_group, unsigned long vpn, + return -1; + + hpte_v = hpte_encode_v(vpn, psize, apsize, ssize) | vflags | HPTE_V_VALID; +- hpte_r = hpte_encode_r(pa, psize, apsize, ssize) | rflags; ++ hpte_r = hpte_encode_r(pa, psize, apsize) | rflags; + + if (!(vflags & HPTE_V_BOLTED)) { + DBG_LOW(" i=%x hpte_v=%016lx, hpte_r=%016lx\n", + i, hpte_v, hpte_r); + } + ++ if (cpu_has_feature(CPU_FTR_ARCH_300)) { ++ hpte_r = hpte_old_to_new_r(hpte_v, hpte_r); ++ hpte_v = hpte_old_to_new_v(hpte_v); ++ } ++ + hptep->r = cpu_to_be64(hpte_r); + /* Guarantee the second dword is visible before the valid bit */ + eieio(); +@@ -295,6 +300,8 @@ static long native_hpte_updatepp(unsigned long slot, unsigned long newpp, + vpn, want_v & HPTE_V_AVPN, slot, newpp); + + hpte_v = be64_to_cpu(hptep->v); ++ if (cpu_has_feature(CPU_FTR_ARCH_300)) ++ hpte_v = hpte_new_to_old_v(hpte_v, be64_to_cpu(hptep->r)); + /* + * We need to invalidate the TLB always because hpte_remove doesn't do + * a tlb invalidate. If a hash bucket gets full, we "evict" a more/less +@@ -309,6 +316,8 @@ static long native_hpte_updatepp(unsigned long slot, unsigned long newpp, + native_lock_hpte(hptep); + /* recheck with locks held */ + hpte_v = be64_to_cpu(hptep->v); ++ if (cpu_has_feature(CPU_FTR_ARCH_300)) ++ hpte_v = hpte_new_to_old_v(hpte_v, be64_to_cpu(hptep->r)); + if (unlikely(!HPTE_V_COMPARE(hpte_v, want_v) || + !(hpte_v & HPTE_V_VALID))) { + ret = -1; +@@ -350,6 +359,8 @@ static long native_hpte_find(unsigned long vpn, int psize, int ssize) + for (i = 0; i < HPTES_PER_GROUP; i++) { + hptep = htab_address + slot; + hpte_v = be64_to_cpu(hptep->v); ++ if (cpu_has_feature(CPU_FTR_ARCH_300)) ++ hpte_v = hpte_new_to_old_v(hpte_v, be64_to_cpu(hptep->r)); + + if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID)) + /* HPTE matches */ +@@ -409,6 +420,8 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long vpn, + want_v = hpte_encode_avpn(vpn, bpsize, ssize); + native_lock_hpte(hptep); + hpte_v = be64_to_cpu(hptep->v); ++ if (cpu_has_feature(CPU_FTR_ARCH_300)) ++ hpte_v = hpte_new_to_old_v(hpte_v, be64_to_cpu(hptep->r)); + + /* + * We need to invalidate the TLB always because hpte_remove doesn't do +@@ -467,6 +480,8 @@ static void native_hugepage_invalidate(unsigned long vsid, + want_v = hpte_encode_avpn(vpn, psize, ssize); + native_lock_hpte(hptep); + hpte_v = be64_to_cpu(hptep->v); ++ if (cpu_has_feature(CPU_FTR_ARCH_300)) ++ hpte_v = hpte_new_to_old_v(hpte_v, be64_to_cpu(hptep->r)); + + /* Even if we miss, we need to invalidate the TLB */ + if (!HPTE_V_COMPARE(hpte_v, want_v) || !(hpte_v & HPTE_V_VALID)) +@@ -504,6 +519,10 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot, + /* Look at the 8 bit LP value */ + unsigned int lp = (hpte_r >> LP_SHIFT) & ((1 << LP_BITS) - 1); + ++ if (cpu_has_feature(CPU_FTR_ARCH_300)) { ++ hpte_v = hpte_new_to_old_v(hpte_v, hpte_r); ++ hpte_r = hpte_new_to_old_r(hpte_r); ++ } + if (!(hpte_v & HPTE_V_LARGE)) { + size = MMU_PAGE_4K; + a_size = MMU_PAGE_4K; +@@ -512,11 +531,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot, + a_size = hpte_page_sizes[lp] >> 4; + } + /* This works for all page sizes, and for 256M and 1T segments */ +- if (cpu_has_feature(CPU_FTR_ARCH_300)) +- *ssize = hpte_r >> HPTE_R_3_0_SSIZE_SHIFT; +- else +- *ssize = hpte_v >> HPTE_V_SSIZE_SHIFT; +- ++ *ssize = hpte_v >> HPTE_V_SSIZE_SHIFT; + shift = mmu_psize_defs[size].shift; + + avpn = (HPTE_V_AVPN_VAL(hpte_v) & ~mmu_psize_defs[size].avpnm); +@@ -639,6 +654,9 @@ static void native_flush_hash_range(unsigned long number, int local) + want_v = hpte_encode_avpn(vpn, psize, ssize); + native_lock_hpte(hptep); + hpte_v = be64_to_cpu(hptep->v); ++ if (cpu_has_feature(CPU_FTR_ARCH_300)) ++ hpte_v = hpte_new_to_old_v(hpte_v, ++ be64_to_cpu(hptep->r)); + if (!HPTE_V_COMPARE(hpte_v, want_v) || + !(hpte_v & HPTE_V_VALID)) + native_unlock_hpte(hptep); +diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c +index 688b54517655..ebb7f46f0532 100644 +--- a/arch/powerpc/mm/pgtable-radix.c ++++ b/arch/powerpc/mm/pgtable-radix.c +@@ -159,7 +159,7 @@ static void __init radix_init_pgtable(void) + * Allocate Partition table and process table for the + * host. + */ +- BUILD_BUG_ON_MSG((PRTB_SIZE_SHIFT > 23), "Process table size too large."); ++ BUILD_BUG_ON_MSG((PRTB_SIZE_SHIFT > 36), "Process table size too large."); + process_tb = early_alloc_pgtable(1UL << PRTB_SIZE_SHIFT); + /* + * Fill in the process table. +@@ -181,7 +181,7 @@ static void __init radix_init_partition_table(void) + + rts_field = radix__get_tree_size(); + +- BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 24), "Partition table size too large."); ++ BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 36), "Partition table size too large."); + partition_tb = early_alloc_pgtable(1UL << PATB_SIZE_SHIFT); + partition_tb->patb0 = cpu_to_be64(rts_field | __pa(init_mm.pgd) | + RADIX_PGD_INDEX_SIZE | PATB_HR); +diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c +index d4b33dd2d9e7..dcdfee0cd4f2 100644 +--- a/arch/powerpc/platforms/powernv/pci-ioda.c ++++ b/arch/powerpc/platforms/powernv/pci-ioda.c +@@ -145,7 +145,7 @@ static struct pnv_ioda_pe *pnv_ioda_init_pe(struct pnv_phb *phb, int pe_no) + */ + rc = opal_pci_eeh_freeze_clear(phb->opal_id, pe_no, + OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); +- if (rc != OPAL_SUCCESS) ++ if (rc != OPAL_SUCCESS && rc != OPAL_UNSUPPORTED) + pr_warn("%s: Error %lld unfreezing PHB#%d-PE#%d\n", + __func__, rc, phb->hose->global_number, pe_no); + +diff --git a/arch/powerpc/platforms/ps3/htab.c b/arch/powerpc/platforms/ps3/htab.c +index cb3c50328de8..cc2b281a3766 100644 +--- a/arch/powerpc/platforms/ps3/htab.c ++++ b/arch/powerpc/platforms/ps3/htab.c +@@ -63,7 +63,7 @@ static long ps3_hpte_insert(unsigned long hpte_group, unsigned long vpn, + vflags &= ~HPTE_V_SECONDARY; + + hpte_v = hpte_encode_v(vpn, psize, apsize, ssize) | vflags | HPTE_V_VALID; +- hpte_r = hpte_encode_r(ps3_mm_phys_to_lpar(pa), psize, apsize, ssize) | rflags; ++ hpte_r = hpte_encode_r(ps3_mm_phys_to_lpar(pa), psize, apsize) | rflags; + + spin_lock_irqsave(&ps3_htab_lock, flags); + +diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c +index aa35245d8d6d..f2c98f6c1c9c 100644 +--- a/arch/powerpc/platforms/pseries/lpar.c ++++ b/arch/powerpc/platforms/pseries/lpar.c +@@ -145,7 +145,7 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group, + hpte_group, vpn, pa, rflags, vflags, psize); + + hpte_v = hpte_encode_v(vpn, psize, apsize, ssize) | vflags | HPTE_V_VALID; +- hpte_r = hpte_encode_r(pa, psize, apsize, ssize) | rflags; ++ hpte_r = hpte_encode_r(pa, psize, apsize) | rflags; + + if (!(vflags & HPTE_V_BOLTED)) + pr_devel(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r); +diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h +index a39629206864..ed10b5bf9b93 100644 +--- a/arch/x86/include/asm/cpufeatures.h ++++ b/arch/x86/include/asm/cpufeatures.h +@@ -311,4 +311,6 @@ + #define X86_BUG_NULL_SEG X86_BUG(10) /* Nulling a selector preserves the base */ + #define X86_BUG_SWAPGS_FENCE X86_BUG(11) /* SWAPGS without input dep on GS */ + #define X86_BUG_MONITOR X86_BUG(12) /* IPI required to wake up remote CPU */ ++#define X86_BUG_AMD_E400 X86_BUG(13) /* CPU is among the affected by Erratum 400 */ ++ + #endif /* _ASM_X86_CPUFEATURES_H */ +diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c +index 1e81a37c034e..1d3167269a67 100644 +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -20,6 +20,10 @@ + + #include "cpu.h" + ++static const int amd_erratum_383[]; ++static const int amd_erratum_400[]; ++static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum); ++ + /* + * nodes_per_socket: Stores the number of nodes per socket. + * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX +@@ -305,20 +309,32 @@ static void amd_get_topology(struct cpuinfo_x86 *c) + + /* get information required for multi-node processors */ + if (boot_cpu_has(X86_FEATURE_TOPOEXT)) { +- u32 eax, ebx, ecx, edx; + +- cpuid(0x8000001e, &eax, &ebx, &ecx, &edx); +- node_id = ecx & 7; ++ node_id = cpuid_ecx(0x8000001e) & 7; + +- /* get compute unit information */ +- smp_num_siblings = ((ebx >> 8) & 3) + 1; +- c->x86_max_cores /= smp_num_siblings; +- c->cpu_core_id = ebx & 0xff; ++ /* ++ * We may have multiple LLCs if L3 caches exist, so check if we ++ * have an L3 cache by looking at the L3 cache CPUID leaf. ++ */ ++ if (cpuid_edx(0x80000006)) { ++ if (c->x86 == 0x17) { ++ /* ++ * LLC is at the core complex level. ++ * Core complex id is ApicId[3]. ++ */ ++ per_cpu(cpu_llc_id, cpu) = c->apicid >> 3; ++ } else { ++ /* LLC is at the node level. */ ++ per_cpu(cpu_llc_id, cpu) = node_id; ++ } ++ } + } else if (cpu_has(c, X86_FEATURE_NODEID_MSR)) { + u64 value; + + rdmsrl(MSR_FAM10H_NODE_ID, value); + node_id = value & 7; ++ ++ per_cpu(cpu_llc_id, cpu) = node_id; + } else + return; + +@@ -329,9 +345,6 @@ static void amd_get_topology(struct cpuinfo_x86 *c) + set_cpu_cap(c, X86_FEATURE_AMD_DCM); + cus_per_node = c->x86_max_cores / nodes_per_socket; + +- /* store NodeID, use llc_shared_map to store sibling info */ +- per_cpu(cpu_llc_id, cpu) = node_id; +- + /* core id has to be in the [0 .. cores_per_node - 1] range */ + c->cpu_core_id %= cus_per_node; + } +@@ -356,15 +369,6 @@ static void amd_detect_cmp(struct cpuinfo_x86 *c) + /* use socket ID also for last level cache */ + per_cpu(cpu_llc_id, cpu) = c->phys_proc_id; + amd_get_topology(c); +- +- /* +- * Fix percpu cpu_llc_id here as LLC topology is different +- * for Fam17h systems. +- */ +- if (c->x86 != 0x17 || !cpuid_edx(0x80000006)) +- return; +- +- per_cpu(cpu_llc_id, cpu) = c->apicid >> 3; + #endif + } + +@@ -585,11 +589,16 @@ static void early_init_amd(struct cpuinfo_x86 *c) + /* F16h erratum 793, CVE-2013-6885 */ + if (c->x86 == 0x16 && c->x86_model <= 0xf) + msr_set_bit(MSR_AMD64_LS_CFG, 15); +-} + +-static const int amd_erratum_383[]; +-static const int amd_erratum_400[]; +-static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum); ++ /* ++ * Check whether the machine is affected by erratum 400. This is ++ * used to select the proper idle routine and to enable the check ++ * whether the machine is affected in arch_post_acpi_init(), which ++ * sets the X86_BUG_AMD_APIC_C1E bug depending on the MSR check. ++ */ ++ if (cpu_has_amd_erratum(c, amd_erratum_400)) ++ set_cpu_bug(c, X86_BUG_AMD_E400); ++} + + static void init_amd_k8(struct cpuinfo_x86 *c) + { +@@ -770,9 +779,6 @@ static void init_amd(struct cpuinfo_x86 *c) + if (c->x86 > 0x11) + set_cpu_cap(c, X86_FEATURE_ARAT); + +- if (cpu_has_amd_erratum(c, amd_erratum_400)) +- set_cpu_bug(c, X86_BUG_AMD_APIC_C1E); +- + rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy); + + /* 3DNow or LM implies PREFETCHW */ +diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c +index dd62708c6a67..023c7bfa24df 100644 +--- a/arch/x86/kernel/cpu/common.c ++++ b/arch/x86/kernel/cpu/common.c +@@ -1275,7 +1275,7 @@ static __init int setup_disablecpuid(char *arg) + { + int bit; + +- if (get_option(&arg, &bit) && bit < NCAPINTS*32) ++ if (get_option(&arg, &bit) && bit >= 0 && bit < NCAPINTS * 32) + setup_clear_cpu_cap(bit); + else + return 0; +diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c +index 0888a879120f..8e10e72bf6ee 100644 +--- a/arch/x86/kernel/process.c ++++ b/arch/x86/kernel/process.c +@@ -448,8 +448,7 @@ void select_idle_routine(const struct cpuinfo_x86 *c) + if (x86_idle || boot_option_idle_override == IDLE_POLL) + return; + +- if (cpu_has_bug(c, X86_BUG_AMD_APIC_C1E)) { +- /* E400: APIC timer interrupt does not wake up CPU from C1e */ ++ if (boot_cpu_has_bug(X86_BUG_AMD_E400)) { + pr_info("using AMD E400 aware idle routine\n"); + x86_idle = amd_e400_idle; + } else if (prefer_mwait_c1_over_halt(c)) { +diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c +index a3ce9d260d68..9f676adcdfc2 100644 +--- a/arch/x86/kvm/emulate.c ++++ b/arch/x86/kvm/emulate.c +@@ -171,6 +171,7 @@ + #define NearBranch ((u64)1 << 52) /* Near branches */ + #define No16 ((u64)1 << 53) /* No 16 bit operand */ + #define IncSP ((u64)1 << 54) /* SP is incremented before ModRM calc */ ++#define Aligned16 ((u64)1 << 55) /* Aligned to 16 byte boundary (e.g. FXSAVE) */ + + #define DstXacc (DstAccLo | SrcAccHi | SrcWrite) + +@@ -446,6 +447,26 @@ FOP_END; + FOP_START(salc) "pushf; sbb %al, %al; popf \n\t" FOP_RET + FOP_END; + ++/* ++ * XXX: inoutclob user must know where the argument is being expanded. ++ * Relying on CC_HAVE_ASM_GOTO would allow us to remove _fault. ++ */ ++#define asm_safe(insn, inoutclob...) \ ++({ \ ++ int _fault = 0; \ ++ \ ++ asm volatile("1:" insn "\n" \ ++ "2:\n" \ ++ ".pushsection .fixup, \"ax\"\n" \ ++ "3: movl $1, %[_fault]\n" \ ++ " jmp 2b\n" \ ++ ".popsection\n" \ ++ _ASM_EXTABLE(1b, 3b) \ ++ : [_fault] "+qm"(_fault) inoutclob ); \ ++ \ ++ _fault ? X86EMUL_UNHANDLEABLE : X86EMUL_CONTINUE; \ ++}) ++ + static int emulator_check_intercept(struct x86_emulate_ctxt *ctxt, + enum x86_intercept intercept, + enum x86_intercept_stage stage) +@@ -632,21 +653,24 @@ static void set_segment_selector(struct x86_emulate_ctxt *ctxt, u16 selector, + * depending on whether they're AVX encoded or not. + * + * Also included is CMPXCHG16B which is not a vector instruction, yet it is +- * subject to the same check. ++ * subject to the same check. FXSAVE and FXRSTOR are checked here too as their ++ * 512 bytes of data must be aligned to a 16 byte boundary. + */ +-static bool insn_aligned(struct x86_emulate_ctxt *ctxt, unsigned size) ++static unsigned insn_alignment(struct x86_emulate_ctxt *ctxt, unsigned size) + { + if (likely(size < 16)) +- return false; ++ return 1; + + if (ctxt->d & Aligned) +- return true; ++ return size; + else if (ctxt->d & Unaligned) +- return false; ++ return 1; + else if (ctxt->d & Avx) +- return false; ++ return 1; ++ else if (ctxt->d & Aligned16) ++ return 16; + else +- return true; ++ return size; + } + + static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt, +@@ -704,7 +728,7 @@ static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt, + } + break; + } +- if (insn_aligned(ctxt, size) && ((la & (size - 1)) != 0)) ++ if (la & (insn_alignment(ctxt, size) - 1)) + return emulate_gp(ctxt, 0); + return X86EMUL_CONTINUE; + bad: +@@ -791,6 +815,20 @@ static int segmented_read_std(struct x86_emulate_ctxt *ctxt, + return ctxt->ops->read_std(ctxt, linear, data, size, &ctxt->exception); + } + ++static int segmented_write_std(struct x86_emulate_ctxt *ctxt, ++ struct segmented_address addr, ++ void *data, ++ unsigned int size) ++{ ++ int rc; ++ ulong linear; ++ ++ rc = linearize(ctxt, addr, size, true, &linear); ++ if (rc != X86EMUL_CONTINUE) ++ return rc; ++ return ctxt->ops->write_std(ctxt, linear, data, size, &ctxt->exception); ++} ++ + /* + * Prefetch the remaining bytes of the instruction without crossing page + * boundary if they are not in fetch_cache yet. +@@ -1544,7 +1582,6 @@ static int write_segment_descriptor(struct x86_emulate_ctxt *ctxt, + &ctxt->exception); + } + +-/* Does not support long mode */ + static int __load_segment_descriptor(struct x86_emulate_ctxt *ctxt, + u16 selector, int seg, u8 cpl, + enum x86_transfer_type transfer, +@@ -1581,20 +1618,34 @@ static int __load_segment_descriptor(struct x86_emulate_ctxt *ctxt, + + rpl = selector & 3; + +- /* NULL selector is not valid for TR, CS and SS (except for long mode) */ +- if ((seg == VCPU_SREG_CS +- || (seg == VCPU_SREG_SS +- && (ctxt->mode != X86EMUL_MODE_PROT64 || rpl != cpl)) +- || seg == VCPU_SREG_TR) +- && null_selector) +- goto exception; +- + /* TR should be in GDT only */ + if (seg == VCPU_SREG_TR && (selector & (1 << 2))) + goto exception; + +- if (null_selector) /* for NULL selector skip all following checks */ ++ /* NULL selector is not valid for TR, CS and (except for long mode) SS */ ++ if (null_selector) { ++ if (seg == VCPU_SREG_CS || seg == VCPU_SREG_TR) ++ goto exception; ++ ++ if (seg == VCPU_SREG_SS) { ++ if (ctxt->mode != X86EMUL_MODE_PROT64 || rpl != cpl) ++ goto exception; ++ ++ /* ++ * ctxt->ops->set_segment expects the CPL to be in ++ * SS.DPL, so fake an expand-up 32-bit data segment. ++ */ ++ seg_desc.type = 3; ++ seg_desc.p = 1; ++ seg_desc.s = 1; ++ seg_desc.dpl = cpl; ++ seg_desc.d = 1; ++ seg_desc.g = 1; ++ } ++ ++ /* Skip all following checks */ + goto load; ++ } + + ret = read_segment_descriptor(ctxt, selector, &seg_desc, &desc_addr); + if (ret != X86EMUL_CONTINUE) +@@ -1710,6 +1761,21 @@ static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt, + u16 selector, int seg) + { + u8 cpl = ctxt->ops->cpl(ctxt); ++ ++ /* ++ * None of MOV, POP and LSS can load a NULL selector in CPL=3, but ++ * they can load it at CPL<3 (Intel's manual says only LSS can, ++ * but it's wrong). ++ * ++ * However, the Intel manual says that putting IST=1/DPL=3 in ++ * an interrupt gate will result in SS=3 (the AMD manual instead ++ * says it doesn't), so allow SS=3 in __load_segment_descriptor ++ * and only forbid it here. ++ */ ++ if (seg == VCPU_SREG_SS && selector == 3 && ++ ctxt->mode == X86EMUL_MODE_PROT64) ++ return emulate_exception(ctxt, GP_VECTOR, 0, true); ++ + return __load_segment_descriptor(ctxt, selector, seg, cpl, + X86_TRANSFER_NONE, NULL); + } +@@ -3658,8 +3724,8 @@ static int emulate_store_desc_ptr(struct x86_emulate_ctxt *ctxt, + } + /* Disable writeback. */ + ctxt->dst.type = OP_NONE; +- return segmented_write(ctxt, ctxt->dst.addr.mem, +- &desc_ptr, 2 + ctxt->op_bytes); ++ return segmented_write_std(ctxt, ctxt->dst.addr.mem, ++ &desc_ptr, 2 + ctxt->op_bytes); + } + + static int em_sgdt(struct x86_emulate_ctxt *ctxt) +@@ -3842,6 +3908,131 @@ static int em_movsxd(struct x86_emulate_ctxt *ctxt) + return X86EMUL_CONTINUE; + } + ++static int check_fxsr(struct x86_emulate_ctxt *ctxt) ++{ ++ u32 eax = 1, ebx, ecx = 0, edx; ++ ++ ctxt->ops->get_cpuid(ctxt, &eax, &ebx, &ecx, &edx); ++ if (!(edx & FFL(FXSR))) ++ return emulate_ud(ctxt); ++ ++ if (ctxt->ops->get_cr(ctxt, 0) & (X86_CR0_TS | X86_CR0_EM)) ++ return emulate_nm(ctxt); ++ ++ /* ++ * Don't emulate a case that should never be hit, instead of working ++ * around a lack of fxsave64/fxrstor64 on old compilers. ++ */ ++ if (ctxt->mode >= X86EMUL_MODE_PROT64) ++ return X86EMUL_UNHANDLEABLE; ++ ++ return X86EMUL_CONTINUE; ++} ++ ++/* ++ * FXSAVE and FXRSTOR have 4 different formats depending on execution mode, ++ * 1) 16 bit mode ++ * 2) 32 bit mode ++ * - like (1), but FIP and FDP (foo) are only 16 bit. At least Intel CPUs ++ * preserve whole 32 bit values, though, so (1) and (2) are the same wrt. ++ * save and restore ++ * 3) 64-bit mode with REX.W prefix ++ * - like (2), but XMM 8-15 are being saved and restored ++ * 4) 64-bit mode without REX.W prefix ++ * - like (3), but FIP and FDP are 64 bit ++ * ++ * Emulation uses (3) for (1) and (2) and preserves XMM 8-15 to reach the ++ * desired result. (4) is not emulated. ++ * ++ * Note: Guest and host CPUID.(EAX=07H,ECX=0H):EBX[bit 13] (deprecate FPU CS ++ * and FPU DS) should match. ++ */ ++static int em_fxsave(struct x86_emulate_ctxt *ctxt) ++{ ++ struct fxregs_state fx_state; ++ size_t size; ++ int rc; ++ ++ rc = check_fxsr(ctxt); ++ if (rc != X86EMUL_CONTINUE) ++ return rc; ++ ++ ctxt->ops->get_fpu(ctxt); ++ ++ rc = asm_safe("fxsave %[fx]", , [fx] "+m"(fx_state)); ++ ++ ctxt->ops->put_fpu(ctxt); ++ ++ if (rc != X86EMUL_CONTINUE) ++ return rc; ++ ++ if (ctxt->ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR) ++ size = offsetof(struct fxregs_state, xmm_space[8 * 16/4]); ++ else ++ size = offsetof(struct fxregs_state, xmm_space[0]); ++ ++ return segmented_write_std(ctxt, ctxt->memop.addr.mem, &fx_state, size); ++} ++ ++static int fxrstor_fixup(struct x86_emulate_ctxt *ctxt, ++ struct fxregs_state *new) ++{ ++ int rc = X86EMUL_CONTINUE; ++ struct fxregs_state old; ++ ++ rc = asm_safe("fxsave %[fx]", , [fx] "+m"(old)); ++ if (rc != X86EMUL_CONTINUE) ++ return rc; ++ ++ /* ++ * 64 bit host will restore XMM 8-15, which is not correct on non-64 ++ * bit guests. Load the current values in order to preserve 64 bit ++ * XMMs after fxrstor. ++ */ ++#ifdef CONFIG_X86_64 ++ /* XXX: accessing XMM 8-15 very awkwardly */ ++ memcpy(&new->xmm_space[8 * 16/4], &old.xmm_space[8 * 16/4], 8 * 16); ++#endif ++ ++ /* ++ * Hardware doesn't save and restore XMM 0-7 without CR4.OSFXSR, but ++ * does save and restore MXCSR. ++ */ ++ if (!(ctxt->ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR)) ++ memcpy(new->xmm_space, old.xmm_space, 8 * 16); ++ ++ return rc; ++} ++ ++static int em_fxrstor(struct x86_emulate_ctxt *ctxt) ++{ ++ struct fxregs_state fx_state; ++ int rc; ++ ++ rc = check_fxsr(ctxt); ++ if (rc != X86EMUL_CONTINUE) ++ return rc; ++ ++ rc = segmented_read_std(ctxt, ctxt->memop.addr.mem, &fx_state, 512); ++ if (rc != X86EMUL_CONTINUE) ++ return rc; ++ ++ if (fx_state.mxcsr >> 16) ++ return emulate_gp(ctxt, 0); ++ ++ ctxt->ops->get_fpu(ctxt); ++ ++ if (ctxt->mode < X86EMUL_MODE_PROT64) ++ rc = fxrstor_fixup(ctxt, &fx_state); ++ ++ if (rc == X86EMUL_CONTINUE) ++ rc = asm_safe("fxrstor %[fx]", : [fx] "m"(fx_state)); ++ ++ ctxt->ops->put_fpu(ctxt); ++ ++ return rc; ++} ++ + static bool valid_cr(int nr) + { + switch (nr) { +@@ -4194,7 +4385,9 @@ static const struct gprefix pfx_0f_ae_7 = { + }; + + static const struct group_dual group15 = { { +- N, N, N, N, N, N, N, GP(0, &pfx_0f_ae_7), ++ I(ModRM | Aligned16, em_fxsave), ++ I(ModRM | Aligned16, em_fxrstor), ++ N, N, N, N, N, GP(0, &pfx_0f_ae_7), + }, { + N, N, N, N, N, N, N, N, + } }; +@@ -5066,21 +5259,13 @@ static bool string_insn_completed(struct x86_emulate_ctxt *ctxt) + + static int flush_pending_x87_faults(struct x86_emulate_ctxt *ctxt) + { +- bool fault = false; ++ int rc; + + ctxt->ops->get_fpu(ctxt); +- asm volatile("1: fwait \n\t" +- "2: \n\t" +- ".pushsection .fixup,\"ax\" \n\t" +- "3: \n\t" +- "movb $1, %[fault] \n\t" +- "jmp 2b \n\t" +- ".popsection \n\t" +- _ASM_EXTABLE(1b, 3b) +- : [fault]"+qm"(fault)); ++ rc = asm_safe("fwait"); + ctxt->ops->put_fpu(ctxt); + +- if (unlikely(fault)) ++ if (unlikely(rc != X86EMUL_CONTINUE)) + return emulate_exception(ctxt, MF_VECTOR, 0, false); + + return X86EMUL_CONTINUE; +diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c +index 6f69340f9fa3..3f05c044720b 100644 +--- a/arch/x86/kvm/lapic.c ++++ b/arch/x86/kvm/lapic.c +@@ -2360,3 +2360,9 @@ void kvm_lapic_init(void) + jump_label_rate_limit(&apic_hw_disabled, HZ); + jump_label_rate_limit(&apic_sw_disabled, HZ); + } ++ ++void kvm_lapic_exit(void) ++{ ++ static_key_deferred_flush(&apic_hw_disabled); ++ static_key_deferred_flush(&apic_sw_disabled); ++} +diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h +index f60d01c29d51..4dfe4d6cb338 100644 +--- a/arch/x86/kvm/lapic.h ++++ b/arch/x86/kvm/lapic.h +@@ -108,6 +108,7 @@ static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu) + + int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data); + void kvm_lapic_init(void); ++void kvm_lapic_exit(void); + + #define VEC_POS(v) ((v) & (32 - 1)) + #define REG_POS(v) (((v) >> 5) << 4) +diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c +index f3648c978d2f..487b957e7802 100644 +--- a/arch/x86/kvm/x86.c ++++ b/arch/x86/kvm/x86.c +@@ -3308,6 +3308,8 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, + + switch (cap->cap) { + case KVM_CAP_HYPERV_SYNIC: ++ if (!irqchip_in_kernel(vcpu->kvm)) ++ return -EINVAL; + return kvm_hv_activate_synic(vcpu); + default: + return -EINVAL; +@@ -5963,6 +5965,7 @@ int kvm_arch_init(void *opaque) + + void kvm_arch_exit(void) + { ++ kvm_lapic_exit(); + perf_unregister_guest_info_callbacks(&kvm_guest_cbs); + + if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) +diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c +index 936a488d6cf6..274dfc481849 100644 +--- a/arch/x86/platform/efi/efi.c ++++ b/arch/x86/platform/efi/efi.c +@@ -210,6 +210,70 @@ int __init efi_memblock_x86_reserve_range(void) + return 0; + } + ++#define OVERFLOW_ADDR_SHIFT (64 - EFI_PAGE_SHIFT) ++#define OVERFLOW_ADDR_MASK (U64_MAX << OVERFLOW_ADDR_SHIFT) ++#define U64_HIGH_BIT (~(U64_MAX >> 1)) ++ ++static bool __init efi_memmap_entry_valid(const efi_memory_desc_t *md, int i) ++{ ++ u64 end = (md->num_pages << EFI_PAGE_SHIFT) + md->phys_addr - 1; ++ u64 end_hi = 0; ++ char buf[64]; ++ ++ if (md->num_pages == 0) { ++ end = 0; ++ } else if (md->num_pages > EFI_PAGES_MAX || ++ EFI_PAGES_MAX - md->num_pages < ++ (md->phys_addr >> EFI_PAGE_SHIFT)) { ++ end_hi = (md->num_pages & OVERFLOW_ADDR_MASK) ++ >> OVERFLOW_ADDR_SHIFT; ++ ++ if ((md->phys_addr & U64_HIGH_BIT) && !(end & U64_HIGH_BIT)) ++ end_hi += 1; ++ } else { ++ return true; ++ } ++ ++ pr_warn_once(FW_BUG "Invalid EFI memory map entries:\n"); ++ ++ if (end_hi) { ++ pr_warn("mem%02u: %s range=[0x%016llx-0x%llx%016llx] (invalid)\n", ++ i, efi_md_typeattr_format(buf, sizeof(buf), md), ++ md->phys_addr, end_hi, end); ++ } else { ++ pr_warn("mem%02u: %s range=[0x%016llx-0x%016llx] (invalid)\n", ++ i, efi_md_typeattr_format(buf, sizeof(buf), md), ++ md->phys_addr, end); ++ } ++ return false; ++} ++ ++static void __init efi_clean_memmap(void) ++{ ++ efi_memory_desc_t *out = efi.memmap.map; ++ const efi_memory_desc_t *in = out; ++ const efi_memory_desc_t *end = efi.memmap.map_end; ++ int i, n_removal; ++ ++ for (i = n_removal = 0; in < end; i++) { ++ if (efi_memmap_entry_valid(in, i)) { ++ if (out != in) ++ memcpy(out, in, efi.memmap.desc_size); ++ out = (void *)out + efi.memmap.desc_size; ++ } else { ++ n_removal++; ++ } ++ in = (void *)in + efi.memmap.desc_size; ++ } ++ ++ if (n_removal > 0) { ++ u64 size = efi.memmap.nr_map - n_removal; ++ ++ pr_warn("Removing %d invalid memory map entries.\n", n_removal); ++ efi_memmap_install(efi.memmap.phys_map, size); ++ } ++} ++ + void __init efi_print_memmap(void) + { + efi_memory_desc_t *md; +@@ -472,6 +536,8 @@ void __init efi_init(void) + } + } + ++ efi_clean_memmap(); ++ + if (efi_enabled(EFI_DBG)) + efi_print_memmap(); + } +diff --git a/arch/x86/platform/efi/quirks.c b/arch/x86/platform/efi/quirks.c +index 10aca63a50d7..30031d5293c4 100644 +--- a/arch/x86/platform/efi/quirks.c ++++ b/arch/x86/platform/efi/quirks.c +@@ -214,7 +214,7 @@ void __init efi_arch_mem_reserve(phys_addr_t addr, u64 size) + + new_size = efi.memmap.desc_size * num_entries; + +- new_phys = memblock_alloc(new_size, 0); ++ new_phys = efi_memmap_alloc(num_entries); + if (!new_phys) { + pr_err("Could not allocate boot services memmap\n"); + return; +@@ -355,7 +355,7 @@ void __init efi_free_boot_services(void) + } + + new_size = efi.memmap.desc_size * num_entries; +- new_phys = memblock_alloc(new_size, 0); ++ new_phys = efi_memmap_alloc(num_entries); + if (!new_phys) { + pr_err("Failed to allocate new EFI memmap\n"); + return; +diff --git a/block/blk-mq.c b/block/blk-mq.c +index ad459e4e8071..81caceb96c3c 100644 +--- a/block/blk-mq.c ++++ b/block/blk-mq.c +@@ -895,7 +895,7 @@ static int blk_mq_hctx_next_cpu(struct blk_mq_hw_ctx *hctx) + return WORK_CPU_UNBOUND; + + if (--hctx->next_cpu_batch <= 0) { +- int cpu = hctx->next_cpu, next_cpu; ++ int next_cpu; + + next_cpu = cpumask_next(hctx->next_cpu, hctx->cpumask); + if (next_cpu >= nr_cpu_ids) +@@ -903,8 +903,6 @@ static int blk_mq_hctx_next_cpu(struct blk_mq_hw_ctx *hctx) + + hctx->next_cpu = next_cpu; + hctx->next_cpu_batch = BLK_MQ_CPU_WORK_BATCH; +- +- return cpu; + } + + return hctx->next_cpu; +diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c +index 5e24d880306c..3ab6807773ee 100644 +--- a/block/cfq-iosched.c ++++ b/block/cfq-iosched.c +@@ -1596,7 +1596,7 @@ static struct blkcg_policy_data *cfq_cpd_alloc(gfp_t gfp) + { + struct cfq_group_data *cgd; + +- cgd = kzalloc(sizeof(*cgd), GFP_KERNEL); ++ cgd = kzalloc(sizeof(*cgd), gfp); + if (!cgd) + return NULL; + return &cgd->cpd; +diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c +index 0d099a24f776..e53bef6cf53c 100644 +--- a/drivers/acpi/apei/ghes.c ++++ b/drivers/acpi/apei/ghes.c +@@ -852,6 +852,8 @@ static int ghes_notify_nmi(unsigned int cmd, struct pt_regs *regs) + if (ghes_read_estatus(ghes, 1)) { + ghes_clear_estatus(ghes); + continue; ++ } else { ++ ret = NMI_HANDLED; + } + + sev = ghes_severity(ghes->estatus->error_severity); +@@ -863,12 +865,11 @@ static int ghes_notify_nmi(unsigned int cmd, struct pt_regs *regs) + + __process_error(ghes); + ghes_clear_estatus(ghes); +- +- ret = NMI_HANDLED; + } + + #ifdef CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG +- irq_work_queue(&ghes_proc_irq_work); ++ if (ret == NMI_HANDLED) ++ irq_work_queue(&ghes_proc_irq_work); + #endif + atomic_dec(&ghes_in_nmi); + return ret; +diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c +index d0d0504b7c89..e0ea8f56d2bf 100644 +--- a/drivers/acpi/cppc_acpi.c ++++ b/drivers/acpi/cppc_acpi.c +@@ -784,8 +784,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr) + + /* Add per logical CPU nodes for reading its feedback counters. */ + cpu_dev = get_cpu_device(pr->id); +- if (!cpu_dev) ++ if (!cpu_dev) { ++ ret = -EINVAL; + goto out_free; ++ } + + ret = kobject_init_and_add(&cpc_ptr->kobj, &cppc_ktype, &cpu_dev->kobj, + "acpi_cppc"); +diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c +index 5545a679abd8..3c3b8f601469 100644 +--- a/drivers/block/virtio_blk.c ++++ b/drivers/block/virtio_blk.c +@@ -56,6 +56,7 @@ struct virtblk_req { + struct virtio_blk_outhdr out_hdr; + struct virtio_scsi_inhdr in_hdr; + u8 status; ++ u8 sense[SCSI_SENSE_BUFFERSIZE]; + struct scatterlist sg[]; + }; + +@@ -102,7 +103,8 @@ static int __virtblk_add_req(struct virtqueue *vq, + } + + if (type == cpu_to_virtio32(vq->vdev, VIRTIO_BLK_T_SCSI_CMD)) { +- sg_init_one(&sense, vbr->req->sense, SCSI_SENSE_BUFFERSIZE); ++ memcpy(vbr->sense, vbr->req->sense, SCSI_SENSE_BUFFERSIZE); ++ sg_init_one(&sense, vbr->sense, SCSI_SENSE_BUFFERSIZE); + sgs[num_out + num_in++] = &sense; + sg_init_one(&inhdr, &vbr->in_hdr, sizeof(vbr->in_hdr)); + sgs[num_out + num_in++] = &inhdr; +diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c +index 5497f7fc44d0..d2ef51ca9cf4 100644 +--- a/drivers/block/zram/zram_drv.c ++++ b/drivers/block/zram/zram_drv.c +@@ -25,6 +25,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -111,6 +112,14 @@ static inline bool is_partial_io(struct bio_vec *bvec) + return bvec->bv_len != PAGE_SIZE; + } + ++static void zram_revalidate_disk(struct zram *zram) ++{ ++ revalidate_disk(zram->disk); ++ /* revalidate_disk reset the BDI_CAP_STABLE_WRITES so set again */ ++ zram->disk->queue->backing_dev_info.capabilities |= ++ BDI_CAP_STABLE_WRITES; ++} ++ + /* + * Check if request is within bounds and aligned on zram logical blocks. + */ +@@ -1094,15 +1103,9 @@ static ssize_t disksize_store(struct device *dev, + zram->comp = comp; + zram->disksize = disksize; + set_capacity(zram->disk, zram->disksize >> SECTOR_SHIFT); ++ zram_revalidate_disk(zram); + up_write(&zram->init_lock); + +- /* +- * Revalidate disk out of the init_lock to avoid lockdep splat. +- * It's okay because disk's capacity is protected by init_lock +- * so that revalidate_disk always sees up-to-date capacity. +- */ +- revalidate_disk(zram->disk); +- + return len; + + out_destroy_comp: +@@ -1148,7 +1151,7 @@ static ssize_t reset_store(struct device *dev, + /* Make sure all the pending I/O are finished */ + fsync_bdev(bdev); + zram_reset_device(zram); +- revalidate_disk(zram->disk); ++ zram_revalidate_disk(zram); + bdput(bdev); + + mutex_lock(&bdev->bd_mutex); +diff --git a/drivers/bus/vexpress-config.c b/drivers/bus/vexpress-config.c +index 9efdf1de4035..493e7b9fc813 100644 +--- a/drivers/bus/vexpress-config.c ++++ b/drivers/bus/vexpress-config.c +@@ -171,6 +171,7 @@ static int vexpress_config_populate(struct device_node *node) + { + struct device_node *bridge; + struct device *parent; ++ int ret; + + bridge = of_parse_phandle(node, "arm,vexpress,config-bridge", 0); + if (!bridge) +@@ -182,7 +183,11 @@ static int vexpress_config_populate(struct device_node *node) + if (WARN_ON(!parent)) + return -ENODEV; + +- return of_platform_populate(node, NULL, NULL, parent); ++ ret = of_platform_populate(node, NULL, NULL, parent); ++ ++ put_device(parent); ++ ++ return ret; + } + + static int __init vexpress_config_init(void) +diff --git a/drivers/char/mem.c b/drivers/char/mem.c +index 5bb1985ec484..6d9cc2d39d22 100644 +--- a/drivers/char/mem.c ++++ b/drivers/char/mem.c +@@ -381,9 +381,6 @@ static ssize_t read_kmem(struct file *file, char __user *buf, + char *kbuf; /* k-addr because vread() takes vmlist_lock rwlock */ + int err = 0; + +- if (!pfn_valid(PFN_DOWN(p))) +- return -EIO; +- + read = 0; + if (p < (unsigned long) high_memory) { + low_count = count; +@@ -412,6 +409,8 @@ static ssize_t read_kmem(struct file *file, char __user *buf, + * by the kernel or data corruption may occur + */ + kbuf = xlate_dev_kmem_ptr((void *)p); ++ if (!virt_addr_valid(kbuf)) ++ return -ENXIO; + + if (copy_to_user(buf, kbuf, sz)) + return -EFAULT; +@@ -482,6 +481,8 @@ static ssize_t do_write_kmem(unsigned long p, const char __user *buf, + * corruption may occur. + */ + ptr = xlate_dev_kmem_ptr((void *)p); ++ if (!virt_addr_valid(ptr)) ++ return -ENXIO; + + copied = copy_from_user(ptr, buf, sz); + if (copied) { +@@ -512,9 +513,6 @@ static ssize_t write_kmem(struct file *file, const char __user *buf, + char *kbuf; /* k-addr because vwrite() takes vmlist_lock rwlock */ + int err = 0; + +- if (!pfn_valid(PFN_DOWN(p))) +- return -EIO; +- + if (p < (unsigned long) high_memory) { + unsigned long to_write = min_t(unsigned long, count, + (unsigned long)high_memory - p); +diff --git a/drivers/cpufreq/powernv-cpufreq.c b/drivers/cpufreq/powernv-cpufreq.c +index d3ffde806629..a84724eabfb8 100644 +--- a/drivers/cpufreq/powernv-cpufreq.c ++++ b/drivers/cpufreq/powernv-cpufreq.c +@@ -647,8 +647,14 @@ static int powernv_cpufreq_target_index(struct cpufreq_policy *policy, + if (unlikely(rebooting) && new_index != get_nominal_index()) + return 0; + +- if (!throttled) ++ if (!throttled) { ++ /* we don't want to be preempted while ++ * checking if the CPU frequency has been throttled ++ */ ++ preempt_disable(); + powernv_cpufreq_throttle_check(NULL); ++ preempt_enable(); ++ } + + cur_msec = jiffies_to_msecs(get_jiffies_64()); + +diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c +index 7ca27d4b1c54..6b16ce390dce 100644 +--- a/drivers/dma/omap-dma.c ++++ b/drivers/dma/omap-dma.c +@@ -1339,6 +1339,7 @@ static int omap_dma_probe(struct platform_device *pdev) + struct omap_dmadev *od; + struct resource *res; + int rc, i, irq; ++ u32 lch_count; + + od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); + if (!od) +@@ -1381,20 +1382,31 @@ static int omap_dma_probe(struct platform_device *pdev) + spin_lock_init(&od->lock); + spin_lock_init(&od->irq_lock); + +- if (!pdev->dev.of_node) { +- od->dma_requests = od->plat->dma_attr->lch_count; +- if (unlikely(!od->dma_requests)) +- od->dma_requests = OMAP_SDMA_REQUESTS; +- } else if (of_property_read_u32(pdev->dev.of_node, "dma-requests", +- &od->dma_requests)) { ++ /* Number of DMA requests */ ++ od->dma_requests = OMAP_SDMA_REQUESTS; ++ if (pdev->dev.of_node && of_property_read_u32(pdev->dev.of_node, ++ "dma-requests", ++ &od->dma_requests)) { + dev_info(&pdev->dev, + "Missing dma-requests property, using %u.\n", + OMAP_SDMA_REQUESTS); +- od->dma_requests = OMAP_SDMA_REQUESTS; + } + +- od->lch_map = devm_kcalloc(&pdev->dev, od->dma_requests, +- sizeof(*od->lch_map), GFP_KERNEL); ++ /* Number of available logical channels */ ++ if (!pdev->dev.of_node) { ++ lch_count = od->plat->dma_attr->lch_count; ++ if (unlikely(!lch_count)) ++ lch_count = OMAP_SDMA_CHANNELS; ++ } else if (of_property_read_u32(pdev->dev.of_node, "dma-channels", ++ &lch_count)) { ++ dev_info(&pdev->dev, ++ "Missing dma-channels property, using %u.\n", ++ OMAP_SDMA_CHANNELS); ++ lch_count = OMAP_SDMA_CHANNELS; ++ } ++ ++ od->lch_map = devm_kcalloc(&pdev->dev, lch_count, sizeof(*od->lch_map), ++ GFP_KERNEL); + if (!od->lch_map) + return -ENOMEM; + +diff --git a/drivers/extcon/extcon.c b/drivers/extcon/extcon.c +index 78298460d168..7c1e3a7b14e0 100644 +--- a/drivers/extcon/extcon.c ++++ b/drivers/extcon/extcon.c +@@ -453,7 +453,7 @@ int extcon_sync(struct extcon_dev *edev, unsigned int id) + dev_err(&edev->dev, "out of memory in extcon_set_state\n"); + kobject_uevent(&edev->dev.kobj, KOBJ_CHANGE); + +- return 0; ++ return -ENOMEM; + } + + length = name_show(&edev->dev, NULL, prop_buf); +diff --git a/drivers/firmware/efi/fake_mem.c b/drivers/firmware/efi/fake_mem.c +index 520a40e5e0e4..6c7d60c239b5 100644 +--- a/drivers/firmware/efi/fake_mem.c ++++ b/drivers/firmware/efi/fake_mem.c +@@ -71,8 +71,7 @@ void __init efi_fake_memmap(void) + } + + /* allocate memory for new EFI memmap */ +- new_memmap_phy = memblock_alloc(efi.memmap.desc_size * new_nr_map, +- PAGE_SIZE); ++ new_memmap_phy = efi_memmap_alloc(new_nr_map); + if (!new_memmap_phy) + return; + +diff --git a/drivers/firmware/efi/libstub/efistub.h b/drivers/firmware/efi/libstub/efistub.h +index ee49cd23ee63..fac67992bede 100644 +--- a/drivers/firmware/efi/libstub/efistub.h ++++ b/drivers/firmware/efi/libstub/efistub.h +@@ -30,14 +30,6 @@ efi_status_t efi_file_close(void *handle); + + unsigned long get_dram_base(efi_system_table_t *sys_table_arg); + +-efi_status_t update_fdt(efi_system_table_t *sys_table, void *orig_fdt, +- unsigned long orig_fdt_size, +- void *fdt, int new_fdt_size, char *cmdline_ptr, +- u64 initrd_addr, u64 initrd_size, +- efi_memory_desc_t *memory_map, +- unsigned long map_size, unsigned long desc_size, +- u32 desc_ver); +- + efi_status_t allocate_new_fdt_and_exit_boot(efi_system_table_t *sys_table, + void *handle, + unsigned long *new_fdt_addr, +diff --git a/drivers/firmware/efi/libstub/fdt.c b/drivers/firmware/efi/libstub/fdt.c +index a6a93116a8f0..921dfa047202 100644 +--- a/drivers/firmware/efi/libstub/fdt.c ++++ b/drivers/firmware/efi/libstub/fdt.c +@@ -16,13 +16,10 @@ + + #include "efistub.h" + +-efi_status_t update_fdt(efi_system_table_t *sys_table, void *orig_fdt, +- unsigned long orig_fdt_size, +- void *fdt, int new_fdt_size, char *cmdline_ptr, +- u64 initrd_addr, u64 initrd_size, +- efi_memory_desc_t *memory_map, +- unsigned long map_size, unsigned long desc_size, +- u32 desc_ver) ++static efi_status_t update_fdt(efi_system_table_t *sys_table, void *orig_fdt, ++ unsigned long orig_fdt_size, ++ void *fdt, int new_fdt_size, char *cmdline_ptr, ++ u64 initrd_addr, u64 initrd_size) + { + int node, num_rsv; + int status; +@@ -101,25 +98,23 @@ efi_status_t update_fdt(efi_system_table_t *sys_table, void *orig_fdt, + if (status) + goto fdt_set_fail; + +- fdt_val64 = cpu_to_fdt64((u64)(unsigned long)memory_map); ++ fdt_val64 = U64_MAX; /* placeholder */ + status = fdt_setprop(fdt, node, "linux,uefi-mmap-start", + &fdt_val64, sizeof(fdt_val64)); + if (status) + goto fdt_set_fail; + +- fdt_val32 = cpu_to_fdt32(map_size); ++ fdt_val32 = U32_MAX; /* placeholder */ + status = fdt_setprop(fdt, node, "linux,uefi-mmap-size", + &fdt_val32, sizeof(fdt_val32)); + if (status) + goto fdt_set_fail; + +- fdt_val32 = cpu_to_fdt32(desc_size); + status = fdt_setprop(fdt, node, "linux,uefi-mmap-desc-size", + &fdt_val32, sizeof(fdt_val32)); + if (status) + goto fdt_set_fail; + +- fdt_val32 = cpu_to_fdt32(desc_ver); + status = fdt_setprop(fdt, node, "linux,uefi-mmap-desc-ver", + &fdt_val32, sizeof(fdt_val32)); + if (status) +@@ -148,6 +143,43 @@ efi_status_t update_fdt(efi_system_table_t *sys_table, void *orig_fdt, + return EFI_LOAD_ERROR; + } + ++static efi_status_t update_fdt_memmap(void *fdt, struct efi_boot_memmap *map) ++{ ++ int node = fdt_path_offset(fdt, "/chosen"); ++ u64 fdt_val64; ++ u32 fdt_val32; ++ int err; ++ ++ if (node < 0) ++ return EFI_LOAD_ERROR; ++ ++ fdt_val64 = cpu_to_fdt64((unsigned long)*map->map); ++ err = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-start", ++ &fdt_val64, sizeof(fdt_val64)); ++ if (err) ++ return EFI_LOAD_ERROR; ++ ++ fdt_val32 = cpu_to_fdt32(*map->map_size); ++ err = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-size", ++ &fdt_val32, sizeof(fdt_val32)); ++ if (err) ++ return EFI_LOAD_ERROR; ++ ++ fdt_val32 = cpu_to_fdt32(*map->desc_size); ++ err = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-desc-size", ++ &fdt_val32, sizeof(fdt_val32)); ++ if (err) ++ return EFI_LOAD_ERROR; ++ ++ fdt_val32 = cpu_to_fdt32(*map->desc_ver); ++ err = fdt_setprop_inplace(fdt, node, "linux,uefi-mmap-desc-ver", ++ &fdt_val32, sizeof(fdt_val32)); ++ if (err) ++ return EFI_LOAD_ERROR; ++ ++ return EFI_SUCCESS; ++} ++ + #ifndef EFI_FDT_ALIGN + #define EFI_FDT_ALIGN EFI_PAGE_SIZE + #endif +@@ -243,20 +275,10 @@ efi_status_t allocate_new_fdt_and_exit_boot(efi_system_table_t *sys_table, + goto fail; + } + +- /* +- * Now that we have done our final memory allocation (and free) +- * we can get the memory map key needed for +- * exit_boot_services(). +- */ +- status = efi_get_memory_map(sys_table, &map); +- if (status != EFI_SUCCESS) +- goto fail_free_new_fdt; +- + status = update_fdt(sys_table, + (void *)fdt_addr, fdt_size, + (void *)*new_fdt_addr, new_fdt_size, +- cmdline_ptr, initrd_addr, initrd_size, +- memory_map, map_size, desc_size, desc_ver); ++ cmdline_ptr, initrd_addr, initrd_size); + + /* Succeeding the first time is the expected case. */ + if (status == EFI_SUCCESS) +@@ -266,20 +288,16 @@ efi_status_t allocate_new_fdt_and_exit_boot(efi_system_table_t *sys_table, + /* + * We need to allocate more space for the new + * device tree, so free existing buffer that is +- * too small. Also free memory map, as we will need +- * to get new one that reflects the free/alloc we do +- * on the device tree buffer. ++ * too small. + */ + efi_free(sys_table, new_fdt_size, *new_fdt_addr); +- sys_table->boottime->free_pool(memory_map); + new_fdt_size += EFI_PAGE_SIZE; + } else { + pr_efi_err(sys_table, "Unable to construct new device tree.\n"); +- goto fail_free_mmap; ++ goto fail_free_new_fdt; + } + } + +- sys_table->boottime->free_pool(memory_map); + priv.runtime_map = runtime_map; + priv.runtime_entry_count = &runtime_entry_count; + status = efi_exit_boot_services(sys_table, handle, &map, &priv, +@@ -288,6 +306,16 @@ efi_status_t allocate_new_fdt_and_exit_boot(efi_system_table_t *sys_table, + if (status == EFI_SUCCESS) { + efi_set_virtual_address_map_t *svam; + ++ status = update_fdt_memmap((void *)*new_fdt_addr, &map); ++ if (status != EFI_SUCCESS) { ++ /* ++ * The kernel won't get far without the memory map, but ++ * may still be able to print something meaningful so ++ * return success here. ++ */ ++ return EFI_SUCCESS; ++ } ++ + /* Install the new virtual address map */ + svam = sys_table->runtime->set_virtual_address_map; + status = svam(runtime_entry_count * desc_size, desc_size, +@@ -319,9 +347,6 @@ efi_status_t allocate_new_fdt_and_exit_boot(efi_system_table_t *sys_table, + + pr_efi_err(sys_table, "Exit boot services failed.\n"); + +-fail_free_mmap: +- sys_table->boottime->free_pool(memory_map); +- + fail_free_new_fdt: + efi_free(sys_table, new_fdt_size, *new_fdt_addr); + +diff --git a/drivers/firmware/efi/memmap.c b/drivers/firmware/efi/memmap.c +index f03ddecd232b..78686443cb37 100644 +--- a/drivers/firmware/efi/memmap.c ++++ b/drivers/firmware/efi/memmap.c +@@ -9,6 +9,44 @@ + #include + #include + #include ++#include ++#include ++ ++static phys_addr_t __init __efi_memmap_alloc_early(unsigned long size) ++{ ++ return memblock_alloc(size, 0); ++} ++ ++static phys_addr_t __init __efi_memmap_alloc_late(unsigned long size) ++{ ++ unsigned int order = get_order(size); ++ struct page *p = alloc_pages(GFP_KERNEL, order); ++ ++ if (!p) ++ return 0; ++ ++ return PFN_PHYS(page_to_pfn(p)); ++} ++ ++/** ++ * efi_memmap_alloc - Allocate memory for the EFI memory map ++ * @num_entries: Number of entries in the allocated map. ++ * ++ * Depending on whether mm_init() has already been invoked or not, ++ * either memblock or "normal" page allocation is used. ++ * ++ * Returns the physical address of the allocated memory map on ++ * success, zero on failure. ++ */ ++phys_addr_t __init efi_memmap_alloc(unsigned int num_entries) ++{ ++ unsigned long size = num_entries * efi.memmap.desc_size; ++ ++ if (slab_is_available()) ++ return __efi_memmap_alloc_late(size); ++ ++ return __efi_memmap_alloc_early(size); ++} + + /** + * __efi_memmap_init - Common code for mapping the EFI memory map +diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c +index 90621fb93941..92159313361b 100644 +--- a/drivers/gpio/gpiolib.c ++++ b/drivers/gpio/gpiolib.c +@@ -1317,12 +1317,12 @@ void gpiochip_remove(struct gpio_chip *chip) + + /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ + gpiochip_sysfs_unregister(gdev); ++ gpiochip_free_hogs(chip); + /* Numb the device, cancelling all outstanding operations */ + gdev->chip = NULL; + gpiochip_irqchip_remove(chip); + acpi_gpiochip_remove(chip); + gpiochip_remove_pin_ranges(chip); +- gpiochip_free_hogs(chip); + of_gpiochip_remove(chip); + /* + * We accept no more calls into the driver from this point, so +diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c +index 6d2ea76f4eb6..b447a01ab21a 100644 +--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c +@@ -56,7 +56,6 @@ + #define BIOS_SCRATCH_4 0x5cd + + MODULE_FIRMWARE("radeon/tahiti_smc.bin"); +-MODULE_FIRMWARE("radeon/tahiti_k_smc.bin"); + MODULE_FIRMWARE("radeon/pitcairn_smc.bin"); + MODULE_FIRMWARE("radeon/pitcairn_k_smc.bin"); + MODULE_FIRMWARE("radeon/verde_smc.bin"); +@@ -3486,19 +3485,6 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev, + (adev->pdev->device == 0x6817) || + (adev->pdev->device == 0x6806)) + max_mclk = 120000; +- } else if (adev->asic_type == CHIP_VERDE) { +- if ((adev->pdev->revision == 0x81) || +- (adev->pdev->revision == 0x83) || +- (adev->pdev->revision == 0x87) || +- (adev->pdev->device == 0x6820) || +- (adev->pdev->device == 0x6821) || +- (adev->pdev->device == 0x6822) || +- (adev->pdev->device == 0x6823) || +- (adev->pdev->device == 0x682A) || +- (adev->pdev->device == 0x682B)) { +- max_sclk = 75000; +- max_mclk = 80000; +- } + } else if (adev->asic_type == CHIP_OLAND) { + if ((adev->pdev->revision == 0xC7) || + (adev->pdev->revision == 0x80) || +@@ -7685,49 +7671,49 @@ static int si_dpm_init_microcode(struct amdgpu_device *adev) + chip_name = "tahiti"; + break; + case CHIP_PITCAIRN: +- if ((adev->pdev->revision == 0x81) || +- (adev->pdev->device == 0x6810) || +- (adev->pdev->device == 0x6811) || +- (adev->pdev->device == 0x6816) || +- (adev->pdev->device == 0x6817) || +- (adev->pdev->device == 0x6806)) ++ if ((adev->pdev->revision == 0x81) && ++ ((adev->pdev->device == 0x6810) || ++ (adev->pdev->device == 0x6811))) + chip_name = "pitcairn_k"; + else + chip_name = "pitcairn"; + break; + case CHIP_VERDE: +- if ((adev->pdev->revision == 0x81) || +- (adev->pdev->revision == 0x83) || +- (adev->pdev->revision == 0x87) || +- (adev->pdev->device == 0x6820) || +- (adev->pdev->device == 0x6821) || +- (adev->pdev->device == 0x6822) || +- (adev->pdev->device == 0x6823) || +- (adev->pdev->device == 0x682A) || +- (adev->pdev->device == 0x682B)) ++ if (((adev->pdev->device == 0x6820) && ++ ((adev->pdev->revision == 0x81) || ++ (adev->pdev->revision == 0x83))) || ++ ((adev->pdev->device == 0x6821) && ++ ((adev->pdev->revision == 0x83) || ++ (adev->pdev->revision == 0x87))) || ++ ((adev->pdev->revision == 0x87) && ++ ((adev->pdev->device == 0x6823) || ++ (adev->pdev->device == 0x682b)))) + chip_name = "verde_k"; + else + chip_name = "verde"; + break; + case CHIP_OLAND: +- if ((adev->pdev->revision == 0xC7) || +- (adev->pdev->revision == 0x80) || +- (adev->pdev->revision == 0x81) || +- (adev->pdev->revision == 0x83) || +- (adev->pdev->revision == 0x87) || +- (adev->pdev->device == 0x6604) || +- (adev->pdev->device == 0x6605)) ++ if (((adev->pdev->revision == 0x81) && ++ ((adev->pdev->device == 0x6600) || ++ (adev->pdev->device == 0x6604) || ++ (adev->pdev->device == 0x6605) || ++ (adev->pdev->device == 0x6610))) || ++ ((adev->pdev->revision == 0x83) && ++ (adev->pdev->device == 0x6610))) + chip_name = "oland_k"; + else + chip_name = "oland"; + break; + case CHIP_HAINAN: +- if ((adev->pdev->revision == 0x81) || +- (adev->pdev->revision == 0x83) || +- (adev->pdev->revision == 0xC3) || +- (adev->pdev->device == 0x6664) || +- (adev->pdev->device == 0x6665) || +- (adev->pdev->device == 0x6667)) ++ if (((adev->pdev->revision == 0x81) && ++ (adev->pdev->device == 0x6660)) || ++ ((adev->pdev->revision == 0x83) && ++ ((adev->pdev->device == 0x6660) || ++ (adev->pdev->device == 0x6663) || ++ (adev->pdev->device == 0x6665) || ++ (adev->pdev->device == 0x6667))) || ++ ((adev->pdev->revision == 0xc3) && ++ (adev->pdev->device == 0x6665))) + chip_name = "hainan_k"; + else + chip_name = "hainan"; +diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c +index 21f992605541..338766c64c99 100644 +--- a/drivers/gpu/drm/drm_atomic_helper.c ++++ b/drivers/gpu/drm/drm_atomic_helper.c +@@ -1253,8 +1253,10 @@ int drm_atomic_helper_commit(struct drm_device *dev, + + if (!nonblock) { + ret = drm_atomic_helper_wait_for_fences(dev, state, true); +- if (ret) ++ if (ret) { ++ drm_atomic_helper_cleanup_planes(dev, state); + return ret; ++ } + } + + /* +diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c +index b969a64a1514..48a6167f5e7b 100644 +--- a/drivers/gpu/drm/drm_irq.c ++++ b/drivers/gpu/drm/drm_irq.c +@@ -952,8 +952,10 @@ static u32 drm_vblank_count_and_time(struct drm_device *dev, unsigned int pipe, + u32 vblank_count; + unsigned int seq; + +- if (WARN_ON(pipe >= dev->num_crtcs)) ++ if (WARN_ON(pipe >= dev->num_crtcs)) { ++ *vblanktime = (struct timeval) { 0 }; + return 0; ++ } + + do { + seq = read_seqbegin(&vblank->seqlock); +diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c +index 11d44a1e0ab3..ee07bb4a57b7 100644 +--- a/drivers/gpu/drm/drm_mm.c ++++ b/drivers/gpu/drm/drm_mm.c +@@ -839,6 +839,7 @@ void drm_mm_init(struct drm_mm * mm, u64 start, u64 size) + + /* Clever trick to avoid a special case in the free hole tracking. */ + INIT_LIST_HEAD(&mm->head_node.node_list); ++ mm->head_node.allocated = 0; + mm->head_node.hole_follows = 1; + mm->head_node.scanned_block = 0; + mm->head_node.scanned_prev_free = 0; +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index c9e83f39ec0a..869b29fe9ec4 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -16749,7 +16749,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) + + for_each_intel_crtc(dev, crtc) { + struct intel_crtc_state *crtc_state = crtc->config; +- int pixclk = 0; + + __drm_atomic_helper_crtc_destroy_state(&crtc_state->base); + memset(crtc_state, 0, sizeof(*crtc_state)); +@@ -16761,23 +16760,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) + crtc->base.enabled = crtc_state->base.enable; + crtc->active = crtc_state->base.active; + +- if (crtc_state->base.active) { ++ if (crtc_state->base.active) + dev_priv->active_crtcs |= 1 << crtc->pipe; + +- if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) +- pixclk = ilk_pipe_pixel_rate(crtc_state); +- else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) +- pixclk = crtc_state->base.adjusted_mode.crtc_clock; +- else +- WARN_ON(dev_priv->display.modeset_calc_cdclk); +- +- /* pixel rate mustn't exceed 95% of cdclk with IPS on BDW */ +- if (IS_BROADWELL(dev_priv) && crtc_state->ips_enabled) +- pixclk = DIV_ROUND_UP(pixclk * 100, 95); +- } +- +- dev_priv->min_pixclk[crtc->pipe] = pixclk; +- + readout_plane_state(crtc); + + DRM_DEBUG_KMS("[CRTC:%d:%s] hw state readout: %s\n", +@@ -16851,6 +16836,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) + } + + for_each_intel_crtc(dev, crtc) { ++ int pixclk = 0; ++ + crtc->base.hwmode = crtc->config->base.adjusted_mode; + + memset(&crtc->base.mode, 0, sizeof(crtc->base.mode)); +@@ -16878,10 +16865,23 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) + */ + crtc->base.state->mode.private_flags = I915_MODE_FLAG_INHERITED; + ++ if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) ++ pixclk = ilk_pipe_pixel_rate(crtc->config); ++ else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) ++ pixclk = crtc->config->base.adjusted_mode.crtc_clock; ++ else ++ WARN_ON(dev_priv->display.modeset_calc_cdclk); ++ ++ /* pixel rate mustn't exceed 95% of cdclk with IPS on BDW */ ++ if (IS_BROADWELL(dev_priv) && crtc->config->ips_enabled) ++ pixclk = DIV_ROUND_UP(pixclk * 100, 95); ++ + drm_calc_timestamping_constants(&crtc->base, &crtc->base.hwmode); + update_scanline_offset(crtc); + } + ++ dev_priv->min_pixclk[crtc->pipe] = pixclk; ++ + intel_pipe_config_sanity_check(dev_priv, crtc->config); + } + } +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 985cb31f4b44..e559a45ff1f7 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2955,24 +2955,10 @@ intel_enable_sagv(struct drm_i915_private *dev_priv) + return 0; + } + +-static int +-intel_do_sagv_disable(struct drm_i915_private *dev_priv) +-{ +- int ret; +- uint32_t temp = GEN9_SAGV_DISABLE; +- +- ret = sandybridge_pcode_read(dev_priv, GEN9_PCODE_SAGV_CONTROL, +- &temp); +- if (ret) +- return ret; +- else +- return temp & GEN9_SAGV_IS_DISABLED; +-} +- + int + intel_disable_sagv(struct drm_i915_private *dev_priv) + { +- int ret, result; ++ int ret; + + if (!intel_has_sagv(dev_priv)) + return 0; +@@ -2984,25 +2970,23 @@ intel_disable_sagv(struct drm_i915_private *dev_priv) + mutex_lock(&dev_priv->rps.hw_lock); + + /* bspec says to keep retrying for at least 1 ms */ +- ret = wait_for(result = intel_do_sagv_disable(dev_priv), 1); ++ ret = skl_pcode_request(dev_priv, GEN9_PCODE_SAGV_CONTROL, ++ GEN9_SAGV_DISABLE, ++ GEN9_SAGV_IS_DISABLED, GEN9_SAGV_IS_DISABLED, ++ 1); + mutex_unlock(&dev_priv->rps.hw_lock); + +- if (ret == -ETIMEDOUT) { +- DRM_ERROR("Request to disable SAGV timed out\n"); +- return -ETIMEDOUT; +- } +- + /* + * Some skl systems, pre-release machines in particular, + * don't actually have an SAGV. + */ +- if (IS_SKYLAKE(dev_priv) && result == -ENXIO) { ++ if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) { + DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n"); + dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED; + return 0; +- } else if (result < 0) { +- DRM_ERROR("Failed to disable the SAGV\n"); +- return result; ++ } else if (ret < 0) { ++ DRM_ERROR("Failed to disable the SAGV (%d)\n", ret); ++ return ret; + } + + dev_priv->sagv_status = I915_SAGV_DISABLED; +@@ -8015,14 +7999,14 @@ int skl_pcode_request(struct drm_i915_private *dev_priv, u32 mbox, u32 request, + * worst case) _and_ PCODE was busy for some reason even after a + * (queued) request and @timeout_base_ms delay. As a workaround retry + * the poll with preemption disabled to maximize the number of +- * requests. Increase the timeout from @timeout_base_ms to 50ms to ++ * requests. Increase the timeout from @timeout_base_ms to 10ms to + * account for interrupts that could reduce the number of these + * requests. + */ + DRM_DEBUG_KMS("PCODE timeout, retrying with preemption disabled\n"); + WARN_ON_ONCE(timeout_base_ms > 3); + preempt_disable(); +- ret = wait_for_atomic(COND, 50); ++ ret = wait_for_atomic(COND, 10); + preempt_enable(); + + out: +diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c +index 113db3c4a633..27cb42467b20 100644 +--- a/drivers/gpu/drm/panel/panel-simple.c ++++ b/drivers/gpu/drm/panel/panel-simple.c +@@ -120,7 +120,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) + + mode->type |= DRM_MODE_TYPE_DRIVER; + +- if (panel->desc->num_modes == 1) ++ if (panel->desc->num_timings == 1) + mode->type |= DRM_MODE_TYPE_PREFERRED; + + drm_mode_probed_add(connector, mode); +diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c +index 125c7e82c3d1..877af4a5ef68 100644 +--- a/drivers/gpu/drm/radeon/si.c ++++ b/drivers/gpu/drm/radeon/si.c +@@ -50,7 +50,6 @@ MODULE_FIRMWARE("radeon/tahiti_ce.bin"); + MODULE_FIRMWARE("radeon/tahiti_mc.bin"); + MODULE_FIRMWARE("radeon/tahiti_rlc.bin"); + MODULE_FIRMWARE("radeon/tahiti_smc.bin"); +-MODULE_FIRMWARE("radeon/tahiti_k_smc.bin"); + + MODULE_FIRMWARE("radeon/PITCAIRN_pfp.bin"); + MODULE_FIRMWARE("radeon/PITCAIRN_me.bin"); +@@ -1657,9 +1656,6 @@ static int si_init_microcode(struct radeon_device *rdev) + switch (rdev->family) { + case CHIP_TAHITI: + chip_name = "TAHITI"; +- /* XXX: figure out which Tahitis need the new ucode */ +- if (0) +- new_smc = true; + new_chip_name = "tahiti"; + pfp_req_size = SI_PFP_UCODE_SIZE * 4; + me_req_size = SI_PM4_UCODE_SIZE * 4; +@@ -1671,12 +1667,9 @@ static int si_init_microcode(struct radeon_device *rdev) + break; + case CHIP_PITCAIRN: + chip_name = "PITCAIRN"; +- if ((rdev->pdev->revision == 0x81) || +- (rdev->pdev->device == 0x6810) || +- (rdev->pdev->device == 0x6811) || +- (rdev->pdev->device == 0x6816) || +- (rdev->pdev->device == 0x6817) || +- (rdev->pdev->device == 0x6806)) ++ if ((rdev->pdev->revision == 0x81) && ++ ((rdev->pdev->device == 0x6810) || ++ (rdev->pdev->device == 0x6811))) + new_smc = true; + new_chip_name = "pitcairn"; + pfp_req_size = SI_PFP_UCODE_SIZE * 4; +@@ -1689,15 +1682,15 @@ static int si_init_microcode(struct radeon_device *rdev) + break; + case CHIP_VERDE: + chip_name = "VERDE"; +- if ((rdev->pdev->revision == 0x81) || +- (rdev->pdev->revision == 0x83) || +- (rdev->pdev->revision == 0x87) || +- (rdev->pdev->device == 0x6820) || +- (rdev->pdev->device == 0x6821) || +- (rdev->pdev->device == 0x6822) || +- (rdev->pdev->device == 0x6823) || +- (rdev->pdev->device == 0x682A) || +- (rdev->pdev->device == 0x682B)) ++ if (((rdev->pdev->device == 0x6820) && ++ ((rdev->pdev->revision == 0x81) || ++ (rdev->pdev->revision == 0x83))) || ++ ((rdev->pdev->device == 0x6821) && ++ ((rdev->pdev->revision == 0x83) || ++ (rdev->pdev->revision == 0x87))) || ++ ((rdev->pdev->revision == 0x87) && ++ ((rdev->pdev->device == 0x6823) || ++ (rdev->pdev->device == 0x682b)))) + new_smc = true; + new_chip_name = "verde"; + pfp_req_size = SI_PFP_UCODE_SIZE * 4; +@@ -1710,13 +1703,13 @@ static int si_init_microcode(struct radeon_device *rdev) + break; + case CHIP_OLAND: + chip_name = "OLAND"; +- if ((rdev->pdev->revision == 0xC7) || +- (rdev->pdev->revision == 0x80) || +- (rdev->pdev->revision == 0x81) || +- (rdev->pdev->revision == 0x83) || +- (rdev->pdev->revision == 0x87) || +- (rdev->pdev->device == 0x6604) || +- (rdev->pdev->device == 0x6605)) ++ if (((rdev->pdev->revision == 0x81) && ++ ((rdev->pdev->device == 0x6600) || ++ (rdev->pdev->device == 0x6604) || ++ (rdev->pdev->device == 0x6605) || ++ (rdev->pdev->device == 0x6610))) || ++ ((rdev->pdev->revision == 0x83) && ++ (rdev->pdev->device == 0x6610))) + new_smc = true; + new_chip_name = "oland"; + pfp_req_size = SI_PFP_UCODE_SIZE * 4; +@@ -1728,12 +1721,15 @@ static int si_init_microcode(struct radeon_device *rdev) + break; + case CHIP_HAINAN: + chip_name = "HAINAN"; +- if ((rdev->pdev->revision == 0x81) || +- (rdev->pdev->revision == 0x83) || +- (rdev->pdev->revision == 0xC3) || +- (rdev->pdev->device == 0x6664) || +- (rdev->pdev->device == 0x6665) || +- (rdev->pdev->device == 0x6667)) ++ if (((rdev->pdev->revision == 0x81) && ++ (rdev->pdev->device == 0x6660)) || ++ ((rdev->pdev->revision == 0x83) && ++ ((rdev->pdev->device == 0x6660) || ++ (rdev->pdev->device == 0x6663) || ++ (rdev->pdev->device == 0x6665) || ++ (rdev->pdev->device == 0x6667))) || ++ ((rdev->pdev->revision == 0xc3) && ++ (rdev->pdev->device == 0x6665))) + new_smc = true; + new_chip_name = "hainan"; + pfp_req_size = SI_PFP_UCODE_SIZE * 4; +diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c +index 8b5e697f2549..13ba73fd9b68 100644 +--- a/drivers/gpu/drm/radeon/si_dpm.c ++++ b/drivers/gpu/drm/radeon/si_dpm.c +@@ -3008,19 +3008,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, + (rdev->pdev->device == 0x6817) || + (rdev->pdev->device == 0x6806)) + max_mclk = 120000; +- } else if (rdev->family == CHIP_VERDE) { +- if ((rdev->pdev->revision == 0x81) || +- (rdev->pdev->revision == 0x83) || +- (rdev->pdev->revision == 0x87) || +- (rdev->pdev->device == 0x6820) || +- (rdev->pdev->device == 0x6821) || +- (rdev->pdev->device == 0x6822) || +- (rdev->pdev->device == 0x6823) || +- (rdev->pdev->device == 0x682A) || +- (rdev->pdev->device == 0x682B)) { +- max_sclk = 75000; +- max_mclk = 80000; +- } + } else if (rdev->family == CHIP_OLAND) { + if ((rdev->pdev->revision == 0xC7) || + (rdev->pdev->revision == 0x80) || +diff --git a/drivers/gpu/drm/savage/savage_state.c b/drivers/gpu/drm/savage/savage_state.c +index 3dc0d8ff95ec..2db89bed52e8 100644 +--- a/drivers/gpu/drm/savage/savage_state.c ++++ b/drivers/gpu/drm/savage/savage_state.c +@@ -1004,6 +1004,7 @@ int savage_bci_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_ + kvb_addr = memdup_user(cmdbuf->vb_addr, cmdbuf->vb_size); + if (IS_ERR(kvb_addr)) { + ret = PTR_ERR(kvb_addr); ++ kvb_addr = NULL; + goto done; + } + cmdbuf->vb_addr = kvb_addr; +diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c +index 059f409556d5..2fde44c3a1b3 100644 +--- a/drivers/gpu/drm/tegra/dpaux.c ++++ b/drivers/gpu/drm/tegra/dpaux.c +@@ -539,9 +539,9 @@ static int tegra_dpaux_probe(struct platform_device *pdev) + dpaux->desc.owner = THIS_MODULE; + + dpaux->pinctrl = devm_pinctrl_register(&pdev->dev, &dpaux->desc, dpaux); +- if (!dpaux->pinctrl) { ++ if (IS_ERR(dpaux->pinctrl)) { + dev_err(&pdev->dev, "failed to register pincontrol\n"); +- return -ENODEV; ++ return PTR_ERR(dpaux->pinctrl); + } + #endif + /* enable and clear all interrupts */ +diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c +index 47a095f392f8..303f23c96220 100644 +--- a/drivers/gpu/drm/vc4/vc4_gem.c ++++ b/drivers/gpu/drm/vc4/vc4_gem.c +@@ -544,14 +544,15 @@ vc4_cl_lookup_bos(struct drm_device *dev, + + handles = drm_malloc_ab(exec->bo_count, sizeof(uint32_t)); + if (!handles) { ++ ret = -ENOMEM; + DRM_ERROR("Failed to allocate incoming GEM handles\n"); + goto fail; + } + +- ret = copy_from_user(handles, +- (void __user *)(uintptr_t)args->bo_handles, +- exec->bo_count * sizeof(uint32_t)); +- if (ret) { ++ if (copy_from_user(handles, ++ (void __user *)(uintptr_t)args->bo_handles, ++ exec->bo_count * sizeof(uint32_t))) { ++ ret = -EFAULT; + DRM_ERROR("Failed to copy in GEM handles\n"); + goto fail; + } +diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c +index c2268cdf38e8..e34d82e79b98 100644 +--- a/drivers/i2c/busses/i2c-piix4.c ++++ b/drivers/i2c/busses/i2c-piix4.c +@@ -585,10 +585,29 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, + u8 command, int size, union i2c_smbus_data *data) + { + struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap); ++ unsigned short piix4_smba = adapdata->smba; ++ int retries = MAX_TIMEOUT; ++ int smbslvcnt; + u8 smba_en_lo; + u8 port; + int retval; + ++ /* Request the SMBUS semaphore, avoid conflicts with the IMC */ ++ smbslvcnt = inb_p(SMBSLVCNT); ++ do { ++ outb_p(smbslvcnt | 0x10, SMBSLVCNT); ++ ++ /* Check the semaphore status */ ++ smbslvcnt = inb_p(SMBSLVCNT); ++ if (smbslvcnt & 0x10) ++ break; ++ ++ usleep_range(1000, 2000); ++ } while (--retries); ++ /* SMBus is still owned by the IMC, we give up */ ++ if (!retries) ++ return -EBUSY; ++ + mutex_lock(&piix4_mutex_sb800); + + outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX); +@@ -606,6 +625,9 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, + + mutex_unlock(&piix4_mutex_sb800); + ++ /* Release the semaphore */ ++ outb_p(smbslvcnt | 0x20, SMBSLVCNT); ++ + return retval; + } + +diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c +index b432b64e307a..7484aac1e14d 100644 +--- a/drivers/i2c/i2c-core.c ++++ b/drivers/i2c/i2c-core.c +@@ -1657,7 +1657,7 @@ static struct i2c_client *of_i2c_register_device(struct i2c_adapter *adap, + + if (i2c_check_addr_validity(addr, info.flags)) { + dev_err(&adap->dev, "of_i2c: invalid addr=%x on %s\n", +- info.addr, node->full_name); ++ addr, node->full_name); + return ERR_PTR(-EINVAL); + } + +diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c +index 66f323fd3982..6f638bbc922d 100644 +--- a/drivers/i2c/i2c-dev.c ++++ b/drivers/i2c/i2c-dev.c +@@ -331,7 +331,7 @@ static noinline int i2cdev_ioctl_smbus(struct i2c_client *client, + unsigned long arg) + { + struct i2c_smbus_ioctl_data data_arg; +- union i2c_smbus_data temp; ++ union i2c_smbus_data temp = {}; + int datasize, res; + + if (copy_from_user(&data_arg, +diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c +index 8bc3d36d2837..9c4ac26c014e 100644 +--- a/drivers/i2c/muxes/i2c-mux-pca954x.c ++++ b/drivers/i2c/muxes/i2c-mux-pca954x.c +@@ -151,6 +151,9 @@ static int pca954x_reg_write(struct i2c_adapter *adap, + buf[0] = val; + msg.buf = buf; + ret = __i2c_transfer(adap, &msg, 1); ++ ++ if (ret >= 0 && ret != 1) ++ ret = -EREMOTEIO; + } else { + union i2c_smbus_data data; + ret = adap->algo->smbus_xfer(adap, client->addr, +@@ -179,7 +182,7 @@ static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan) + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + ret = pca954x_reg_write(muxc->parent, client, regval); +- data->last_chan = ret ? 0 : regval; ++ data->last_chan = ret < 0 ? 0 : regval; + } + + return ret; +diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c +index 93e3d270a98a..b99dc9e0ffb2 100644 +--- a/drivers/infiniband/hw/cxgb4/device.c ++++ b/drivers/infiniband/hw/cxgb4/device.c +@@ -828,8 +828,10 @@ static int c4iw_rdev_open(struct c4iw_rdev *rdev) + } + rdev->status_page = (struct t4_dev_status_page *) + __get_free_page(GFP_KERNEL); +- if (!rdev->status_page) ++ if (!rdev->status_page) { ++ err = -ENOMEM; + goto destroy_ocqp_pool; ++ } + rdev->status_page->qp_start = rdev->lldi.vr->qp.start; + rdev->status_page->qp_size = rdev->lldi.vr->qp.size; + rdev->status_page->cq_start = rdev->lldi.vr->cq.start; +diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c +index 83af17ad0f1f..bbe15243b8e7 100644 +--- a/drivers/input/joystick/xpad.c ++++ b/drivers/input/joystick/xpad.c +@@ -1376,6 +1376,12 @@ static int xpad_init_input(struct usb_xpad *xpad) + input_dev->name = xpad->name; + input_dev->phys = xpad->phys; + usb_to_input_id(xpad->udev, &input_dev->id); ++ ++ if (xpad->xtype == XTYPE_XBOX360W) { ++ /* x360w controllers and the receiver have different ids */ ++ input_dev->id.product = 0x02a1; ++ } ++ + input_dev->dev.parent = &xpad->intf->dev; + + input_set_drvdata(input_dev, xpad); +diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h +index 073246c7d163..0cdd95801a25 100644 +--- a/drivers/input/serio/i8042-x86ia64io.h ++++ b/drivers/input/serio/i8042-x86ia64io.h +@@ -211,6 +211,12 @@ static const struct dmi_system_id __initconst i8042_dmi_noloop_table[] = { + DMI_MATCH(DMI_PRODUCT_VERSION, "Rev 1"), + }, + }, ++ { ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "PEGATRON CORPORATION"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "C15B"), ++ }, ++ }, + { } + }; + +diff --git a/drivers/input/touchscreen/elants_i2c.c b/drivers/input/touchscreen/elants_i2c.c +index 02aec284deca..3e6003d32e56 100644 +--- a/drivers/input/touchscreen/elants_i2c.c ++++ b/drivers/input/touchscreen/elants_i2c.c +@@ -914,9 +914,9 @@ static irqreturn_t elants_i2c_irq(int irq, void *_dev) + + case QUEUE_HEADER_NORMAL: + report_count = ts->buf[FW_HDR_COUNT]; +- if (report_count > 3) { ++ if (report_count == 0 || report_count > 3) { + dev_err(&client->dev, +- "too large report count: %*ph\n", ++ "bad report count: %*ph\n", + HEADER_SIZE, ts->buf); + break; + } +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c +index 92bd13ddc39d..0c9ef8729ca7 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c +@@ -1158,7 +1158,8 @@ static int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, + { + int err = 0; + +- mlx5_drain_health_wq(dev); ++ if (cleanup) ++ mlx5_drain_health_wq(dev); + + mutex_lock(&dev->intf_state_mutex); + if (test_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state)) { +@@ -1320,9 +1321,10 @@ static pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, + + mlx5_enter_error_state(dev); + mlx5_unload_one(dev, priv, false); +- /* In case of kernel call save the pci state */ ++ /* In case of kernel call save the pci state and drain the health wq */ + if (state) { + pci_save_state(pdev); ++ mlx5_drain_health_wq(dev); + mlx5_pci_disable_device(dev); + } + +diff --git a/drivers/net/wireless/intersil/orinoco/mic.c b/drivers/net/wireless/intersil/orinoco/mic.c +index bc7397d709d3..08bc7822f820 100644 +--- a/drivers/net/wireless/intersil/orinoco/mic.c ++++ b/drivers/net/wireless/intersil/orinoco/mic.c +@@ -16,7 +16,7 @@ + /********************************************************************/ + int orinoco_mic_init(struct orinoco_private *priv) + { +- priv->tx_tfm_mic = crypto_alloc_ahash("michael_mic", 0, ++ priv->tx_tfm_mic = crypto_alloc_shash("michael_mic", 0, + CRYPTO_ALG_ASYNC); + if (IS_ERR(priv->tx_tfm_mic)) { + printk(KERN_DEBUG "orinoco_mic_init: could not allocate " +@@ -25,7 +25,7 @@ int orinoco_mic_init(struct orinoco_private *priv) + return -ENOMEM; + } + +- priv->rx_tfm_mic = crypto_alloc_ahash("michael_mic", 0, ++ priv->rx_tfm_mic = crypto_alloc_shash("michael_mic", 0, + CRYPTO_ALG_ASYNC); + if (IS_ERR(priv->rx_tfm_mic)) { + printk(KERN_DEBUG "orinoco_mic_init: could not allocate " +@@ -40,17 +40,16 @@ int orinoco_mic_init(struct orinoco_private *priv) + void orinoco_mic_free(struct orinoco_private *priv) + { + if (priv->tx_tfm_mic) +- crypto_free_ahash(priv->tx_tfm_mic); ++ crypto_free_shash(priv->tx_tfm_mic); + if (priv->rx_tfm_mic) +- crypto_free_ahash(priv->rx_tfm_mic); ++ crypto_free_shash(priv->rx_tfm_mic); + } + +-int orinoco_mic(struct crypto_ahash *tfm_michael, u8 *key, ++int orinoco_mic(struct crypto_shash *tfm_michael, u8 *key, + u8 *da, u8 *sa, u8 priority, + u8 *data, size_t data_len, u8 *mic) + { +- AHASH_REQUEST_ON_STACK(req, tfm_michael); +- struct scatterlist sg[2]; ++ SHASH_DESC_ON_STACK(desc, tfm_michael); + u8 hdr[ETH_HLEN + 2]; /* size of header + padding */ + int err; + +@@ -67,18 +66,27 @@ int orinoco_mic(struct crypto_ahash *tfm_michael, u8 *key, + hdr[ETH_ALEN * 2 + 2] = 0; + hdr[ETH_ALEN * 2 + 3] = 0; + +- /* Use scatter gather to MIC header and data in one go */ +- sg_init_table(sg, 2); +- sg_set_buf(&sg[0], hdr, sizeof(hdr)); +- sg_set_buf(&sg[1], data, data_len); ++ desc->tfm = tfm_michael; ++ desc->flags = 0; + +- if (crypto_ahash_setkey(tfm_michael, key, MIC_KEYLEN)) +- return -1; ++ err = crypto_shash_setkey(tfm_michael, key, MIC_KEYLEN); ++ if (err) ++ return err; ++ ++ err = crypto_shash_init(desc); ++ if (err) ++ return err; ++ ++ err = crypto_shash_update(desc, hdr, sizeof(hdr)); ++ if (err) ++ return err; ++ ++ err = crypto_shash_update(desc, data, data_len); ++ if (err) ++ return err; ++ ++ err = crypto_shash_final(desc, mic); ++ shash_desc_zero(desc); + +- ahash_request_set_tfm(req, tfm_michael); +- ahash_request_set_callback(req, 0, NULL, NULL); +- ahash_request_set_crypt(req, sg, mic, data_len + sizeof(hdr)); +- err = crypto_ahash_digest(req); +- ahash_request_zero(req); + return err; + } +diff --git a/drivers/net/wireless/intersil/orinoco/mic.h b/drivers/net/wireless/intersil/orinoco/mic.h +index ce731d05cc98..e8724e889219 100644 +--- a/drivers/net/wireless/intersil/orinoco/mic.h ++++ b/drivers/net/wireless/intersil/orinoco/mic.h +@@ -6,6 +6,7 @@ + #define _ORINOCO_MIC_H_ + + #include ++#include + + #define MICHAEL_MIC_LEN 8 + +@@ -15,7 +16,7 @@ struct crypto_ahash; + + int orinoco_mic_init(struct orinoco_private *priv); + void orinoco_mic_free(struct orinoco_private *priv); +-int orinoco_mic(struct crypto_ahash *tfm_michael, u8 *key, ++int orinoco_mic(struct crypto_shash *tfm_michael, u8 *key, + u8 *da, u8 *sa, u8 priority, + u8 *data, size_t data_len, u8 *mic); + +diff --git a/drivers/net/wireless/intersil/orinoco/orinoco.h b/drivers/net/wireless/intersil/orinoco/orinoco.h +index 2f0c84b1c440..5fa1c3e3713f 100644 +--- a/drivers/net/wireless/intersil/orinoco/orinoco.h ++++ b/drivers/net/wireless/intersil/orinoco/orinoco.h +@@ -152,8 +152,8 @@ struct orinoco_private { + u8 *wpa_ie; + int wpa_ie_len; + +- struct crypto_ahash *rx_tfm_mic; +- struct crypto_ahash *tx_tfm_mic; ++ struct crypto_shash *rx_tfm_mic; ++ struct crypto_shash *tx_tfm_mic; + + unsigned int wpa_enabled:1; + unsigned int tkip_cm_active:1; +diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c +index 79e679d12f3b..da10b484bd25 100644 +--- a/drivers/nvme/host/core.c ++++ b/drivers/nvme/host/core.c +@@ -1122,12 +1122,7 @@ int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap) + if (ret) + return ret; + +- /* Checking for ctrl->tagset is a trick to avoid sleeping on module +- * load, since we only need the quirk on reset_controller. Notice +- * that the HGST device needs this delay only in firmware activation +- * procedure; unfortunately we have no (easy) way to verify this. +- */ +- if ((ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) && ctrl->tagset) ++ if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) + msleep(NVME_QUIRK_DELAY_AMOUNT); + + return nvme_wait_ready(ctrl, cap, false); +diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c +index 79c4e14a5a75..5ef7e875b50e 100644 +--- a/drivers/pinctrl/freescale/pinctrl-imx.c ++++ b/drivers/pinctrl/freescale/pinctrl-imx.c +@@ -778,10 +778,10 @@ int imx_pinctrl_probe(struct platform_device *pdev, + imx_pinctrl_desc->name = dev_name(&pdev->dev); + imx_pinctrl_desc->pins = info->pins; + imx_pinctrl_desc->npins = info->npins; +- imx_pinctrl_desc->pctlops = &imx_pctrl_ops, +- imx_pinctrl_desc->pmxops = &imx_pmx_ops, +- imx_pinctrl_desc->confops = &imx_pinconf_ops, +- imx_pinctrl_desc->owner = THIS_MODULE, ++ imx_pinctrl_desc->pctlops = &imx_pctrl_ops; ++ imx_pinctrl_desc->pmxops = &imx_pmx_ops; ++ imx_pinctrl_desc->confops = &imx_pinconf_ops; ++ imx_pinctrl_desc->owner = THIS_MODULE; + + ret = imx_pinctrl_probe_dt(pdev, info); + if (ret) { +diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c +index 57122eda155a..9443c9d408c6 100644 +--- a/drivers/pinctrl/meson/pinctrl-meson.c ++++ b/drivers/pinctrl/meson/pinctrl-meson.c +@@ -212,7 +212,7 @@ static int meson_pmx_request_gpio(struct pinctrl_dev *pcdev, + { + struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); + +- meson_pmx_disable_other_groups(pc, range->pin_base + offset, -1); ++ meson_pmx_disable_other_groups(pc, offset, -1); + + return 0; + } +diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c +index f3a8897d4e8f..cf80ce1dd7ce 100644 +--- a/drivers/pinctrl/sh-pfc/core.c ++++ b/drivers/pinctrl/sh-pfc/core.c +@@ -389,6 +389,21 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) + return 0; + } + ++const struct sh_pfc_bias_info * ++sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info, ++ unsigned int num, unsigned int pin) ++{ ++ unsigned int i; ++ ++ for (i = 0; i < num; i++) ++ if (info[i].pin == pin) ++ return &info[i]; ++ ++ WARN_ONCE(1, "Pin %u is not in bias info list\n", pin); ++ ++ return NULL; ++} ++ + static int sh_pfc_init_ranges(struct sh_pfc *pfc) + { + struct sh_pfc_pin_range *range; +diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h +index 0bbdea5849f4..6d598dd63720 100644 +--- a/drivers/pinctrl/sh-pfc/core.h ++++ b/drivers/pinctrl/sh-pfc/core.h +@@ -33,4 +33,8 @@ void sh_pfc_write_reg(struct sh_pfc *pfc, u32 reg, unsigned int width, + int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin); + int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type); + ++const struct sh_pfc_bias_info * ++sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info, ++ unsigned int num, unsigned int pin); ++ + #endif /* __SH_PFC_CORE_H__ */ +diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c +index 2e8cc2adbed7..84cee66b1e08 100644 +--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c ++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c +@@ -5188,184 +5188,183 @@ static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *poc + #define PU5 0x14 + #define PU6 0x18 + +-static const struct { +- u16 reg : 11; +- u16 bit : 5; +-} pullups[] = { +- [RCAR_GP_PIN(2, 11)] = { PU0, 31 }, /* AVB_PHY_INT */ +- [RCAR_GP_PIN(2, 10)] = { PU0, 30 }, /* AVB_MAGIC */ +- [RCAR_GP_PIN(2, 9)] = { PU0, 29 }, /* AVB_MDC */ +- +- [RCAR_GP_PIN(1, 19)] = { PU1, 31 }, /* A19 */ +- [RCAR_GP_PIN(1, 18)] = { PU1, 30 }, /* A18 */ +- [RCAR_GP_PIN(1, 17)] = { PU1, 29 }, /* A17 */ +- [RCAR_GP_PIN(1, 16)] = { PU1, 28 }, /* A16 */ +- [RCAR_GP_PIN(1, 15)] = { PU1, 27 }, /* A15 */ +- [RCAR_GP_PIN(1, 14)] = { PU1, 26 }, /* A14 */ +- [RCAR_GP_PIN(1, 13)] = { PU1, 25 }, /* A13 */ +- [RCAR_GP_PIN(1, 12)] = { PU1, 24 }, /* A12 */ +- [RCAR_GP_PIN(1, 11)] = { PU1, 23 }, /* A11 */ +- [RCAR_GP_PIN(1, 10)] = { PU1, 22 }, /* A10 */ +- [RCAR_GP_PIN(1, 9)] = { PU1, 21 }, /* A9 */ +- [RCAR_GP_PIN(1, 8)] = { PU1, 20 }, /* A8 */ +- [RCAR_GP_PIN(1, 7)] = { PU1, 19 }, /* A7 */ +- [RCAR_GP_PIN(1, 6)] = { PU1, 18 }, /* A6 */ +- [RCAR_GP_PIN(1, 5)] = { PU1, 17 }, /* A5 */ +- [RCAR_GP_PIN(1, 4)] = { PU1, 16 }, /* A4 */ +- [RCAR_GP_PIN(1, 3)] = { PU1, 15 }, /* A3 */ +- [RCAR_GP_PIN(1, 2)] = { PU1, 14 }, /* A2 */ +- [RCAR_GP_PIN(1, 1)] = { PU1, 13 }, /* A1 */ +- [RCAR_GP_PIN(1, 0)] = { PU1, 12 }, /* A0 */ +- [RCAR_GP_PIN(2, 8)] = { PU1, 11 }, /* PWM2_A */ +- [RCAR_GP_PIN(2, 7)] = { PU1, 10 }, /* PWM1_A */ +- [RCAR_GP_PIN(2, 6)] = { PU1, 9 }, /* PWM0 */ +- [RCAR_GP_PIN(2, 5)] = { PU1, 8 }, /* IRQ5 */ +- [RCAR_GP_PIN(2, 4)] = { PU1, 7 }, /* IRQ4 */ +- [RCAR_GP_PIN(2, 3)] = { PU1, 6 }, /* IRQ3 */ +- [RCAR_GP_PIN(2, 2)] = { PU1, 5 }, /* IRQ2 */ +- [RCAR_GP_PIN(2, 1)] = { PU1, 4 }, /* IRQ1 */ +- [RCAR_GP_PIN(2, 0)] = { PU1, 3 }, /* IRQ0 */ +- [RCAR_GP_PIN(2, 14)] = { PU1, 2 }, /* AVB_AVTP_CAPTURE_A */ +- [RCAR_GP_PIN(2, 13)] = { PU1, 1 }, /* AVB_AVTP_MATCH_A */ +- [RCAR_GP_PIN(2, 12)] = { PU1, 0 }, /* AVB_LINK */ +- +- [RCAR_GP_PIN(7, 3)] = { PU2, 29 }, /* HDMI1_CEC */ +- [RCAR_GP_PIN(7, 2)] = { PU2, 28 }, /* HDMI0_CEC */ +- [RCAR_GP_PIN(7, 1)] = { PU2, 27 }, /* AVS2 */ +- [RCAR_GP_PIN(7, 0)] = { PU2, 26 }, /* AVS1 */ +- [RCAR_GP_PIN(0, 15)] = { PU2, 25 }, /* D15 */ +- [RCAR_GP_PIN(0, 14)] = { PU2, 24 }, /* D14 */ +- [RCAR_GP_PIN(0, 13)] = { PU2, 23 }, /* D13 */ +- [RCAR_GP_PIN(0, 12)] = { PU2, 22 }, /* D12 */ +- [RCAR_GP_PIN(0, 11)] = { PU2, 21 }, /* D11 */ +- [RCAR_GP_PIN(0, 10)] = { PU2, 20 }, /* D10 */ +- [RCAR_GP_PIN(0, 9)] = { PU2, 19 }, /* D9 */ +- [RCAR_GP_PIN(0, 8)] = { PU2, 18 }, /* D8 */ +- [RCAR_GP_PIN(0, 7)] = { PU2, 17 }, /* D7 */ +- [RCAR_GP_PIN(0, 6)] = { PU2, 16 }, /* D6 */ +- [RCAR_GP_PIN(0, 5)] = { PU2, 15 }, /* D5 */ +- [RCAR_GP_PIN(0, 4)] = { PU2, 14 }, /* D4 */ +- [RCAR_GP_PIN(0, 3)] = { PU2, 13 }, /* D3 */ +- [RCAR_GP_PIN(0, 2)] = { PU2, 12 }, /* D2 */ +- [RCAR_GP_PIN(0, 1)] = { PU2, 11 }, /* D1 */ +- [RCAR_GP_PIN(0, 0)] = { PU2, 10 }, /* D0 */ +- [RCAR_GP_PIN(1, 27)] = { PU2, 8 }, /* EX_WAIT0_A */ +- [RCAR_GP_PIN(1, 26)] = { PU2, 7 }, /* WE1_N */ +- [RCAR_GP_PIN(1, 25)] = { PU2, 6 }, /* WE0_N */ +- [RCAR_GP_PIN(1, 24)] = { PU2, 5 }, /* RD_WR_N */ +- [RCAR_GP_PIN(1, 23)] = { PU2, 4 }, /* RD_N */ +- [RCAR_GP_PIN(1, 22)] = { PU2, 3 }, /* BS_N */ +- [RCAR_GP_PIN(1, 21)] = { PU2, 2 }, /* CS1_N_A26 */ +- [RCAR_GP_PIN(1, 20)] = { PU2, 1 }, /* CS0_N */ +- +- [RCAR_GP_PIN(4, 9)] = { PU3, 31 }, /* SD3_DAT0 */ +- [RCAR_GP_PIN(4, 8)] = { PU3, 30 }, /* SD3_CMD */ +- [RCAR_GP_PIN(4, 7)] = { PU3, 29 }, /* SD3_CLK */ +- [RCAR_GP_PIN(4, 6)] = { PU3, 28 }, /* SD2_DS */ +- [RCAR_GP_PIN(4, 5)] = { PU3, 27 }, /* SD2_DAT3 */ +- [RCAR_GP_PIN(4, 4)] = { PU3, 26 }, /* SD2_DAT2 */ +- [RCAR_GP_PIN(4, 3)] = { PU3, 25 }, /* SD2_DAT1 */ +- [RCAR_GP_PIN(4, 2)] = { PU3, 24 }, /* SD2_DAT0 */ +- [RCAR_GP_PIN(4, 1)] = { PU3, 23 }, /* SD2_CMD */ +- [RCAR_GP_PIN(4, 0)] = { PU3, 22 }, /* SD2_CLK */ +- [RCAR_GP_PIN(3, 11)] = { PU3, 21 }, /* SD1_DAT3 */ +- [RCAR_GP_PIN(3, 10)] = { PU3, 20 }, /* SD1_DAT2 */ +- [RCAR_GP_PIN(3, 9)] = { PU3, 19 }, /* SD1_DAT1 */ +- [RCAR_GP_PIN(3, 8)] = { PU3, 18 }, /* SD1_DAT0 */ +- [RCAR_GP_PIN(3, 7)] = { PU3, 17 }, /* SD1_CMD */ +- [RCAR_GP_PIN(3, 6)] = { PU3, 16 }, /* SD1_CLK */ +- [RCAR_GP_PIN(3, 5)] = { PU3, 15 }, /* SD0_DAT3 */ +- [RCAR_GP_PIN(3, 4)] = { PU3, 14 }, /* SD0_DAT2 */ +- [RCAR_GP_PIN(3, 3)] = { PU3, 13 }, /* SD0_DAT1 */ +- [RCAR_GP_PIN(3, 2)] = { PU3, 12 }, /* SD0_DAT0 */ +- [RCAR_GP_PIN(3, 1)] = { PU3, 11 }, /* SD0_CMD */ +- [RCAR_GP_PIN(3, 0)] = { PU3, 10 }, /* SD0_CLK */ +- +- [RCAR_GP_PIN(5, 19)] = { PU4, 31 }, /* MSIOF0_SS1 */ +- [RCAR_GP_PIN(5, 18)] = { PU4, 30 }, /* MSIOF0_SYNC */ +- [RCAR_GP_PIN(5, 17)] = { PU4, 29 }, /* MSIOF0_SCK */ +- [RCAR_GP_PIN(5, 16)] = { PU4, 28 }, /* HRTS0_N */ +- [RCAR_GP_PIN(5, 15)] = { PU4, 27 }, /* HCTS0_N */ +- [RCAR_GP_PIN(5, 14)] = { PU4, 26 }, /* HTX0 */ +- [RCAR_GP_PIN(5, 13)] = { PU4, 25 }, /* HRX0 */ +- [RCAR_GP_PIN(5, 12)] = { PU4, 24 }, /* HSCK0 */ +- [RCAR_GP_PIN(5, 11)] = { PU4, 23 }, /* RX2_A */ +- [RCAR_GP_PIN(5, 10)] = { PU4, 22 }, /* TX2_A */ +- [RCAR_GP_PIN(5, 9)] = { PU4, 21 }, /* SCK2 */ +- [RCAR_GP_PIN(5, 8)] = { PU4, 20 }, /* RTS1_N_TANS */ +- [RCAR_GP_PIN(5, 7)] = { PU4, 19 }, /* CTS1_N */ +- [RCAR_GP_PIN(5, 6)] = { PU4, 18 }, /* TX1_A */ +- [RCAR_GP_PIN(5, 5)] = { PU4, 17 }, /* RX1_A */ +- [RCAR_GP_PIN(5, 4)] = { PU4, 16 }, /* RTS0_N_TANS */ +- [RCAR_GP_PIN(5, 3)] = { PU4, 15 }, /* CTS0_N */ +- [RCAR_GP_PIN(5, 2)] = { PU4, 14 }, /* TX0 */ +- [RCAR_GP_PIN(5, 1)] = { PU4, 13 }, /* RX0 */ +- [RCAR_GP_PIN(5, 0)] = { PU4, 12 }, /* SCK0 */ +- [RCAR_GP_PIN(3, 15)] = { PU4, 11 }, /* SD1_WP */ +- [RCAR_GP_PIN(3, 14)] = { PU4, 10 }, /* SD1_CD */ +- [RCAR_GP_PIN(3, 13)] = { PU4, 9 }, /* SD0_WP */ +- [RCAR_GP_PIN(3, 12)] = { PU4, 8 }, /* SD0_CD */ +- [RCAR_GP_PIN(4, 17)] = { PU4, 7 }, /* SD3_DS */ +- [RCAR_GP_PIN(4, 16)] = { PU4, 6 }, /* SD3_DAT7 */ +- [RCAR_GP_PIN(4, 15)] = { PU4, 5 }, /* SD3_DAT6 */ +- [RCAR_GP_PIN(4, 14)] = { PU4, 4 }, /* SD3_DAT5 */ +- [RCAR_GP_PIN(4, 13)] = { PU4, 3 }, /* SD3_DAT4 */ +- [RCAR_GP_PIN(4, 12)] = { PU4, 2 }, /* SD3_DAT3 */ +- [RCAR_GP_PIN(4, 11)] = { PU4, 1 }, /* SD3_DAT2 */ +- [RCAR_GP_PIN(4, 10)] = { PU4, 0 }, /* SD3_DAT1 */ +- +- [RCAR_GP_PIN(6, 24)] = { PU5, 31 }, /* USB0_PWEN */ +- [RCAR_GP_PIN(6, 23)] = { PU5, 30 }, /* AUDIO_CLKB_B */ +- [RCAR_GP_PIN(6, 22)] = { PU5, 29 }, /* AUDIO_CLKA_A */ +- [RCAR_GP_PIN(6, 21)] = { PU5, 28 }, /* SSI_SDATA9_A */ +- [RCAR_GP_PIN(6, 20)] = { PU5, 27 }, /* SSI_SDATA8 */ +- [RCAR_GP_PIN(6, 19)] = { PU5, 26 }, /* SSI_SDATA7 */ +- [RCAR_GP_PIN(6, 18)] = { PU5, 25 }, /* SSI_WS78 */ +- [RCAR_GP_PIN(6, 17)] = { PU5, 24 }, /* SSI_SCK78 */ +- [RCAR_GP_PIN(6, 16)] = { PU5, 23 }, /* SSI_SDATA6 */ +- [RCAR_GP_PIN(6, 15)] = { PU5, 22 }, /* SSI_WS6 */ +- [RCAR_GP_PIN(6, 14)] = { PU5, 21 }, /* SSI_SCK6 */ +- [RCAR_GP_PIN(6, 13)] = { PU5, 20 }, /* SSI_SDATA5 */ +- [RCAR_GP_PIN(6, 12)] = { PU5, 19 }, /* SSI_WS5 */ +- [RCAR_GP_PIN(6, 11)] = { PU5, 18 }, /* SSI_SCK5 */ +- [RCAR_GP_PIN(6, 10)] = { PU5, 17 }, /* SSI_SDATA4 */ +- [RCAR_GP_PIN(6, 9)] = { PU5, 16 }, /* SSI_WS4 */ +- [RCAR_GP_PIN(6, 8)] = { PU5, 15 }, /* SSI_SCK4 */ +- [RCAR_GP_PIN(6, 7)] = { PU5, 14 }, /* SSI_SDATA3 */ +- [RCAR_GP_PIN(6, 6)] = { PU5, 13 }, /* SSI_WS34 */ +- [RCAR_GP_PIN(6, 5)] = { PU5, 12 }, /* SSI_SCK34 */ +- [RCAR_GP_PIN(6, 4)] = { PU5, 11 }, /* SSI_SDATA2_A */ +- [RCAR_GP_PIN(6, 3)] = { PU5, 10 }, /* SSI_SDATA1_A */ +- [RCAR_GP_PIN(6, 2)] = { PU5, 9 }, /* SSI_SDATA0 */ +- [RCAR_GP_PIN(6, 1)] = { PU5, 8 }, /* SSI_WS01239 */ +- [RCAR_GP_PIN(6, 0)] = { PU5, 7 }, /* SSI_SCK01239 */ +- [RCAR_GP_PIN(5, 25)] = { PU5, 5 }, /* MLB_DAT */ +- [RCAR_GP_PIN(5, 24)] = { PU5, 4 }, /* MLB_SIG */ +- [RCAR_GP_PIN(5, 23)] = { PU5, 3 }, /* MLB_CLK */ +- [RCAR_GP_PIN(5, 22)] = { PU5, 2 }, /* MSIOF0_RXD */ +- [RCAR_GP_PIN(5, 21)] = { PU5, 1 }, /* MSIOF0_SS2 */ +- [RCAR_GP_PIN(5, 20)] = { PU5, 0 }, /* MSIOF0_TXD */ +- +- [RCAR_GP_PIN(6, 31)] = { PU6, 6 }, /* USB31_OVC */ +- [RCAR_GP_PIN(6, 30)] = { PU6, 5 }, /* USB31_PWEN */ +- [RCAR_GP_PIN(6, 29)] = { PU6, 4 }, /* USB30_OVC */ +- [RCAR_GP_PIN(6, 28)] = { PU6, 3 }, /* USB30_PWEN */ +- [RCAR_GP_PIN(6, 27)] = { PU6, 2 }, /* USB1_OVC */ +- [RCAR_GP_PIN(6, 26)] = { PU6, 1 }, /* USB1_PWEN */ +- [RCAR_GP_PIN(6, 25)] = { PU6, 0 }, /* USB0_OVC */ ++static const struct sh_pfc_bias_info bias_info[] = { ++ { RCAR_GP_PIN(2, 11), PU0, 31 }, /* AVB_PHY_INT */ ++ { RCAR_GP_PIN(2, 10), PU0, 30 }, /* AVB_MAGIC */ ++ { RCAR_GP_PIN(2, 9), PU0, 29 }, /* AVB_MDC */ ++ ++ { RCAR_GP_PIN(1, 19), PU1, 31 }, /* A19 */ ++ { RCAR_GP_PIN(1, 18), PU1, 30 }, /* A18 */ ++ { RCAR_GP_PIN(1, 17), PU1, 29 }, /* A17 */ ++ { RCAR_GP_PIN(1, 16), PU1, 28 }, /* A16 */ ++ { RCAR_GP_PIN(1, 15), PU1, 27 }, /* A15 */ ++ { RCAR_GP_PIN(1, 14), PU1, 26 }, /* A14 */ ++ { RCAR_GP_PIN(1, 13), PU1, 25 }, /* A13 */ ++ { RCAR_GP_PIN(1, 12), PU1, 24 }, /* A12 */ ++ { RCAR_GP_PIN(1, 11), PU1, 23 }, /* A11 */ ++ { RCAR_GP_PIN(1, 10), PU1, 22 }, /* A10 */ ++ { RCAR_GP_PIN(1, 9), PU1, 21 }, /* A9 */ ++ { RCAR_GP_PIN(1, 8), PU1, 20 }, /* A8 */ ++ { RCAR_GP_PIN(1, 7), PU1, 19 }, /* A7 */ ++ { RCAR_GP_PIN(1, 6), PU1, 18 }, /* A6 */ ++ { RCAR_GP_PIN(1, 5), PU1, 17 }, /* A5 */ ++ { RCAR_GP_PIN(1, 4), PU1, 16 }, /* A4 */ ++ { RCAR_GP_PIN(1, 3), PU1, 15 }, /* A3 */ ++ { RCAR_GP_PIN(1, 2), PU1, 14 }, /* A2 */ ++ { RCAR_GP_PIN(1, 1), PU1, 13 }, /* A1 */ ++ { RCAR_GP_PIN(1, 0), PU1, 12 }, /* A0 */ ++ { RCAR_GP_PIN(2, 8), PU1, 11 }, /* PWM2_A */ ++ { RCAR_GP_PIN(2, 7), PU1, 10 }, /* PWM1_A */ ++ { RCAR_GP_PIN(2, 6), PU1, 9 }, /* PWM0 */ ++ { RCAR_GP_PIN(2, 5), PU1, 8 }, /* IRQ5 */ ++ { RCAR_GP_PIN(2, 4), PU1, 7 }, /* IRQ4 */ ++ { RCAR_GP_PIN(2, 3), PU1, 6 }, /* IRQ3 */ ++ { RCAR_GP_PIN(2, 2), PU1, 5 }, /* IRQ2 */ ++ { RCAR_GP_PIN(2, 1), PU1, 4 }, /* IRQ1 */ ++ { RCAR_GP_PIN(2, 0), PU1, 3 }, /* IRQ0 */ ++ { RCAR_GP_PIN(2, 14), PU1, 2 }, /* AVB_AVTP_CAPTURE_A */ ++ { RCAR_GP_PIN(2, 13), PU1, 1 }, /* AVB_AVTP_MATCH_A */ ++ { RCAR_GP_PIN(2, 12), PU1, 0 }, /* AVB_LINK */ ++ ++ { RCAR_GP_PIN(7, 3), PU2, 29 }, /* HDMI1_CEC */ ++ { RCAR_GP_PIN(7, 2), PU2, 28 }, /* HDMI0_CEC */ ++ { RCAR_GP_PIN(7, 1), PU2, 27 }, /* AVS2 */ ++ { RCAR_GP_PIN(7, 0), PU2, 26 }, /* AVS1 */ ++ { RCAR_GP_PIN(0, 15), PU2, 25 }, /* D15 */ ++ { RCAR_GP_PIN(0, 14), PU2, 24 }, /* D14 */ ++ { RCAR_GP_PIN(0, 13), PU2, 23 }, /* D13 */ ++ { RCAR_GP_PIN(0, 12), PU2, 22 }, /* D12 */ ++ { RCAR_GP_PIN(0, 11), PU2, 21 }, /* D11 */ ++ { RCAR_GP_PIN(0, 10), PU2, 20 }, /* D10 */ ++ { RCAR_GP_PIN(0, 9), PU2, 19 }, /* D9 */ ++ { RCAR_GP_PIN(0, 8), PU2, 18 }, /* D8 */ ++ { RCAR_GP_PIN(0, 7), PU2, 17 }, /* D7 */ ++ { RCAR_GP_PIN(0, 6), PU2, 16 }, /* D6 */ ++ { RCAR_GP_PIN(0, 5), PU2, 15 }, /* D5 */ ++ { RCAR_GP_PIN(0, 4), PU2, 14 }, /* D4 */ ++ { RCAR_GP_PIN(0, 3), PU2, 13 }, /* D3 */ ++ { RCAR_GP_PIN(0, 2), PU2, 12 }, /* D2 */ ++ { RCAR_GP_PIN(0, 1), PU2, 11 }, /* D1 */ ++ { RCAR_GP_PIN(0, 0), PU2, 10 }, /* D0 */ ++ { RCAR_GP_PIN(1, 27), PU2, 8 }, /* EX_WAIT0_A */ ++ { RCAR_GP_PIN(1, 26), PU2, 7 }, /* WE1_N */ ++ { RCAR_GP_PIN(1, 25), PU2, 6 }, /* WE0_N */ ++ { RCAR_GP_PIN(1, 24), PU2, 5 }, /* RD_WR_N */ ++ { RCAR_GP_PIN(1, 23), PU2, 4 }, /* RD_N */ ++ { RCAR_GP_PIN(1, 22), PU2, 3 }, /* BS_N */ ++ { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N_A26 */ ++ { RCAR_GP_PIN(1, 20), PU2, 1 }, /* CS0_N */ ++ ++ { RCAR_GP_PIN(4, 9), PU3, 31 }, /* SD3_DAT0 */ ++ { RCAR_GP_PIN(4, 8), PU3, 30 }, /* SD3_CMD */ ++ { RCAR_GP_PIN(4, 7), PU3, 29 }, /* SD3_CLK */ ++ { RCAR_GP_PIN(4, 6), PU3, 28 }, /* SD2_DS */ ++ { RCAR_GP_PIN(4, 5), PU3, 27 }, /* SD2_DAT3 */ ++ { RCAR_GP_PIN(4, 4), PU3, 26 }, /* SD2_DAT2 */ ++ { RCAR_GP_PIN(4, 3), PU3, 25 }, /* SD2_DAT1 */ ++ { RCAR_GP_PIN(4, 2), PU3, 24 }, /* SD2_DAT0 */ ++ { RCAR_GP_PIN(4, 1), PU3, 23 }, /* SD2_CMD */ ++ { RCAR_GP_PIN(4, 0), PU3, 22 }, /* SD2_CLK */ ++ { RCAR_GP_PIN(3, 11), PU3, 21 }, /* SD1_DAT3 */ ++ { RCAR_GP_PIN(3, 10), PU3, 20 }, /* SD1_DAT2 */ ++ { RCAR_GP_PIN(3, 9), PU3, 19 }, /* SD1_DAT1 */ ++ { RCAR_GP_PIN(3, 8), PU3, 18 }, /* SD1_DAT0 */ ++ { RCAR_GP_PIN(3, 7), PU3, 17 }, /* SD1_CMD */ ++ { RCAR_GP_PIN(3, 6), PU3, 16 }, /* SD1_CLK */ ++ { RCAR_GP_PIN(3, 5), PU3, 15 }, /* SD0_DAT3 */ ++ { RCAR_GP_PIN(3, 4), PU3, 14 }, /* SD0_DAT2 */ ++ { RCAR_GP_PIN(3, 3), PU3, 13 }, /* SD0_DAT1 */ ++ { RCAR_GP_PIN(3, 2), PU3, 12 }, /* SD0_DAT0 */ ++ { RCAR_GP_PIN(3, 1), PU3, 11 }, /* SD0_CMD */ ++ { RCAR_GP_PIN(3, 0), PU3, 10 }, /* SD0_CLK */ ++ ++ { RCAR_GP_PIN(5, 19), PU4, 31 }, /* MSIOF0_SS1 */ ++ { RCAR_GP_PIN(5, 18), PU4, 30 }, /* MSIOF0_SYNC */ ++ { RCAR_GP_PIN(5, 17), PU4, 29 }, /* MSIOF0_SCK */ ++ { RCAR_GP_PIN(5, 16), PU4, 28 }, /* HRTS0_N */ ++ { RCAR_GP_PIN(5, 15), PU4, 27 }, /* HCTS0_N */ ++ { RCAR_GP_PIN(5, 14), PU4, 26 }, /* HTX0 */ ++ { RCAR_GP_PIN(5, 13), PU4, 25 }, /* HRX0 */ ++ { RCAR_GP_PIN(5, 12), PU4, 24 }, /* HSCK0 */ ++ { RCAR_GP_PIN(5, 11), PU4, 23 }, /* RX2_A */ ++ { RCAR_GP_PIN(5, 10), PU4, 22 }, /* TX2_A */ ++ { RCAR_GP_PIN(5, 9), PU4, 21 }, /* SCK2 */ ++ { RCAR_GP_PIN(5, 8), PU4, 20 }, /* RTS1_N_TANS */ ++ { RCAR_GP_PIN(5, 7), PU4, 19 }, /* CTS1_N */ ++ { RCAR_GP_PIN(5, 6), PU4, 18 }, /* TX1_A */ ++ { RCAR_GP_PIN(5, 5), PU4, 17 }, /* RX1_A */ ++ { RCAR_GP_PIN(5, 4), PU4, 16 }, /* RTS0_N_TANS */ ++ { RCAR_GP_PIN(5, 3), PU4, 15 }, /* CTS0_N */ ++ { RCAR_GP_PIN(5, 2), PU4, 14 }, /* TX0 */ ++ { RCAR_GP_PIN(5, 1), PU4, 13 }, /* RX0 */ ++ { RCAR_GP_PIN(5, 0), PU4, 12 }, /* SCK0 */ ++ { RCAR_GP_PIN(3, 15), PU4, 11 }, /* SD1_WP */ ++ { RCAR_GP_PIN(3, 14), PU4, 10 }, /* SD1_CD */ ++ { RCAR_GP_PIN(3, 13), PU4, 9 }, /* SD0_WP */ ++ { RCAR_GP_PIN(3, 12), PU4, 8 }, /* SD0_CD */ ++ { RCAR_GP_PIN(4, 17), PU4, 7 }, /* SD3_DS */ ++ { RCAR_GP_PIN(4, 16), PU4, 6 }, /* SD3_DAT7 */ ++ { RCAR_GP_PIN(4, 15), PU4, 5 }, /* SD3_DAT6 */ ++ { RCAR_GP_PIN(4, 14), PU4, 4 }, /* SD3_DAT5 */ ++ { RCAR_GP_PIN(4, 13), PU4, 3 }, /* SD3_DAT4 */ ++ { RCAR_GP_PIN(4, 12), PU4, 2 }, /* SD3_DAT3 */ ++ { RCAR_GP_PIN(4, 11), PU4, 1 }, /* SD3_DAT2 */ ++ { RCAR_GP_PIN(4, 10), PU4, 0 }, /* SD3_DAT1 */ ++ ++ { RCAR_GP_PIN(6, 24), PU5, 31 }, /* USB0_PWEN */ ++ { RCAR_GP_PIN(6, 23), PU5, 30 }, /* AUDIO_CLKB_B */ ++ { RCAR_GP_PIN(6, 22), PU5, 29 }, /* AUDIO_CLKA_A */ ++ { RCAR_GP_PIN(6, 21), PU5, 28 }, /* SSI_SDATA9_A */ ++ { RCAR_GP_PIN(6, 20), PU5, 27 }, /* SSI_SDATA8 */ ++ { RCAR_GP_PIN(6, 19), PU5, 26 }, /* SSI_SDATA7 */ ++ { RCAR_GP_PIN(6, 18), PU5, 25 }, /* SSI_WS78 */ ++ { RCAR_GP_PIN(6, 17), PU5, 24 }, /* SSI_SCK78 */ ++ { RCAR_GP_PIN(6, 16), PU5, 23 }, /* SSI_SDATA6 */ ++ { RCAR_GP_PIN(6, 15), PU5, 22 }, /* SSI_WS6 */ ++ { RCAR_GP_PIN(6, 14), PU5, 21 }, /* SSI_SCK6 */ ++ { RCAR_GP_PIN(6, 13), PU5, 20 }, /* SSI_SDATA5 */ ++ { RCAR_GP_PIN(6, 12), PU5, 19 }, /* SSI_WS5 */ ++ { RCAR_GP_PIN(6, 11), PU5, 18 }, /* SSI_SCK5 */ ++ { RCAR_GP_PIN(6, 10), PU5, 17 }, /* SSI_SDATA4 */ ++ { RCAR_GP_PIN(6, 9), PU5, 16 }, /* SSI_WS4 */ ++ { RCAR_GP_PIN(6, 8), PU5, 15 }, /* SSI_SCK4 */ ++ { RCAR_GP_PIN(6, 7), PU5, 14 }, /* SSI_SDATA3 */ ++ { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS34 */ ++ { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK34 */ ++ { RCAR_GP_PIN(6, 4), PU5, 11 }, /* SSI_SDATA2_A */ ++ { RCAR_GP_PIN(6, 3), PU5, 10 }, /* SSI_SDATA1_A */ ++ { RCAR_GP_PIN(6, 2), PU5, 9 }, /* SSI_SDATA0 */ ++ { RCAR_GP_PIN(6, 1), PU5, 8 }, /* SSI_WS01239 */ ++ { RCAR_GP_PIN(6, 0), PU5, 7 }, /* SSI_SCK01239 */ ++ { RCAR_GP_PIN(5, 25), PU5, 5 }, /* MLB_DAT */ ++ { RCAR_GP_PIN(5, 24), PU5, 4 }, /* MLB_SIG */ ++ { RCAR_GP_PIN(5, 23), PU5, 3 }, /* MLB_CLK */ ++ { RCAR_GP_PIN(5, 22), PU5, 2 }, /* MSIOF0_RXD */ ++ { RCAR_GP_PIN(5, 21), PU5, 1 }, /* MSIOF0_SS2 */ ++ { RCAR_GP_PIN(5, 20), PU5, 0 }, /* MSIOF0_TXD */ ++ ++ { RCAR_GP_PIN(6, 31), PU6, 6 }, /* USB31_OVC */ ++ { RCAR_GP_PIN(6, 30), PU6, 5 }, /* USB31_PWEN */ ++ { RCAR_GP_PIN(6, 29), PU6, 4 }, /* USB30_OVC */ ++ { RCAR_GP_PIN(6, 28), PU6, 3 }, /* USB30_PWEN */ ++ { RCAR_GP_PIN(6, 27), PU6, 2 }, /* USB1_OVC */ ++ { RCAR_GP_PIN(6, 26), PU6, 1 }, /* USB1_PWEN */ ++ { RCAR_GP_PIN(6, 25), PU6, 0 }, /* USB0_OVC */ + }; + + static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc, + unsigned int pin) + { ++ const struct sh_pfc_bias_info *info; + u32 reg; + u32 bit; + +- if (WARN_ON_ONCE(!pullups[pin].reg)) ++ info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin); ++ if (!info) + return PIN_CONFIG_BIAS_DISABLE; + +- reg = pullups[pin].reg; +- bit = BIT(pullups[pin].bit); ++ reg = info->reg; ++ bit = BIT(info->bit); + + if (sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit) { + if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit) +@@ -5379,15 +5378,17 @@ static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc, + static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, + unsigned int bias) + { ++ const struct sh_pfc_bias_info *info; + u32 enable, updown; + u32 reg; + u32 bit; + +- if (WARN_ON_ONCE(!pullups[pin].reg)) ++ info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin); ++ if (!info) + return; + +- reg = pullups[pin].reg; +- bit = BIT(pullups[pin].bit); ++ reg = info->reg; ++ bit = BIT(info->bit); + + enable = sh_pfc_read_reg(pfc, PUEN + reg, 32) & ~bit; + if (bias != PIN_CONFIG_BIAS_DISABLE) +diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c +index c5772584594c..fcacfa73ef6e 100644 +--- a/drivers/pinctrl/sh-pfc/pinctrl.c ++++ b/drivers/pinctrl/sh-pfc/pinctrl.c +@@ -570,7 +570,8 @@ static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin, + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: +- return true; ++ return pin->configs & ++ (SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN); + + case PIN_CONFIG_BIAS_PULL_UP: + return pin->configs & SH_PFC_PIN_CFG_PULL_UP; +diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h +index 2345421103db..9556c172e3d2 100644 +--- a/drivers/pinctrl/sh-pfc/sh_pfc.h ++++ b/drivers/pinctrl/sh-pfc/sh_pfc.h +@@ -189,6 +189,12 @@ struct sh_pfc_window { + unsigned long size; + }; + ++struct sh_pfc_bias_info { ++ u16 pin; ++ u16 reg : 11; ++ u16 bit : 5; ++}; ++ + struct sh_pfc_pin_range; + + struct sh_pfc { +diff --git a/drivers/power/supply/bq24190_charger.c b/drivers/power/supply/bq24190_charger.c +index f5746b9f4e83..e9584330aeed 100644 +--- a/drivers/power/supply/bq24190_charger.c ++++ b/drivers/power/supply/bq24190_charger.c +@@ -1141,7 +1141,7 @@ static int bq24190_battery_set_property(struct power_supply *psy, + + dev_dbg(bdi->dev, "prop: %d\n", psp); + +- pm_runtime_put_sync(bdi->dev); ++ pm_runtime_get_sync(bdi->dev); + + switch (psp) { + case POWER_SUPPLY_PROP_ONLINE: +diff --git a/drivers/power/supply/bq27xxx_battery.c b/drivers/power/supply/bq27xxx_battery.c +index 3b0dbc689d72..bccb3f595ff3 100644 +--- a/drivers/power/supply/bq27xxx_battery.c ++++ b/drivers/power/supply/bq27xxx_battery.c +@@ -164,6 +164,25 @@ static u8 bq27xxx_regs[][BQ27XXX_REG_MAX] = { + [BQ27XXX_REG_DCAP] = 0x3c, + [BQ27XXX_REG_AP] = INVALID_REG_ADDR, + }, ++ [BQ27510] = { ++ [BQ27XXX_REG_CTRL] = 0x00, ++ [BQ27XXX_REG_TEMP] = 0x06, ++ [BQ27XXX_REG_INT_TEMP] = 0x28, ++ [BQ27XXX_REG_VOLT] = 0x08, ++ [BQ27XXX_REG_AI] = 0x14, ++ [BQ27XXX_REG_FLAGS] = 0x0a, ++ [BQ27XXX_REG_TTE] = 0x16, ++ [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, ++ [BQ27XXX_REG_TTES] = 0x1a, ++ [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, ++ [BQ27XXX_REG_NAC] = 0x0c, ++ [BQ27XXX_REG_FCC] = 0x12, ++ [BQ27XXX_REG_CYCT] = 0x1e, ++ [BQ27XXX_REG_AE] = INVALID_REG_ADDR, ++ [BQ27XXX_REG_SOC] = 0x20, ++ [BQ27XXX_REG_DCAP] = 0x2e, ++ [BQ27XXX_REG_AP] = INVALID_REG_ADDR, ++ }, + [BQ27530] = { + [BQ27XXX_REG_CTRL] = 0x00, + [BQ27XXX_REG_TEMP] = 0x06, +@@ -302,6 +321,24 @@ static enum power_supply_property bq27500_battery_props[] = { + POWER_SUPPLY_PROP_MANUFACTURER, + }; + ++static enum power_supply_property bq27510_battery_props[] = { ++ POWER_SUPPLY_PROP_STATUS, ++ POWER_SUPPLY_PROP_PRESENT, ++ POWER_SUPPLY_PROP_VOLTAGE_NOW, ++ POWER_SUPPLY_PROP_CURRENT_NOW, ++ POWER_SUPPLY_PROP_CAPACITY, ++ POWER_SUPPLY_PROP_CAPACITY_LEVEL, ++ POWER_SUPPLY_PROP_TEMP, ++ POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, ++ POWER_SUPPLY_PROP_TECHNOLOGY, ++ POWER_SUPPLY_PROP_CHARGE_FULL, ++ POWER_SUPPLY_PROP_CHARGE_NOW, ++ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, ++ POWER_SUPPLY_PROP_CYCLE_COUNT, ++ POWER_SUPPLY_PROP_HEALTH, ++ POWER_SUPPLY_PROP_MANUFACTURER, ++}; ++ + static enum power_supply_property bq27530_battery_props[] = { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_PRESENT, +@@ -385,6 +422,7 @@ static struct { + BQ27XXX_PROP(BQ27000, bq27000_battery_props), + BQ27XXX_PROP(BQ27010, bq27010_battery_props), + BQ27XXX_PROP(BQ27500, bq27500_battery_props), ++ BQ27XXX_PROP(BQ27510, bq27510_battery_props), + BQ27XXX_PROP(BQ27530, bq27530_battery_props), + BQ27XXX_PROP(BQ27541, bq27541_battery_props), + BQ27XXX_PROP(BQ27545, bq27545_battery_props), +@@ -635,7 +673,8 @@ static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di) + */ + static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags) + { +- if (di->chip == BQ27500 || di->chip == BQ27541 || di->chip == BQ27545) ++ if (di->chip == BQ27500 || di->chip == BQ27510 || ++ di->chip == BQ27541 || di->chip == BQ27545) + return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD); + if (di->chip == BQ27530 || di->chip == BQ27421) + return flags & BQ27XXX_FLAG_OT; +diff --git a/drivers/power/supply/bq27xxx_battery_i2c.c b/drivers/power/supply/bq27xxx_battery_i2c.c +index 85d4ea2a9c20..5c5c3a6f9923 100644 +--- a/drivers/power/supply/bq27xxx_battery_i2c.c ++++ b/drivers/power/supply/bq27xxx_battery_i2c.c +@@ -149,8 +149,8 @@ static const struct i2c_device_id bq27xxx_i2c_id_table[] = { + { "bq27200", BQ27000 }, + { "bq27210", BQ27010 }, + { "bq27500", BQ27500 }, +- { "bq27510", BQ27500 }, +- { "bq27520", BQ27500 }, ++ { "bq27510", BQ27510 }, ++ { "bq27520", BQ27510 }, + { "bq27530", BQ27530 }, + { "bq27531", BQ27530 }, + { "bq27541", BQ27541 }, +diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c +index 243b233ff31b..3c71f608b444 100644 +--- a/drivers/powercap/intel_rapl.c ++++ b/drivers/powercap/intel_rapl.c +@@ -442,6 +442,7 @@ static int contraint_to_pl(struct rapl_domain *rd, int cid) + return i; + } + } ++ pr_err("Cannot find matching power limit for constraint %d\n", cid); + + return -EINVAL; + } +@@ -457,6 +458,10 @@ static int set_power_limit(struct powercap_zone *power_zone, int cid, + get_online_cpus(); + rd = power_zone_to_rapl_domain(power_zone); + id = contraint_to_pl(rd, cid); ++ if (id < 0) { ++ ret = id; ++ goto set_exit; ++ } + + rp = rd->rp; + +@@ -496,6 +501,11 @@ static int get_current_power_limit(struct powercap_zone *power_zone, int cid, + get_online_cpus(); + rd = power_zone_to_rapl_domain(power_zone); + id = contraint_to_pl(rd, cid); ++ if (id < 0) { ++ ret = id; ++ goto get_exit; ++ } ++ + switch (rd->rpl[id].prim_id) { + case PL1_ENABLE: + prim = POWER_LIMIT1; +@@ -512,6 +522,7 @@ static int get_current_power_limit(struct powercap_zone *power_zone, int cid, + else + *data = val; + ++get_exit: + put_online_cpus(); + + return ret; +@@ -527,6 +538,10 @@ static int set_time_window(struct powercap_zone *power_zone, int cid, + get_online_cpus(); + rd = power_zone_to_rapl_domain(power_zone); + id = contraint_to_pl(rd, cid); ++ if (id < 0) { ++ ret = id; ++ goto set_time_exit; ++ } + + switch (rd->rpl[id].prim_id) { + case PL1_ENABLE: +@@ -538,6 +553,8 @@ static int set_time_window(struct powercap_zone *power_zone, int cid, + default: + ret = -EINVAL; + } ++ ++set_time_exit: + put_online_cpus(); + return ret; + } +@@ -552,6 +569,10 @@ static int get_time_window(struct powercap_zone *power_zone, int cid, u64 *data) + get_online_cpus(); + rd = power_zone_to_rapl_domain(power_zone); + id = contraint_to_pl(rd, cid); ++ if (id < 0) { ++ ret = id; ++ goto get_time_exit; ++ } + + switch (rd->rpl[id].prim_id) { + case PL1_ENABLE: +@@ -566,6 +587,8 @@ static int get_time_window(struct powercap_zone *power_zone, int cid, u64 *data) + } + if (!ret) + *data = val; ++ ++get_time_exit: + put_online_cpus(); + + return ret; +@@ -707,7 +730,7 @@ static u64 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type type, + case ENERGY_UNIT: + scale = ENERGY_UNIT_SCALE; + /* per domain unit takes precedence */ +- if (rd && rd->domain_energy_unit) ++ if (rd->domain_energy_unit) + units = rd->domain_energy_unit; + else + units = rp->energy_unit; +diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c +index 54382ef902c6..e6a512ebeae2 100644 +--- a/drivers/regulator/axp20x-regulator.c ++++ b/drivers/regulator/axp20x-regulator.c +@@ -337,10 +337,18 @@ static const struct regulator_desc axp809_regulators[] = { + AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)), + AXP_DESC(AXP809, ELDO3, "eldo3", "eldoin", 700, 3300, 100, + AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)), +- AXP_DESC_IO(AXP809, LDO_IO0, "ldo_io0", "ips", 700, 3300, 100, ++ /* ++ * Note the datasheet only guarantees reliable operation up to ++ * 3.3V, this needs to be enforced via dts provided constraints ++ */ ++ AXP_DESC_IO(AXP809, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100, + AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), +- AXP_DESC_IO(AXP809, LDO_IO1, "ldo_io1", "ips", 700, 3300, 100, ++ /* ++ * Note the datasheet only guarantees reliable operation up to ++ * 3.3V, this needs to be enforced via dts provided constraints ++ */ ++ AXP_DESC_IO(AXP809, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100, + AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07, + AXP22X_IO_ENABLED, AXP22X_IO_DISABLED), + AXP_DESC_FIXED(AXP809, RTC_LDO, "rtc_ldo", "ips", 1800), +diff --git a/drivers/regulator/helpers.c b/drivers/regulator/helpers.c +index bcf38fd5106a..379cdacc05d8 100644 +--- a/drivers/regulator/helpers.c ++++ b/drivers/regulator/helpers.c +@@ -454,13 +454,17 @@ EXPORT_SYMBOL_GPL(regulator_set_bypass_regmap); + int regulator_get_bypass_regmap(struct regulator_dev *rdev, bool *enable) + { + unsigned int val; ++ unsigned int val_on = rdev->desc->bypass_val_on; + int ret; + + ret = regmap_read(rdev->regmap, rdev->desc->bypass_reg, &val); + if (ret != 0) + return ret; + +- *enable = (val & rdev->desc->bypass_mask) == rdev->desc->bypass_val_on; ++ if (!val_on) ++ val_on = rdev->desc->bypass_mask; ++ ++ *enable = (val & rdev->desc->bypass_mask) == val_on; + + return 0; + } +diff --git a/drivers/regulator/tps65086-regulator.c b/drivers/regulator/tps65086-regulator.c +index 33f389d583ef..caf174ffa316 100644 +--- a/drivers/regulator/tps65086-regulator.c ++++ b/drivers/regulator/tps65086-regulator.c +@@ -71,18 +71,17 @@ struct tps65086_regulator { + unsigned int decay_mask; + }; + +-static const struct regulator_linear_range tps65086_buck126_10mv_ranges[] = { ++static const struct regulator_linear_range tps65086_10mv_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(410000, 0x1, 0x7F, 10000), + }; + + static const struct regulator_linear_range tps65086_buck126_25mv_ranges[] = { +- REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), +- REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x18, 0), ++ REGULATOR_LINEAR_RANGE(1000000, 0x0, 0x18, 0), + REGULATOR_LINEAR_RANGE(1025000, 0x19, 0x7F, 25000), + }; + +-static const struct regulator_linear_range tps65086_buck345_ranges[] = { ++static const struct regulator_linear_range tps65086_buck345_25mv_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), + REGULATOR_LINEAR_RANGE(425000, 0x1, 0x7F, 25000), + }; +@@ -125,27 +124,27 @@ static int tps65086_of_parse_cb(struct device_node *dev, + static struct tps65086_regulator regulators[] = { + TPS65086_REGULATOR("BUCK1", "buck1", BUCK1, 0x80, TPS65086_BUCK1CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(0), +- tps65086_buck126_10mv_ranges, TPS65086_BUCK1CTRL, ++ tps65086_10mv_ranges, TPS65086_BUCK1CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK2", "buck2", BUCK2, 0x80, TPS65086_BUCK2CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(1), +- tps65086_buck126_10mv_ranges, TPS65086_BUCK2CTRL, ++ tps65086_10mv_ranges, TPS65086_BUCK2CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK3", "buck3", BUCK3, 0x80, TPS65086_BUCK3VID, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(2), +- tps65086_buck345_ranges, TPS65086_BUCK3DECAY, ++ tps65086_10mv_ranges, TPS65086_BUCK3DECAY, + BIT(0)), + TPS65086_REGULATOR("BUCK4", "buck4", BUCK4, 0x80, TPS65086_BUCK4VID, + BUCK_VID_MASK, TPS65086_BUCK4CTRL, BIT(0), +- tps65086_buck345_ranges, TPS65086_BUCK4VID, ++ tps65086_10mv_ranges, TPS65086_BUCK4VID, + BIT(0)), + TPS65086_REGULATOR("BUCK5", "buck5", BUCK5, 0x80, TPS65086_BUCK5VID, + BUCK_VID_MASK, TPS65086_BUCK5CTRL, BIT(0), +- tps65086_buck345_ranges, TPS65086_BUCK5CTRL, ++ tps65086_10mv_ranges, TPS65086_BUCK5CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK6", "buck6", BUCK6, 0x80, TPS65086_BUCK6VID, + BUCK_VID_MASK, TPS65086_BUCK6CTRL, BIT(0), +- tps65086_buck126_10mv_ranges, TPS65086_BUCK6CTRL, ++ tps65086_10mv_ranges, TPS65086_BUCK6CTRL, + BIT(0)), + TPS65086_REGULATOR("LDOA1", "ldoa1", LDOA1, 0xF, TPS65086_LDOA1CTRL, + VDOA1_VID_MASK, TPS65086_LDOA1CTRL, BIT(0), +@@ -162,18 +161,6 @@ static struct tps65086_regulator regulators[] = { + TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), + }; + +-static inline bool has_25mv_mode(int id) +-{ +- switch (id) { +- case BUCK1: +- case BUCK2: +- case BUCK6: +- return true; +- default: +- return false; +- } +-} +- + static int tps65086_of_parse_cb(struct device_node *dev, + const struct regulator_desc *desc, + struct regulator_config *config) +@@ -181,12 +168,27 @@ static int tps65086_of_parse_cb(struct device_node *dev, + int ret; + + /* Check for 25mV step mode */ +- if (has_25mv_mode(desc->id) && +- of_property_read_bool(config->of_node, "ti,regulator-step-size-25mv")) { +- regulators[desc->id].desc.linear_ranges = ++ if (of_property_read_bool(config->of_node, "ti,regulator-step-size-25mv")) { ++ switch (desc->id) { ++ case BUCK1: ++ case BUCK2: ++ case BUCK6: ++ regulators[desc->id].desc.linear_ranges = + tps65086_buck126_25mv_ranges; +- regulators[desc->id].desc.n_linear_ranges = ++ regulators[desc->id].desc.n_linear_ranges = + ARRAY_SIZE(tps65086_buck126_25mv_ranges); ++ break; ++ case BUCK3: ++ case BUCK4: ++ case BUCK5: ++ regulators[desc->id].desc.linear_ranges = ++ tps65086_buck345_25mv_ranges; ++ regulators[desc->id].desc.n_linear_ranges = ++ ARRAY_SIZE(tps65086_buck345_25mv_ranges); ++ break; ++ default: ++ dev_warn(config->dev, "25mV step mode only valid for BUCK regulators\n"); ++ } + } + + /* Check for decay mode */ +diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig +index f396bfef5d42..5fcbefcb8636 100644 +--- a/drivers/remoteproc/Kconfig ++++ b/drivers/remoteproc/Kconfig +@@ -91,17 +91,12 @@ config QCOM_Q6V5_PIL + Say y here to support the Qualcomm Peripherial Image Loader for the + Hexagon V5 based remote processors. + +-config QCOM_WCNSS_IRIS +- tristate +- depends on OF && ARCH_QCOM +- + config QCOM_WCNSS_PIL + tristate "Qualcomm WCNSS Peripheral Image Loader" + depends on OF && ARCH_QCOM + depends on QCOM_SMEM + select QCOM_MDT_LOADER + select QCOM_SCM +- select QCOM_WCNSS_IRIS + select REMOTEPROC + help + Say y here to support the Peripheral Image Loader for the Qualcomm +diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile +index 6dfb62ed643f..034b6f3563a7 100644 +--- a/drivers/remoteproc/Makefile ++++ b/drivers/remoteproc/Makefile +@@ -13,6 +13,7 @@ obj-$(CONFIG_WKUP_M3_RPROC) += wkup_m3_rproc.o + obj-$(CONFIG_DA8XX_REMOTEPROC) += da8xx_remoteproc.o + obj-$(CONFIG_QCOM_MDT_LOADER) += qcom_mdt_loader.o + obj-$(CONFIG_QCOM_Q6V5_PIL) += qcom_q6v5_pil.o +-obj-$(CONFIG_QCOM_WCNSS_IRIS) += qcom_wcnss_iris.o +-obj-$(CONFIG_QCOM_WCNSS_PIL) += qcom_wcnss.o ++obj-$(CONFIG_QCOM_WCNSS_PIL) += qcom_wcnss_pil.o ++qcom_wcnss_pil-y += qcom_wcnss.o ++qcom_wcnss_pil-y += qcom_wcnss_iris.o + obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o +diff --git a/drivers/remoteproc/qcom_wcnss.c b/drivers/remoteproc/qcom_wcnss.c +index f5cedeaafba1..323b629474a6 100644 +--- a/drivers/remoteproc/qcom_wcnss.c ++++ b/drivers/remoteproc/qcom_wcnss.c +@@ -143,7 +143,6 @@ void qcom_wcnss_assign_iris(struct qcom_wcnss *wcnss, + + mutex_unlock(&wcnss->iris_lock); + } +-EXPORT_SYMBOL_GPL(qcom_wcnss_assign_iris); + + static int wcnss_load(struct rproc *rproc, const struct firmware *fw) + { +@@ -619,6 +618,28 @@ static struct platform_driver wcnss_driver = { + }, + }; + +-module_platform_driver(wcnss_driver); ++static int __init wcnss_init(void) ++{ ++ int ret; ++ ++ ret = platform_driver_register(&wcnss_driver); ++ if (ret) ++ return ret; ++ ++ ret = platform_driver_register(&qcom_iris_driver); ++ if (ret) ++ platform_driver_unregister(&wcnss_driver); ++ ++ return ret; ++} ++module_init(wcnss_init); ++ ++static void __exit wcnss_exit(void) ++{ ++ platform_driver_unregister(&qcom_iris_driver); ++ platform_driver_unregister(&wcnss_driver); ++} ++module_exit(wcnss_exit); ++ + MODULE_DESCRIPTION("Qualcomm Peripherial Image Loader for Wireless Subsystem"); + MODULE_LICENSE("GPL v2"); +diff --git a/drivers/remoteproc/qcom_wcnss.h b/drivers/remoteproc/qcom_wcnss.h +index 9dc4a9fe41e1..25fb7f62a457 100644 +--- a/drivers/remoteproc/qcom_wcnss.h ++++ b/drivers/remoteproc/qcom_wcnss.h +@@ -4,6 +4,8 @@ + struct qcom_iris; + struct qcom_wcnss; + ++extern struct platform_driver qcom_iris_driver; ++ + struct wcnss_vreg_info { + const char * const name; + int min_voltage; +diff --git a/drivers/remoteproc/qcom_wcnss_iris.c b/drivers/remoteproc/qcom_wcnss_iris.c +index f0ca24a8dd0b..05d6e175411a 100644 +--- a/drivers/remoteproc/qcom_wcnss_iris.c ++++ b/drivers/remoteproc/qcom_wcnss_iris.c +@@ -94,14 +94,12 @@ int qcom_iris_enable(struct qcom_iris *iris) + + return ret; + } +-EXPORT_SYMBOL_GPL(qcom_iris_enable); + + void qcom_iris_disable(struct qcom_iris *iris) + { + clk_disable_unprepare(iris->xo_clk); + regulator_bulk_disable(iris->num_vregs, iris->vregs); + } +-EXPORT_SYMBOL_GPL(qcom_iris_disable); + + static int qcom_iris_probe(struct platform_device *pdev) + { +@@ -174,7 +172,7 @@ static const struct of_device_id iris_of_match[] = { + {} + }; + +-static struct platform_driver wcnss_driver = { ++struct platform_driver qcom_iris_driver = { + .probe = qcom_iris_probe, + .remove = qcom_iris_remove, + .driver = { +@@ -182,7 +180,3 @@ static struct platform_driver wcnss_driver = { + .of_match_table = iris_of_match, + }, + }; +- +-module_platform_driver(wcnss_driver); +-MODULE_DESCRIPTION("Qualcomm Wireless Subsystem Iris driver"); +-MODULE_LICENSE("GPL v2"); +diff --git a/drivers/remoteproc/st_remoteproc.c b/drivers/remoteproc/st_remoteproc.c +index ae8963fcc8c8..da4e152e9733 100644 +--- a/drivers/remoteproc/st_remoteproc.c ++++ b/drivers/remoteproc/st_remoteproc.c +@@ -245,8 +245,10 @@ static int st_rproc_probe(struct platform_device *pdev) + goto free_rproc; + + enabled = st_rproc_state(pdev); +- if (enabled < 0) ++ if (enabled < 0) { ++ ret = enabled; + goto free_rproc; ++ } + + if (enabled) { + atomic_inc(&rproc->power); +diff --git a/drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c b/drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c +index 642b739ad0da..608140f16d98 100644 +--- a/drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c ++++ b/drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c +@@ -3702,7 +3702,7 @@ static int ibmvscsis_write_pending(struct se_cmd *se_cmd) + 1, 1); + if (rc) { + pr_err("srp_transfer_data() failed: %d\n", rc); +- return -EAGAIN; ++ return -EIO; + } + /* + * We now tell TCM to add this WRITE CDB directly into the TCM storage +diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c +index 240a361b674f..e8819aa20415 100644 +--- a/drivers/tty/serial/8250/8250_core.c ++++ b/drivers/tty/serial/8250/8250_core.c +@@ -675,7 +675,7 @@ static struct console univ8250_console = { + .device = uart_console_device, + .setup = univ8250_console_setup, + .match = univ8250_console_match, +- .flags = CON_PRINTBUFFER | CON_ANYTIME | CON_CONSDEV, ++ .flags = CON_PRINTBUFFER | CON_ANYTIME, + .index = -1, + .data = &serial8250_reg, + }; +diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c +index 1731b98d2471..080d5a59d0a7 100644 +--- a/drivers/tty/serial/8250/8250_port.c ++++ b/drivers/tty/serial/8250/8250_port.c +@@ -1411,7 +1411,7 @@ static void __do_stop_tx_rs485(struct uart_8250_port *p) + * Enable previously disabled RX interrupts. + */ + if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) { +- serial8250_clear_fifos(p); ++ serial8250_clear_and_reinit_fifos(p); + + p->ier |= UART_IER_RLSI | UART_IER_RDI; + serial_port_out(&p->port, UART_IER, p->ier); +diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c +index 168b10cad47b..fabbe76203bb 100644 +--- a/drivers/tty/serial/atmel_serial.c ++++ b/drivers/tty/serial/atmel_serial.c +@@ -481,6 +481,14 @@ static void atmel_stop_tx(struct uart_port *port) + /* disable PDC transmit */ + atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS); + } ++ ++ /* ++ * Disable the transmitter. ++ * This is mandatory when DMA is used, otherwise the DMA buffer ++ * is fully transmitted. ++ */ ++ atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXDIS); ++ + /* Disable interrupts */ + atmel_uart_writel(port, ATMEL_US_IDR, atmel_port->tx_done_mask); + +@@ -513,6 +521,9 @@ static void atmel_start_tx(struct uart_port *port) + + /* Enable interrupts */ + atmel_uart_writel(port, ATMEL_US_IER, atmel_port->tx_done_mask); ++ ++ /* re-enable the transmitter */ ++ atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXEN); + } + + /* +@@ -798,6 +809,11 @@ static void atmel_complete_tx_dma(void *arg) + */ + if (!uart_circ_empty(xmit)) + atmel_tasklet_schedule(atmel_port, &atmel_port->tasklet_tx); ++ else if ((port->rs485.flags & SER_RS485_ENABLED) && ++ !(port->rs485.flags & SER_RS485_RX_DURING_TX)) { ++ /* DMA done, stop TX, start RX for RS485 */ ++ atmel_start_rx(port); ++ } + + spin_unlock_irqrestore(&port->lock, flags); + } +@@ -900,12 +916,6 @@ static void atmel_tx_dma(struct uart_port *port) + desc->callback = atmel_complete_tx_dma; + desc->callback_param = atmel_port; + atmel_port->cookie_tx = dmaengine_submit(desc); +- +- } else { +- if (port->rs485.flags & SER_RS485_ENABLED) { +- /* DMA done, stop TX, start RX for RS485 */ +- atmel_start_rx(port); +- } + } + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) +diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c +index 52bbd27e93ae..701c085bb19b 100644 +--- a/drivers/tty/sysrq.c ++++ b/drivers/tty/sysrq.c +@@ -946,8 +946,8 @@ static const struct input_device_id sysrq_ids[] = { + { + .flags = INPUT_DEVICE_ID_MATCH_EVBIT | + INPUT_DEVICE_ID_MATCH_KEYBIT, +- .evbit = { BIT_MASK(EV_KEY) }, +- .keybit = { BIT_MASK(KEY_LEFTALT) }, ++ .evbit = { [BIT_WORD(EV_KEY)] = BIT_MASK(EV_KEY) }, ++ .keybit = { [BIT_WORD(KEY_LEFTALT)] = BIT_MASK(KEY_LEFTALT) }, + }, + { }, + }; +diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c +index 771a6da9caea..521c1816a26a 100644 +--- a/drivers/usb/host/xhci-ring.c ++++ b/drivers/usb/host/xhci-ring.c +@@ -917,17 +917,6 @@ void xhci_stop_endpoint_command_watchdog(unsigned long arg) + spin_lock_irqsave(&xhci->lock, flags); + + ep->stop_cmds_pending--; +- if (xhci->xhc_state & XHCI_STATE_REMOVING) { +- spin_unlock_irqrestore(&xhci->lock, flags); +- return; +- } +- if (xhci->xhc_state & XHCI_STATE_DYING) { +- xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, +- "Stop EP timer ran, but another timer marked " +- "xHCI as DYING, exiting."); +- spin_unlock_irqrestore(&xhci->lock, flags); +- return; +- } + if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) { + xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, + "Stop EP timer ran, but no command pending, " +diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c +index ad0624386950..34e23c7d7797 100644 +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -1529,19 +1529,6 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) + xhci_urb_free_priv(urb_priv); + return ret; + } +- if ((xhci->xhc_state & XHCI_STATE_DYING) || +- (xhci->xhc_state & XHCI_STATE_HALTED)) { +- xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, +- "Ep 0x%x: URB %p to be canceled on " +- "non-responsive xHCI host.", +- urb->ep->desc.bEndpointAddress, urb); +- /* Let the stop endpoint command watchdog timer (which set this +- * state) finish cleaning up the endpoint TD lists. We must +- * have caught it in the middle of dropping a lock and giving +- * back an URB. +- */ +- goto done; +- } + + ep_index = xhci_get_endpoint_index(&urb->ep->desc); + ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index]; +diff --git a/drivers/usb/musb/musb_debugfs.c b/drivers/usb/musb/musb_debugfs.c +index 9b22d946c089..534a3f6fa89c 100644 +--- a/drivers/usb/musb/musb_debugfs.c ++++ b/drivers/usb/musb/musb_debugfs.c +@@ -114,6 +114,7 @@ static int musb_regdump_show(struct seq_file *s, void *unused) + unsigned i; + + seq_printf(s, "MUSB (M)HDRC Register Dump\n"); ++ pm_runtime_get_sync(musb->controller); + + for (i = 0; i < ARRAY_SIZE(musb_regmap); i++) { + switch (musb_regmap[i].size) { +@@ -132,6 +133,8 @@ static int musb_regdump_show(struct seq_file *s, void *unused) + } + } + ++ pm_runtime_mark_last_busy(musb->controller); ++ pm_runtime_put_autosuspend(musb->controller); + return 0; + } + +@@ -145,7 +148,10 @@ static int musb_test_mode_show(struct seq_file *s, void *unused) + struct musb *musb = s->private; + unsigned test; + ++ pm_runtime_get_sync(musb->controller); + test = musb_readb(musb->mregs, MUSB_TESTMODE); ++ pm_runtime_mark_last_busy(musb->controller); ++ pm_runtime_put_autosuspend(musb->controller); + + if (test & MUSB_TEST_FORCE_HOST) + seq_printf(s, "force host\n"); +@@ -194,11 +200,12 @@ static ssize_t musb_test_mode_write(struct file *file, + u8 test; + char buf[18]; + ++ pm_runtime_get_sync(musb->controller); + test = musb_readb(musb->mregs, MUSB_TESTMODE); + if (test) { + dev_err(musb->controller, "Error: test mode is already set. " + "Please do USB Bus Reset to start a new test.\n"); +- return count; ++ goto ret; + } + + memset(buf, 0x00, sizeof(buf)); +@@ -234,6 +241,9 @@ static ssize_t musb_test_mode_write(struct file *file, + + musb_writeb(musb->mregs, MUSB_TESTMODE, test); + ++ret: ++ pm_runtime_mark_last_busy(musb->controller); ++ pm_runtime_put_autosuspend(musb->controller); + return count; + } + +@@ -254,8 +264,13 @@ static int musb_softconnect_show(struct seq_file *s, void *unused) + switch (musb->xceiv->otg->state) { + case OTG_STATE_A_HOST: + case OTG_STATE_A_WAIT_BCON: ++ pm_runtime_get_sync(musb->controller); ++ + reg = musb_readb(musb->mregs, MUSB_DEVCTL); + connect = reg & MUSB_DEVCTL_SESSION ? 1 : 0; ++ ++ pm_runtime_mark_last_busy(musb->controller); ++ pm_runtime_put_autosuspend(musb->controller); + break; + default: + connect = -1; +@@ -284,6 +299,7 @@ static ssize_t musb_softconnect_write(struct file *file, + if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) + return -EFAULT; + ++ pm_runtime_get_sync(musb->controller); + if (!strncmp(buf, "0", 1)) { + switch (musb->xceiv->otg->state) { + case OTG_STATE_A_HOST: +@@ -314,6 +330,8 @@ static ssize_t musb_softconnect_write(struct file *file, + } + } + ++ pm_runtime_mark_last_busy(musb->controller); ++ pm_runtime_put_autosuspend(musb->controller); + return count; + } + +diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c +index f139488d0816..e98590aab633 100644 +--- a/drivers/usb/serial/ch341.c ++++ b/drivers/usb/serial/ch341.c +@@ -99,6 +99,8 @@ static int ch341_control_out(struct usb_device *dev, u8 request, + r = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), request, + USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT, + value, index, NULL, 0, DEFAULT_TIMEOUT); ++ if (r < 0) ++ dev_err(&dev->dev, "failed to send control message: %d\n", r); + + return r; + } +@@ -116,7 +118,20 @@ static int ch341_control_in(struct usb_device *dev, + r = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), request, + USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN, + value, index, buf, bufsize, DEFAULT_TIMEOUT); +- return r; ++ if (r < bufsize) { ++ if (r >= 0) { ++ dev_err(&dev->dev, ++ "short control message received (%d < %u)\n", ++ r, bufsize); ++ r = -EIO; ++ } ++ ++ dev_err(&dev->dev, "failed to receive control message: %d\n", ++ r); ++ return r; ++ } ++ ++ return 0; + } + + static int ch341_set_baudrate(struct usb_device *dev, +@@ -158,9 +173,9 @@ static int ch341_set_handshake(struct usb_device *dev, u8 control) + + static int ch341_get_status(struct usb_device *dev, struct ch341_private *priv) + { ++ const unsigned int size = 2; + char *buffer; + int r; +- const unsigned size = 8; + unsigned long flags; + + buffer = kmalloc(size, GFP_KERNEL); +@@ -171,14 +186,9 @@ static int ch341_get_status(struct usb_device *dev, struct ch341_private *priv) + if (r < 0) + goto out; + +- /* setup the private status if available */ +- if (r == 2) { +- r = 0; +- spin_lock_irqsave(&priv->lock, flags); +- priv->line_status = (~(*buffer)) & CH341_BITS_MODEM_STAT; +- spin_unlock_irqrestore(&priv->lock, flags); +- } else +- r = -EPROTO; ++ spin_lock_irqsave(&priv->lock, flags); ++ priv->line_status = (~(*buffer)) & CH341_BITS_MODEM_STAT; ++ spin_unlock_irqrestore(&priv->lock, flags); + + out: kfree(buffer); + return r; +@@ -188,9 +198,9 @@ out: kfree(buffer); + + static int ch341_configure(struct usb_device *dev, struct ch341_private *priv) + { ++ const unsigned int size = 2; + char *buffer; + int r; +- const unsigned size = 8; + + buffer = kmalloc(size, GFP_KERNEL); + if (!buffer) +@@ -253,7 +263,6 @@ static int ch341_port_probe(struct usb_serial_port *port) + + spin_lock_init(&priv->lock); + priv->baud_rate = DEFAULT_BAUD_RATE; +- priv->line_control = CH341_BIT_RTS | CH341_BIT_DTR; + + r = ch341_configure(port->serial->dev, priv); + if (r < 0) +@@ -315,7 +324,7 @@ static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port) + + r = ch341_configure(serial->dev, priv); + if (r) +- goto out; ++ return r; + + if (tty) + ch341_set_termios(tty, port, NULL); +@@ -325,12 +334,19 @@ static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port) + if (r) { + dev_err(&port->dev, "%s - failed to submit interrupt urb: %d\n", + __func__, r); +- goto out; ++ return r; + } + + r = usb_serial_generic_open(tty, port); ++ if (r) ++ goto err_kill_interrupt_urb; + +-out: return r; ++ return 0; ++ ++err_kill_interrupt_urb: ++ usb_kill_urb(port->interrupt_in_urb); ++ ++ return r; + } + + /* Old_termios contains the original termios settings and +@@ -345,26 +361,25 @@ static void ch341_set_termios(struct tty_struct *tty, + + baud_rate = tty_get_baud_rate(tty); + +- priv->baud_rate = baud_rate; +- + if (baud_rate) { +- spin_lock_irqsave(&priv->lock, flags); +- priv->line_control |= (CH341_BIT_DTR | CH341_BIT_RTS); +- spin_unlock_irqrestore(&priv->lock, flags); ++ priv->baud_rate = baud_rate; + ch341_set_baudrate(port->serial->dev, priv); +- } else { +- spin_lock_irqsave(&priv->lock, flags); +- priv->line_control &= ~(CH341_BIT_DTR | CH341_BIT_RTS); +- spin_unlock_irqrestore(&priv->lock, flags); + } + +- ch341_set_handshake(port->serial->dev, priv->line_control); +- + /* Unimplemented: + * (cflag & CSIZE) : data bits [5, 8] + * (cflag & PARENB) : parity {NONE, EVEN, ODD} + * (cflag & CSTOPB) : stop bits [1, 2] + */ ++ ++ spin_lock_irqsave(&priv->lock, flags); ++ if (C_BAUD(tty) == B0) ++ priv->line_control &= ~(CH341_BIT_DTR | CH341_BIT_RTS); ++ else if (old_termios && (old_termios->c_cflag & CBAUD) == B0) ++ priv->line_control |= (CH341_BIT_DTR | CH341_BIT_RTS); ++ spin_unlock_irqrestore(&priv->lock, flags); ++ ++ ch341_set_handshake(port->serial->dev, priv->line_control); + } + + static void ch341_break_ctl(struct tty_struct *tty, int break_state) +@@ -539,14 +554,23 @@ static int ch341_tiocmget(struct tty_struct *tty) + + static int ch341_reset_resume(struct usb_serial *serial) + { +- struct ch341_private *priv; +- +- priv = usb_get_serial_port_data(serial->port[0]); ++ struct usb_serial_port *port = serial->port[0]; ++ struct ch341_private *priv = usb_get_serial_port_data(port); ++ int ret; + + /* reconfigure ch341 serial port after bus-reset */ + ch341_configure(serial->dev, priv); + +- return 0; ++ if (tty_port_initialized(&port->port)) { ++ ret = usb_submit_urb(port->interrupt_in_urb, GFP_NOIO); ++ if (ret) { ++ dev_err(&port->dev, "failed to submit interrupt urb: %d\n", ++ ret); ++ return ret; ++ } ++ } ++ ++ return usb_serial_generic_resume(serial); + } + + static struct usb_serial_driver ch341_device = { +diff --git a/drivers/usb/serial/kl5kusb105.c b/drivers/usb/serial/kl5kusb105.c +index 0ee190fc1bf8..6cb45757818f 100644 +--- a/drivers/usb/serial/kl5kusb105.c ++++ b/drivers/usb/serial/kl5kusb105.c +@@ -192,10 +192,11 @@ static int klsi_105_get_line_state(struct usb_serial_port *port, + status_buf, KLSI_STATUSBUF_LEN, + 10000 + ); +- if (rc < 0) +- dev_err(&port->dev, "Reading line status failed (error = %d)\n", +- rc); +- else { ++ if (rc != KLSI_STATUSBUF_LEN) { ++ dev_err(&port->dev, "reading line status failed: %d\n", rc); ++ if (rc >= 0) ++ rc = -EIO; ++ } else { + status = get_unaligned_le16(status_buf); + + dev_info(&port->serial->dev->dev, "read status %x %x\n", +diff --git a/drivers/usb/wusbcore/crypto.c b/drivers/usb/wusbcore/crypto.c +index 79451f7ef1b7..062c205f0046 100644 +--- a/drivers/usb/wusbcore/crypto.c ++++ b/drivers/usb/wusbcore/crypto.c +@@ -216,7 +216,6 @@ static int wusb_ccm_mac(struct crypto_skcipher *tfm_cbc, + struct scatterlist sg[4], sg_dst; + void *dst_buf; + size_t dst_size; +- const u8 bzero[16] = { 0 }; + u8 iv[crypto_skcipher_ivsize(tfm_cbc)]; + size_t zero_padding; + +@@ -261,7 +260,7 @@ static int wusb_ccm_mac(struct crypto_skcipher *tfm_cbc, + sg_set_buf(&sg[1], &scratch->b1, sizeof(scratch->b1)); + sg_set_buf(&sg[2], b, blen); + /* 0 if well behaved :) */ +- sg_set_buf(&sg[3], bzero, zero_padding); ++ sg_set_page(&sg[3], ZERO_PAGE(0), zero_padding, 0); + sg_init_one(&sg_dst, dst_buf, dst_size); + + skcipher_request_set_tfm(req, tfm_cbc); +diff --git a/drivers/vme/bridges/vme_ca91cx42.c b/drivers/vme/bridges/vme_ca91cx42.c +index 6b5ee896af63..7cc51223db1c 100644 +--- a/drivers/vme/bridges/vme_ca91cx42.c ++++ b/drivers/vme/bridges/vme_ca91cx42.c +@@ -464,7 +464,7 @@ static int ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled, + vme_bound = ioread32(bridge->base + CA91CX42_VSI_BD[i]); + pci_offset = ioread32(bridge->base + CA91CX42_VSI_TO[i]); + +- *pci_base = (dma_addr_t)vme_base + pci_offset; ++ *pci_base = (dma_addr_t)*vme_base + pci_offset; + *size = (unsigned long long)((vme_bound - *vme_base) + granularity); + + *enabled = 0; +diff --git a/fs/btrfs/async-thread.c b/fs/btrfs/async-thread.c +index 63d197724519..ff0b0be92d61 100644 +--- a/fs/btrfs/async-thread.c ++++ b/fs/btrfs/async-thread.c +@@ -273,6 +273,8 @@ static void run_ordered_work(struct __btrfs_workqueue *wq) + unsigned long flags; + + while (1) { ++ void *wtag; ++ + spin_lock_irqsave(lock, flags); + if (list_empty(list)) + break; +@@ -299,11 +301,13 @@ static void run_ordered_work(struct __btrfs_workqueue *wq) + spin_unlock_irqrestore(lock, flags); + + /* +- * we don't want to call the ordered free functions +- * with the lock held though ++ * We don't want to call the ordered free functions with the ++ * lock held though. Save the work as tag for the trace event, ++ * because the callback could free the structure. + */ ++ wtag = work; + work->ordered_free(work); +- trace_btrfs_all_work_done(work); ++ trace_btrfs_all_work_done(wq->fs_info, wtag); + } + spin_unlock_irqrestore(lock, flags); + } +@@ -311,6 +315,7 @@ static void run_ordered_work(struct __btrfs_workqueue *wq) + static void normal_work_helper(struct btrfs_work *work) + { + struct __btrfs_workqueue *wq; ++ void *wtag; + int need_order = 0; + + /* +@@ -324,6 +329,8 @@ static void normal_work_helper(struct btrfs_work *work) + if (work->ordered_func) + need_order = 1; + wq = work->wq; ++ /* Safe for tracepoints in case work gets freed by the callback */ ++ wtag = work; + + trace_btrfs_work_sched(work); + thresh_exec_hook(wq); +@@ -333,7 +340,7 @@ static void normal_work_helper(struct btrfs_work *work) + run_ordered_work(wq); + } + if (!need_order) +- trace_btrfs_all_work_done(work); ++ trace_btrfs_all_work_done(wq->fs_info, wtag); + } + + void btrfs_init_work(struct btrfs_work *work, btrfs_work_func_t uniq_func, +diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c +index 4607af38c72e..5909ae8c6731 100644 +--- a/fs/btrfs/extent-tree.c ++++ b/fs/btrfs/extent-tree.c +@@ -2537,11 +2537,11 @@ static noinline int __btrfs_run_delayed_refs(struct btrfs_trans_handle *trans, + if (ref && ref->seq && + btrfs_check_delayed_seq(fs_info, delayed_refs, ref->seq)) { + spin_unlock(&locked_ref->lock); +- btrfs_delayed_ref_unlock(locked_ref); + spin_lock(&delayed_refs->lock); + locked_ref->processing = 0; + delayed_refs->num_heads_ready++; + spin_unlock(&delayed_refs->lock); ++ btrfs_delayed_ref_unlock(locked_ref); + locked_ref = NULL; + cond_resched(); + count++; +@@ -2587,7 +2587,10 @@ static noinline int __btrfs_run_delayed_refs(struct btrfs_trans_handle *trans, + */ + if (must_insert_reserved) + locked_ref->must_insert_reserved = 1; ++ spin_lock(&delayed_refs->lock); + locked_ref->processing = 0; ++ delayed_refs->num_heads_ready++; ++ spin_unlock(&delayed_refs->lock); + btrfs_debug(fs_info, + "run_delayed_extent_op returned %d", + ret); +diff --git a/fs/dcache.c b/fs/dcache.c +index 5c7cc953ac81..4485a48f4091 100644 +--- a/fs/dcache.c ++++ b/fs/dcache.c +@@ -1330,8 +1330,11 @@ int d_set_mounted(struct dentry *dentry) + } + spin_lock(&dentry->d_lock); + if (!d_unlinked(dentry)) { +- dentry->d_flags |= DCACHE_MOUNTED; +- ret = 0; ++ ret = -EBUSY; ++ if (!d_mountpoint(dentry)) { ++ dentry->d_flags |= DCACHE_MOUNTED; ++ ret = 0; ++ } + } + spin_unlock(&dentry->d_lock); + out: +diff --git a/fs/namespace.c b/fs/namespace.c +index e6c234b1a645..7cea503ae06d 100644 +--- a/fs/namespace.c ++++ b/fs/namespace.c +@@ -746,26 +746,50 @@ static struct mountpoint *lookup_mountpoint(struct dentry *dentry) + return NULL; + } + +-static struct mountpoint *new_mountpoint(struct dentry *dentry) ++static struct mountpoint *get_mountpoint(struct dentry *dentry) + { +- struct hlist_head *chain = mp_hash(dentry); +- struct mountpoint *mp; ++ struct mountpoint *mp, *new = NULL; + int ret; + +- mp = kmalloc(sizeof(struct mountpoint), GFP_KERNEL); +- if (!mp) ++ if (d_mountpoint(dentry)) { ++mountpoint: ++ read_seqlock_excl(&mount_lock); ++ mp = lookup_mountpoint(dentry); ++ read_sequnlock_excl(&mount_lock); ++ if (mp) ++ goto done; ++ } ++ ++ if (!new) ++ new = kmalloc(sizeof(struct mountpoint), GFP_KERNEL); ++ if (!new) + return ERR_PTR(-ENOMEM); + ++ ++ /* Exactly one processes may set d_mounted */ + ret = d_set_mounted(dentry); +- if (ret) { +- kfree(mp); +- return ERR_PTR(ret); +- } + +- mp->m_dentry = dentry; +- mp->m_count = 1; +- hlist_add_head(&mp->m_hash, chain); +- INIT_HLIST_HEAD(&mp->m_list); ++ /* Someone else set d_mounted? */ ++ if (ret == -EBUSY) ++ goto mountpoint; ++ ++ /* The dentry is not available as a mountpoint? */ ++ mp = ERR_PTR(ret); ++ if (ret) ++ goto done; ++ ++ /* Add the new mountpoint to the hash table */ ++ read_seqlock_excl(&mount_lock); ++ new->m_dentry = dentry; ++ new->m_count = 1; ++ hlist_add_head(&new->m_hash, mp_hash(dentry)); ++ INIT_HLIST_HEAD(&new->m_list); ++ read_sequnlock_excl(&mount_lock); ++ ++ mp = new; ++ new = NULL; ++done: ++ kfree(new); + return mp; + } + +@@ -1568,11 +1592,11 @@ void __detach_mounts(struct dentry *dentry) + struct mount *mnt; + + namespace_lock(); ++ lock_mount_hash(); + mp = lookup_mountpoint(dentry); + if (IS_ERR_OR_NULL(mp)) + goto out_unlock; + +- lock_mount_hash(); + event++; + while (!hlist_empty(&mp->m_list)) { + mnt = hlist_entry(mp->m_list.first, struct mount, mnt_mp_list); +@@ -1582,9 +1606,9 @@ void __detach_mounts(struct dentry *dentry) + } + else umount_tree(mnt, UMOUNT_CONNECTED); + } +- unlock_mount_hash(); + put_mountpoint(mp); + out_unlock: ++ unlock_mount_hash(); + namespace_unlock(); + } + +@@ -2013,9 +2037,7 @@ static struct mountpoint *lock_mount(struct path *path) + namespace_lock(); + mnt = lookup_mnt(path); + if (likely(!mnt)) { +- struct mountpoint *mp = lookup_mountpoint(dentry); +- if (!mp) +- mp = new_mountpoint(dentry); ++ struct mountpoint *mp = get_mountpoint(dentry); + if (IS_ERR(mp)) { + namespace_unlock(); + inode_unlock(dentry->d_inode); +@@ -2034,7 +2056,11 @@ static struct mountpoint *lock_mount(struct path *path) + static void unlock_mount(struct mountpoint *where) + { + struct dentry *dentry = where->m_dentry; ++ ++ read_seqlock_excl(&mount_lock); + put_mountpoint(where); ++ read_sequnlock_excl(&mount_lock); ++ + namespace_unlock(); + inode_unlock(dentry->d_inode); + } +@@ -3110,9 +3136,9 @@ SYSCALL_DEFINE2(pivot_root, const char __user *, new_root, + touch_mnt_namespace(current->nsproxy->mnt_ns); + /* A moved mount should not expire automatically */ + list_del_init(&new_mnt->mnt_expire); ++ put_mountpoint(root_mp); + unlock_mount_hash(); + chroot_fs_refs(&root, &new); +- put_mountpoint(root_mp); + error = 0; + out4: + unlock_mount(old_mp); +diff --git a/fs/nfs/dir.c b/fs/nfs/dir.c +index 5f1af4cd1a33..53e02b8bd9bd 100644 +--- a/fs/nfs/dir.c ++++ b/fs/nfs/dir.c +@@ -477,7 +477,7 @@ void nfs_force_use_readdirplus(struct inode *dir) + { + if (!list_empty(&NFS_I(dir)->open_files)) { + nfs_advise_use_readdirplus(dir); +- nfs_zap_mapping(dir, dir->i_mapping); ++ invalidate_mapping_pages(dir->i_mapping, 0, -1); + } + } + +@@ -886,17 +886,6 @@ int uncached_readdir(nfs_readdir_descriptor_t *desc) + goto out; + } + +-static bool nfs_dir_mapping_need_revalidate(struct inode *dir) +-{ +- struct nfs_inode *nfsi = NFS_I(dir); +- +- if (nfs_attribute_cache_expired(dir)) +- return true; +- if (nfsi->cache_validity & NFS_INO_INVALID_DATA) +- return true; +- return false; +-} +- + /* The file offset position represents the dirent entry number. A + last cookie cache takes care of the common case of reading the + whole directory. +@@ -928,7 +917,7 @@ static int nfs_readdir(struct file *file, struct dir_context *ctx) + desc->decode = NFS_PROTO(inode)->decode_dirent; + desc->plus = nfs_use_readdirplus(inode, ctx) ? 1 : 0; + +- if (ctx->pos == 0 || nfs_dir_mapping_need_revalidate(inode)) ++ if (ctx->pos == 0 || nfs_attribute_cache_expired(inode)) + res = nfs_revalidate_mapping(inode, file->f_mapping); + if (res < 0) + goto out; +diff --git a/fs/nfs/filelayout/filelayoutdev.c b/fs/nfs/filelayout/filelayoutdev.c +index 4946ef40ba87..85ef38f9765f 100644 +--- a/fs/nfs/filelayout/filelayoutdev.c ++++ b/fs/nfs/filelayout/filelayoutdev.c +@@ -283,7 +283,8 @@ nfs4_fl_prepare_ds(struct pnfs_layout_segment *lseg, u32 ds_idx) + s->nfs_client->cl_rpcclient->cl_auth->au_flavor); + + out_test_devid: +- if (filelayout_test_devid_unavailable(devid)) ++ if (ret->ds_clp == NULL || ++ filelayout_test_devid_unavailable(devid)) + ret = NULL; + out: + return ret; +diff --git a/fs/nfs/pnfs.c b/fs/nfs/pnfs.c +index 31b107e196fd..415d7e69bc5e 100644 +--- a/fs/nfs/pnfs.c ++++ b/fs/nfs/pnfs.c +@@ -1257,13 +1257,11 @@ bool pnfs_wait_on_layoutreturn(struct inode *ino, struct rpc_task *task) + * i_lock */ + spin_lock(&ino->i_lock); + lo = nfsi->layout; +- if (lo && test_bit(NFS_LAYOUT_RETURN, &lo->plh_flags)) ++ if (lo && test_bit(NFS_LAYOUT_RETURN, &lo->plh_flags)) { ++ rpc_sleep_on(&NFS_SERVER(ino)->roc_rpcwaitq, task, NULL); + sleep = true; ++ } + spin_unlock(&ino->i_lock); +- +- if (sleep) +- rpc_sleep_on(&NFS_SERVER(ino)->roc_rpcwaitq, task, NULL); +- + return sleep; + } + +diff --git a/fs/nfs/super.c b/fs/nfs/super.c +index 001796bcd6c8..ddce94ce8142 100644 +--- a/fs/nfs/super.c ++++ b/fs/nfs/super.c +@@ -2904,7 +2904,7 @@ module_param(max_session_slots, ushort, 0644); + MODULE_PARM_DESC(max_session_slots, "Maximum number of outstanding NFSv4.1 " + "requests the client will negotiate"); + module_param(max_session_cb_slots, ushort, 0644); +-MODULE_PARM_DESC(max_session_slots, "Maximum number of parallel NFSv4.1 " ++MODULE_PARM_DESC(max_session_cb_slots, "Maximum number of parallel NFSv4.1 " + "callbacks the client will process for a given server"); + module_param(send_implementation_id, ushort, 0644); + MODULE_PARM_DESC(send_implementation_id, +diff --git a/fs/ocfs2/dlmglue.c b/fs/ocfs2/dlmglue.c +index 83d576f6a287..77d1632e905d 100644 +--- a/fs/ocfs2/dlmglue.c ++++ b/fs/ocfs2/dlmglue.c +@@ -3303,6 +3303,16 @@ static int ocfs2_downconvert_lock(struct ocfs2_super *osb, + mlog(ML_BASTS, "lockres %s, level %d => %d\n", lockres->l_name, + lockres->l_level, new_level); + ++ /* ++ * On DLM_LKF_VALBLK, fsdlm behaves differently with o2cb. It always ++ * expects DLM_LKF_VALBLK being set if the LKB has LVB, so that ++ * we can recover correctly from node failure. Otherwise, we may get ++ * invalid LVB in LKB, but without DLM_SBF_VALNOTVALID being set. ++ */ ++ if (!ocfs2_is_o2cb_active() && ++ lockres->l_ops->flags & LOCK_TYPE_USES_LVB) ++ lvb = 1; ++ + if (lvb) + dlm_flags |= DLM_LKF_VALBLK; + +diff --git a/fs/ocfs2/stackglue.c b/fs/ocfs2/stackglue.c +index 52c07346bea3..820359096c7a 100644 +--- a/fs/ocfs2/stackglue.c ++++ b/fs/ocfs2/stackglue.c +@@ -48,6 +48,12 @@ static char ocfs2_hb_ctl_path[OCFS2_MAX_HB_CTL_PATH] = "/sbin/ocfs2_hb_ctl"; + */ + static struct ocfs2_stack_plugin *active_stack; + ++inline int ocfs2_is_o2cb_active(void) ++{ ++ return !strcmp(active_stack->sp_name, OCFS2_STACK_PLUGIN_O2CB); ++} ++EXPORT_SYMBOL_GPL(ocfs2_is_o2cb_active); ++ + static struct ocfs2_stack_plugin *ocfs2_stack_lookup(const char *name) + { + struct ocfs2_stack_plugin *p; +diff --git a/fs/ocfs2/stackglue.h b/fs/ocfs2/stackglue.h +index f2dce10fae54..e3036e1790e8 100644 +--- a/fs/ocfs2/stackglue.h ++++ b/fs/ocfs2/stackglue.h +@@ -298,6 +298,9 @@ void ocfs2_stack_glue_set_max_proto_version(struct ocfs2_protocol_version *max_p + int ocfs2_stack_glue_register(struct ocfs2_stack_plugin *plugin); + void ocfs2_stack_glue_unregister(struct ocfs2_stack_plugin *plugin); + ++/* In ocfs2_downconvert_lock(), we need to know which stack we are using */ ++int ocfs2_is_o2cb_active(void); ++ + extern struct kset *ocfs2_kset; + + #endif /* STACKGLUE_H */ +diff --git a/fs/proc/proc_sysctl.c b/fs/proc/proc_sysctl.c +index 55313d994895..d4e37acd4821 100644 +--- a/fs/proc/proc_sysctl.c ++++ b/fs/proc/proc_sysctl.c +@@ -709,7 +709,7 @@ static int proc_sys_readdir(struct file *file, struct dir_context *ctx) + ctl_dir = container_of(head, struct ctl_dir, header); + + if (!dir_emit_dots(file, ctx)) +- return 0; ++ goto out; + + pos = 2; + +@@ -719,6 +719,7 @@ static int proc_sys_readdir(struct file *file, struct dir_context *ctx) + break; + } + } ++out: + sysctl_head_finish(head); + return 0; + } +diff --git a/fs/xfs/xfs_aops.c b/fs/xfs/xfs_aops.c +index 2693ba84ec25..06763f5cc701 100644 +--- a/fs/xfs/xfs_aops.c ++++ b/fs/xfs/xfs_aops.c +@@ -1158,19 +1158,22 @@ xfs_vm_releasepage( + * block_invalidatepage() can send pages that are still marked dirty + * but otherwise have invalidated buffers. + * +- * We've historically freed buffers on the latter. Instead, quietly +- * filter out all dirty pages to avoid spurious buffer state warnings. +- * This can likely be removed once shrink_active_list() is fixed. ++ * We want to release the latter to avoid unnecessary buildup of the ++ * LRU, skip the former and warn if we've left any lingering ++ * delalloc/unwritten buffers on clean pages. Skip pages with delalloc ++ * or unwritten buffers and warn if the page is not dirty. Otherwise ++ * try to release the buffers. + */ +- if (PageDirty(page)) +- return 0; +- + xfs_count_page_state(page, &delalloc, &unwritten); + +- if (WARN_ON_ONCE(delalloc)) ++ if (delalloc) { ++ WARN_ON_ONCE(!PageDirty(page)); + return 0; +- if (WARN_ON_ONCE(unwritten)) ++ } ++ if (unwritten) { ++ WARN_ON_ONCE(!PageDirty(page)); + return 0; ++ } + + return try_to_free_buffers(page); + } +diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h +index c47c358ba052..f6a816129856 100644 +--- a/include/linux/blkdev.h ++++ b/include/linux/blkdev.h +@@ -1057,7 +1057,7 @@ static inline int blk_pre_runtime_suspend(struct request_queue *q) + static inline void blk_post_runtime_suspend(struct request_queue *q, int err) {} + static inline void blk_pre_runtime_resume(struct request_queue *q) {} + static inline void blk_post_runtime_resume(struct request_queue *q, int err) {} +-extern inline void blk_set_runtime_active(struct request_queue *q) {} ++static inline void blk_set_runtime_active(struct request_queue *q) {} + #endif + + /* +diff --git a/include/linux/efi.h b/include/linux/efi.h +index 2d089487d2da..cba7177cbec7 100644 +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -103,6 +103,7 @@ typedef struct { + + #define EFI_PAGE_SHIFT 12 + #define EFI_PAGE_SIZE (1UL << EFI_PAGE_SHIFT) ++#define EFI_PAGES_MAX (U64_MAX >> EFI_PAGE_SHIFT) + + typedef struct { + u32 type; +@@ -930,6 +931,7 @@ static inline efi_status_t efi_query_variable_store(u32 attributes, + #endif + extern void __iomem *efi_lookup_mapped_addr(u64 phys_addr); + ++extern phys_addr_t __init efi_memmap_alloc(unsigned int num_entries); + extern int __init efi_memmap_init_early(struct efi_memory_map_data *data); + extern int __init efi_memmap_init_late(phys_addr_t addr, unsigned long size); + extern void __init efi_memmap_unmap(void); +diff --git a/include/linux/jump_label_ratelimit.h b/include/linux/jump_label_ratelimit.h +index 089f70f83e97..23da3af459fe 100644 +--- a/include/linux/jump_label_ratelimit.h ++++ b/include/linux/jump_label_ratelimit.h +@@ -14,6 +14,7 @@ struct static_key_deferred { + + #ifdef HAVE_JUMP_LABEL + extern void static_key_slow_dec_deferred(struct static_key_deferred *key); ++extern void static_key_deferred_flush(struct static_key_deferred *key); + extern void + jump_label_rate_limit(struct static_key_deferred *key, unsigned long rl); + +@@ -26,6 +27,10 @@ static inline void static_key_slow_dec_deferred(struct static_key_deferred *key) + STATIC_KEY_CHECK_USE(); + static_key_slow_dec(&key->key); + } ++static inline void static_key_deferred_flush(struct static_key_deferred *key) ++{ ++ STATIC_KEY_CHECK_USE(); ++} + static inline void + jump_label_rate_limit(struct static_key_deferred *key, + unsigned long rl) +diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h +index 61d20c17f3b7..254698856b8f 100644 +--- a/include/linux/memcontrol.h ++++ b/include/linux/memcontrol.h +@@ -120,7 +120,7 @@ struct mem_cgroup_reclaim_iter { + */ + struct mem_cgroup_per_node { + struct lruvec lruvec; +- unsigned long lru_size[NR_LRU_LISTS]; ++ unsigned long lru_zone_size[MAX_NR_ZONES][NR_LRU_LISTS]; + + struct mem_cgroup_reclaim_iter iter[DEF_PRIORITY + 1]; + +@@ -432,7 +432,7 @@ static inline bool mem_cgroup_online(struct mem_cgroup *memcg) + int mem_cgroup_select_victim_node(struct mem_cgroup *memcg); + + void mem_cgroup_update_lru_size(struct lruvec *lruvec, enum lru_list lru, +- int nr_pages); ++ int zid, int nr_pages); + + unsigned long mem_cgroup_node_nr_lru_pages(struct mem_cgroup *memcg, + int nid, unsigned int lru_mask); +@@ -441,9 +441,23 @@ static inline + unsigned long mem_cgroup_get_lru_size(struct lruvec *lruvec, enum lru_list lru) + { + struct mem_cgroup_per_node *mz; ++ unsigned long nr_pages = 0; ++ int zid; + + mz = container_of(lruvec, struct mem_cgroup_per_node, lruvec); +- return mz->lru_size[lru]; ++ for (zid = 0; zid < MAX_NR_ZONES; zid++) ++ nr_pages += mz->lru_zone_size[zid][lru]; ++ return nr_pages; ++} ++ ++static inline ++unsigned long mem_cgroup_get_zone_lru_size(struct lruvec *lruvec, ++ enum lru_list lru, int zone_idx) ++{ ++ struct mem_cgroup_per_node *mz; ++ ++ mz = container_of(lruvec, struct mem_cgroup_per_node, lruvec); ++ return mz->lru_zone_size[zone_idx][lru]; + } + + void mem_cgroup_handle_over_high(void); +@@ -671,6 +685,12 @@ mem_cgroup_get_lru_size(struct lruvec *lruvec, enum lru_list lru) + { + return 0; + } ++static inline ++unsigned long mem_cgroup_get_zone_lru_size(struct lruvec *lruvec, ++ enum lru_list lru, int zone_idx) ++{ ++ return 0; ++} + + static inline unsigned long + mem_cgroup_node_nr_lru_pages(struct mem_cgroup *memcg, +diff --git a/include/linux/mm_inline.h b/include/linux/mm_inline.h +index 71613e8a720f..41d376e7116d 100644 +--- a/include/linux/mm_inline.h ++++ b/include/linux/mm_inline.h +@@ -39,7 +39,7 @@ static __always_inline void update_lru_size(struct lruvec *lruvec, + { + __update_lru_size(lruvec, lru, zid, nr_pages); + #ifdef CONFIG_MEMCG +- mem_cgroup_update_lru_size(lruvec, lru, nr_pages); ++ mem_cgroup_update_lru_size(lruvec, lru, zid, nr_pages); + #endif + } + +diff --git a/include/linux/power/bq27xxx_battery.h b/include/linux/power/bq27xxx_battery.h +index e30deb046156..bed9557b69e7 100644 +--- a/include/linux/power/bq27xxx_battery.h ++++ b/include/linux/power/bq27xxx_battery.h +@@ -4,7 +4,8 @@ + enum bq27xxx_chip { + BQ27000 = 1, /* bq27000, bq27200 */ + BQ27010, /* bq27010, bq27210 */ +- BQ27500, /* bq27500, bq27510, bq27520 */ ++ BQ27500, /* bq27500 */ ++ BQ27510, /* bq27510, bq27520 */ + BQ27530, /* bq27530, bq27531 */ + BQ27541, /* bq27541, bq27542, bq27546, bq27742 */ + BQ27545, /* bq27545 */ +diff --git a/include/linux/swap.h b/include/linux/swap.h +index a56523cefb9b..55ff5593c193 100644 +--- a/include/linux/swap.h ++++ b/include/linux/swap.h +@@ -150,8 +150,9 @@ enum { + SWP_FILE = (1 << 7), /* set after swap_activate success */ + SWP_AREA_DISCARD = (1 << 8), /* single-time swap area discards */ + SWP_PAGE_DISCARD = (1 << 9), /* freed swap page-cluster discards */ ++ SWP_STABLE_WRITES = (1 << 10), /* no overwrite PG_writeback pages */ + /* add others here before... */ +- SWP_SCANNING = (1 << 10), /* refcount in scan_swap_map */ ++ SWP_SCANNING = (1 << 11), /* refcount in scan_swap_map */ + }; + + #define SWAP_CLUSTER_MAX 32UL +diff --git a/include/sound/hdmi-codec.h b/include/sound/hdmi-codec.h +index 530c57bdefa0..915c4357945c 100644 +--- a/include/sound/hdmi-codec.h ++++ b/include/sound/hdmi-codec.h +@@ -36,10 +36,10 @@ struct hdmi_codec_daifmt { + HDMI_AC97, + HDMI_SPDIF, + } fmt; +- int bit_clk_inv:1; +- int frame_clk_inv:1; +- int bit_clk_master:1; +- int frame_clk_master:1; ++ unsigned int bit_clk_inv:1; ++ unsigned int frame_clk_inv:1; ++ unsigned int bit_clk_master:1; ++ unsigned int frame_clk_master:1; + }; + + /* +diff --git a/include/trace/events/btrfs.h b/include/trace/events/btrfs.h +index e030d6f6c19a..6d7fe1169956 100644 +--- a/include/trace/events/btrfs.h ++++ b/include/trace/events/btrfs.h +@@ -1162,22 +1162,26 @@ DECLARE_EVENT_CLASS(btrfs__work, + __entry->func, __entry->ordered_func, __entry->ordered_free) + ); + +-/* For situiations that the work is freed */ ++/* ++ * For situiations when the work is freed, we pass fs_info and a tag that that ++ * matches address of the work structure so it can be paired with the ++ * scheduling event. ++ */ + DECLARE_EVENT_CLASS(btrfs__work__done, + +- TP_PROTO(struct btrfs_work *work), ++ TP_PROTO(struct btrfs_fs_info *fs_info, void *wtag), + +- TP_ARGS(work), ++ TP_ARGS(fs_info, wtag), + + TP_STRUCT__entry_btrfs( +- __field( void *, work ) ++ __field( void *, wtag ) + ), + +- TP_fast_assign_btrfs(btrfs_work_owner(work), +- __entry->work = work; ++ TP_fast_assign_btrfs(fs_info, ++ __entry->wtag = wtag; + ), + +- TP_printk_btrfs("work->%p", __entry->work) ++ TP_printk_btrfs("work->%p", __entry->wtag) + ); + + DEFINE_EVENT(btrfs__work, btrfs_work_queued, +@@ -1196,9 +1200,9 @@ DEFINE_EVENT(btrfs__work, btrfs_work_sched, + + DEFINE_EVENT(btrfs__work__done, btrfs_all_work_done, + +- TP_PROTO(struct btrfs_work *work), ++ TP_PROTO(struct btrfs_fs_info *fs_info, void *wtag), + +- TP_ARGS(work) ++ TP_ARGS(fs_info, wtag) + ); + + DEFINE_EVENT(btrfs__work, btrfs_ordered_sched, +diff --git a/kernel/jump_label.c b/kernel/jump_label.c +index 93ad6c1fb9b6..a9b8cf500591 100644 +--- a/kernel/jump_label.c ++++ b/kernel/jump_label.c +@@ -182,6 +182,13 @@ void static_key_slow_dec_deferred(struct static_key_deferred *key) + } + EXPORT_SYMBOL_GPL(static_key_slow_dec_deferred); + ++void static_key_deferred_flush(struct static_key_deferred *key) ++{ ++ STATIC_KEY_CHECK_USE(); ++ flush_delayed_work(&key->work); ++} ++EXPORT_SYMBOL_GPL(static_key_deferred_flush); ++ + void jump_label_rate_limit(struct static_key_deferred *key, + unsigned long rl) + { +diff --git a/kernel/memremap.c b/kernel/memremap.c +index b501e390bb34..9ecedc28b928 100644 +--- a/kernel/memremap.c ++++ b/kernel/memremap.c +@@ -246,7 +246,9 @@ static void devm_memremap_pages_release(struct device *dev, void *data) + /* pages are dead and unused, undo the arch mapping */ + align_start = res->start & ~(SECTION_SIZE - 1); + align_size = ALIGN(resource_size(res), SECTION_SIZE); ++ mem_hotplug_begin(); + arch_remove_memory(align_start, align_size); ++ mem_hotplug_done(); + untrack_pfn(NULL, PHYS_PFN(align_start), align_size); + pgmap_radix_release(res); + dev_WARN_ONCE(dev, pgmap->altmap && pgmap->altmap->alloc, +@@ -358,7 +360,9 @@ void *devm_memremap_pages(struct device *dev, struct resource *res, + if (error) + goto err_pfn_remap; + ++ mem_hotplug_begin(); + error = arch_add_memory(nid, align_start, align_size, true); ++ mem_hotplug_done(); + if (error) + goto err_add_memory; + +diff --git a/kernel/pid_namespace.c b/kernel/pid_namespace.c +index df9e8e9e0be7..eef2ce968636 100644 +--- a/kernel/pid_namespace.c ++++ b/kernel/pid_namespace.c +@@ -151,8 +151,12 @@ static struct pid_namespace *create_pid_namespace(struct user_namespace *user_ns + + static void delayed_free_pidns(struct rcu_head *p) + { +- kmem_cache_free(pid_ns_cachep, +- container_of(p, struct pid_namespace, rcu)); ++ struct pid_namespace *ns = container_of(p, struct pid_namespace, rcu); ++ ++ dec_pid_namespaces(ns->ucounts); ++ put_user_ns(ns->user_ns); ++ ++ kmem_cache_free(pid_ns_cachep, ns); + } + + static void destroy_pid_namespace(struct pid_namespace *ns) +@@ -162,8 +166,6 @@ static void destroy_pid_namespace(struct pid_namespace *ns) + ns_free_inum(&ns->ns); + for (i = 0; i < PIDMAP_ENTRIES; i++) + kfree(ns->pidmap[i].page); +- dec_pid_namespaces(ns->ucounts); +- put_user_ns(ns->user_ns); + call_rcu(&ns->rcu, delayed_free_pidns); + } + +diff --git a/lib/iov_iter.c b/lib/iov_iter.c +index f2bd21b93dfc..efb0b4d267a1 100644 +--- a/lib/iov_iter.c ++++ b/lib/iov_iter.c +@@ -678,43 +678,50 @@ size_t iov_iter_copy_from_user_atomic(struct page *page, + } + EXPORT_SYMBOL(iov_iter_copy_from_user_atomic); + ++static inline void pipe_truncate(struct iov_iter *i) ++{ ++ struct pipe_inode_info *pipe = i->pipe; ++ if (pipe->nrbufs) { ++ size_t off = i->iov_offset; ++ int idx = i->idx; ++ int nrbufs = (idx - pipe->curbuf) & (pipe->buffers - 1); ++ if (off) { ++ pipe->bufs[idx].len = off - pipe->bufs[idx].offset; ++ idx = next_idx(idx, pipe); ++ nrbufs++; ++ } ++ while (pipe->nrbufs > nrbufs) { ++ pipe_buf_release(pipe, &pipe->bufs[idx]); ++ idx = next_idx(idx, pipe); ++ pipe->nrbufs--; ++ } ++ } ++} ++ + static void pipe_advance(struct iov_iter *i, size_t size) + { + struct pipe_inode_info *pipe = i->pipe; +- struct pipe_buffer *buf; +- int idx = i->idx; +- size_t off = i->iov_offset, orig_sz; +- + if (unlikely(i->count < size)) + size = i->count; +- orig_sz = size; +- + if (size) { ++ struct pipe_buffer *buf; ++ size_t off = i->iov_offset, left = size; ++ int idx = i->idx; + if (off) /* make it relative to the beginning of buffer */ +- size += off - pipe->bufs[idx].offset; ++ left += off - pipe->bufs[idx].offset; + while (1) { + buf = &pipe->bufs[idx]; +- if (size <= buf->len) ++ if (left <= buf->len) + break; +- size -= buf->len; ++ left -= buf->len; + idx = next_idx(idx, pipe); + } +- buf->len = size; + i->idx = idx; +- off = i->iov_offset = buf->offset + size; +- } +- if (off) +- idx = next_idx(idx, pipe); +- if (pipe->nrbufs) { +- int unused = (pipe->curbuf + pipe->nrbufs) & (pipe->buffers - 1); +- /* [curbuf,unused) is in use. Free [idx,unused) */ +- while (idx != unused) { +- pipe_buf_release(pipe, &pipe->bufs[idx]); +- idx = next_idx(idx, pipe); +- pipe->nrbufs--; +- } ++ i->iov_offset = buf->offset + left; + } +- i->count -= orig_sz; ++ i->count -= size; ++ /* ... and discard everything past that point */ ++ pipe_truncate(i); + } + + void iov_iter_advance(struct iov_iter *i, size_t size) +@@ -774,6 +781,7 @@ void iov_iter_pipe(struct iov_iter *i, int direction, + size_t count) + { + BUG_ON(direction != ITER_PIPE); ++ WARN_ON(pipe->nrbufs == pipe->buffers); + i->type = direction; + i->pipe = pipe; + i->idx = (pipe->curbuf + pipe->nrbufs) & (pipe->buffers - 1); +diff --git a/mm/filemap.c b/mm/filemap.c +index 9a50acecc473..779801092ef1 100644 +--- a/mm/filemap.c ++++ b/mm/filemap.c +@@ -144,7 +144,7 @@ static int page_cache_tree_insert(struct address_space *mapping, + workingset_node_pages_dec(node); + /* Wakeup waiters for exceptional entry lock */ + dax_wake_mapping_entry_waiter(mapping, page->index, +- false); ++ true); + } + } + radix_tree_replace_slot(slot, page); +diff --git a/mm/huge_memory.c b/mm/huge_memory.c +index d4a6e4001512..8ca40b70beae 100644 +--- a/mm/huge_memory.c ++++ b/mm/huge_memory.c +@@ -872,15 +872,17 @@ void huge_pmd_set_accessed(struct fault_env *fe, pmd_t orig_pmd) + { + pmd_t entry; + unsigned long haddr; ++ bool write = fe->flags & FAULT_FLAG_WRITE; + + fe->ptl = pmd_lock(fe->vma->vm_mm, fe->pmd); + if (unlikely(!pmd_same(*fe->pmd, orig_pmd))) + goto unlock; + + entry = pmd_mkyoung(orig_pmd); ++ if (write) ++ entry = pmd_mkdirty(entry); + haddr = fe->address & HPAGE_PMD_MASK; +- if (pmdp_set_access_flags(fe->vma, haddr, fe->pmd, entry, +- fe->flags & FAULT_FLAG_WRITE)) ++ if (pmdp_set_access_flags(fe->vma, haddr, fe->pmd, entry, write)) + update_mmu_cache_pmd(fe->vma, fe->address, fe->pmd); + + unlock: +diff --git a/mm/hugetlb.c b/mm/hugetlb.c +index 23aec01836aa..b6adedbafaf5 100644 +--- a/mm/hugetlb.c ++++ b/mm/hugetlb.c +@@ -1773,23 +1773,32 @@ static int gather_surplus_pages(struct hstate *h, int delta) + } + + /* +- * When releasing a hugetlb pool reservation, any surplus pages that were +- * allocated to satisfy the reservation must be explicitly freed if they were +- * never used. +- * Called with hugetlb_lock held. ++ * This routine has two main purposes: ++ * 1) Decrement the reservation count (resv_huge_pages) by the value passed ++ * in unused_resv_pages. This corresponds to the prior adjustments made ++ * to the associated reservation map. ++ * 2) Free any unused surplus pages that may have been allocated to satisfy ++ * the reservation. As many as unused_resv_pages may be freed. ++ * ++ * Called with hugetlb_lock held. However, the lock could be dropped (and ++ * reacquired) during calls to cond_resched_lock. Whenever dropping the lock, ++ * we must make sure nobody else can claim pages we are in the process of ++ * freeing. Do this by ensuring resv_huge_page always is greater than the ++ * number of huge pages we plan to free when dropping the lock. + */ + static void return_unused_surplus_pages(struct hstate *h, + unsigned long unused_resv_pages) + { + unsigned long nr_pages; + +- /* Uncommit the reservation */ +- h->resv_huge_pages -= unused_resv_pages; +- + /* Cannot return gigantic pages currently */ + if (hstate_is_gigantic(h)) +- return; ++ goto out; + ++ /* ++ * Part (or even all) of the reservation could have been backed ++ * by pre-allocated pages. Only free surplus pages. ++ */ + nr_pages = min(unused_resv_pages, h->surplus_huge_pages); + + /* +@@ -1799,12 +1808,22 @@ static void return_unused_surplus_pages(struct hstate *h, + * when the nodes with surplus pages have no free pages. + * free_pool_huge_page() will balance the the freed pages across the + * on-line nodes with memory and will handle the hstate accounting. ++ * ++ * Note that we decrement resv_huge_pages as we free the pages. If ++ * we drop the lock, resv_huge_pages will still be sufficiently large ++ * to cover subsequent pages we may free. + */ + while (nr_pages--) { ++ h->resv_huge_pages--; ++ unused_resv_pages--; + if (!free_pool_huge_page(h, &node_states[N_MEMORY], 1)) +- break; ++ goto out; + cond_resched_lock(&hugetlb_lock); + } ++ ++out: ++ /* Fully uncommit the reservation */ ++ h->resv_huge_pages -= unused_resv_pages; + } + + +diff --git a/mm/memcontrol.c b/mm/memcontrol.c +index 0f870ba43942..d536a9daa511 100644 +--- a/mm/memcontrol.c ++++ b/mm/memcontrol.c +@@ -625,8 +625,8 @@ static void mem_cgroup_charge_statistics(struct mem_cgroup *memcg, + unsigned long mem_cgroup_node_nr_lru_pages(struct mem_cgroup *memcg, + int nid, unsigned int lru_mask) + { ++ struct lruvec *lruvec = mem_cgroup_lruvec(NODE_DATA(nid), memcg); + unsigned long nr = 0; +- struct mem_cgroup_per_node *mz; + enum lru_list lru; + + VM_BUG_ON((unsigned)nid >= nr_node_ids); +@@ -634,8 +634,7 @@ unsigned long mem_cgroup_node_nr_lru_pages(struct mem_cgroup *memcg, + for_each_lru(lru) { + if (!(BIT(lru) & lru_mask)) + continue; +- mz = mem_cgroup_nodeinfo(memcg, nid); +- nr += mz->lru_size[lru]; ++ nr += mem_cgroup_get_lru_size(lruvec, lru); + } + return nr; + } +@@ -1002,6 +1001,7 @@ struct lruvec *mem_cgroup_page_lruvec(struct page *page, struct pglist_data *pgd + * mem_cgroup_update_lru_size - account for adding or removing an lru page + * @lruvec: mem_cgroup per zone lru vector + * @lru: index of lru list the page is sitting on ++ * @zid: zone id of the accounted pages + * @nr_pages: positive when adding or negative when removing + * + * This function must be called under lru_lock, just before a page is added +@@ -1009,27 +1009,25 @@ struct lruvec *mem_cgroup_page_lruvec(struct page *page, struct pglist_data *pgd + * so as to allow it to check that lru_size 0 is consistent with list_empty). + */ + void mem_cgroup_update_lru_size(struct lruvec *lruvec, enum lru_list lru, +- int nr_pages) ++ int zid, int nr_pages) + { + struct mem_cgroup_per_node *mz; + unsigned long *lru_size; + long size; +- bool empty; + + if (mem_cgroup_disabled()) + return; + + mz = container_of(lruvec, struct mem_cgroup_per_node, lruvec); +- lru_size = mz->lru_size + lru; +- empty = list_empty(lruvec->lists + lru); ++ lru_size = &mz->lru_zone_size[zid][lru]; + + if (nr_pages < 0) + *lru_size += nr_pages; + + size = *lru_size; +- if (WARN_ONCE(size < 0 || empty != !size, +- "%s(%p, %d, %d): lru_size %ld but %sempty\n", +- __func__, lruvec, lru, nr_pages, size, empty ? "" : "not ")) { ++ if (WARN_ONCE(size < 0, ++ "%s(%p, %d, %d): lru_size %ld\n", ++ __func__, lruvec, lru, nr_pages, size)) { + VM_BUG_ON(1); + *lru_size = 0; + } +diff --git a/mm/slab.c b/mm/slab.c +index 0b0550ca85b4..bd878f051a3b 100644 +--- a/mm/slab.c ++++ b/mm/slab.c +@@ -2475,7 +2475,6 @@ union freelist_init_state { + unsigned int pos; + unsigned int *list; + unsigned int count; +- unsigned int rand; + }; + struct rnd_state rnd_state; + }; +@@ -2501,8 +2500,7 @@ static bool freelist_state_initialize(union freelist_init_state *state, + } else { + state->list = cachep->random_seq; + state->count = count; +- state->pos = 0; +- state->rand = rand; ++ state->pos = rand % count; + ret = true; + } + return ret; +@@ -2511,7 +2509,9 @@ static bool freelist_state_initialize(union freelist_init_state *state, + /* Get the next entry on the list and randomize it using a random shift */ + static freelist_idx_t next_random_slot(union freelist_init_state *state) + { +- return (state->list[state->pos++] + state->rand) % state->count; ++ if (state->pos >= state->count) ++ state->pos = 0; ++ return state->list[state->pos++]; + } + + /* Swap two freelist entries */ +diff --git a/mm/swapfile.c b/mm/swapfile.c +index f30438970cd1..d76b2a18f044 100644 +--- a/mm/swapfile.c ++++ b/mm/swapfile.c +@@ -943,11 +943,25 @@ bool reuse_swap_page(struct page *page, int *total_mapcount) + count = page_trans_huge_mapcount(page, total_mapcount); + if (count <= 1 && PageSwapCache(page)) { + count += page_swapcount(page); +- if (count == 1 && !PageWriteback(page)) { ++ if (count != 1) ++ goto out; ++ if (!PageWriteback(page)) { + delete_from_swap_cache(page); + SetPageDirty(page); ++ } else { ++ swp_entry_t entry; ++ struct swap_info_struct *p; ++ ++ entry.val = page_private(page); ++ p = swap_info_get(entry); ++ if (p->flags & SWP_STABLE_WRITES) { ++ spin_unlock(&p->lock); ++ return false; ++ } ++ spin_unlock(&p->lock); + } + } ++out: + return count <= 1; + } + +@@ -2449,6 +2463,10 @@ SYSCALL_DEFINE2(swapon, const char __user *, specialfile, int, swap_flags) + error = -ENOMEM; + goto bad_swap; + } ++ ++ if (bdi_cap_stable_pages_required(inode_to_bdi(inode))) ++ p->flags |= SWP_STABLE_WRITES; ++ + if (p->bdev && blk_queue_nonrot(bdev_get_queue(p->bdev))) { + int cpu; + +diff --git a/mm/vmscan.c b/mm/vmscan.c +index c4abf08861d2..fa30010a5277 100644 +--- a/mm/vmscan.c ++++ b/mm/vmscan.c +@@ -242,6 +242,16 @@ unsigned long lruvec_lru_size(struct lruvec *lruvec, enum lru_list lru) + return node_page_state(lruvec_pgdat(lruvec), NR_LRU_BASE + lru); + } + ++unsigned long lruvec_zone_lru_size(struct lruvec *lruvec, enum lru_list lru, ++ int zone_idx) ++{ ++ if (!mem_cgroup_disabled()) ++ return mem_cgroup_get_zone_lru_size(lruvec, lru, zone_idx); ++ ++ return zone_page_state(&lruvec_pgdat(lruvec)->node_zones[zone_idx], ++ NR_ZONE_LRU_BASE + lru); ++} ++ + /* + * Add a shrinker callback to be called from the vm. + */ +@@ -1382,8 +1392,7 @@ int __isolate_lru_page(struct page *page, isolate_mode_t mode) + * be complete before mem_cgroup_update_lru_size due to a santity check. + */ + static __always_inline void update_lru_sizes(struct lruvec *lruvec, +- enum lru_list lru, unsigned long *nr_zone_taken, +- unsigned long nr_taken) ++ enum lru_list lru, unsigned long *nr_zone_taken) + { + int zid; + +@@ -1392,11 +1401,11 @@ static __always_inline void update_lru_sizes(struct lruvec *lruvec, + continue; + + __update_lru_size(lruvec, lru, zid, -nr_zone_taken[zid]); +- } +- + #ifdef CONFIG_MEMCG +- mem_cgroup_update_lru_size(lruvec, lru, -nr_taken); ++ mem_cgroup_update_lru_size(lruvec, lru, zid, -nr_zone_taken[zid]); + #endif ++ } ++ + } + + /* +@@ -1501,7 +1510,7 @@ static unsigned long isolate_lru_pages(unsigned long nr_to_scan, + *nr_scanned = scan; + trace_mm_vmscan_lru_isolate(sc->reclaim_idx, sc->order, nr_to_scan, scan, + nr_taken, mode, is_file_lru(lru)); +- update_lru_sizes(lruvec, lru, nr_zone_taken, nr_taken); ++ update_lru_sizes(lruvec, lru, nr_zone_taken); + return nr_taken; + } + +@@ -2047,10 +2056,8 @@ static bool inactive_list_is_low(struct lruvec *lruvec, bool file, + if (!managed_zone(zone)) + continue; + +- inactive_zone = zone_page_state(zone, +- NR_ZONE_LRU_BASE + (file * LRU_FILE)); +- active_zone = zone_page_state(zone, +- NR_ZONE_LRU_BASE + (file * LRU_FILE) + LRU_ACTIVE); ++ inactive_zone = lruvec_zone_lru_size(lruvec, file * LRU_FILE, zid); ++ active_zone = lruvec_zone_lru_size(lruvec, (file * LRU_FILE) + LRU_ACTIVE, zid); + + inactive -= min(inactive, inactive_zone); + active -= min(active, active_zone); +diff --git a/net/bridge/br_netfilter_hooks.c b/net/bridge/br_netfilter_hooks.c +index 2fe9345c1407..7fbdbae58e65 100644 +--- a/net/bridge/br_netfilter_hooks.c ++++ b/net/bridge/br_netfilter_hooks.c +@@ -399,7 +399,7 @@ static int br_nf_pre_routing_finish(struct net *net, struct sock *sk, struct sk_ + br_nf_hook_thresh(NF_BR_PRE_ROUTING, + net, sk, skb, skb->dev, + NULL, +- br_nf_pre_routing_finish); ++ br_nf_pre_routing_finish_bridge); + return 0; + } + ether_addr_copy(eth_hdr(skb)->h_dest, dev->dev_addr); +diff --git a/net/iucv/af_iucv.c b/net/iucv/af_iucv.c +index 02b45a8e8b35..91cbbf1c3f82 100644 +--- a/net/iucv/af_iucv.c ++++ b/net/iucv/af_iucv.c +@@ -1036,7 +1036,8 @@ static int iucv_sock_sendmsg(struct socket *sock, struct msghdr *msg, + { + struct sock *sk = sock->sk; + struct iucv_sock *iucv = iucv_sk(sk); +- size_t headroom, linear; ++ size_t headroom = 0; ++ size_t linear; + struct sk_buff *skb; + struct iucv_message txmsg = {0}; + struct cmsghdr *cmsg; +@@ -1114,18 +1115,20 @@ static int iucv_sock_sendmsg(struct socket *sock, struct msghdr *msg, + * this is fine for SOCK_SEQPACKET (unless we want to support + * segmented records using the MSG_EOR flag), but + * for SOCK_STREAM we might want to improve it in future */ +- headroom = (iucv->transport == AF_IUCV_TRANS_HIPER) +- ? sizeof(struct af_iucv_trans_hdr) + ETH_HLEN : 0; +- if (headroom + len < PAGE_SIZE) { ++ if (iucv->transport == AF_IUCV_TRANS_HIPER) { ++ headroom = sizeof(struct af_iucv_trans_hdr) + ETH_HLEN; + linear = len; + } else { +- /* In nonlinear "classic" iucv skb, +- * reserve space for iucv_array +- */ +- if (iucv->transport != AF_IUCV_TRANS_HIPER) +- headroom += sizeof(struct iucv_array) * +- (MAX_SKB_FRAGS + 1); +- linear = PAGE_SIZE - headroom; ++ if (len < PAGE_SIZE) { ++ linear = len; ++ } else { ++ /* In nonlinear "classic" iucv skb, ++ * reserve space for iucv_array ++ */ ++ headroom = sizeof(struct iucv_array) * ++ (MAX_SKB_FRAGS + 1); ++ linear = PAGE_SIZE - headroom; ++ } + } + skb = sock_alloc_send_pskb(sk, headroom + linear, len - linear, + noblock, &err, 0); +diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c +index a2dd6edaae37..1b3c18c2c1ec 100644 +--- a/net/wireless/nl80211.c ++++ b/net/wireless/nl80211.c +@@ -14402,13 +14402,17 @@ static int nl80211_netlink_notify(struct notifier_block * nb, + + list_for_each_entry_rcu(rdev, &cfg80211_rdev_list, list) { + bool schedule_destroy_work = false; +- bool schedule_scan_stop = false; + struct cfg80211_sched_scan_request *sched_scan_req = + rcu_dereference(rdev->sched_scan_req); + + if (sched_scan_req && notify->portid && +- sched_scan_req->owner_nlportid == notify->portid) +- schedule_scan_stop = true; ++ sched_scan_req->owner_nlportid == notify->portid) { ++ sched_scan_req->owner_nlportid = 0; ++ ++ if (rdev->ops->sched_scan_stop && ++ rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_SCHED_SCAN) ++ schedule_work(&rdev->sched_scan_stop_wk); ++ } + + list_for_each_entry_rcu(wdev, &rdev->wiphy.wdev_list, list) { + cfg80211_mlme_unregister_socket(wdev, notify->portid); +@@ -14439,12 +14443,6 @@ static int nl80211_netlink_notify(struct notifier_block * nb, + spin_unlock(&rdev->destroy_list_lock); + schedule_work(&rdev->destroy_work); + } +- } else if (schedule_scan_stop) { +- sched_scan_req->owner_nlportid = 0; +- +- if (rdev->ops->sched_scan_stop && +- rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_SCHED_SCAN) +- schedule_work(&rdev->sched_scan_stop_wk); + } + } + +diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile +index f770dba2a6f6..a899ef81c705 100644 +--- a/tools/testing/selftests/Makefile ++++ b/tools/testing/selftests/Makefile +@@ -87,7 +87,7 @@ ifdef INSTALL_PATH + done; + + @# Ask all targets to emit their test scripts +- echo "#!/bin/bash" > $(ALL_SCRIPT) ++ echo "#!/bin/sh" > $(ALL_SCRIPT) + echo "cd \$$(dirname \$$0)" >> $(ALL_SCRIPT) + echo "ROOT=\$$PWD" >> $(ALL_SCRIPT) + +diff --git a/tools/testing/selftests/net/run_netsocktests b/tools/testing/selftests/net/run_netsocktests +index c09a682df56a..16058bbea7a8 100755 +--- a/tools/testing/selftests/net/run_netsocktests ++++ b/tools/testing/selftests/net/run_netsocktests +@@ -1,4 +1,4 @@ +-#!/bin/bash ++#!/bin/sh + + echo "--------------------" + echo "running socket test" +diff --git a/virt/lib/irqbypass.c b/virt/lib/irqbypass.c +index 52abac4bb6a2..6d2fcd6fcb25 100644 +--- a/virt/lib/irqbypass.c ++++ b/virt/lib/irqbypass.c +@@ -195,7 +195,7 @@ int irq_bypass_register_consumer(struct irq_bypass_consumer *consumer) + mutex_lock(&lock); + + list_for_each_entry(tmp, &consumers, node) { +- if (tmp->token == consumer->token) { ++ if (tmp->token == consumer->token || tmp == consumer) { + mutex_unlock(&lock); + module_put(THIS_MODULE); + return -EBUSY; +@@ -245,7 +245,7 @@ void irq_bypass_unregister_consumer(struct irq_bypass_consumer *consumer) + mutex_lock(&lock); + + list_for_each_entry(tmp, &consumers, node) { +- if (tmp->token != consumer->token) ++ if (tmp != consumer) + continue; + + list_for_each_entry(producer, &producers, node) {