From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from lists.gentoo.org (pigeon.gentoo.org [208.92.234.80]) by finch.gentoo.org (Postfix) with ESMTP id 262901387B1 for ; Mon, 21 Sep 2015 22:16:17 +0000 (UTC) Received: from pigeon.gentoo.org (localhost [127.0.0.1]) by pigeon.gentoo.org (Postfix) with SMTP id 46FC0E07F1; Mon, 21 Sep 2015 22:16:15 +0000 (UTC) Received: from smtp.gentoo.org (smtp.gentoo.org [140.211.166.183]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by pigeon.gentoo.org (Postfix) with ESMTPS id 98E8DE07F1 for ; Mon, 21 Sep 2015 22:16:14 +0000 (UTC) Received: from oystercatcher.gentoo.org (unknown [IPv6:2a01:4f8:202:4333:225:90ff:fed9:fc84]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id 1AF5234073B for ; Mon, 21 Sep 2015 22:16:13 +0000 (UTC) Received: from localhost.localdomain (localhost [127.0.0.1]) by oystercatcher.gentoo.org (Postfix) with ESMTP id 8803E16C for ; Mon, 21 Sep 2015 22:16:11 +0000 (UTC) From: "Mike Pagano" To: gentoo-commits@lists.gentoo.org Content-Transfer-Encoding: 8bit Content-type: text/plain; charset=UTF-8 Reply-To: gentoo-dev@lists.gentoo.org, "Mike Pagano" Message-ID: <1442873765.8fe6c9dc74e88b375ffa56515338a480f17ef3d1.mpagano@gentoo> Subject: [gentoo-commits] proj/linux-patches:4.1 commit in: / X-VCS-Repository: proj/linux-patches X-VCS-Files: 0000_README 1007_linux-4.1.8.patch X-VCS-Directories: / X-VCS-Committer: mpagano X-VCS-Committer-Name: Mike Pagano X-VCS-Revision: 8fe6c9dc74e88b375ffa56515338a480f17ef3d1 X-VCS-Branch: 4.1 Date: Mon, 21 Sep 2015 22:16:11 +0000 (UTC) Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-commits@lists.gentoo.org X-Archives-Salt: 2d730324-596f-41bc-81ab-8fb851a18f1b X-Archives-Hash: 2c16af85fa7494b29d1fde606a2eb59d commit: 8fe6c9dc74e88b375ffa56515338a480f17ef3d1 Author: Mike Pagano gentoo org> AuthorDate: Mon Sep 21 22:16:05 2015 +0000 Commit: Mike Pagano gentoo org> CommitDate: Mon Sep 21 22:16:05 2015 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=8fe6c9dc Linux patch 4.1.8 0000_README | 4 + 1007_linux-4.1.8.patch | 4367 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 4371 insertions(+) diff --git a/0000_README b/0000_README index ad474e3..b88684d 100644 --- a/0000_README +++ b/0000_README @@ -71,6 +71,10 @@ Patch: 1006_linux-4.1.7.patch From: http://www.kernel.org Desc: Linux 4.1.7 +Patch: 1007_linux-4.1.8.patch +From: http://www.kernel.org +Desc: Linux 4.1.8 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1007_linux-4.1.8.patch b/1007_linux-4.1.8.patch new file mode 100644 index 0000000..a41c476 --- /dev/null +++ b/1007_linux-4.1.8.patch @@ -0,0 +1,4367 @@ +diff --git a/Documentation/ABI/testing/configfs-usb-gadget-loopback b/Documentation/ABI/testing/configfs-usb-gadget-loopback +index 9aae5bfb9908..06beefbcf061 100644 +--- a/Documentation/ABI/testing/configfs-usb-gadget-loopback ++++ b/Documentation/ABI/testing/configfs-usb-gadget-loopback +@@ -5,4 +5,4 @@ Description: + The attributes: + + qlen - depth of loopback queue +- bulk_buflen - buffer length ++ buflen - buffer length +diff --git a/Documentation/ABI/testing/configfs-usb-gadget-sourcesink b/Documentation/ABI/testing/configfs-usb-gadget-sourcesink +index 29477c319f61..bc7ff731aa0c 100644 +--- a/Documentation/ABI/testing/configfs-usb-gadget-sourcesink ++++ b/Documentation/ABI/testing/configfs-usb-gadget-sourcesink +@@ -9,4 +9,4 @@ Description: + isoc_maxpacket - 0 - 1023 (fs), 0 - 1024 (hs/ss) + isoc_mult - 0..2 (hs/ss only) + isoc_maxburst - 0..15 (ss only) +- qlen - buffer length ++ buflen - buffer length +diff --git a/Documentation/usb/gadget-testing.txt b/Documentation/usb/gadget-testing.txt +index f45b2bf4b41d..820664af8f6a 100644 +--- a/Documentation/usb/gadget-testing.txt ++++ b/Documentation/usb/gadget-testing.txt +@@ -237,9 +237,7 @@ Testing the LOOPBACK function + ----------------------------- + + device: run the gadget +-host: test-usb +- +-http://www.linux-usb.org/usbtest/testusb.c ++host: test-usb (tools/usb/testusb.c) + + 8. MASS STORAGE function + ======================== +@@ -588,9 +586,8 @@ Testing the SOURCESINK function + ------------------------------- + + device: run the gadget +-host: test-usb ++host: test-usb (tools/usb/testusb.c) + +-http://www.linux-usb.org/usbtest/testusb.c + + 16. UAC1 function + ================= +diff --git a/Makefile b/Makefile +index b8591e5f79b8..dbf3baa5fabb 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,6 +1,6 @@ + VERSION = 4 + PATCHLEVEL = 1 +-SUBLEVEL = 7 ++SUBLEVEL = 8 + EXTRAVERSION = + NAME = Series 4800 + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 45df48ba0b12..19f4cc634b0e 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -538,6 +538,7 @@ config ARCH_ORION5X + select MVEBU_MBUS + select PCI + select PLAT_ORION_LEGACY ++ select MULTI_IRQ_HANDLER + help + Support for the following Marvell Orion 5x series SoCs: + Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), +diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts +index 0b9906880c0c..75aba40c69e1 100644 +--- a/arch/arm/boot/dts/exynos3250-rinato.dts ++++ b/arch/arm/boot/dts/exynos3250-rinato.dts +@@ -181,7 +181,7 @@ + + display-timings { + timing-0 { +- clock-frequency = <0>; ++ clock-frequency = <4600000>; + hactive = <320>; + vactive = <320>; + hfront-porch = <1>; +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 165968d51d8f..8eca5878a877 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -584,7 +584,7 @@ + compatible = "rockchip,rk3288-wdt", "snps,dw-wdt"; + reg = <0xff800000 0x100>; + clocks = <&cru PCLK_WDT>; +- interrupts = ; ++ interrupts = ; + status = "disabled"; + }; + +diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c +index 57d5df0c1fbd..7581e036bda6 100644 +--- a/arch/arm/mach-omap2/clockdomains7xx_data.c ++++ b/arch/arm/mach-omap2/clockdomains7xx_data.c +@@ -331,7 +331,7 @@ static struct clockdomain l4per2_7xx_clkdm = { + .dep_bit = DRA7XX_L4PER2_STATDEP_SHIFT, + .wkdep_srcs = l4per2_wkup_sleep_deps, + .sleepdep_srcs = l4per2_wkup_sleep_deps, +- .flags = CLKDM_CAN_HWSUP_SWSUP, ++ .flags = CLKDM_CAN_SWSUP, + }; + + static struct clockdomain mpu0_7xx_clkdm = { +diff --git a/arch/arm/mach-orion5x/include/mach/irqs.h b/arch/arm/mach-orion5x/include/mach/irqs.h +index a6fa9d8f12d8..2431d9923427 100644 +--- a/arch/arm/mach-orion5x/include/mach/irqs.h ++++ b/arch/arm/mach-orion5x/include/mach/irqs.h +@@ -16,42 +16,42 @@ + /* + * Orion Main Interrupt Controller + */ +-#define IRQ_ORION5X_BRIDGE 0 +-#define IRQ_ORION5X_DOORBELL_H2C 1 +-#define IRQ_ORION5X_DOORBELL_C2H 2 +-#define IRQ_ORION5X_UART0 3 +-#define IRQ_ORION5X_UART1 4 +-#define IRQ_ORION5X_I2C 5 +-#define IRQ_ORION5X_GPIO_0_7 6 +-#define IRQ_ORION5X_GPIO_8_15 7 +-#define IRQ_ORION5X_GPIO_16_23 8 +-#define IRQ_ORION5X_GPIO_24_31 9 +-#define IRQ_ORION5X_PCIE0_ERR 10 +-#define IRQ_ORION5X_PCIE0_INT 11 +-#define IRQ_ORION5X_USB1_CTRL 12 +-#define IRQ_ORION5X_DEV_BUS_ERR 14 +-#define IRQ_ORION5X_PCI_ERR 15 +-#define IRQ_ORION5X_USB_BR_ERR 16 +-#define IRQ_ORION5X_USB0_CTRL 17 +-#define IRQ_ORION5X_ETH_RX 18 +-#define IRQ_ORION5X_ETH_TX 19 +-#define IRQ_ORION5X_ETH_MISC 20 +-#define IRQ_ORION5X_ETH_SUM 21 +-#define IRQ_ORION5X_ETH_ERR 22 +-#define IRQ_ORION5X_IDMA_ERR 23 +-#define IRQ_ORION5X_IDMA_0 24 +-#define IRQ_ORION5X_IDMA_1 25 +-#define IRQ_ORION5X_IDMA_2 26 +-#define IRQ_ORION5X_IDMA_3 27 +-#define IRQ_ORION5X_CESA 28 +-#define IRQ_ORION5X_SATA 29 +-#define IRQ_ORION5X_XOR0 30 +-#define IRQ_ORION5X_XOR1 31 ++#define IRQ_ORION5X_BRIDGE (1 + 0) ++#define IRQ_ORION5X_DOORBELL_H2C (1 + 1) ++#define IRQ_ORION5X_DOORBELL_C2H (1 + 2) ++#define IRQ_ORION5X_UART0 (1 + 3) ++#define IRQ_ORION5X_UART1 (1 + 4) ++#define IRQ_ORION5X_I2C (1 + 5) ++#define IRQ_ORION5X_GPIO_0_7 (1 + 6) ++#define IRQ_ORION5X_GPIO_8_15 (1 + 7) ++#define IRQ_ORION5X_GPIO_16_23 (1 + 8) ++#define IRQ_ORION5X_GPIO_24_31 (1 + 9) ++#define IRQ_ORION5X_PCIE0_ERR (1 + 10) ++#define IRQ_ORION5X_PCIE0_INT (1 + 11) ++#define IRQ_ORION5X_USB1_CTRL (1 + 12) ++#define IRQ_ORION5X_DEV_BUS_ERR (1 + 14) ++#define IRQ_ORION5X_PCI_ERR (1 + 15) ++#define IRQ_ORION5X_USB_BR_ERR (1 + 16) ++#define IRQ_ORION5X_USB0_CTRL (1 + 17) ++#define IRQ_ORION5X_ETH_RX (1 + 18) ++#define IRQ_ORION5X_ETH_TX (1 + 19) ++#define IRQ_ORION5X_ETH_MISC (1 + 20) ++#define IRQ_ORION5X_ETH_SUM (1 + 21) ++#define IRQ_ORION5X_ETH_ERR (1 + 22) ++#define IRQ_ORION5X_IDMA_ERR (1 + 23) ++#define IRQ_ORION5X_IDMA_0 (1 + 24) ++#define IRQ_ORION5X_IDMA_1 (1 + 25) ++#define IRQ_ORION5X_IDMA_2 (1 + 26) ++#define IRQ_ORION5X_IDMA_3 (1 + 27) ++#define IRQ_ORION5X_CESA (1 + 28) ++#define IRQ_ORION5X_SATA (1 + 29) ++#define IRQ_ORION5X_XOR0 (1 + 30) ++#define IRQ_ORION5X_XOR1 (1 + 31) + + /* + * Orion General Purpose Pins + */ +-#define IRQ_ORION5X_GPIO_START 32 ++#define IRQ_ORION5X_GPIO_START 33 + #define NR_GPIO_IRQS 32 + + #define NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS) +diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c +index cd4bac4d7e43..086ecb87d885 100644 +--- a/arch/arm/mach-orion5x/irq.c ++++ b/arch/arm/mach-orion5x/irq.c +@@ -42,7 +42,7 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) + stat = readl_relaxed(MAIN_IRQ_CAUSE); + stat &= readl_relaxed(MAIN_IRQ_MASK); + if (stat) { +- unsigned int hwirq = __fls(stat); ++ unsigned int hwirq = 1 + __fls(stat); + handle_IRQ(hwirq, regs); + return; + } +@@ -51,7 +51,7 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) + + void __init orion5x_init_irq(void) + { +- orion_irq_init(0, MAIN_IRQ_MASK); ++ orion_irq_init(1, MAIN_IRQ_MASK); + + #ifdef CONFIG_MULTI_IRQ_HANDLER + set_handle_irq(orion5x_legacy_handle_irq); +diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c +index 2e6ab67e2284..611a5f96d3ca 100644 +--- a/arch/arm/mach-rockchip/platsmp.c ++++ b/arch/arm/mach-rockchip/platsmp.c +@@ -72,29 +72,22 @@ static struct reset_control *rockchip_get_core_reset(int cpu) + static int pmu_set_power_domain(int pd, bool on) + { + u32 val = (on) ? 0 : BIT(pd); ++ struct reset_control *rstc = rockchip_get_core_reset(pd); + int ret; + ++ if (IS_ERR(rstc) && read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) { ++ pr_err("%s: could not get reset control for core %d\n", ++ __func__, pd); ++ return PTR_ERR(rstc); ++ } ++ + /* + * We need to soft reset the cpu when we turn off the cpu power domain, + * or else the active processors might be stalled when the individual + * processor is powered down. + */ +- if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) { +- struct reset_control *rstc = rockchip_get_core_reset(pd); +- +- if (IS_ERR(rstc)) { +- pr_err("%s: could not get reset control for core %d\n", +- __func__, pd); +- return PTR_ERR(rstc); +- } +- +- if (on) +- reset_control_deassert(rstc); +- else +- reset_control_assert(rstc); +- +- reset_control_put(rstc); +- } ++ if (!IS_ERR(rstc) && !on) ++ reset_control_assert(rstc); + + ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); + if (ret < 0) { +@@ -112,6 +105,12 @@ static int pmu_set_power_domain(int pd, bool on) + } + } + ++ if (!IS_ERR(rstc)) { ++ if (on) ++ reset_control_deassert(rstc); ++ reset_control_put(rstc); ++ } ++ + return 0; + } + +@@ -147,8 +146,12 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu, + * the mailbox: + * sram_base_addr + 4: 0xdeadbeaf + * sram_base_addr + 8: start address for pc ++ * The cpu0 need to wait the other cpus other than cpu0 entering ++ * the wfe state.The wait time is affected by many aspects. ++ * (e.g: cpu frequency, bootrom frequency, sram frequency, ...) + * */ +- udelay(10); ++ mdelay(1); /* ensure the cpus other than cpu0 to startup */ ++ + writel(virt_to_phys(secondary_startup), sram_base_addr + 8); + writel(0xDEADBEAF, sram_base_addr + 4); + dsb_sev(); +diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c +index b027a89737b6..c6d601cc9764 100644 +--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c ++++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c +@@ -421,14 +421,20 @@ long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags, + rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); + v = pte & ~HPTE_V_HVLOCK; + if (v & HPTE_V_VALID) { +- u64 pte1; +- +- pte1 = be64_to_cpu(hpte[1]); + hpte[0] &= ~cpu_to_be64(HPTE_V_VALID); +- rb = compute_tlbie_rb(v, pte1, pte_index); ++ rb = compute_tlbie_rb(v, be64_to_cpu(hpte[1]), pte_index); + do_tlbies(kvm, &rb, 1, global_invalidates(kvm, flags), true); +- /* Read PTE low word after tlbie to get final R/C values */ +- remove_revmap_chain(kvm, pte_index, rev, v, pte1); ++ /* ++ * The reference (R) and change (C) bits in a HPT ++ * entry can be set by hardware at any time up until ++ * the HPTE is invalidated and the TLB invalidation ++ * sequence has completed. This means that when ++ * removing a HPTE, we need to re-read the HPTE after ++ * the invalidation sequence has completed in order to ++ * obtain reliable values of R and C. ++ */ ++ remove_revmap_chain(kvm, pte_index, rev, v, ++ be64_to_cpu(hpte[1])); + } + r = rev->guest_rpte & ~HPTE_GR_RESERVED; + note_hpte_modification(kvm, rev); +diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S +index 4d70df26c402..3b2d2c5b6376 100644 +--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S ++++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S +@@ -1127,6 +1127,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) + cmpwi r12, BOOK3S_INTERRUPT_H_DOORBELL + bne 3f + lbz r0, HSTATE_HOST_IPI(r13) ++ cmpwi r0, 0 + beq 4f + b guest_exit_cont + 3: +diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c +index 7262fe438c99..1942f22e6694 100644 +--- a/arch/s390/kernel/setup.c ++++ b/arch/s390/kernel/setup.c +@@ -683,7 +683,7 @@ static void __init setup_memory(void) + /* + * Setup hardware capabilities. + */ +-static void __init setup_hwcaps(void) ++static int __init setup_hwcaps(void) + { + static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 }; + struct cpuid cpu_id; +@@ -749,9 +749,11 @@ static void __init setup_hwcaps(void) + elf_hwcap |= HWCAP_S390_TE; + + /* +- * Vector extension HWCAP_S390_VXRS is bit 11. ++ * Vector extension HWCAP_S390_VXRS is bit 11. The Vector extension ++ * can be disabled with the "novx" parameter. Use MACHINE_HAS_VX ++ * instead of facility bit 129. + */ +- if (test_facility(129)) ++ if (MACHINE_HAS_VX) + elf_hwcap |= HWCAP_S390_VXRS; + get_cpu_id(&cpu_id); + add_device_randomness(&cpu_id, sizeof(cpu_id)); +@@ -788,7 +790,9 @@ static void __init setup_hwcaps(void) + strcpy(elf_platform, "z13"); + break; + } ++ return 0; + } ++arch_initcall(setup_hwcaps); + + /* + * Add system information as device randomness +@@ -871,11 +875,6 @@ void __init setup_arch(char **cmdline_p) + cpu_init(); + + /* +- * Setup capabilities (ELF_HWCAP & ELF_PLATFORM). +- */ +- setup_hwcaps(); +- +- /* + * Create kernel page tables and switch to virtual addressing. + */ + paging_init(); +diff --git a/arch/x86/crypto/ghash-clmulni-intel_glue.c b/arch/x86/crypto/ghash-clmulni-intel_glue.c +index 2079baf06bdd..daf8d2b9a217 100644 +--- a/arch/x86/crypto/ghash-clmulni-intel_glue.c ++++ b/arch/x86/crypto/ghash-clmulni-intel_glue.c +@@ -294,6 +294,7 @@ static struct ahash_alg ghash_async_alg = { + .cra_name = "ghash", + .cra_driver_name = "ghash-clmulni", + .cra_priority = 400, ++ .cra_ctxsize = sizeof(struct ghash_async_ctx), + .cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC, + .cra_blocksize = GHASH_BLOCK_SIZE, + .cra_type = &crypto_ahash_type, +diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h +index a0bf89fd2647..4e10d73cf018 100644 +--- a/arch/x86/include/asm/desc.h ++++ b/arch/x86/include/asm/desc.h +@@ -280,21 +280,6 @@ static inline void clear_LDT(void) + set_ldt(NULL, 0); + } + +-/* +- * load one particular LDT into the current CPU +- */ +-static inline void load_LDT_nolock(mm_context_t *pc) +-{ +- set_ldt(pc->ldt, pc->size); +-} +- +-static inline void load_LDT(mm_context_t *pc) +-{ +- preempt_disable(); +- load_LDT_nolock(pc); +- preempt_enable(); +-} +- + static inline unsigned long get_desc_base(const struct desc_struct *desc) + { + return (unsigned)(desc->base0 | ((desc->base1) << 16) | ((desc->base2) << 24)); +diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h +index 09b9620a73b4..364d27481a52 100644 +--- a/arch/x86/include/asm/mmu.h ++++ b/arch/x86/include/asm/mmu.h +@@ -9,8 +9,7 @@ + * we put the segment information here. + */ + typedef struct { +- void *ldt; +- int size; ++ struct ldt_struct *ldt; + + #ifdef CONFIG_X86_64 + /* True if mm supports a task running in 32 bit compatibility mode. */ +diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h +index e997f70f80c4..80d67dd80351 100644 +--- a/arch/x86/include/asm/mmu_context.h ++++ b/arch/x86/include/asm/mmu_context.h +@@ -34,6 +34,50 @@ static inline void load_mm_cr4(struct mm_struct *mm) {} + #endif + + /* ++ * ldt_structs can be allocated, used, and freed, but they are never ++ * modified while live. ++ */ ++struct ldt_struct { ++ /* ++ * Xen requires page-aligned LDTs with special permissions. This is ++ * needed to prevent us from installing evil descriptors such as ++ * call gates. On native, we could merge the ldt_struct and LDT ++ * allocations, but it's not worth trying to optimize. ++ */ ++ struct desc_struct *entries; ++ int size; ++}; ++ ++static inline void load_mm_ldt(struct mm_struct *mm) ++{ ++ struct ldt_struct *ldt; ++ ++ /* lockless_dereference synchronizes with smp_store_release */ ++ ldt = lockless_dereference(mm->context.ldt); ++ ++ /* ++ * Any change to mm->context.ldt is followed by an IPI to all ++ * CPUs with the mm active. The LDT will not be freed until ++ * after the IPI is handled by all such CPUs. This means that, ++ * if the ldt_struct changes before we return, the values we see ++ * will be safe, and the new values will be loaded before we run ++ * any user code. ++ * ++ * NB: don't try to convert this to use RCU without extreme care. ++ * We would still need IRQs off, because we don't want to change ++ * the local LDT after an IPI loaded a newer value than the one ++ * that we can see. ++ */ ++ ++ if (unlikely(ldt)) ++ set_ldt(ldt->entries, ldt->size); ++ else ++ clear_LDT(); ++ ++ DEBUG_LOCKS_WARN_ON(preemptible()); ++} ++ ++/* + * Used for LDT copy/destruction. + */ + int init_new_context(struct task_struct *tsk, struct mm_struct *mm); +@@ -78,12 +122,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, + * was called and then modify_ldt changed + * prev->context.ldt but suppressed an IPI to this CPU. + * In this case, prev->context.ldt != NULL, because we +- * never free an LDT while the mm still exists. That +- * means that next->context.ldt != prev->context.ldt, +- * because mms never share an LDT. ++ * never set context.ldt to NULL while the mm still ++ * exists. That means that next->context.ldt != ++ * prev->context.ldt, because mms never share an LDT. + */ + if (unlikely(prev->context.ldt != next->context.ldt)) +- load_LDT_nolock(&next->context); ++ load_mm_ldt(next); + } + #ifdef CONFIG_SMP + else { +@@ -106,7 +150,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, + load_cr3(next->pgd); + trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL); + load_mm_cr4(next); +- load_LDT_nolock(&next->context); ++ load_mm_ldt(next); + } + } + #endif +diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c +index dbe76a14c3c9..07bea80223f6 100644 +--- a/arch/x86/kernel/acpi/boot.c ++++ b/arch/x86/kernel/acpi/boot.c +@@ -489,6 +489,7 @@ static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, + polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; + + mp_override_legacy_irq(bus_irq, polarity, trigger, gsi); ++ acpi_penalize_sci_irq(bus_irq, trigger, polarity); + + /* + * stash over-ride to indicate we've been here +diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c +index a62cf04dac8a..205e0f3df501 100644 +--- a/arch/x86/kernel/cpu/common.c ++++ b/arch/x86/kernel/cpu/common.c +@@ -1434,7 +1434,7 @@ void cpu_init(void) + load_sp0(t, ¤t->thread); + set_tss_desc(cpu, t); + load_TR_desc(); +- load_LDT(&init_mm.context); ++ load_mm_ldt(&init_mm); + + clear_all_debug_regs(); + dbg_restore_debug_regs(); +@@ -1483,7 +1483,7 @@ void cpu_init(void) + load_sp0(t, thread); + set_tss_desc(cpu, t); + load_TR_desc(); +- load_LDT(&init_mm.context); ++ load_mm_ldt(&init_mm); + + t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); + +diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c +index b4a41cf030ed..e166d833cf63 100644 +--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c ++++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c +@@ -116,6 +116,27 @@ void mce_intel_hcpu_update(unsigned long cpu) + per_cpu(cmci_storm_state, cpu) = CMCI_STORM_NONE; + } + ++static void cmci_toggle_interrupt_mode(bool on) ++{ ++ unsigned long flags, *owned; ++ int bank; ++ u64 val; ++ ++ raw_spin_lock_irqsave(&cmci_discover_lock, flags); ++ owned = this_cpu_ptr(mce_banks_owned); ++ for_each_set_bit(bank, owned, MAX_NR_BANKS) { ++ rdmsrl(MSR_IA32_MCx_CTL2(bank), val); ++ ++ if (on) ++ val |= MCI_CTL2_CMCI_EN; ++ else ++ val &= ~MCI_CTL2_CMCI_EN; ++ ++ wrmsrl(MSR_IA32_MCx_CTL2(bank), val); ++ } ++ raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); ++} ++ + unsigned long cmci_intel_adjust_timer(unsigned long interval) + { + if ((this_cpu_read(cmci_backoff_cnt) > 0) && +@@ -145,7 +166,7 @@ unsigned long cmci_intel_adjust_timer(unsigned long interval) + */ + if (!atomic_read(&cmci_storm_on_cpus)) { + __this_cpu_write(cmci_storm_state, CMCI_STORM_NONE); +- cmci_reenable(); ++ cmci_toggle_interrupt_mode(true); + cmci_recheck(); + } + return CMCI_POLL_INTERVAL; +@@ -156,22 +177,6 @@ unsigned long cmci_intel_adjust_timer(unsigned long interval) + } + } + +-static void cmci_storm_disable_banks(void) +-{ +- unsigned long flags, *owned; +- int bank; +- u64 val; +- +- raw_spin_lock_irqsave(&cmci_discover_lock, flags); +- owned = this_cpu_ptr(mce_banks_owned); +- for_each_set_bit(bank, owned, MAX_NR_BANKS) { +- rdmsrl(MSR_IA32_MCx_CTL2(bank), val); +- val &= ~MCI_CTL2_CMCI_EN; +- wrmsrl(MSR_IA32_MCx_CTL2(bank), val); +- } +- raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); +-} +- + static bool cmci_storm_detect(void) + { + unsigned int cnt = __this_cpu_read(cmci_storm_cnt); +@@ -193,7 +198,7 @@ static bool cmci_storm_detect(void) + if (cnt <= CMCI_STORM_THRESHOLD) + return false; + +- cmci_storm_disable_banks(); ++ cmci_toggle_interrupt_mode(false); + __this_cpu_write(cmci_storm_state, CMCI_STORM_ACTIVE); + r = atomic_add_return(1, &cmci_storm_on_cpus); + mce_timer_kick(CMCI_STORM_INTERVAL); +diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c +index aa4e3a74e541..4cc98a4e8ea9 100644 +--- a/arch/x86/kernel/cpu/perf_event.c ++++ b/arch/x86/kernel/cpu/perf_event.c +@@ -2170,21 +2170,25 @@ static unsigned long get_segment_base(unsigned int segment) + int idx = segment >> 3; + + if ((segment & SEGMENT_TI_MASK) == SEGMENT_LDT) { ++ struct ldt_struct *ldt; ++ + if (idx > LDT_ENTRIES) + return 0; + +- if (idx > current->active_mm->context.size) ++ /* IRQs are off, so this synchronizes with smp_store_release */ ++ ldt = lockless_dereference(current->active_mm->context.ldt); ++ if (!ldt || idx > ldt->size) + return 0; + +- desc = current->active_mm->context.ldt; ++ desc = &ldt->entries[idx]; + } else { + if (idx > GDT_ENTRIES) + return 0; + +- desc = raw_cpu_ptr(gdt_page.gdt); ++ desc = raw_cpu_ptr(gdt_page.gdt) + idx; + } + +- return get_desc_base(desc + idx); ++ return get_desc_base(desc); + } + + #ifdef CONFIG_COMPAT +diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c +index c37886d759cc..2bcc0525f1c1 100644 +--- a/arch/x86/kernel/ldt.c ++++ b/arch/x86/kernel/ldt.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -20,82 +21,82 @@ + #include + #include + +-#ifdef CONFIG_SMP ++/* context.lock is held for us, so we don't need any locking. */ + static void flush_ldt(void *current_mm) + { +- if (current->active_mm == current_mm) +- load_LDT(¤t->active_mm->context); ++ mm_context_t *pc; ++ ++ if (current->active_mm != current_mm) ++ return; ++ ++ pc = ¤t->active_mm->context; ++ set_ldt(pc->ldt->entries, pc->ldt->size); + } +-#endif + +-static int alloc_ldt(mm_context_t *pc, int mincount, int reload) ++/* The caller must call finalize_ldt_struct on the result. LDT starts zeroed. */ ++static struct ldt_struct *alloc_ldt_struct(int size) + { +- void *oldldt, *newldt; +- int oldsize; +- +- if (mincount <= pc->size) +- return 0; +- oldsize = pc->size; +- mincount = (mincount + (PAGE_SIZE / LDT_ENTRY_SIZE - 1)) & +- (~(PAGE_SIZE / LDT_ENTRY_SIZE - 1)); +- if (mincount * LDT_ENTRY_SIZE > PAGE_SIZE) +- newldt = vmalloc(mincount * LDT_ENTRY_SIZE); ++ struct ldt_struct *new_ldt; ++ int alloc_size; ++ ++ if (size > LDT_ENTRIES) ++ return NULL; ++ ++ new_ldt = kmalloc(sizeof(struct ldt_struct), GFP_KERNEL); ++ if (!new_ldt) ++ return NULL; ++ ++ BUILD_BUG_ON(LDT_ENTRY_SIZE != sizeof(struct desc_struct)); ++ alloc_size = size * LDT_ENTRY_SIZE; ++ ++ /* ++ * Xen is very picky: it requires a page-aligned LDT that has no ++ * trailing nonzero bytes in any page that contains LDT descriptors. ++ * Keep it simple: zero the whole allocation and never allocate less ++ * than PAGE_SIZE. ++ */ ++ if (alloc_size > PAGE_SIZE) ++ new_ldt->entries = vzalloc(alloc_size); + else +- newldt = (void *)__get_free_page(GFP_KERNEL); +- +- if (!newldt) +- return -ENOMEM; ++ new_ldt->entries = kzalloc(PAGE_SIZE, GFP_KERNEL); + +- if (oldsize) +- memcpy(newldt, pc->ldt, oldsize * LDT_ENTRY_SIZE); +- oldldt = pc->ldt; +- memset(newldt + oldsize * LDT_ENTRY_SIZE, 0, +- (mincount - oldsize) * LDT_ENTRY_SIZE); ++ if (!new_ldt->entries) { ++ kfree(new_ldt); ++ return NULL; ++ } + +- paravirt_alloc_ldt(newldt, mincount); ++ new_ldt->size = size; ++ return new_ldt; ++} + +-#ifdef CONFIG_X86_64 +- /* CHECKME: Do we really need this ? */ +- wmb(); +-#endif +- pc->ldt = newldt; +- wmb(); +- pc->size = mincount; +- wmb(); +- +- if (reload) { +-#ifdef CONFIG_SMP +- preempt_disable(); +- load_LDT(pc); +- if (!cpumask_equal(mm_cpumask(current->mm), +- cpumask_of(smp_processor_id()))) +- smp_call_function(flush_ldt, current->mm, 1); +- preempt_enable(); +-#else +- load_LDT(pc); +-#endif +- } +- if (oldsize) { +- paravirt_free_ldt(oldldt, oldsize); +- if (oldsize * LDT_ENTRY_SIZE > PAGE_SIZE) +- vfree(oldldt); +- else +- put_page(virt_to_page(oldldt)); +- } +- return 0; ++/* After calling this, the LDT is immutable. */ ++static void finalize_ldt_struct(struct ldt_struct *ldt) ++{ ++ paravirt_alloc_ldt(ldt->entries, ldt->size); + } + +-static inline int copy_ldt(mm_context_t *new, mm_context_t *old) ++/* context.lock is held */ ++static void install_ldt(struct mm_struct *current_mm, ++ struct ldt_struct *ldt) + { +- int err = alloc_ldt(new, old->size, 0); +- int i; ++ /* Synchronizes with lockless_dereference in load_mm_ldt. */ ++ smp_store_release(¤t_mm->context.ldt, ldt); ++ ++ /* Activate the LDT for all CPUs using current_mm. */ ++ on_each_cpu_mask(mm_cpumask(current_mm), flush_ldt, current_mm, true); ++} + +- if (err < 0) +- return err; ++static void free_ldt_struct(struct ldt_struct *ldt) ++{ ++ if (likely(!ldt)) ++ return; + +- for (i = 0; i < old->size; i++) +- write_ldt_entry(new->ldt, i, old->ldt + i * LDT_ENTRY_SIZE); +- return 0; ++ paravirt_free_ldt(ldt->entries, ldt->size); ++ if (ldt->size * LDT_ENTRY_SIZE > PAGE_SIZE) ++ vfree(ldt->entries); ++ else ++ kfree(ldt->entries); ++ kfree(ldt); + } + + /* +@@ -104,17 +105,37 @@ static inline int copy_ldt(mm_context_t *new, mm_context_t *old) + */ + int init_new_context(struct task_struct *tsk, struct mm_struct *mm) + { ++ struct ldt_struct *new_ldt; + struct mm_struct *old_mm; + int retval = 0; + + mutex_init(&mm->context.lock); +- mm->context.size = 0; + old_mm = current->mm; +- if (old_mm && old_mm->context.size > 0) { +- mutex_lock(&old_mm->context.lock); +- retval = copy_ldt(&mm->context, &old_mm->context); +- mutex_unlock(&old_mm->context.lock); ++ if (!old_mm) { ++ mm->context.ldt = NULL; ++ return 0; + } ++ ++ mutex_lock(&old_mm->context.lock); ++ if (!old_mm->context.ldt) { ++ mm->context.ldt = NULL; ++ goto out_unlock; ++ } ++ ++ new_ldt = alloc_ldt_struct(old_mm->context.ldt->size); ++ if (!new_ldt) { ++ retval = -ENOMEM; ++ goto out_unlock; ++ } ++ ++ memcpy(new_ldt->entries, old_mm->context.ldt->entries, ++ new_ldt->size * LDT_ENTRY_SIZE); ++ finalize_ldt_struct(new_ldt); ++ ++ mm->context.ldt = new_ldt; ++ ++out_unlock: ++ mutex_unlock(&old_mm->context.lock); + return retval; + } + +@@ -125,53 +146,47 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm) + */ + void destroy_context(struct mm_struct *mm) + { +- if (mm->context.size) { +-#ifdef CONFIG_X86_32 +- /* CHECKME: Can this ever happen ? */ +- if (mm == current->active_mm) +- clear_LDT(); +-#endif +- paravirt_free_ldt(mm->context.ldt, mm->context.size); +- if (mm->context.size * LDT_ENTRY_SIZE > PAGE_SIZE) +- vfree(mm->context.ldt); +- else +- put_page(virt_to_page(mm->context.ldt)); +- mm->context.size = 0; +- } ++ free_ldt_struct(mm->context.ldt); ++ mm->context.ldt = NULL; + } + + static int read_ldt(void __user *ptr, unsigned long bytecount) + { +- int err; ++ int retval; + unsigned long size; + struct mm_struct *mm = current->mm; + +- if (!mm->context.size) +- return 0; ++ mutex_lock(&mm->context.lock); ++ ++ if (!mm->context.ldt) { ++ retval = 0; ++ goto out_unlock; ++ } ++ + if (bytecount > LDT_ENTRY_SIZE * LDT_ENTRIES) + bytecount = LDT_ENTRY_SIZE * LDT_ENTRIES; + +- mutex_lock(&mm->context.lock); +- size = mm->context.size * LDT_ENTRY_SIZE; ++ size = mm->context.ldt->size * LDT_ENTRY_SIZE; + if (size > bytecount) + size = bytecount; + +- err = 0; +- if (copy_to_user(ptr, mm->context.ldt, size)) +- err = -EFAULT; +- mutex_unlock(&mm->context.lock); +- if (err < 0) +- goto error_return; ++ if (copy_to_user(ptr, mm->context.ldt->entries, size)) { ++ retval = -EFAULT; ++ goto out_unlock; ++ } ++ + if (size != bytecount) { +- /* zero-fill the rest */ +- if (clear_user(ptr + size, bytecount - size) != 0) { +- err = -EFAULT; +- goto error_return; ++ /* Zero-fill the rest and pretend we read bytecount bytes. */ ++ if (clear_user(ptr + size, bytecount - size)) { ++ retval = -EFAULT; ++ goto out_unlock; + } + } +- return bytecount; +-error_return: +- return err; ++ retval = bytecount; ++ ++out_unlock: ++ mutex_unlock(&mm->context.lock); ++ return retval; + } + + static int read_default_ldt(void __user *ptr, unsigned long bytecount) +@@ -195,6 +210,8 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) + struct desc_struct ldt; + int error; + struct user_desc ldt_info; ++ int oldsize, newsize; ++ struct ldt_struct *new_ldt, *old_ldt; + + error = -EINVAL; + if (bytecount != sizeof(ldt_info)) +@@ -213,34 +230,39 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) + goto out; + } + +- mutex_lock(&mm->context.lock); +- if (ldt_info.entry_number >= mm->context.size) { +- error = alloc_ldt(¤t->mm->context, +- ldt_info.entry_number + 1, 1); +- if (error < 0) +- goto out_unlock; +- } +- +- /* Allow LDTs to be cleared by the user. */ +- if (ldt_info.base_addr == 0 && ldt_info.limit == 0) { +- if (oldmode || LDT_empty(&ldt_info)) { +- memset(&ldt, 0, sizeof(ldt)); +- goto install; ++ if ((oldmode && !ldt_info.base_addr && !ldt_info.limit) || ++ LDT_empty(&ldt_info)) { ++ /* The user wants to clear the entry. */ ++ memset(&ldt, 0, sizeof(ldt)); ++ } else { ++ if (!IS_ENABLED(CONFIG_X86_16BIT) && !ldt_info.seg_32bit) { ++ error = -EINVAL; ++ goto out; + } ++ ++ fill_ldt(&ldt, &ldt_info); ++ if (oldmode) ++ ldt.avl = 0; + } + +- if (!IS_ENABLED(CONFIG_X86_16BIT) && !ldt_info.seg_32bit) { +- error = -EINVAL; ++ mutex_lock(&mm->context.lock); ++ ++ old_ldt = mm->context.ldt; ++ oldsize = old_ldt ? old_ldt->size : 0; ++ newsize = max((int)(ldt_info.entry_number + 1), oldsize); ++ ++ error = -ENOMEM; ++ new_ldt = alloc_ldt_struct(newsize); ++ if (!new_ldt) + goto out_unlock; +- } + +- fill_ldt(&ldt, &ldt_info); +- if (oldmode) +- ldt.avl = 0; ++ if (old_ldt) ++ memcpy(new_ldt->entries, old_ldt->entries, oldsize * LDT_ENTRY_SIZE); ++ new_ldt->entries[ldt_info.entry_number] = ldt; ++ finalize_ldt_struct(new_ldt); + +- /* Install the new entry ... */ +-install: +- write_ldt_entry(mm->context.ldt, ldt_info.entry_number, &ldt); ++ install_ldt(mm, new_ldt); ++ free_ldt_struct(old_ldt); + error = 0; + + out_unlock: +diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c +index ddfdbf74f174..5e0bf57d9944 100644 +--- a/arch/x86/kernel/process_64.c ++++ b/arch/x86/kernel/process_64.c +@@ -122,11 +122,11 @@ void __show_regs(struct pt_regs *regs, int all) + void release_thread(struct task_struct *dead_task) + { + if (dead_task->mm) { +- if (dead_task->mm->context.size) { ++ if (dead_task->mm->context.ldt) { + pr_warn("WARNING: dead process %s still has LDT? <%p/%d>\n", + dead_task->comm, + dead_task->mm->context.ldt, +- dead_task->mm->context.size); ++ dead_task->mm->context.ldt->size); + BUG(); + } + } +diff --git a/arch/x86/kernel/step.c b/arch/x86/kernel/step.c +index 9b4d51d0c0d0..0ccb53a9fcd9 100644 +--- a/arch/x86/kernel/step.c ++++ b/arch/x86/kernel/step.c +@@ -5,6 +5,7 @@ + #include + #include + #include ++#include + + unsigned long convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs) + { +@@ -27,13 +28,14 @@ unsigned long convert_ip_to_linear(struct task_struct *child, struct pt_regs *re + struct desc_struct *desc; + unsigned long base; + +- seg &= ~7UL; ++ seg >>= 3; + + mutex_lock(&child->mm->context.lock); +- if (unlikely((seg >> 3) >= child->mm->context.size)) ++ if (unlikely(!child->mm->context.ldt || ++ seg >= child->mm->context.ldt->size)) + addr = -1L; /* bogus selector, access would fault */ + else { +- desc = child->mm->context.ldt + seg; ++ desc = &child->mm->context.ldt->entries[seg]; + base = get_desc_base(desc); + + /* 16-bit code segment? */ +diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c +index b73337634214..554e877e0bc4 100644 +--- a/arch/x86/kvm/mmu.c ++++ b/arch/x86/kvm/mmu.c +@@ -357,12 +357,6 @@ static u64 __get_spte_lockless(u64 *sptep) + { + return ACCESS_ONCE(*sptep); + } +- +-static bool __check_direct_spte_mmio_pf(u64 spte) +-{ +- /* It is valid if the spte is zapped. */ +- return spte == 0ull; +-} + #else + union split_spte { + struct { +@@ -478,23 +472,6 @@ retry: + + return spte.spte; + } +- +-static bool __check_direct_spte_mmio_pf(u64 spte) +-{ +- union split_spte sspte = (union split_spte)spte; +- u32 high_mmio_mask = shadow_mmio_mask >> 32; +- +- /* It is valid if the spte is zapped. */ +- if (spte == 0ull) +- return true; +- +- /* It is valid if the spte is being zapped. */ +- if (sspte.spte_low == 0ull && +- (sspte.spte_high & high_mmio_mask) == high_mmio_mask) +- return true; +- +- return false; +-} + #endif + + static bool spte_is_locklessly_modifiable(u64 spte) +@@ -3343,21 +3320,6 @@ static bool quickly_check_mmio_pf(struct kvm_vcpu *vcpu, u64 addr, bool direct) + return vcpu_match_mmio_gva(vcpu, addr); + } + +- +-/* +- * On direct hosts, the last spte is only allows two states +- * for mmio page fault: +- * - It is the mmio spte +- * - It is zapped or it is being zapped. +- * +- * This function completely checks the spte when the last spte +- * is not the mmio spte. +- */ +-static bool check_direct_spte_mmio_pf(u64 spte) +-{ +- return __check_direct_spte_mmio_pf(spte); +-} +- + static u64 walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr) + { + struct kvm_shadow_walk_iterator iterator; +@@ -3400,13 +3362,6 @@ int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct) + } + + /* +- * It's ok if the gva is remapped by other cpus on shadow guest, +- * it's a BUG if the gfn is not a mmio page. +- */ +- if (direct && !check_direct_spte_mmio_pf(spte)) +- return RET_MMIO_PF_BUG; +- +- /* + * If the page table is zapped by other cpus, let CPU fault again on + * the address. + */ +diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c +index ea306adbbc13..47a32f743a91 100644 +--- a/arch/x86/kvm/x86.c ++++ b/arch/x86/kvm/x86.c +@@ -2192,7 +2192,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) + if (guest_cpuid_has_tsc_adjust(vcpu)) { + if (!msr_info->host_initiated) { + s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr; +- kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true); ++ adjust_tsc_offset_guest(vcpu, adj); + } + vcpu->arch.ia32_tsc_adjust_msr = data; + } +diff --git a/arch/x86/math-emu/fpu_entry.c b/arch/x86/math-emu/fpu_entry.c +index 9b868124128d..274a52b1183e 100644 +--- a/arch/x86/math-emu/fpu_entry.c ++++ b/arch/x86/math-emu/fpu_entry.c +@@ -29,7 +29,6 @@ + + #include + #include +-#include + #include + #include + +@@ -185,7 +184,7 @@ void math_emulate(struct math_emu_info *info) + math_abort(FPU_info, SIGILL); + } + +- code_descriptor = LDT_DESCRIPTOR(FPU_CS); ++ code_descriptor = FPU_get_ldt_descriptor(FPU_CS); + if (SEG_D_SIZE(code_descriptor)) { + /* The above test may be wrong, the book is not clear */ + /* Segmented 32 bit protected mode */ +diff --git a/arch/x86/math-emu/fpu_system.h b/arch/x86/math-emu/fpu_system.h +index 2c614410a5f3..d342fce49447 100644 +--- a/arch/x86/math-emu/fpu_system.h ++++ b/arch/x86/math-emu/fpu_system.h +@@ -16,9 +16,24 @@ + #include + #include + +-/* s is always from a cpu register, and the cpu does bounds checking +- * during register load --> no further bounds checks needed */ +-#define LDT_DESCRIPTOR(s) (((struct desc_struct *)current->mm->context.ldt)[(s) >> 3]) ++#include ++#include ++ ++static inline struct desc_struct FPU_get_ldt_descriptor(unsigned seg) ++{ ++ static struct desc_struct zero_desc; ++ struct desc_struct ret = zero_desc; ++ ++#ifdef CONFIG_MODIFY_LDT_SYSCALL ++ seg >>= 3; ++ mutex_lock(¤t->mm->context.lock); ++ if (current->mm->context.ldt && seg < current->mm->context.ldt->size) ++ ret = current->mm->context.ldt->entries[seg]; ++ mutex_unlock(¤t->mm->context.lock); ++#endif ++ return ret; ++} ++ + #define SEG_D_SIZE(x) ((x).b & (3 << 21)) + #define SEG_G_BIT(x) ((x).b & (1 << 23)) + #define SEG_GRANULARITY(x) (((x).b & (1 << 23)) ? 4096 : 1) +diff --git a/arch/x86/math-emu/get_address.c b/arch/x86/math-emu/get_address.c +index 6ef5e99380f9..8300db71c2a6 100644 +--- a/arch/x86/math-emu/get_address.c ++++ b/arch/x86/math-emu/get_address.c +@@ -20,7 +20,6 @@ + #include + + #include +-#include + + #include "fpu_system.h" + #include "exception.h" +@@ -158,7 +157,7 @@ static long pm_address(u_char FPU_modrm, u_char segment, + addr->selector = PM_REG_(segment); + } + +- descriptor = LDT_DESCRIPTOR(PM_REG_(segment)); ++ descriptor = FPU_get_ldt_descriptor(addr->selector); + base_address = SEG_BASE_ADDR(descriptor); + address = base_address + offset; + limit = base_address +diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c +index 757678fb26e1..bf9384488399 100644 +--- a/arch/x86/power/cpu.c ++++ b/arch/x86/power/cpu.c +@@ -23,6 +23,7 @@ + #include + #include /* pcntxt_mask */ + #include ++#include + + #ifdef CONFIG_X86_32 + __visible unsigned long saved_context_ebx; +@@ -154,7 +155,7 @@ static void fix_processor_context(void) + syscall_init(); /* This sets MSR_*STAR and related */ + #endif + load_TR_desc(); /* This does ltr */ +- load_LDT(¤t->active_mm->context); /* This does lldt */ ++ load_mm_ldt(current->active_mm); /* This does lldt */ + } + + /** +diff --git a/arch/xtensa/include/asm/traps.h b/arch/xtensa/include/asm/traps.h +index 677bfcf4ee5d..28f33a8b7f5f 100644 +--- a/arch/xtensa/include/asm/traps.h ++++ b/arch/xtensa/include/asm/traps.h +@@ -25,30 +25,39 @@ static inline void spill_registers(void) + { + #if XCHAL_NUM_AREGS > 16 + __asm__ __volatile__ ( +- " call12 1f\n" ++ " call8 1f\n" + " _j 2f\n" + " retw\n" + " .align 4\n" + "1:\n" ++#if XCHAL_NUM_AREGS == 32 ++ " _entry a1, 32\n" ++ " addi a8, a0, 3\n" ++ " _entry a1, 16\n" ++ " mov a12, a12\n" ++ " retw\n" ++#else + " _entry a1, 48\n" +- " addi a12, a0, 3\n" +-#if XCHAL_NUM_AREGS > 32 +- " .rept (" __stringify(XCHAL_NUM_AREGS) " - 32) / 12\n" ++ " call12 1f\n" ++ " retw\n" ++ " .align 4\n" ++ "1:\n" ++ " .rept (" __stringify(XCHAL_NUM_AREGS) " - 16) / 12\n" + " _entry a1, 48\n" + " mov a12, a0\n" + " .endr\n" +-#endif +- " _entry a1, 48\n" ++ " _entry a1, 16\n" + #if XCHAL_NUM_AREGS % 12 == 0 +- " mov a8, a8\n" +-#elif XCHAL_NUM_AREGS % 12 == 4 + " mov a12, a12\n" +-#elif XCHAL_NUM_AREGS % 12 == 8 ++#elif XCHAL_NUM_AREGS % 12 == 4 + " mov a4, a4\n" ++#elif XCHAL_NUM_AREGS % 12 == 8 ++ " mov a8, a8\n" + #endif + " retw\n" ++#endif + "2:\n" +- : : : "a12", "a13", "memory"); ++ : : : "a8", "a9", "memory"); + #else + __asm__ __volatile__ ( + " mov a12, a12\n" +diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S +index 82bbfa5a05b3..a2a902140c4e 100644 +--- a/arch/xtensa/kernel/entry.S ++++ b/arch/xtensa/kernel/entry.S +@@ -568,12 +568,13 @@ user_exception_exit: + * (if we have restored WSBITS-1 frames). + */ + ++2: + #if XCHAL_HAVE_THREADPTR + l32i a3, a1, PT_THREADPTR + wur a3, threadptr + #endif + +-2: j common_exception_exit ++ j common_exception_exit + + /* This is the kernel exception exit. + * We avoided to do a MOVSP when we entered the exception, but we +@@ -1820,7 +1821,7 @@ ENDPROC(system_call) + mov a12, a0 + .endr + #endif +- _entry a1, 48 ++ _entry a1, 16 + #if XCHAL_NUM_AREGS % 12 == 0 + mov a8, a8 + #elif XCHAL_NUM_AREGS % 12 == 4 +@@ -1844,7 +1845,7 @@ ENDPROC(system_call) + + ENTRY(_switch_to) + +- entry a1, 16 ++ entry a1, 48 + + mov a11, a3 # and 'next' (a3) + +diff --git a/drivers/acpi/acpi_pnp.c b/drivers/acpi/acpi_pnp.c +index ff6d8adc9cda..fb765524cc3d 100644 +--- a/drivers/acpi/acpi_pnp.c ++++ b/drivers/acpi/acpi_pnp.c +@@ -153,6 +153,7 @@ static const struct acpi_device_id acpi_pnp_device_ids[] = { + {"AEI0250"}, /* PROLiNK 1456VH ISA PnP K56flex Fax Modem */ + {"AEI1240"}, /* Actiontec ISA PNP 56K X2 Fax Modem */ + {"AKY1021"}, /* Rockwell 56K ACF II Fax+Data+Voice Modem */ ++ {"ALI5123"}, /* ALi Fast Infrared Controller */ + {"AZT4001"}, /* AZT3005 PnP SOUND DEVICE */ + {"BDP3336"}, /* Best Data Products Inc. Smart One 336F PnP Modem */ + {"BRI0A49"}, /* Boca Complete Ofc Communicator 14.4 Data-FAX */ +diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c +index cfd7581cc19f..b09ad554430a 100644 +--- a/drivers/acpi/pci_link.c ++++ b/drivers/acpi/pci_link.c +@@ -826,6 +826,22 @@ void acpi_penalize_isa_irq(int irq, int active) + } + + /* ++ * Penalize IRQ used by ACPI SCI. If ACPI SCI pin attributes conflict with ++ * PCI IRQ attributes, mark ACPI SCI as ISA_ALWAYS so it won't be use for ++ * PCI IRQs. ++ */ ++void acpi_penalize_sci_irq(int irq, int trigger, int polarity) ++{ ++ if (irq >= 0 && irq < ARRAY_SIZE(acpi_irq_penalty)) { ++ if (trigger != ACPI_MADT_TRIGGER_LEVEL || ++ polarity != ACPI_MADT_POLARITY_ACTIVE_LOW) ++ acpi_irq_penalty[irq] += PIRQ_PENALTY_ISA_ALWAYS; ++ else ++ acpi_irq_penalty[irq] += PIRQ_PENALTY_PCI_USING; ++ } ++} ++ ++/* + * Over-ride default table to reserve additional IRQs for use by ISA + * e.g. acpi_irq_isa=5 + * Useful for telling ACPI how not to interfere with your ISA sound card. +diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c +index 65ee94454bbd..e6ea912aee31 100644 +--- a/drivers/ata/ahci.c ++++ b/drivers/ata/ahci.c +@@ -349,6 +349,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { + /* JMicron 362B and 362C have an AHCI function with IDE class code */ + { PCI_VDEVICE(JMICRON, 0x2362), board_ahci_ign_iferr }, + { PCI_VDEVICE(JMICRON, 0x236f), board_ahci_ign_iferr }, ++ /* May need to update quirk_jmicron_async_suspend() for additions */ + + /* ATI */ + { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */ +@@ -1377,18 +1378,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) + else if (pdev->vendor == 0x1c44 && pdev->device == 0x8000) + ahci_pci_bar = AHCI_PCI_BAR_ENMOTUS; + +- /* +- * The JMicron chip 361/363 contains one SATA controller and one +- * PATA controller,for powering on these both controllers, we must +- * follow the sequence one by one, otherwise one of them can not be +- * powered on successfully, so here we disable the async suspend +- * method for these chips. +- */ +- if (pdev->vendor == PCI_VENDOR_ID_JMICRON && +- (pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 || +- pdev->device == PCI_DEVICE_ID_JMICRON_JMB361)) +- device_disable_async_suspend(&pdev->dev); +- + /* acquire resources */ + rc = pcim_enable_device(pdev); + if (rc) +diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c +index 47e418b8c8ba..4d1a5d2c4287 100644 +--- a/drivers/ata/pata_jmicron.c ++++ b/drivers/ata/pata_jmicron.c +@@ -143,18 +143,6 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i + }; + const struct ata_port_info *ppi[] = { &info, NULL }; + +- /* +- * The JMicron chip 361/363 contains one SATA controller and one +- * PATA controller,for powering on these both controllers, we must +- * follow the sequence one by one, otherwise one of them can not be +- * powered on successfully, so here we disable the async suspend +- * method for these chips. +- */ +- if (pdev->vendor == PCI_VENDOR_ID_JMICRON && +- (pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 || +- pdev->device == PCI_DEVICE_ID_JMICRON_JMB361)) +- device_disable_async_suspend(&pdev->dev); +- + return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0); + } + +diff --git a/drivers/auxdisplay/ks0108.c b/drivers/auxdisplay/ks0108.c +index 5b93852392b8..0d752851a1ee 100644 +--- a/drivers/auxdisplay/ks0108.c ++++ b/drivers/auxdisplay/ks0108.c +@@ -139,6 +139,7 @@ static int __init ks0108_init(void) + + ks0108_pardevice = parport_register_device(ks0108_parport, KS0108_NAME, + NULL, NULL, NULL, PARPORT_DEV_EXCL, NULL); ++ parport_put_port(ks0108_parport); + if (ks0108_pardevice == NULL) { + printk(KERN_ERR KS0108_NAME ": ERROR: " + "parport didn't register new device\n"); +diff --git a/drivers/base/devres.c b/drivers/base/devres.c +index c8a53d1e019f..875464690117 100644 +--- a/drivers/base/devres.c ++++ b/drivers/base/devres.c +@@ -297,10 +297,10 @@ void * devres_get(struct device *dev, void *new_res, + if (!dr) { + add_dr(dev, &new_dr->node); + dr = new_dr; +- new_dr = NULL; ++ new_res = NULL; + } + spin_unlock_irqrestore(&dev->devres_lock, flags); +- devres_free(new_dr); ++ devres_free(new_res); + + return dr->data; + } +diff --git a/drivers/base/platform.c b/drivers/base/platform.c +index ebf034b97278..7403de94832c 100644 +--- a/drivers/base/platform.c ++++ b/drivers/base/platform.c +@@ -375,9 +375,7 @@ int platform_device_add(struct platform_device *pdev) + + while (--i >= 0) { + struct resource *r = &pdev->resource[i]; +- unsigned long type = resource_type(r); +- +- if (type == IORESOURCE_MEM || type == IORESOURCE_IO) ++ if (r->parent) + release_resource(r); + } + +@@ -408,9 +406,7 @@ void platform_device_del(struct platform_device *pdev) + + for (i = 0; i < pdev->num_resources; i++) { + struct resource *r = &pdev->resource[i]; +- unsigned long type = resource_type(r); +- +- if (type == IORESOURCE_MEM || type == IORESOURCE_IO) ++ if (r->parent) + release_resource(r); + } + } +diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c +index c7b0fcebf168..ac3c07db92f1 100644 +--- a/drivers/base/power/clock_ops.c ++++ b/drivers/base/power/clock_ops.c +@@ -37,7 +37,7 @@ struct pm_clock_entry { + * @dev: The device for the given clock + * @ce: PM clock entry corresponding to the clock. + */ +-static inline int __pm_clk_enable(struct device *dev, struct pm_clock_entry *ce) ++static inline void __pm_clk_enable(struct device *dev, struct pm_clock_entry *ce) + { + int ret; + +@@ -49,8 +49,6 @@ static inline int __pm_clk_enable(struct device *dev, struct pm_clock_entry *ce) + dev_err(dev, "%s: failed to enable clk %p, error %d\n", + __func__, ce->clk, ret); + } +- +- return ret; + } + + /** +diff --git a/drivers/clk/pistachio/clk-pistachio.c b/drivers/clk/pistachio/clk-pistachio.c +index 8c0fe8828f99..c4ceb5eaf46c 100644 +--- a/drivers/clk/pistachio/clk-pistachio.c ++++ b/drivers/clk/pistachio/clk-pistachio.c +@@ -159,9 +159,15 @@ PNAME(mux_debug) = { "mips_pll_mux", "rpu_v_pll_mux", + "wifi_pll_mux", "bt_pll_mux" }; + static u32 mux_debug_idx[] = { 0x0, 0x1, 0x2, 0x4, 0x8, 0x10 }; + +-static unsigned int pistachio_critical_clks[] __initdata = { +- CLK_MIPS, +- CLK_PERIPH_SYS, ++static unsigned int pistachio_critical_clks_core[] __initdata = { ++ CLK_MIPS ++}; ++ ++static unsigned int pistachio_critical_clks_sys[] __initdata = { ++ PERIPH_CLK_SYS, ++ PERIPH_CLK_SYS_BUS, ++ PERIPH_CLK_DDR, ++ PERIPH_CLK_ROM, + }; + + static void __init pistachio_clk_init(struct device_node *np) +@@ -193,8 +199,8 @@ static void __init pistachio_clk_init(struct device_node *np) + + pistachio_clk_register_provider(p); + +- pistachio_clk_force_enable(p, pistachio_critical_clks, +- ARRAY_SIZE(pistachio_critical_clks)); ++ pistachio_clk_force_enable(p, pistachio_critical_clks_core, ++ ARRAY_SIZE(pistachio_critical_clks_core)); + } + CLK_OF_DECLARE(pistachio_clk, "img,pistachio-clk", pistachio_clk_init); + +@@ -261,6 +267,9 @@ static void __init pistachio_clk_periph_init(struct device_node *np) + ARRAY_SIZE(pistachio_periph_gates)); + + pistachio_clk_register_provider(p); ++ ++ pistachio_clk_force_enable(p, pistachio_critical_clks_sys, ++ ARRAY_SIZE(pistachio_critical_clks_sys)); + } + CLK_OF_DECLARE(pistachio_clk_periph, "img,pistachio-clk-periph", + pistachio_clk_periph_init); +diff --git a/drivers/clk/pistachio/clk-pll.c b/drivers/clk/pistachio/clk-pll.c +index de537560bf70..ebd0d2a3b5da 100644 +--- a/drivers/clk/pistachio/clk-pll.c ++++ b/drivers/clk/pistachio/clk-pll.c +@@ -115,8 +115,7 @@ static int pll_gf40lp_frac_enable(struct clk_hw *hw) + u32 val; + + val = pll_readl(pll, PLL_CTRL3); +- val &= ~(PLL_FRAC_CTRL3_PD | PLL_FRAC_CTRL3_DACPD | +- PLL_FRAC_CTRL3_DSMPD | PLL_FRAC_CTRL3_FOUTPOSTDIVPD | ++ val &= ~(PLL_FRAC_CTRL3_PD | PLL_FRAC_CTRL3_FOUTPOSTDIVPD | + PLL_FRAC_CTRL3_FOUT4PHASEPD | PLL_FRAC_CTRL3_FOUTVCOPD); + pll_writel(pll, val, PLL_CTRL3); + +@@ -233,7 +232,7 @@ static int pll_gf40lp_laint_enable(struct clk_hw *hw) + u32 val; + + val = pll_readl(pll, PLL_CTRL1); +- val &= ~(PLL_INT_CTRL1_PD | PLL_INT_CTRL1_DSMPD | ++ val &= ~(PLL_INT_CTRL1_PD | + PLL_INT_CTRL1_FOUTPOSTDIVPD | PLL_INT_CTRL1_FOUTVCOPD); + pll_writel(pll, val, PLL_CTRL1); + +diff --git a/drivers/clk/pxa/clk-pxa25x.c b/drivers/clk/pxa/clk-pxa25x.c +index 6cd88d963a7f..542e45ef5087 100644 +--- a/drivers/clk/pxa/clk-pxa25x.c ++++ b/drivers/clk/pxa/clk-pxa25x.c +@@ -79,7 +79,7 @@ unsigned int pxa25x_get_clk_frequency_khz(int info) + clks[3] / 1000000, (clks[3] % 1000000) / 10000); + } + +- return (unsigned int)clks[0]; ++ return (unsigned int)clks[0] / KHz; + } + + static unsigned long clk_pxa25x_memory_get_rate(struct clk_hw *hw, +diff --git a/drivers/clk/pxa/clk-pxa27x.c b/drivers/clk/pxa/clk-pxa27x.c +index 5f9b54b024b9..267511df1e59 100644 +--- a/drivers/clk/pxa/clk-pxa27x.c ++++ b/drivers/clk/pxa/clk-pxa27x.c +@@ -80,7 +80,7 @@ unsigned int pxa27x_get_clk_frequency_khz(int info) + pr_info("System bus clock: %ld.%02ldMHz\n", + clks[4] / 1000000, (clks[4] % 1000000) / 10000); + } +- return (unsigned int)clks[0]; ++ return (unsigned int)clks[0] / KHz; + } + + bool pxa27x_is_ppll_disabled(void) +diff --git a/drivers/clk/pxa/clk-pxa3xx.c b/drivers/clk/pxa/clk-pxa3xx.c +index ac03ba49e9d1..4af4eed5f89f 100644 +--- a/drivers/clk/pxa/clk-pxa3xx.c ++++ b/drivers/clk/pxa/clk-pxa3xx.c +@@ -78,7 +78,7 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info) + pr_info("System bus clock: %ld.%02ldMHz\n", + clks[4] / 1000000, (clks[4] % 1000000) / 10000); + } +- return (unsigned int)clks[0]; ++ return (unsigned int)clks[0] / KHz; + } + + static unsigned long clk_pxa3xx_ac97_get_rate(struct clk_hw *hw, +diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c +index 54a756b90a37..457c540585f9 100644 +--- a/drivers/clk/qcom/gcc-apq8084.c ++++ b/drivers/clk/qcom/gcc-apq8084.c +@@ -2105,6 +2105,7 @@ static struct clk_branch gcc_ce1_clk = { + "ce1_clk_src", + }, + .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c +index c66f7bc2ae87..5d75bffab141 100644 +--- a/drivers/clk/qcom/gcc-msm8916.c ++++ b/drivers/clk/qcom/gcc-msm8916.c +@@ -2278,7 +2278,7 @@ static struct clk_branch gcc_prng_ahb_clk = { + .halt_check = BRANCH_HALT_VOTED, + .clkr = { + .enable_reg = 0x45004, +- .enable_mask = BIT(0), ++ .enable_mask = BIT(8), + .hw.init = &(struct clk_init_data){ + .name = "gcc_prng_ahb_clk", + .parent_names = (const char *[]){ +diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c +index c39d09874e74..f06a082e3e87 100644 +--- a/drivers/clk/qcom/gcc-msm8974.c ++++ b/drivers/clk/qcom/gcc-msm8974.c +@@ -1783,6 +1783,7 @@ static struct clk_branch gcc_ce1_clk = { + "ce1_clk_src", + }, + .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index d17eb4528a28..37f96117fd3d 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -578,7 +578,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { + COMPOSITE(0, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0, + RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS, + RK3288_CLKGATE_CON(2), 5, GFLAGS), +- MUX(SCLK_MAC, "mac_clk", mux_mac_p, 0, ++ MUX(SCLK_MAC, "mac_clk", mux_mac_p, CLK_SET_RATE_PARENT, + RK3288_CLKSEL_CON(21), 4, 1, MFLAGS), + GATE(SCLK_MACREF_OUT, "sclk_macref_out", "mac_clk", 0, + RK3288_CLKGATE_CON(5), 3, GFLAGS), +diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c +index 714d6ba782c8..f7890bf652e6 100644 +--- a/drivers/clk/samsung/clk-exynos4.c ++++ b/drivers/clk/samsung/clk-exynos4.c +@@ -85,6 +85,7 @@ + #define DIV_PERIL4 0xc560 + #define DIV_PERIL5 0xc564 + #define E4X12_DIV_CAM1 0xc568 ++#define E4X12_GATE_BUS_FSYS1 0xc744 + #define GATE_SCLK_CAM 0xc820 + #define GATE_IP_CAM 0xc920 + #define GATE_IP_TV 0xc924 +@@ -1095,6 +1096,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { + 0), + GATE(CLK_PPMUIMAGE, "ppmuimage", "aclk200", E4X12_GATE_IP_IMAGE, 9, 0, + 0), ++ GATE(CLK_TSADC, "tsadc", "aclk133", E4X12_GATE_BUS_FSYS1, 16, 0, 0), + GATE(CLK_MIPI_HSI, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0), + GATE(CLK_CHIPID, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0), + GATE(CLK_SYSREG, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1, +diff --git a/drivers/clk/samsung/clk-s5pv210.c b/drivers/clk/samsung/clk-s5pv210.c +index e668e479a697..bdd284249cc3 100644 +--- a/drivers/clk/samsung/clk-s5pv210.c ++++ b/drivers/clk/samsung/clk-s5pv210.c +@@ -828,6 +828,8 @@ static void __init __s5pv210_clk_init(struct device_node *np, + + s5pv210_clk_sleep_init(); + ++ samsung_clk_of_add_provider(np, ctx); ++ + pr_info("%s clocks: mout_apll = %ld, mout_mpll = %ld\n" + "\tmout_epll = %ld, mout_vpll = %ld\n", + is_s5p6442 ? "S5P6442" : "S5PV210", +diff --git a/drivers/clk/versatile/clk-sp810.c b/drivers/clk/versatile/clk-sp810.c +index c6e86a9a2aa3..5122ef25f595 100644 +--- a/drivers/clk/versatile/clk-sp810.c ++++ b/drivers/clk/versatile/clk-sp810.c +@@ -128,8 +128,8 @@ static struct clk *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec, + { + struct clk_sp810 *sp810 = data; + +- if (WARN_ON(clkspec->args_count != 1 || clkspec->args[0] > +- ARRAY_SIZE(sp810->timerclken))) ++ if (WARN_ON(clkspec->args_count != 1 || ++ clkspec->args[0] >= ARRAY_SIZE(sp810->timerclken))) + return NULL; + + return sp810->timerclken[clkspec->args[0]].clk; +diff --git a/drivers/crypto/vmx/ghashp8-ppc.pl b/drivers/crypto/vmx/ghashp8-ppc.pl +index 0a6f899839dd..d8429cb71f02 100644 +--- a/drivers/crypto/vmx/ghashp8-ppc.pl ++++ b/drivers/crypto/vmx/ghashp8-ppc.pl +@@ -61,6 +61,12 @@ $code=<<___; + mtspr 256,r0 + li r10,0x30 + lvx_u $H,0,r4 # load H ++ le?xor r7,r7,r7 ++ le?addi r7,r7,0x8 # need a vperm start with 08 ++ le?lvsr 5,0,r7 ++ le?vspltisb 6,0x0f ++ le?vxor 5,5,6 # set a b-endian mask ++ le?vperm $H,$H,$H,5 + + vspltisb $xC2,-16 # 0xf0 + vspltisb $t0,1 # one +diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c +index a19d2c71e205..fb91df1631d9 100644 +--- a/drivers/gpu/drm/i915/i915_drv.c ++++ b/drivers/gpu/drm/i915/i915_drv.c +@@ -647,15 +647,18 @@ static int i915_drm_suspend_late(struct drm_device *drm_dev, bool hibernation) + + pci_disable_device(drm_dev->pdev); + /* +- * During hibernation on some GEN4 platforms the BIOS may try to access ++ * During hibernation on some platforms the BIOS may try to access + * the device even though it's already in D3 and hang the machine. So + * leave the device in D0 on those platforms and hope the BIOS will +- * power down the device properly. Platforms where this was seen: +- * Lenovo Thinkpad X301, X61s ++ * power down the device properly. The issue was seen on multiple old ++ * GENs with different BIOS vendors, so having an explicit blacklist ++ * is inpractical; apply the workaround on everything pre GEN6. The ++ * platforms where the issue was seen: ++ * Lenovo Thinkpad X301, X61s, X60, T60, X41 ++ * Fujitsu FSC S7110 ++ * Acer Aspire 1830T + */ +- if (!(hibernation && +- drm_dev->pdev->subsystem_vendor == PCI_VENDOR_ID_LENOVO && +- INTEL_INFO(dev_priv)->gen == 4)) ++ if (!(hibernation && INTEL_INFO(dev_priv)->gen < 6)) + pci_set_power_state(drm_dev->pdev, PCI_D3hot); + + return 0; +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index 683a9b004c11..7d53d7e15455 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -3190,13 +3190,13 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); + #define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true) + + #define I915_READ64_2x32(lower_reg, upper_reg) ({ \ +- u32 upper, lower, tmp; \ +- tmp = I915_READ(upper_reg); \ ++ u32 upper, lower, old_upper, loop = 0; \ ++ upper = I915_READ(upper_reg); \ + do { \ +- upper = tmp; \ ++ old_upper = upper; \ + lower = I915_READ(lower_reg); \ +- tmp = I915_READ(upper_reg); \ +- } while (upper != tmp); \ ++ upper = I915_READ(upper_reg); \ ++ } while (upper != old_upper && loop++ < 2); \ + (u64)upper << 32 | lower; }) + + #define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg) +diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c +index a3190e793ed4..479024a4caad 100644 +--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c ++++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c +@@ -1025,6 +1025,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas, + u32 old_read = obj->base.read_domains; + u32 old_write = obj->base.write_domain; + ++ obj->dirty = 1; /* be paranoid */ + obj->base.write_domain = obj->base.pending_write_domain; + if (obj->base.write_domain == 0) + obj->base.pending_read_domains |= obj->base.read_domains; +@@ -1032,7 +1033,6 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas, + + i915_vma_move_to_active(vma, ring); + if (obj->base.write_domain) { +- obj->dirty = 1; + i915_gem_request_assign(&obj->last_write_req, req); + + intel_fb_obj_invalidate(obj, ring, ORIGIN_CS); +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 57c887843dc3..f208bbc6d58e 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13781,6 +13781,24 @@ void intel_modeset_init(struct drm_device *dev) + if (INTEL_INFO(dev)->num_pipes == 0) + return; + ++ /* ++ * There may be no VBT; and if the BIOS enabled SSC we can ++ * just keep using it to avoid unnecessary flicker. Whereas if the ++ * BIOS isn't using it, don't assume it will work even if the VBT ++ * indicates as much. ++ */ ++ if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) { ++ bool bios_lvds_use_ssc = !!(I915_READ(PCH_DREF_CONTROL) & ++ DREF_SSC1_ENABLE); ++ ++ if (dev_priv->vbt.lvds_use_ssc != bios_lvds_use_ssc) { ++ DRM_DEBUG_KMS("SSC %sabled by BIOS, overriding VBT which says %sabled\n", ++ bios_lvds_use_ssc ? "en" : "dis", ++ dev_priv->vbt.lvds_use_ssc ? "en" : "dis"); ++ dev_priv->vbt.lvds_use_ssc = bios_lvds_use_ssc; ++ } ++ } ++ + intel_init_display(dev); + intel_init_audio(dev); + +@@ -14266,7 +14284,6 @@ void intel_modeset_setup_hw_state(struct drm_device *dev, + + void intel_modeset_gem_init(struct drm_device *dev) + { +- struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_crtc *c; + struct drm_i915_gem_object *obj; + int ret; +@@ -14275,16 +14292,6 @@ void intel_modeset_gem_init(struct drm_device *dev) + intel_init_gt_powersave(dev); + mutex_unlock(&dev->struct_mutex); + +- /* +- * There may be no VBT; and if the BIOS enabled SSC we can +- * just keep using it to avoid unnecessary flicker. Whereas if the +- * BIOS isn't using it, don't assume it will work even if the VBT +- * indicates as much. +- */ +- if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) +- dev_priv->vbt.lvds_use_ssc = !!(I915_READ(PCH_DREF_CONTROL) & +- DREF_SSC1_ENABLE); +- + intel_modeset_init_hw(dev); + + intel_setup_overlay(dev); +diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c +index b1fe32b119ef..fb2983f77141 100644 +--- a/drivers/gpu/drm/i915/intel_dp.c ++++ b/drivers/gpu/drm/i915/intel_dp.c +@@ -4691,9 +4691,12 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) + + intel_dp_probe_oui(intel_dp); + +- if (!intel_dp_probe_mst(intel_dp)) ++ if (!intel_dp_probe_mst(intel_dp)) { ++ drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); ++ intel_dp_check_link_status(intel_dp); ++ drm_modeset_unlock(&dev->mode_config.connection_mutex); + goto mst_fail; +- ++ } + } else { + if (intel_dp->is_mst) { + if (intel_dp_check_mst_status(intel_dp) == -EINVAL) +@@ -4701,10 +4704,6 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) + } + + if (!intel_dp->is_mst) { +- /* +- * we'll check the link status via the normal hot plug path later - +- * but for short hpds we should check it now +- */ + drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); + intel_dp_check_link_status(intel_dp); + drm_modeset_unlock(&dev->mode_config.connection_mutex); +diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c +index 51966426addf..c7a0b8d8fac9 100644 +--- a/drivers/gpu/drm/i915/intel_dsi.c ++++ b/drivers/gpu/drm/i915/intel_dsi.c +@@ -1036,11 +1036,7 @@ void intel_dsi_init(struct drm_device *dev) + intel_connector->unregister = intel_connector_unregister; + + /* Pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI port C */ +- if (dev_priv->vbt.dsi.config->dual_link) { +- /* XXX: does dual link work on either pipe? */ +- intel_encoder->crtc_mask = (1 << PIPE_A); +- intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C)); +- } else if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIA) { ++ if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIA) { + intel_encoder->crtc_mask = (1 << PIPE_A); + intel_dsi->ports = (1 << PORT_A); + } else if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIC) { +@@ -1048,6 +1044,9 @@ void intel_dsi_init(struct drm_device *dev) + intel_dsi->ports = (1 << PORT_C); + } + ++ if (dev_priv->vbt.dsi.config->dual_link) ++ intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C)); ++ + /* Create a DSI host (and a device) for each port. */ + for_each_dsi_port(port, intel_dsi->ports) { + struct intel_dsi_host *host; +diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c +index 4a0a8b29b0a1..32248791bc4b 100644 +--- a/drivers/gpu/drm/qxl/qxl_display.c ++++ b/drivers/gpu/drm/qxl/qxl_display.c +@@ -160,9 +160,35 @@ static int qxl_add_monitors_config_modes(struct drm_connector *connector, + *pwidth = head->width; + *pheight = head->height; + drm_mode_probed_add(connector, mode); ++ /* remember the last custom size for mode validation */ ++ qdev->monitors_config_width = mode->hdisplay; ++ qdev->monitors_config_height = mode->vdisplay; + return 1; + } + ++static struct mode_size { ++ int w; ++ int h; ++} common_modes[] = { ++ { 640, 480}, ++ { 720, 480}, ++ { 800, 600}, ++ { 848, 480}, ++ {1024, 768}, ++ {1152, 768}, ++ {1280, 720}, ++ {1280, 800}, ++ {1280, 854}, ++ {1280, 960}, ++ {1280, 1024}, ++ {1440, 900}, ++ {1400, 1050}, ++ {1680, 1050}, ++ {1600, 1200}, ++ {1920, 1080}, ++ {1920, 1200} ++}; ++ + static int qxl_add_common_modes(struct drm_connector *connector, + unsigned pwidth, + unsigned pheight) +@@ -170,29 +196,6 @@ static int qxl_add_common_modes(struct drm_connector *connector, + struct drm_device *dev = connector->dev; + struct drm_display_mode *mode = NULL; + int i; +- struct mode_size { +- int w; +- int h; +- } common_modes[] = { +- { 640, 480}, +- { 720, 480}, +- { 800, 600}, +- { 848, 480}, +- {1024, 768}, +- {1152, 768}, +- {1280, 720}, +- {1280, 800}, +- {1280, 854}, +- {1280, 960}, +- {1280, 1024}, +- {1440, 900}, +- {1400, 1050}, +- {1680, 1050}, +- {1600, 1200}, +- {1920, 1080}, +- {1920, 1200} +- }; +- + for (i = 0; i < ARRAY_SIZE(common_modes); i++) { + mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, + 60, false, false, false); +@@ -823,11 +826,22 @@ static int qxl_conn_get_modes(struct drm_connector *connector) + static int qxl_conn_mode_valid(struct drm_connector *connector, + struct drm_display_mode *mode) + { ++ struct drm_device *ddev = connector->dev; ++ struct qxl_device *qdev = ddev->dev_private; ++ int i; ++ + /* TODO: is this called for user defined modes? (xrandr --add-mode) + * TODO: check that the mode fits in the framebuffer */ +- DRM_DEBUG("%s: %dx%d status=%d\n", mode->name, mode->hdisplay, +- mode->vdisplay, mode->status); +- return MODE_OK; ++ ++ if(qdev->monitors_config_width == mode->hdisplay && ++ qdev->monitors_config_height == mode->vdisplay) ++ return MODE_OK; ++ ++ for (i = 0; i < ARRAY_SIZE(common_modes); i++) { ++ if (common_modes[i].w == mode->hdisplay && common_modes[i].h == mode->vdisplay) ++ return MODE_OK; ++ } ++ return MODE_BAD; + } + + static struct drm_encoder *qxl_best_encoder(struct drm_connector *connector) +diff --git a/drivers/gpu/drm/qxl/qxl_drv.h b/drivers/gpu/drm/qxl/qxl_drv.h +index 7c6cafe21f5f..e66143cc1a7a 100644 +--- a/drivers/gpu/drm/qxl/qxl_drv.h ++++ b/drivers/gpu/drm/qxl/qxl_drv.h +@@ -325,6 +325,8 @@ struct qxl_device { + struct work_struct fb_work; + + struct drm_property *hotplug_mode_update_property; ++ int monitors_config_width; ++ int monitors_config_height; + }; + + /* forward declaration for QXL_INFO_IO */ +diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c +index b435c859dcbc..447dbfa6c793 100644 +--- a/drivers/gpu/drm/radeon/atombios_dp.c ++++ b/drivers/gpu/drm/radeon/atombios_dp.c +@@ -171,8 +171,9 @@ radeon_dp_aux_transfer_atom(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) + return -E2BIG; + + tx_buf[0] = msg->address & 0xff; +- tx_buf[1] = msg->address >> 8; +- tx_buf[2] = msg->request << 4; ++ tx_buf[1] = (msg->address >> 8) & 0xff; ++ tx_buf[2] = (msg->request << 4) | ++ ((msg->address >> 16) & 0xf); + tx_buf[3] = msg->size ? (msg->size - 1) : 0; + + switch (msg->request & ~DP_AUX_I2C_MOT) { +diff --git a/drivers/gpu/drm/radeon/radeon_audio.c b/drivers/gpu/drm/radeon/radeon_audio.c +index 59b3d3221294..d77dd1430d58 100644 +--- a/drivers/gpu/drm/radeon/radeon_audio.c ++++ b/drivers/gpu/drm/radeon/radeon_audio.c +@@ -522,13 +522,15 @@ static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, + return err; + } + +- if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { +- if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) +- frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; +- else +- frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; +- } else { +- frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; ++ if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) { ++ if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { ++ if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) ++ frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; ++ else ++ frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; ++ } else { ++ frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; ++ } + } + + err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); +diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c +index 94b21ae70ef7..5a2cafb4f1bc 100644 +--- a/drivers/gpu/drm/radeon/radeon_connectors.c ++++ b/drivers/gpu/drm/radeon/radeon_connectors.c +@@ -95,6 +95,11 @@ void radeon_connector_hotplug(struct drm_connector *connector) + if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { + drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); + } else if (radeon_dp_needs_link_train(radeon_connector)) { ++ /* Don't try to start link training before we ++ * have the dpcd */ ++ if (!radeon_dp_getdpcd(radeon_connector)) ++ return; ++ + /* set it to OFF so that drm_helper_connector_dpms() + * won't return immediately since the current state + * is ON at this point. +diff --git a/drivers/gpu/drm/radeon/radeon_dp_auxch.c b/drivers/gpu/drm/radeon/radeon_dp_auxch.c +index fcbd60bb0349..3b0c229d7dcd 100644 +--- a/drivers/gpu/drm/radeon/radeon_dp_auxch.c ++++ b/drivers/gpu/drm/radeon/radeon_dp_auxch.c +@@ -116,8 +116,8 @@ radeon_dp_aux_transfer_native(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg + AUX_SW_WR_BYTES(bytes)); + + /* write the data header into the registers */ +- /* request, addres, msg size */ +- byte = (msg->request << 4); ++ /* request, address, msg size */ ++ byte = (msg->request << 4) | ((msg->address >> 16) & 0xf); + WREG32(AUX_SW_DATA + aux_offset[instance], + AUX_SW_DATA_MASK(byte) | AUX_SW_AUTOINCREMENT_DISABLE); + +diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c +index a2dbbbe0d8d7..39bf74793b8b 100644 +--- a/drivers/hid/hid-cp2112.c ++++ b/drivers/hid/hid-cp2112.c +@@ -537,7 +537,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, + struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data; + struct hid_device *hdev = dev->hdev; + u8 buf[64]; +- __be16 word; ++ __le16 word; + ssize_t count; + size_t read_length = 0; + unsigned int retries; +@@ -554,7 +554,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, + if (I2C_SMBUS_READ == read_write) + count = cp2112_read_req(buf, addr, read_length); + else +- count = cp2112_write_req(buf, addr, data->byte, NULL, ++ count = cp2112_write_req(buf, addr, command, NULL, + 0); + break; + case I2C_SMBUS_BYTE_DATA: +@@ -569,7 +569,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, + break; + case I2C_SMBUS_WORD_DATA: + read_length = 2; +- word = cpu_to_be16(data->word); ++ word = cpu_to_le16(data->word); + + if (I2C_SMBUS_READ == read_write) + count = cp2112_write_read_req(buf, addr, read_length, +@@ -582,7 +582,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, + size = I2C_SMBUS_WORD_DATA; + read_write = I2C_SMBUS_READ; + read_length = 2; +- word = cpu_to_be16(data->word); ++ word = cpu_to_le16(data->word); + + count = cp2112_write_read_req(buf, addr, read_length, command, + (u8 *)&word, 2); +@@ -675,7 +675,7 @@ static int cp2112_xfer(struct i2c_adapter *adap, u16 addr, + data->byte = buf[0]; + break; + case I2C_SMBUS_WORD_DATA: +- data->word = be16_to_cpup((__be16 *)buf); ++ data->word = le16_to_cpup((__le16 *)buf); + break; + case I2C_SMBUS_BLOCK_DATA: + if (read_length > I2C_SMBUS_BLOCK_MAX) { +diff --git a/drivers/hid/usbhid/hid-core.c b/drivers/hid/usbhid/hid-core.c +index bfbe1bedda7f..eab5bd6a2442 100644 +--- a/drivers/hid/usbhid/hid-core.c ++++ b/drivers/hid/usbhid/hid-core.c +@@ -164,7 +164,7 @@ static void hid_io_error(struct hid_device *hid) + if (time_after(jiffies, usbhid->stop_retry)) { + + /* Retries failed, so do a port reset unless we lack bandwidth*/ +- if (test_bit(HID_NO_BANDWIDTH, &usbhid->iofl) ++ if (!test_bit(HID_NO_BANDWIDTH, &usbhid->iofl) + && !test_and_set_bit(HID_RESET_PENDING, &usbhid->iofl)) { + + schedule_work(&usbhid->reset_work); +diff --git a/drivers/iio/gyro/Kconfig b/drivers/iio/gyro/Kconfig +index b3d0e94f72eb..8d2439345673 100644 +--- a/drivers/iio/gyro/Kconfig ++++ b/drivers/iio/gyro/Kconfig +@@ -53,7 +53,8 @@ config ADXRS450 + config BMG160 + tristate "BOSCH BMG160 Gyro Sensor" + depends on I2C +- select IIO_TRIGGERED_BUFFER if IIO_BUFFER ++ select IIO_BUFFER ++ select IIO_TRIGGERED_BUFFER + help + Say yes here to build support for Bosch BMG160 Tri-axis Gyro Sensor + driver. This driver also supports BMI055 gyroscope. +diff --git a/drivers/iio/imu/adis16400_core.c b/drivers/iio/imu/adis16400_core.c +index 2fd68f2219a7..d42e4fe2c7ed 100644 +--- a/drivers/iio/imu/adis16400_core.c ++++ b/drivers/iio/imu/adis16400_core.c +@@ -780,7 +780,7 @@ static struct adis16400_chip_info adis16400_chips[] = { + .flags = ADIS16400_HAS_PROD_ID | + ADIS16400_HAS_SERIAL_NUMBER | + ADIS16400_BURST_DIAG_STAT, +- .gyro_scale_micro = IIO_DEGREE_TO_RAD(10000), /* 0.01 deg/s */ ++ .gyro_scale_micro = IIO_DEGREE_TO_RAD(40000), /* 0.04 deg/s */ + .accel_scale_micro = IIO_G_TO_M_S_2(833), /* 1/1200 g */ + .temp_scale_nano = 73860000, /* 0.07386 C */ + .temp_offset = 31000000 / 73860, /* 31 C = 0x00 */ +diff --git a/drivers/iio/imu/adis16480.c b/drivers/iio/imu/adis16480.c +index 989605dd6f78..b94bfd3f595b 100644 +--- a/drivers/iio/imu/adis16480.c ++++ b/drivers/iio/imu/adis16480.c +@@ -110,6 +110,10 @@ + struct adis16480_chip_info { + unsigned int num_channels; + const struct iio_chan_spec *channels; ++ unsigned int gyro_max_val; ++ unsigned int gyro_max_scale; ++ unsigned int accel_max_val; ++ unsigned int accel_max_scale; + }; + + struct adis16480 { +@@ -497,19 +501,21 @@ static int adis16480_set_filter_freq(struct iio_dev *indio_dev, + static int adis16480_read_raw(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, int *val, int *val2, long info) + { ++ struct adis16480 *st = iio_priv(indio_dev); ++ + switch (info) { + case IIO_CHAN_INFO_RAW: + return adis_single_conversion(indio_dev, chan, 0, val); + case IIO_CHAN_INFO_SCALE: + switch (chan->type) { + case IIO_ANGL_VEL: +- *val = 0; +- *val2 = IIO_DEGREE_TO_RAD(20000); /* 0.02 degree/sec */ +- return IIO_VAL_INT_PLUS_MICRO; ++ *val = st->chip_info->gyro_max_scale; ++ *val2 = st->chip_info->gyro_max_val; ++ return IIO_VAL_FRACTIONAL; + case IIO_ACCEL: +- *val = 0; +- *val2 = IIO_G_TO_M_S_2(800); /* 0.8 mg */ +- return IIO_VAL_INT_PLUS_MICRO; ++ *val = st->chip_info->accel_max_scale; ++ *val2 = st->chip_info->accel_max_val; ++ return IIO_VAL_FRACTIONAL; + case IIO_MAGN: + *val = 0; + *val2 = 100; /* 0.0001 gauss */ +@@ -674,18 +680,39 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { + [ADIS16375] = { + .channels = adis16485_channels, + .num_channels = ARRAY_SIZE(adis16485_channels), ++ /* ++ * storing the value in rad/degree and the scale in degree ++ * gives us the result in rad and better precession than ++ * storing the scale directly in rad. ++ */ ++ .gyro_max_val = IIO_RAD_TO_DEGREE(22887), ++ .gyro_max_scale = 300, ++ .accel_max_val = IIO_M_S_2_TO_G(21973), ++ .accel_max_scale = 18, + }, + [ADIS16480] = { + .channels = adis16480_channels, + .num_channels = ARRAY_SIZE(adis16480_channels), ++ .gyro_max_val = IIO_RAD_TO_DEGREE(22500), ++ .gyro_max_scale = 450, ++ .accel_max_val = IIO_M_S_2_TO_G(12500), ++ .accel_max_scale = 5, + }, + [ADIS16485] = { + .channels = adis16485_channels, + .num_channels = ARRAY_SIZE(adis16485_channels), ++ .gyro_max_val = IIO_RAD_TO_DEGREE(22500), ++ .gyro_max_scale = 450, ++ .accel_max_val = IIO_M_S_2_TO_G(20000), ++ .accel_max_scale = 5, + }, + [ADIS16488] = { + .channels = adis16480_channels, + .num_channels = ARRAY_SIZE(adis16480_channels), ++ .gyro_max_val = IIO_RAD_TO_DEGREE(22500), ++ .gyro_max_scale = 450, ++ .accel_max_val = IIO_M_S_2_TO_G(22500), ++ .accel_max_scale = 18, + }, + }; + +diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c +index df919f44d513..7fa280b28ecb 100644 +--- a/drivers/iio/industrialio-buffer.c ++++ b/drivers/iio/industrialio-buffer.c +@@ -151,7 +151,7 @@ unsigned int iio_buffer_poll(struct file *filp, + struct iio_buffer *rb = indio_dev->buffer; + + if (!indio_dev->info) +- return -ENODEV; ++ return 0; + + poll_wait(filp, &rb->pollq, wait); + if (iio_buffer_ready(indio_dev, rb, rb->watermark, 0)) +diff --git a/drivers/iio/industrialio-event.c b/drivers/iio/industrialio-event.c +index a99692ba91bc..69b8c338fa89 100644 +--- a/drivers/iio/industrialio-event.c ++++ b/drivers/iio/industrialio-event.c +@@ -84,7 +84,7 @@ static unsigned int iio_event_poll(struct file *filep, + unsigned int events = 0; + + if (!indio_dev->info) +- return -ENODEV; ++ return events; + + poll_wait(filep, &ev_int->wait, wait); + +diff --git a/drivers/of/address.c b/drivers/of/address.c +index 8bfda6ade2c0..384574c3987c 100644 +--- a/drivers/of/address.c ++++ b/drivers/of/address.c +@@ -845,10 +845,10 @@ struct device_node *of_find_matching_node_by_address(struct device_node *from, + struct resource res; + + while (dn) { +- if (of_address_to_resource(dn, 0, &res)) +- continue; +- if (res.start == base_address) ++ if (!of_address_to_resource(dn, 0, &res) && ++ res.start == base_address) + return dn; ++ + dn = of_find_matching_node(dn, matches); + } + +diff --git a/drivers/pci/access.c b/drivers/pci/access.c +index d9b64a175990..b965c12168b7 100644 +--- a/drivers/pci/access.c ++++ b/drivers/pci/access.c +@@ -439,6 +439,56 @@ static const struct pci_vpd_ops pci_vpd_pci22_ops = { + .release = pci_vpd_pci22_release, + }; + ++static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count, ++ void *arg) ++{ ++ struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn)); ++ ssize_t ret; ++ ++ if (!tdev) ++ return -ENODEV; ++ ++ ret = pci_read_vpd(tdev, pos, count, arg); ++ pci_dev_put(tdev); ++ return ret; ++} ++ ++static ssize_t pci_vpd_f0_write(struct pci_dev *dev, loff_t pos, size_t count, ++ const void *arg) ++{ ++ struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn)); ++ ssize_t ret; ++ ++ if (!tdev) ++ return -ENODEV; ++ ++ ret = pci_write_vpd(tdev, pos, count, arg); ++ pci_dev_put(tdev); ++ return ret; ++} ++ ++static const struct pci_vpd_ops pci_vpd_f0_ops = { ++ .read = pci_vpd_f0_read, ++ .write = pci_vpd_f0_write, ++ .release = pci_vpd_pci22_release, ++}; ++ ++static int pci_vpd_f0_dev_check(struct pci_dev *dev) ++{ ++ struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn)); ++ int ret = 0; ++ ++ if (!tdev) ++ return -ENODEV; ++ if (!tdev->vpd || !tdev->multifunction || ++ dev->class != tdev->class || dev->vendor != tdev->vendor || ++ dev->device != tdev->device) ++ ret = -ENODEV; ++ ++ pci_dev_put(tdev); ++ return ret; ++} ++ + int pci_vpd_pci22_init(struct pci_dev *dev) + { + struct pci_vpd_pci22 *vpd; +@@ -447,12 +497,21 @@ int pci_vpd_pci22_init(struct pci_dev *dev) + cap = pci_find_capability(dev, PCI_CAP_ID_VPD); + if (!cap) + return -ENODEV; ++ if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) { ++ int ret = pci_vpd_f0_dev_check(dev); ++ ++ if (ret) ++ return ret; ++ } + vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC); + if (!vpd) + return -ENOMEM; + + vpd->base.len = PCI_VPD_PCI22_SIZE; +- vpd->base.ops = &pci_vpd_pci22_ops; ++ if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) ++ vpd->base.ops = &pci_vpd_f0_ops; ++ else ++ vpd->base.ops = &pci_vpd_pci22_ops; + mutex_init(&vpd->lock); + vpd->cap = cap; + vpd->busy = false; +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index c6dc1dfd25d5..804cd3b02c66 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -1576,6 +1576,18 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB3 + + #endif + ++static void quirk_jmicron_async_suspend(struct pci_dev *dev) ++{ ++ if (dev->multifunction) { ++ device_disable_async_suspend(&dev->dev); ++ dev_info(&dev->dev, "async suspend disabled to avoid multi-function power-on ordering issue\n"); ++ } ++} ++DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE, 8, quirk_jmicron_async_suspend); ++DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_CLASS_STORAGE_SATA_AHCI, 0, quirk_jmicron_async_suspend); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_JMICRON, 0x2362, quirk_jmicron_async_suspend); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_JMICRON, 0x236f, quirk_jmicron_async_suspend); ++ + #ifdef CONFIG_X86_IO_APIC + static void quirk_alder_ioapic(struct pci_dev *pdev) + { +@@ -1903,6 +1915,15 @@ static void quirk_netmos(struct pci_dev *dev) + DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, + PCI_CLASS_COMMUNICATION_SERIAL, 8, quirk_netmos); + ++static void quirk_f0_vpd_link(struct pci_dev *dev) ++{ ++ if (!dev->multifunction || !PCI_FUNC(dev->devfn)) ++ return; ++ dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0; ++} ++DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, ++ PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link); ++ + static void quirk_e100_interrupt(struct pci_dev *dev) + { + u16 command, pmcsr; +@@ -2838,12 +2859,15 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors); + + static void fixup_ti816x_class(struct pci_dev *dev) + { ++ u32 class = dev->class; ++ + /* TI 816x devices do not have class code set when in PCIe boot mode */ +- dev_info(&dev->dev, "Setting PCI class for 816x PCIe device\n"); +- dev->class = PCI_CLASS_MULTIMEDIA_VIDEO; ++ dev->class = PCI_CLASS_MULTIMEDIA_VIDEO << 8; ++ dev_info(&dev->dev, "PCI class overridden (%#08x -> %#08x)\n", ++ class, dev->class); + } + DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_TI, 0xb800, +- PCI_CLASS_NOT_DEFINED, 0, fixup_ti816x_class); ++ PCI_CLASS_NOT_DEFINED, 0, fixup_ti816x_class); + + /* Some PCIe devices do not work reliably with the claimed maximum + * payload size supported. +diff --git a/drivers/regulator/pbias-regulator.c b/drivers/regulator/pbias-regulator.c +index bd2b75c0d1d1..4fa7bcaf454e 100644 +--- a/drivers/regulator/pbias-regulator.c ++++ b/drivers/regulator/pbias-regulator.c +@@ -30,6 +30,7 @@ + struct pbias_reg_info { + u32 enable; + u32 enable_mask; ++ u32 disable_val; + u32 vmode; + unsigned int enable_time; + char *name; +@@ -62,6 +63,7 @@ static const struct pbias_reg_info pbias_mmc_omap2430 = { + .enable = BIT(1), + .enable_mask = BIT(1), + .vmode = BIT(0), ++ .disable_val = 0, + .enable_time = 100, + .name = "pbias_mmc_omap2430" + }; +@@ -77,6 +79,7 @@ static const struct pbias_reg_info pbias_sim_omap3 = { + static const struct pbias_reg_info pbias_mmc_omap4 = { + .enable = BIT(26) | BIT(22), + .enable_mask = BIT(26) | BIT(25) | BIT(22), ++ .disable_val = BIT(25), + .vmode = BIT(21), + .enable_time = 100, + .name = "pbias_mmc_omap4" +@@ -85,6 +88,7 @@ static const struct pbias_reg_info pbias_mmc_omap4 = { + static const struct pbias_reg_info pbias_mmc_omap5 = { + .enable = BIT(27) | BIT(26), + .enable_mask = BIT(27) | BIT(25) | BIT(26), ++ .disable_val = BIT(25), + .vmode = BIT(21), + .enable_time = 100, + .name = "pbias_mmc_omap5" +@@ -159,6 +163,7 @@ static int pbias_regulator_probe(struct platform_device *pdev) + drvdata[data_idx].desc.enable_reg = res->start; + drvdata[data_idx].desc.enable_mask = info->enable_mask; + drvdata[data_idx].desc.enable_val = info->enable; ++ drvdata[data_idx].desc.disable_val = info->disable_val; + + cfg.init_data = pbias_matches[idx].init_data; + cfg.driver_data = &drvdata[data_idx]; +diff --git a/drivers/s390/char/sclp_early.c b/drivers/s390/char/sclp_early.c +index 1efa4fdb7fe2..f45cd0cb1b32 100644 +--- a/drivers/s390/char/sclp_early.c ++++ b/drivers/s390/char/sclp_early.c +@@ -7,6 +7,7 @@ + #define KMSG_COMPONENT "sclp_early" + #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt + ++#include + #include + #include + #include +diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c +index c956395cf46f..c89bada875f8 100644 +--- a/drivers/soc/tegra/pmc.c ++++ b/drivers/soc/tegra/pmc.c +@@ -732,12 +732,12 @@ void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc) + u32 value, checksum; + + if (!pmc->soc->has_tsense_reset) +- goto out; ++ return; + + np = of_find_node_by_name(pmc->dev->of_node, "i2c-thermtrip"); + if (!np) { + dev_warn(dev, "i2c-thermtrip node not found, %s.\n", disabled); +- goto out; ++ return; + } + + if (of_property_read_u32(np, "nvidia,i2c-controller-id", &ctrl_id)) { +diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c +index 37875cf942f7..a5067739ee93 100644 +--- a/drivers/spi/spi-bcm2835.c ++++ b/drivers/spi/spi-bcm2835.c +@@ -257,13 +257,11 @@ static int bcm2835_spi_transfer_one(struct spi_master *master, + spi_used_hz = cdiv ? (clk_hz / cdiv) : (clk_hz / 65536); + bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv); + +- /* handle all the modes */ ++ /* handle all the 3-wire mode */ + if ((spi->mode & SPI_3WIRE) && (tfr->rx_buf)) + cs |= BCM2835_SPI_CS_REN; +- if (spi->mode & SPI_CPOL) +- cs |= BCM2835_SPI_CS_CPOL; +- if (spi->mode & SPI_CPHA) +- cs |= BCM2835_SPI_CS_CPHA; ++ else ++ cs &= ~BCM2835_SPI_CS_REN; + + /* for gpio_cs set dummy CS so that no HW-CS get changed + * we can not run this in bcm2835_spi_set_cs, as it does +@@ -291,6 +289,25 @@ static int bcm2835_spi_transfer_one(struct spi_master *master, + return bcm2835_spi_transfer_one_irq(master, spi, tfr, cs); + } + ++static int bcm2835_spi_prepare_message(struct spi_master *master, ++ struct spi_message *msg) ++{ ++ struct spi_device *spi = msg->spi; ++ struct bcm2835_spi *bs = spi_master_get_devdata(master); ++ u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS); ++ ++ cs &= ~(BCM2835_SPI_CS_CPOL | BCM2835_SPI_CS_CPHA); ++ ++ if (spi->mode & SPI_CPOL) ++ cs |= BCM2835_SPI_CS_CPOL; ++ if (spi->mode & SPI_CPHA) ++ cs |= BCM2835_SPI_CS_CPHA; ++ ++ bcm2835_wr(bs, BCM2835_SPI_CS, cs); ++ ++ return 0; ++} ++ + static void bcm2835_spi_handle_err(struct spi_master *master, + struct spi_message *msg) + { +@@ -429,6 +446,7 @@ static int bcm2835_spi_probe(struct platform_device *pdev) + master->set_cs = bcm2835_spi_set_cs; + master->transfer_one = bcm2835_spi_transfer_one; + master->handle_err = bcm2835_spi_handle_err; ++ master->prepare_message = bcm2835_spi_prepare_message; + master->dev.of_node = pdev->dev.of_node; + + bs = spi_master_get_devdata(master); +diff --git a/drivers/spi/spi-bitbang-txrx.h b/drivers/spi/spi-bitbang-txrx.h +index 06b34e5bcfa3..47bb9b898dfd 100644 +--- a/drivers/spi/spi-bitbang-txrx.h ++++ b/drivers/spi/spi-bitbang-txrx.h +@@ -49,7 +49,7 @@ bitbang_txrx_be_cpha0(struct spi_device *spi, + { + /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */ + +- bool oldbit = !(word & 1); ++ u32 oldbit = (!(word & (1<<(bits-1)))) << 31; + /* clock starts at inactive polarity */ + for (word <<= (32 - bits); likely(bits); bits--) { + +@@ -81,7 +81,7 @@ bitbang_txrx_be_cpha1(struct spi_device *spi, + { + /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */ + +- bool oldbit = !(word & (1 << 31)); ++ u32 oldbit = (!(word & (1<<(bits-1)))) << 31; + /* clock starts at inactive polarity */ + for (word <<= (32 - bits); likely(bits); bits--) { + +diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c +index eb03e1215195..7edede6e024b 100644 +--- a/drivers/spi/spi-dw-mmio.c ++++ b/drivers/spi/spi-dw-mmio.c +@@ -74,6 +74,9 @@ static int dw_spi_mmio_probe(struct platform_device *pdev) + + dws->max_freq = clk_get_rate(dwsmmio->clk); + ++ of_property_read_u32(pdev->dev.of_node, "reg-io-width", ++ &dws->reg_io_width); ++ + num_cs = 4; + + if (pdev->dev.of_node) +diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c +index 8d67d03c71eb..4fbfcdc5cb24 100644 +--- a/drivers/spi/spi-dw.c ++++ b/drivers/spi/spi-dw.c +@@ -194,7 +194,7 @@ static void dw_writer(struct dw_spi *dws) + else + txw = *(u16 *)(dws->tx); + } +- dw_writel(dws, DW_SPI_DR, txw); ++ dw_write_io_reg(dws, DW_SPI_DR, txw); + dws->tx += dws->n_bytes; + } + } +@@ -205,7 +205,7 @@ static void dw_reader(struct dw_spi *dws) + u16 rxw; + + while (max--) { +- rxw = dw_readl(dws, DW_SPI_DR); ++ rxw = dw_read_io_reg(dws, DW_SPI_DR); + /* Care rx only if the transfer's original "rx" is not null */ + if (dws->rx_end - dws->len) { + if (dws->n_bytes == 1) +diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h +index 6c91391c1a4f..b75ed327d5a2 100644 +--- a/drivers/spi/spi-dw.h ++++ b/drivers/spi/spi-dw.h +@@ -109,6 +109,7 @@ struct dw_spi { + u32 fifo_len; /* depth of the FIFO buffer */ + u32 max_freq; /* max bus freq supported */ + ++ u32 reg_io_width; /* DR I/O width in bytes */ + u16 bus_num; + u16 num_cs; /* supported slave numbers */ + +@@ -145,11 +146,45 @@ static inline u32 dw_readl(struct dw_spi *dws, u32 offset) + return __raw_readl(dws->regs + offset); + } + ++static inline u16 dw_readw(struct dw_spi *dws, u32 offset) ++{ ++ return __raw_readw(dws->regs + offset); ++} ++ + static inline void dw_writel(struct dw_spi *dws, u32 offset, u32 val) + { + __raw_writel(val, dws->regs + offset); + } + ++static inline void dw_writew(struct dw_spi *dws, u32 offset, u16 val) ++{ ++ __raw_writew(val, dws->regs + offset); ++} ++ ++static inline u32 dw_read_io_reg(struct dw_spi *dws, u32 offset) ++{ ++ switch (dws->reg_io_width) { ++ case 2: ++ return dw_readw(dws, offset); ++ case 4: ++ default: ++ return dw_readl(dws, offset); ++ } ++} ++ ++static inline void dw_write_io_reg(struct dw_spi *dws, u32 offset, u32 val) ++{ ++ switch (dws->reg_io_width) { ++ case 2: ++ dw_writew(dws, offset, val); ++ break; ++ case 4: ++ default: ++ dw_writel(dws, offset, val); ++ break; ++ } ++} ++ + static inline void spi_enable_chip(struct dw_spi *dws, int enable) + { + dw_writel(dws, DW_SPI_SSIENR, (enable ? 1 : 0)); +diff --git a/drivers/spi/spi-img-spfi.c b/drivers/spi/spi-img-spfi.c +index acce90ac7371..bb916c8d40db 100644 +--- a/drivers/spi/spi-img-spfi.c ++++ b/drivers/spi/spi-img-spfi.c +@@ -105,6 +105,10 @@ struct img_spfi { + bool rx_dma_busy; + }; + ++struct img_spfi_device_data { ++ bool gpio_requested; ++}; ++ + static inline u32 spfi_readl(struct img_spfi *spfi, u32 reg) + { + return readl(spfi->regs + reg); +@@ -267,15 +271,15 @@ static int img_spfi_start_pio(struct spi_master *master, + cpu_relax(); + } + +- ret = spfi_wait_all_done(spfi); +- if (ret < 0) +- return ret; +- + if (rx_bytes > 0 || tx_bytes > 0) { + dev_err(spfi->dev, "PIO transfer timed out\n"); + return -ETIMEDOUT; + } + ++ ret = spfi_wait_all_done(spfi); ++ if (ret < 0) ++ return ret; ++ + return 0; + } + +@@ -440,21 +444,50 @@ static int img_spfi_unprepare(struct spi_master *master, + + static int img_spfi_setup(struct spi_device *spi) + { +- int ret; +- +- ret = gpio_request_one(spi->cs_gpio, (spi->mode & SPI_CS_HIGH) ? +- GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH, +- dev_name(&spi->dev)); +- if (ret) +- dev_err(&spi->dev, "can't request chipselect gpio %d\n", ++ int ret = -EINVAL; ++ struct img_spfi_device_data *spfi_data = spi_get_ctldata(spi); ++ ++ if (!spfi_data) { ++ spfi_data = kzalloc(sizeof(*spfi_data), GFP_KERNEL); ++ if (!spfi_data) ++ return -ENOMEM; ++ spfi_data->gpio_requested = false; ++ spi_set_ctldata(spi, spfi_data); ++ } ++ if (!spfi_data->gpio_requested) { ++ ret = gpio_request_one(spi->cs_gpio, ++ (spi->mode & SPI_CS_HIGH) ? ++ GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH, ++ dev_name(&spi->dev)); ++ if (ret) ++ dev_err(&spi->dev, "can't request chipselect gpio %d\n", + spi->cs_gpio); +- ++ else ++ spfi_data->gpio_requested = true; ++ } else { ++ if (gpio_is_valid(spi->cs_gpio)) { ++ int mode = ((spi->mode & SPI_CS_HIGH) ? ++ GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH); ++ ++ ret = gpio_direction_output(spi->cs_gpio, mode); ++ if (ret) ++ dev_err(&spi->dev, "chipselect gpio %d setup failed (%d)\n", ++ spi->cs_gpio, ret); ++ } ++ } + return ret; + } + + static void img_spfi_cleanup(struct spi_device *spi) + { +- gpio_free(spi->cs_gpio); ++ struct img_spfi_device_data *spfi_data = spi_get_ctldata(spi); ++ ++ if (spfi_data) { ++ if (spfi_data->gpio_requested) ++ gpio_free(spi->cs_gpio); ++ kfree(spfi_data); ++ spi_set_ctldata(spi, NULL); ++ } + } + + static void img_spfi_config(struct spi_master *master, struct spi_device *spi, +diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c +index bcc7c635d8e7..7872f3c78b51 100644 +--- a/drivers/spi/spi-sh-msiof.c ++++ b/drivers/spi/spi-sh-msiof.c +@@ -48,8 +48,8 @@ struct sh_msiof_spi_priv { + const struct sh_msiof_chipdata *chipdata; + struct sh_msiof_spi_info *info; + struct completion done; +- int tx_fifo_size; +- int rx_fifo_size; ++ unsigned int tx_fifo_size; ++ unsigned int rx_fifo_size; + void *tx_dma_page; + void *rx_dma_page; + dma_addr_t tx_dma_addr; +@@ -95,8 +95,6 @@ struct sh_msiof_spi_priv { + #define MDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */ + #define MDR2_GRPMASK1 0x00000001 /* Group Output Mask 1 (SH, A1) */ + +-#define MAX_WDLEN 256U +- + /* TSCR and RSCR */ + #define SCR_BRPS_MASK 0x1f00 /* Prescaler Setting (1-32) */ + #define SCR_BRPS(i) (((i) - 1) << 8) +@@ -850,7 +848,12 @@ static int sh_msiof_transfer_one(struct spi_master *master, + * DMA supports 32-bit words only, hence pack 8-bit and 16-bit + * words, with byte resp. word swapping. + */ +- unsigned int l = min(len, MAX_WDLEN * 4); ++ unsigned int l = 0; ++ ++ if (tx_buf) ++ l = min(len, p->tx_fifo_size * 4); ++ if (rx_buf) ++ l = min(len, p->rx_fifo_size * 4); + + if (bits <= 8) { + if (l & 3) +@@ -963,7 +966,7 @@ static const struct sh_msiof_chipdata sh_data = { + + static const struct sh_msiof_chipdata r8a779x_data = { + .tx_fifo_size = 64, +- .rx_fifo_size = 256, ++ .rx_fifo_size = 64, + .master_flags = SPI_MASTER_MUST_TX, + }; + +diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c +index 133f53a9c1d4..a339c1e9997a 100644 +--- a/drivers/spi/spi-xilinx.c ++++ b/drivers/spi/spi-xilinx.c +@@ -249,19 +249,23 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) + xspi->tx_ptr = t->tx_buf; + xspi->rx_ptr = t->rx_buf; + remaining_words = t->len / xspi->bytes_per_word; +- reinit_completion(&xspi->done); + + if (xspi->irq >= 0 && remaining_words > xspi->buffer_size) { ++ u32 isr; + use_irq = true; +- xspi->write_fn(XSPI_INTR_TX_EMPTY, +- xspi->regs + XIPIF_V123B_IISR_OFFSET); +- /* Enable the global IPIF interrupt */ +- xspi->write_fn(XIPIF_V123B_GINTR_ENABLE, +- xspi->regs + XIPIF_V123B_DGIER_OFFSET); + /* Inhibit irq to avoid spurious irqs on tx_empty*/ + cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET); + xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT, + xspi->regs + XSPI_CR_OFFSET); ++ /* ACK old irqs (if any) */ ++ isr = xspi->read_fn(xspi->regs + XIPIF_V123B_IISR_OFFSET); ++ if (isr) ++ xspi->write_fn(isr, ++ xspi->regs + XIPIF_V123B_IISR_OFFSET); ++ /* Enable the global IPIF interrupt */ ++ xspi->write_fn(XIPIF_V123B_GINTR_ENABLE, ++ xspi->regs + XIPIF_V123B_DGIER_OFFSET); ++ reinit_completion(&xspi->done); + } + + while (remaining_words) { +@@ -302,8 +306,10 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) + remaining_words -= n_words; + } + +- if (use_irq) ++ if (use_irq) { + xspi->write_fn(0, xspi->regs + XIPIF_V123B_DGIER_OFFSET); ++ xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); ++ } + + return t->len; + } +diff --git a/drivers/staging/comedi/drivers/adl_pci7x3x.c b/drivers/staging/comedi/drivers/adl_pci7x3x.c +index 934af3ff7897..b0fc027cf485 100644 +--- a/drivers/staging/comedi/drivers/adl_pci7x3x.c ++++ b/drivers/staging/comedi/drivers/adl_pci7x3x.c +@@ -120,8 +120,20 @@ static int adl_pci7x3x_do_insn_bits(struct comedi_device *dev, + { + unsigned long reg = (unsigned long)s->private; + +- if (comedi_dio_update_state(s, data)) +- outl(s->state, dev->iobase + reg); ++ if (comedi_dio_update_state(s, data)) { ++ unsigned int val = s->state; ++ ++ if (s->n_chan == 16) { ++ /* ++ * It seems the PCI-7230 needs the 16-bit DO state ++ * to be shifted left by 16 bits before being written ++ * to the 32-bit register. Set the value in both ++ * halves of the register to be sure. ++ */ ++ val |= val << 16; ++ } ++ outl(val, dev->iobase + reg); ++ } + + data[1] = s->state; + +diff --git a/drivers/staging/comedi/drivers/usbduxsigma.c b/drivers/staging/comedi/drivers/usbduxsigma.c +index eaa9add491df..dc0b25a54088 100644 +--- a/drivers/staging/comedi/drivers/usbduxsigma.c ++++ b/drivers/staging/comedi/drivers/usbduxsigma.c +@@ -550,27 +550,6 @@ static int usbduxsigma_ai_cmdtest(struct comedi_device *dev, + if (err) + return 3; + +- /* Step 4: fix up any arguments */ +- +- if (high_speed) { +- /* +- * every 2 channels get a time window of 125us. Thus, if we +- * sample all 16 channels we need 1ms. If we sample only one +- * channel we need only 125us +- */ +- devpriv->ai_interval = interval; +- devpriv->ai_timer = cmd->scan_begin_arg / (125000 * interval); +- } else { +- /* interval always 1ms */ +- devpriv->ai_interval = 1; +- devpriv->ai_timer = cmd->scan_begin_arg / 1000000; +- } +- if (devpriv->ai_timer < 1) +- err |= -EINVAL; +- +- if (err) +- return 4; +- + return 0; + } + +@@ -668,6 +647,22 @@ static int usbduxsigma_ai_cmd(struct comedi_device *dev, + + down(&devpriv->sem); + ++ if (devpriv->high_speed) { ++ /* ++ * every 2 channels get a time window of 125us. Thus, if we ++ * sample all 16 channels we need 1ms. If we sample only one ++ * channel we need only 125us ++ */ ++ unsigned int interval = usbduxsigma_chans_to_interval(len); ++ ++ devpriv->ai_interval = interval; ++ devpriv->ai_timer = cmd->scan_begin_arg / (125000 * interval); ++ } else { ++ /* interval always 1ms */ ++ devpriv->ai_interval = 1; ++ devpriv->ai_timer = cmd->scan_begin_arg / 1000000; ++ } ++ + for (i = 0; i < len; i++) { + unsigned int chan = CR_CHAN(cmd->chanlist[i]); + +@@ -917,25 +912,6 @@ static int usbduxsigma_ao_cmdtest(struct comedi_device *dev, + if (err) + return 3; + +- /* Step 4: fix up any arguments */ +- +- /* we count in timer steps */ +- if (high_speed) { +- /* timing of the conversion itself: every 125 us */ +- devpriv->ao_timer = cmd->convert_arg / 125000; +- } else { +- /* +- * timing of the scan: every 1ms +- * we get all channels at once +- */ +- devpriv->ao_timer = cmd->scan_begin_arg / 1000000; +- } +- if (devpriv->ao_timer < 1) +- err |= -EINVAL; +- +- if (err) +- return 4; +- + return 0; + } + +@@ -948,6 +924,20 @@ static int usbduxsigma_ao_cmd(struct comedi_device *dev, + + down(&devpriv->sem); + ++ if (cmd->convert_src == TRIG_TIMER) { ++ /* ++ * timing of the conversion itself: every 125 us ++ * at high speed (not used yet) ++ */ ++ devpriv->ao_timer = cmd->convert_arg / 125000; ++ } else { ++ /* ++ * timing of the scan: every 1ms ++ * we get all channels at once ++ */ ++ devpriv->ao_timer = cmd->scan_begin_arg / 1000000; ++ } ++ + devpriv->ao_counter = devpriv->ao_timer; + + if (cmd->start_src == TRIG_NOW) { +diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c +index 46bcebba54b2..9373cca121d3 100644 +--- a/drivers/tty/serial/8250/8250_pci.c ++++ b/drivers/tty/serial/8250/8250_pci.c +@@ -2000,6 +2000,12 @@ pci_wch_ch38x_setup(struct serial_private *priv, + + #define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358 + ++#define PCI_VENDOR_ID_PERICOM 0x12D8 ++#define PCI_DEVICE_ID_PERICOM_PI7C9X7951 0x7951 ++#define PCI_DEVICE_ID_PERICOM_PI7C9X7952 0x7952 ++#define PCI_DEVICE_ID_PERICOM_PI7C9X7954 0x7954 ++#define PCI_DEVICE_ID_PERICOM_PI7C9X7958 0x7958 ++ + /* Unknown vendors/cards - this should not be in linux/pci_ids.h */ + #define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584 + #define PCI_SUBDEVICE_ID_UNKNOWN_0x1588 0x1588 +@@ -2314,27 +2320,12 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { + * Pericom + */ + { +- .vendor = 0x12d8, +- .device = 0x7952, +- .subvendor = PCI_ANY_ID, +- .subdevice = PCI_ANY_ID, +- .setup = pci_pericom_setup, +- }, +- { +- .vendor = 0x12d8, +- .device = 0x7954, +- .subvendor = PCI_ANY_ID, +- .subdevice = PCI_ANY_ID, +- .setup = pci_pericom_setup, +- }, +- { +- .vendor = 0x12d8, +- .device = 0x7958, +- .subvendor = PCI_ANY_ID, +- .subdevice = PCI_ANY_ID, +- .setup = pci_pericom_setup, ++ .vendor = PCI_VENDOR_ID_PERICOM, ++ .device = PCI_ANY_ID, ++ .subvendor = PCI_ANY_ID, ++ .subdevice = PCI_ANY_ID, ++ .setup = pci_pericom_setup, + }, +- + /* + * PLX + */ +@@ -3031,6 +3022,10 @@ enum pci_board_num_t { + pbn_fintek_8, + pbn_fintek_12, + pbn_wch384_4, ++ pbn_pericom_PI7C9X7951, ++ pbn_pericom_PI7C9X7952, ++ pbn_pericom_PI7C9X7954, ++ pbn_pericom_PI7C9X7958, + }; + + /* +@@ -3848,7 +3843,6 @@ static struct pciserial_board pci_boards[] = { + .base_baud = 115200, + .first_offset = 0x40, + }, +- + [pbn_wch384_4] = { + .flags = FL_BASE0, + .num_ports = 4, +@@ -3856,6 +3850,33 @@ static struct pciserial_board pci_boards[] = { + .uart_offset = 8, + .first_offset = 0xC0, + }, ++ /* ++ * Pericom PI7C9X795[1248] Uno/Dual/Quad/Octal UART ++ */ ++ [pbn_pericom_PI7C9X7951] = { ++ .flags = FL_BASE0, ++ .num_ports = 1, ++ .base_baud = 921600, ++ .uart_offset = 0x8, ++ }, ++ [pbn_pericom_PI7C9X7952] = { ++ .flags = FL_BASE0, ++ .num_ports = 2, ++ .base_baud = 921600, ++ .uart_offset = 0x8, ++ }, ++ [pbn_pericom_PI7C9X7954] = { ++ .flags = FL_BASE0, ++ .num_ports = 4, ++ .base_baud = 921600, ++ .uart_offset = 0x8, ++ }, ++ [pbn_pericom_PI7C9X7958] = { ++ .flags = FL_BASE0, ++ .num_ports = 8, ++ .base_baud = 921600, ++ .uart_offset = 0x8, ++ }, + }; + + static const struct pci_device_id blacklist[] = { +@@ -5117,6 +5138,25 @@ static struct pci_device_id serial_pci_tbl[] = { + 0, + 0, pbn_exar_XR17V8358 }, + /* ++ * Pericom PI7C9X795[1248] Uno/Dual/Quad/Octal UART ++ */ ++ { PCI_VENDOR_ID_PERICOM, PCI_DEVICE_ID_PERICOM_PI7C9X7951, ++ PCI_ANY_ID, PCI_ANY_ID, ++ 0, ++ 0, pbn_pericom_PI7C9X7951 }, ++ { PCI_VENDOR_ID_PERICOM, PCI_DEVICE_ID_PERICOM_PI7C9X7952, ++ PCI_ANY_ID, PCI_ANY_ID, ++ 0, ++ 0, pbn_pericom_PI7C9X7952 }, ++ { PCI_VENDOR_ID_PERICOM, PCI_DEVICE_ID_PERICOM_PI7C9X7954, ++ PCI_ANY_ID, PCI_ANY_ID, ++ 0, ++ 0, pbn_pericom_PI7C9X7954 }, ++ { PCI_VENDOR_ID_PERICOM, PCI_DEVICE_ID_PERICOM_PI7C9X7958, ++ PCI_ANY_ID, PCI_ANY_ID, ++ 0, ++ 0, pbn_pericom_PI7C9X7958 }, ++ /* + * Topic TP560 Data/Fax/Voice 56k modem (reported by Evan Clarke) + */ + { PCI_VENDOR_ID_TOPIC, PCI_DEVICE_ID_TOPIC_TP560, +diff --git a/drivers/tty/serial/8250/8250_pnp.c b/drivers/tty/serial/8250/8250_pnp.c +index 50a09cd76d50..658b392d1170 100644 +--- a/drivers/tty/serial/8250/8250_pnp.c ++++ b/drivers/tty/serial/8250/8250_pnp.c +@@ -41,6 +41,12 @@ static const struct pnp_device_id pnp_dev_table[] = { + { "AEI1240", 0 }, + /* Rockwell 56K ACF II Fax+Data+Voice Modem */ + { "AKY1021", 0 /*SPCI_FL_NO_SHIRQ*/ }, ++ /* ++ * ALi Fast Infrared Controller ++ * Native driver (ali-ircc) is broken so at least ++ * it can be used with irtty-sir. ++ */ ++ { "ALI5123", 0 }, + /* AZT3005 PnP SOUND DEVICE */ + { "AZT4001", 0 }, + /* Best Data Products Inc. Smart One 336F PnP Modem */ +@@ -364,6 +370,11 @@ static const struct pnp_device_id pnp_dev_table[] = { + /* Winbond CIR port, should not be probed. We should keep track + of it to prevent the legacy serial driver from probing it */ + { "WEC1022", CIR_PORT }, ++ /* ++ * SMSC IrCC SIR/FIR port, should not be probed by serial driver ++ * as well so its own driver can bind to it. ++ */ ++ { "SMCF010", CIR_PORT }, + { "", 0 } + }; + +diff --git a/drivers/tty/serial/men_z135_uart.c b/drivers/tty/serial/men_z135_uart.c +index 35c55505b3eb..5a41b8fbb10a 100644 +--- a/drivers/tty/serial/men_z135_uart.c ++++ b/drivers/tty/serial/men_z135_uart.c +@@ -392,7 +392,6 @@ static irqreturn_t men_z135_intr(int irq, void *data) + struct men_z135_port *uart = (struct men_z135_port *)data; + struct uart_port *port = &uart->port; + bool handled = false; +- unsigned long flags; + int irq_id; + + uart->stat_reg = ioread32(port->membase + MEN_Z135_STAT_REG); +@@ -401,7 +400,7 @@ static irqreturn_t men_z135_intr(int irq, void *data) + if (!irq_id) + goto out; + +- spin_lock_irqsave(&port->lock, flags); ++ spin_lock(&port->lock); + /* It's save to write to IIR[7:6] RXC[9:8] */ + iowrite8(irq_id, port->membase + MEN_Z135_STAT_REG); + +@@ -427,7 +426,7 @@ static irqreturn_t men_z135_intr(int irq, void *data) + handled = true; + } + +- spin_unlock_irqrestore(&port->lock, flags); ++ spin_unlock(&port->lock); + out: + return IRQ_RETVAL(handled); + } +@@ -717,7 +716,7 @@ static void men_z135_set_termios(struct uart_port *port, + + baud = uart_get_baud_rate(port, termios, old, 0, uart_freq / 16); + +- spin_lock(&port->lock); ++ spin_lock_irq(&port->lock); + if (tty_termios_baud_rate(termios)) + tty_termios_encode_baud_rate(termios, baud, baud); + +@@ -725,7 +724,7 @@ static void men_z135_set_termios(struct uart_port *port, + iowrite32(bd_reg, port->membase + MEN_Z135_BAUD_REG); + + uart_update_timeout(port, termios->c_cflag, baud); +- spin_unlock(&port->lock); ++ spin_unlock_irq(&port->lock); + } + + static const char *men_z135_type(struct uart_port *port) +diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c +index a0ae942d9562..1e0d9b8c48c9 100644 +--- a/drivers/tty/serial/samsung.c ++++ b/drivers/tty/serial/samsung.c +@@ -295,15 +295,6 @@ static int s3c24xx_serial_start_tx_dma(struct s3c24xx_uart_port *ourport, + if (ourport->tx_mode != S3C24XX_TX_DMA) + enable_tx_dma(ourport); + +- while (xmit->tail & (dma_get_cache_alignment() - 1)) { +- if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) +- return 0; +- wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); +- xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); +- port->icount.tx++; +- count--; +- } +- + dma->tx_size = count & ~(dma_get_cache_alignment() - 1); + dma->tx_transfer_addr = dma->tx_addr + xmit->tail; + +@@ -342,7 +333,9 @@ static void s3c24xx_serial_start_next_tx(struct s3c24xx_uart_port *ourport) + return; + } + +- if (!ourport->dma || !ourport->dma->tx_chan || count < port->fifosize) ++ if (!ourport->dma || !ourport->dma->tx_chan || ++ count < ourport->min_dma_size || ++ xmit->tail & (dma_get_cache_alignment() - 1)) + s3c24xx_serial_start_tx_pio(ourport); + else + s3c24xx_serial_start_tx_dma(ourport, count); +@@ -736,15 +729,20 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) + struct uart_port *port = &ourport->port; + struct circ_buf *xmit = &port->state->xmit; + unsigned long flags; +- int count; ++ int count, dma_count = 0; + + spin_lock_irqsave(&port->lock, flags); + + count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); + +- if (ourport->dma && ourport->dma->tx_chan && count >= port->fifosize) { +- s3c24xx_serial_start_tx_dma(ourport, count); +- goto out; ++ if (ourport->dma && ourport->dma->tx_chan && ++ count >= ourport->min_dma_size) { ++ int align = dma_get_cache_alignment() - ++ (xmit->tail & (dma_get_cache_alignment() - 1)); ++ if (count-align >= ourport->min_dma_size) { ++ dma_count = count-align; ++ count = align; ++ } + } + + if (port->x_char) { +@@ -765,14 +763,24 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) + + /* try and drain the buffer... */ + +- count = port->fifosize; +- while (!uart_circ_empty(xmit) && count-- > 0) { ++ if (count > port->fifosize) { ++ count = port->fifosize; ++ dma_count = 0; ++ } ++ ++ while (!uart_circ_empty(xmit) && count > 0) { + if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) + break; + + wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); + port->icount.tx++; ++ count--; ++ } ++ ++ if (!count && dma_count) { ++ s3c24xx_serial_start_tx_dma(ourport, dma_count); ++ goto out; + } + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) { +@@ -1838,6 +1846,13 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) + else if (ourport->info->fifosize) + ourport->port.fifosize = ourport->info->fifosize; + ++ /* ++ * DMA transfers must be aligned at least to cache line size, ++ * so find minimal transfer size suitable for DMA mode ++ */ ++ ourport->min_dma_size = max_t(int, ourport->port.fifosize, ++ dma_get_cache_alignment()); ++ + probe_index++; + + dbg("%s: initialising port %p...\n", __func__, ourport); +diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h +index d275032aa68d..fc5deaa4f382 100644 +--- a/drivers/tty/serial/samsung.h ++++ b/drivers/tty/serial/samsung.h +@@ -82,6 +82,7 @@ struct s3c24xx_uart_port { + unsigned char tx_claimed; + unsigned int pm_level; + unsigned long baudclk_rate; ++ unsigned int min_dma_size; + + unsigned int rx_irq; + unsigned int tx_irq; +diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c +index 69e769c35cf5..06ecd1e6871c 100644 +--- a/drivers/usb/dwc3/ep0.c ++++ b/drivers/usb/dwc3/ep0.c +@@ -820,6 +820,11 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, + unsigned maxp = ep0->endpoint.maxpacket; + + transfer_size += (maxp - (transfer_size % maxp)); ++ ++ /* Maximum of DWC3_EP0_BOUNCE_SIZE can only be received */ ++ if (transfer_size > DWC3_EP0_BOUNCE_SIZE) ++ transfer_size = DWC3_EP0_BOUNCE_SIZE; ++ + transferred = min_t(u32, ur->length, + transfer_size - length); + memcpy(ur->buf, dwc->ep0_bounce, transferred); +@@ -941,11 +946,14 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, + return; + } + +- WARN_ON(req->request.length > DWC3_EP0_BOUNCE_SIZE); +- + maxpacket = dep->endpoint.maxpacket; + transfer_size = roundup(req->request.length, maxpacket); + ++ if (transfer_size > DWC3_EP0_BOUNCE_SIZE) { ++ dev_WARN(dwc->dev, "bounce buf can't handle req len\n"); ++ transfer_size = DWC3_EP0_BOUNCE_SIZE; ++ } ++ + dwc->ep0_bounced = true; + + /* +diff --git a/drivers/usb/gadget/function/f_uac2.c b/drivers/usb/gadget/function/f_uac2.c +index 531861547253..96d935b00504 100644 +--- a/drivers/usb/gadget/function/f_uac2.c ++++ b/drivers/usb/gadget/function/f_uac2.c +@@ -975,6 +975,29 @@ free_ep(struct uac2_rtd_params *prm, struct usb_ep *ep) + "%s:%d Error!\n", __func__, __LINE__); + } + ++static void set_ep_max_packet_size(const struct f_uac2_opts *uac2_opts, ++ struct usb_endpoint_descriptor *ep_desc, ++ unsigned int factor, bool is_playback) ++{ ++ int chmask, srate, ssize; ++ u16 max_packet_size; ++ ++ if (is_playback) { ++ chmask = uac2_opts->p_chmask; ++ srate = uac2_opts->p_srate; ++ ssize = uac2_opts->p_ssize; ++ } else { ++ chmask = uac2_opts->c_chmask; ++ srate = uac2_opts->c_srate; ++ ssize = uac2_opts->c_ssize; ++ } ++ ++ max_packet_size = num_channels(chmask) * ssize * ++ DIV_ROUND_UP(srate, factor / (1 << (ep_desc->bInterval - 1))); ++ ep_desc->wMaxPacketSize = cpu_to_le16(min(max_packet_size, ++ le16_to_cpu(ep_desc->wMaxPacketSize))); ++} ++ + static int + afunc_bind(struct usb_configuration *cfg, struct usb_function *fn) + { +@@ -1070,10 +1093,14 @@ afunc_bind(struct usb_configuration *cfg, struct usb_function *fn) + uac2->p_prm.uac2 = uac2; + uac2->c_prm.uac2 = uac2; + ++ /* Calculate wMaxPacketSize according to audio bandwidth */ ++ set_ep_max_packet_size(uac2_opts, &fs_epin_desc, 1000, true); ++ set_ep_max_packet_size(uac2_opts, &fs_epout_desc, 1000, false); ++ set_ep_max_packet_size(uac2_opts, &hs_epin_desc, 8000, true); ++ set_ep_max_packet_size(uac2_opts, &hs_epout_desc, 8000, false); ++ + hs_epout_desc.bEndpointAddress = fs_epout_desc.bEndpointAddress; +- hs_epout_desc.wMaxPacketSize = fs_epout_desc.wMaxPacketSize; + hs_epin_desc.bEndpointAddress = fs_epin_desc.bEndpointAddress; +- hs_epin_desc.wMaxPacketSize = fs_epin_desc.wMaxPacketSize; + + ret = usb_assign_descriptors(fn, fs_audio_desc, hs_audio_desc, NULL); + if (ret) +diff --git a/drivers/usb/gadget/udc/m66592-udc.c b/drivers/usb/gadget/udc/m66592-udc.c +index 309706fe4bf0..9704053dfe05 100644 +--- a/drivers/usb/gadget/udc/m66592-udc.c ++++ b/drivers/usb/gadget/udc/m66592-udc.c +@@ -1052,7 +1052,7 @@ static void set_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) + tmp = m66592_read(m66592, M66592_INTSTS0) & + M66592_CTSQ; + udelay(1); +- } while (tmp != M66592_CS_IDST || timeout-- > 0); ++ } while (tmp != M66592_CS_IDST && timeout-- > 0); + + if (tmp == M66592_CS_IDST) + m66592_bset(m66592, +diff --git a/drivers/usb/host/ehci-sysfs.c b/drivers/usb/host/ehci-sysfs.c +index 5e44407aa099..5216f2b09d63 100644 +--- a/drivers/usb/host/ehci-sysfs.c ++++ b/drivers/usb/host/ehci-sysfs.c +@@ -29,7 +29,7 @@ static ssize_t show_companion(struct device *dev, + int count = PAGE_SIZE; + char *ptr = buf; + +- ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); ++ ehci = hcd_to_ehci(dev_get_drvdata(dev)); + nports = HCS_N_PORTS(ehci->hcs_params); + + for (index = 0; index < nports; ++index) { +@@ -54,7 +54,7 @@ static ssize_t store_companion(struct device *dev, + struct ehci_hcd *ehci; + int portnum, new_owner; + +- ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); ++ ehci = hcd_to_ehci(dev_get_drvdata(dev)); + new_owner = PORT_OWNER; /* Owned by companion */ + if (sscanf(buf, "%d", &portnum) != 1) + return -EINVAL; +@@ -85,7 +85,7 @@ static ssize_t show_uframe_periodic_max(struct device *dev, + struct ehci_hcd *ehci; + int n; + +- ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); ++ ehci = hcd_to_ehci(dev_get_drvdata(dev)); + n = scnprintf(buf, PAGE_SIZE, "%d\n", ehci->uframe_periodic_max); + return n; + } +@@ -101,7 +101,7 @@ static ssize_t store_uframe_periodic_max(struct device *dev, + unsigned long flags; + ssize_t ret; + +- ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); ++ ehci = hcd_to_ehci(dev_get_drvdata(dev)); + if (kstrtouint(buf, 0, &uframe_periodic_max) < 0) + return -EINVAL; + +diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c +index 4c8b3b82103d..a5a0376bbd48 100644 +--- a/drivers/usb/serial/ftdi_sio.c ++++ b/drivers/usb/serial/ftdi_sio.c +@@ -605,6 +605,10 @@ static const struct usb_device_id id_table_combined[] = { + { USB_DEVICE(FTDI_VID, FTDI_NT_ORIONLXM_PID), + .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, + { USB_DEVICE(FTDI_VID, FTDI_SYNAPSE_SS200_PID) }, ++ { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX_PID) }, ++ { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX2_PID) }, ++ { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX2WI_PID) }, ++ { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX3_PID) }, + /* + * ELV devices: + */ +diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h +index 792e054126de..2943b97b2a83 100644 +--- a/drivers/usb/serial/ftdi_sio_ids.h ++++ b/drivers/usb/serial/ftdi_sio_ids.h +@@ -568,6 +568,14 @@ + */ + #define FTDI_SYNAPSE_SS200_PID 0x9090 /* SS200 - SNAP Stick 200 */ + ++/* ++ * CustomWare / ShipModul NMEA multiplexers product ids (FTDI_VID) ++ */ ++#define FTDI_CUSTOMWARE_MINIPLEX_PID 0xfd48 /* MiniPlex first generation NMEA Multiplexer */ ++#define FTDI_CUSTOMWARE_MINIPLEX2_PID 0xfd49 /* MiniPlex-USB and MiniPlex-2 series */ ++#define FTDI_CUSTOMWARE_MINIPLEX2WI_PID 0xfd4a /* MiniPlex-2Wi */ ++#define FTDI_CUSTOMWARE_MINIPLEX3_PID 0xfd4b /* MiniPlex-3 series */ ++ + + /********************************/ + /** third-party VID/PID combos **/ +diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c +index f5257af33ecf..ae682e4eeaef 100644 +--- a/drivers/usb/serial/pl2303.c ++++ b/drivers/usb/serial/pl2303.c +@@ -362,21 +362,38 @@ static speed_t pl2303_encode_baud_rate_direct(unsigned char buf[4], + static speed_t pl2303_encode_baud_rate_divisor(unsigned char buf[4], + speed_t baud) + { +- unsigned int tmp; ++ unsigned int baseline, mantissa, exponent; + + /* + * Apparently the formula is: +- * baudrate = 12M * 32 / (2^buf[1]) / buf[0] ++ * baudrate = 12M * 32 / (mantissa * 4^exponent) ++ * where ++ * mantissa = buf[8:0] ++ * exponent = buf[11:9] + */ +- tmp = 12000000 * 32 / baud; ++ baseline = 12000000 * 32; ++ mantissa = baseline / baud; ++ if (mantissa == 0) ++ mantissa = 1; /* Avoid dividing by zero if baud > 32*12M. */ ++ exponent = 0; ++ while (mantissa >= 512) { ++ if (exponent < 7) { ++ mantissa >>= 2; /* divide by 4 */ ++ exponent++; ++ } else { ++ /* Exponent is maxed. Trim mantissa and leave. */ ++ mantissa = 511; ++ break; ++ } ++ } ++ + buf[3] = 0x80; + buf[2] = 0; +- buf[1] = (tmp >= 256); +- while (tmp >= 256) { +- tmp >>= 2; +- buf[1] <<= 1; +- } +- buf[0] = tmp; ++ buf[1] = exponent << 1 | mantissa >> 8; ++ buf[0] = mantissa & 0xff; ++ ++ /* Calculate and return the exact baud rate. */ ++ baud = (baseline / mantissa) >> (exponent << 1); + + return baud; + } +diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c +index d156545728c2..ebcec8cda858 100644 +--- a/drivers/usb/serial/qcserial.c ++++ b/drivers/usb/serial/qcserial.c +@@ -139,6 +139,7 @@ static const struct usb_device_id id_table[] = { + {USB_DEVICE(0x0AF0, 0x8120)}, /* Option GTM681W */ + + /* non-Gobi Sierra Wireless devices */ ++ {DEVICE_SWI(0x03f0, 0x4e1d)}, /* HP lt4111 LTE/EV-DO/HSPA+ Gobi 4G Module */ + {DEVICE_SWI(0x0f3d, 0x68a2)}, /* Sierra Wireless MC7700 */ + {DEVICE_SWI(0x114f, 0x68a2)}, /* Sierra Wireless MC7750 */ + {DEVICE_SWI(0x1199, 0x68a2)}, /* Sierra Wireless MC7710 */ +diff --git a/drivers/usb/serial/symbolserial.c b/drivers/usb/serial/symbolserial.c +index 8fceec7298e0..6ed804450a5a 100644 +--- a/drivers/usb/serial/symbolserial.c ++++ b/drivers/usb/serial/symbolserial.c +@@ -94,7 +94,7 @@ exit: + + static int symbol_open(struct tty_struct *tty, struct usb_serial_port *port) + { +- struct symbol_private *priv = usb_get_serial_data(port->serial); ++ struct symbol_private *priv = usb_get_serial_port_data(port); + unsigned long flags; + int result = 0; + +@@ -120,7 +120,7 @@ static void symbol_close(struct usb_serial_port *port) + static void symbol_throttle(struct tty_struct *tty) + { + struct usb_serial_port *port = tty->driver_data; +- struct symbol_private *priv = usb_get_serial_data(port->serial); ++ struct symbol_private *priv = usb_get_serial_port_data(port); + + spin_lock_irq(&priv->lock); + priv->throttled = true; +@@ -130,7 +130,7 @@ static void symbol_throttle(struct tty_struct *tty) + static void symbol_unthrottle(struct tty_struct *tty) + { + struct usb_serial_port *port = tty->driver_data; +- struct symbol_private *priv = usb_get_serial_data(port->serial); ++ struct symbol_private *priv = usb_get_serial_port_data(port); + int result; + bool was_throttled; + +diff --git a/fs/ceph/super.c b/fs/ceph/super.c +index 4e9905374078..0d47422e3548 100644 +--- a/fs/ceph/super.c ++++ b/fs/ceph/super.c +@@ -466,7 +466,7 @@ static int ceph_show_options(struct seq_file *m, struct dentry *root) + if (fsopt->max_readdir_bytes != CEPH_MAX_READDIR_BYTES_DEFAULT) + seq_printf(m, ",readdir_max_bytes=%d", fsopt->max_readdir_bytes); + if (strcmp(fsopt->snapdir_name, CEPH_SNAPDIRNAME_DEFAULT)) +- seq_printf(m, ",snapdirname=%s", fsopt->snapdir_name); ++ seq_show_option(m, "snapdirname", fsopt->snapdir_name); + + return 0; + } +diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c +index 0a9fb6b53126..6a1119e87fbb 100644 +--- a/fs/cifs/cifsfs.c ++++ b/fs/cifs/cifsfs.c +@@ -394,17 +394,17 @@ cifs_show_options(struct seq_file *s, struct dentry *root) + struct sockaddr *srcaddr; + srcaddr = (struct sockaddr *)&tcon->ses->server->srcaddr; + +- seq_printf(s, ",vers=%s", tcon->ses->server->vals->version_string); ++ seq_show_option(s, "vers", tcon->ses->server->vals->version_string); + cifs_show_security(s, tcon->ses); + cifs_show_cache_flavor(s, cifs_sb); + + if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MULTIUSER) + seq_puts(s, ",multiuser"); + else if (tcon->ses->user_name) +- seq_printf(s, ",username=%s", tcon->ses->user_name); ++ seq_show_option(s, "username", tcon->ses->user_name); + + if (tcon->ses->domainName) +- seq_printf(s, ",domain=%s", tcon->ses->domainName); ++ seq_show_option(s, "domain", tcon->ses->domainName); + + if (srcaddr->sa_family != AF_UNSPEC) { + struct sockaddr_in *saddr4; +diff --git a/fs/ext4/super.c b/fs/ext4/super.c +index ca12affdba96..6b4eb94b04a5 100644 +--- a/fs/ext4/super.c ++++ b/fs/ext4/super.c +@@ -1738,10 +1738,10 @@ static inline void ext4_show_quota_options(struct seq_file *seq, + } + + if (sbi->s_qf_names[USRQUOTA]) +- seq_printf(seq, ",usrjquota=%s", sbi->s_qf_names[USRQUOTA]); ++ seq_show_option(seq, "usrjquota", sbi->s_qf_names[USRQUOTA]); + + if (sbi->s_qf_names[GRPQUOTA]) +- seq_printf(seq, ",grpjquota=%s", sbi->s_qf_names[GRPQUOTA]); ++ seq_show_option(seq, "grpjquota", sbi->s_qf_names[GRPQUOTA]); + #endif + } + +diff --git a/fs/gfs2/super.c b/fs/gfs2/super.c +index 859c6edbf81a..c18b49dc5d4f 100644 +--- a/fs/gfs2/super.c ++++ b/fs/gfs2/super.c +@@ -1334,11 +1334,11 @@ static int gfs2_show_options(struct seq_file *s, struct dentry *root) + if (is_ancestor(root, sdp->sd_master_dir)) + seq_puts(s, ",meta"); + if (args->ar_lockproto[0]) +- seq_printf(s, ",lockproto=%s", args->ar_lockproto); ++ seq_show_option(s, "lockproto", args->ar_lockproto); + if (args->ar_locktable[0]) +- seq_printf(s, ",locktable=%s", args->ar_locktable); ++ seq_show_option(s, "locktable", args->ar_locktable); + if (args->ar_hostdata[0]) +- seq_printf(s, ",hostdata=%s", args->ar_hostdata); ++ seq_show_option(s, "hostdata", args->ar_hostdata); + if (args->ar_spectator) + seq_puts(s, ",spectator"); + if (args->ar_localflocks) +diff --git a/fs/hfs/super.c b/fs/hfs/super.c +index eee7206c38d1..410b65eea683 100644 +--- a/fs/hfs/super.c ++++ b/fs/hfs/super.c +@@ -135,9 +135,9 @@ static int hfs_show_options(struct seq_file *seq, struct dentry *root) + struct hfs_sb_info *sbi = HFS_SB(root->d_sb); + + if (sbi->s_creator != cpu_to_be32(0x3f3f3f3f)) +- seq_printf(seq, ",creator=%.4s", (char *)&sbi->s_creator); ++ seq_show_option_n(seq, "creator", (char *)&sbi->s_creator, 4); + if (sbi->s_type != cpu_to_be32(0x3f3f3f3f)) +- seq_printf(seq, ",type=%.4s", (char *)&sbi->s_type); ++ seq_show_option_n(seq, "type", (char *)&sbi->s_type, 4); + seq_printf(seq, ",uid=%u,gid=%u", + from_kuid_munged(&init_user_ns, sbi->s_uid), + from_kgid_munged(&init_user_ns, sbi->s_gid)); +diff --git a/fs/hfsplus/options.c b/fs/hfsplus/options.c +index c90b72ee676d..bb806e58c977 100644 +--- a/fs/hfsplus/options.c ++++ b/fs/hfsplus/options.c +@@ -218,9 +218,9 @@ int hfsplus_show_options(struct seq_file *seq, struct dentry *root) + struct hfsplus_sb_info *sbi = HFSPLUS_SB(root->d_sb); + + if (sbi->creator != HFSPLUS_DEF_CR_TYPE) +- seq_printf(seq, ",creator=%.4s", (char *)&sbi->creator); ++ seq_show_option_n(seq, "creator", (char *)&sbi->creator, 4); + if (sbi->type != HFSPLUS_DEF_CR_TYPE) +- seq_printf(seq, ",type=%.4s", (char *)&sbi->type); ++ seq_show_option_n(seq, "type", (char *)&sbi->type, 4); + seq_printf(seq, ",umask=%o,uid=%u,gid=%u", sbi->umask, + from_kuid_munged(&init_user_ns, sbi->uid), + from_kgid_munged(&init_user_ns, sbi->gid)); +diff --git a/fs/hostfs/hostfs_kern.c b/fs/hostfs/hostfs_kern.c +index 07d8d8f52faf..de2d6245e9fa 100644 +--- a/fs/hostfs/hostfs_kern.c ++++ b/fs/hostfs/hostfs_kern.c +@@ -260,7 +260,7 @@ static int hostfs_show_options(struct seq_file *seq, struct dentry *root) + size_t offset = strlen(root_ino) + 1; + + if (strlen(root_path) > offset) +- seq_printf(seq, ",%s", root_path + offset); ++ seq_show_option(seq, root_path + offset, NULL); + + if (append) + seq_puts(seq, ",append"); +diff --git a/fs/hpfs/namei.c b/fs/hpfs/namei.c +index a0872f239f04..9e92c9c2d319 100644 +--- a/fs/hpfs/namei.c ++++ b/fs/hpfs/namei.c +@@ -8,6 +8,17 @@ + #include + #include "hpfs_fn.h" + ++static void hpfs_update_directory_times(struct inode *dir) ++{ ++ time_t t = get_seconds(); ++ if (t == dir->i_mtime.tv_sec && ++ t == dir->i_ctime.tv_sec) ++ return; ++ dir->i_mtime.tv_sec = dir->i_ctime.tv_sec = t; ++ dir->i_mtime.tv_nsec = dir->i_ctime.tv_nsec = 0; ++ hpfs_write_inode_nolock(dir); ++} ++ + static int hpfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) + { + const unsigned char *name = dentry->d_name.name; +@@ -99,6 +110,7 @@ static int hpfs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) + result->i_mode = mode | S_IFDIR; + hpfs_write_inode_nolock(result); + } ++ hpfs_update_directory_times(dir); + d_instantiate(dentry, result); + hpfs_unlock(dir->i_sb); + return 0; +@@ -187,6 +199,7 @@ static int hpfs_create(struct inode *dir, struct dentry *dentry, umode_t mode, b + result->i_mode = mode | S_IFREG; + hpfs_write_inode_nolock(result); + } ++ hpfs_update_directory_times(dir); + d_instantiate(dentry, result); + hpfs_unlock(dir->i_sb); + return 0; +@@ -262,6 +275,7 @@ static int hpfs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, de + insert_inode_hash(result); + + hpfs_write_inode_nolock(result); ++ hpfs_update_directory_times(dir); + d_instantiate(dentry, result); + brelse(bh); + hpfs_unlock(dir->i_sb); +@@ -340,6 +354,7 @@ static int hpfs_symlink(struct inode *dir, struct dentry *dentry, const char *sy + insert_inode_hash(result); + + hpfs_write_inode_nolock(result); ++ hpfs_update_directory_times(dir); + d_instantiate(dentry, result); + hpfs_unlock(dir->i_sb); + return 0; +@@ -423,6 +438,8 @@ again: + out1: + hpfs_brelse4(&qbh); + out: ++ if (!err) ++ hpfs_update_directory_times(dir); + hpfs_unlock(dir->i_sb); + return err; + } +@@ -477,6 +494,8 @@ static int hpfs_rmdir(struct inode *dir, struct dentry *dentry) + out1: + hpfs_brelse4(&qbh); + out: ++ if (!err) ++ hpfs_update_directory_times(dir); + hpfs_unlock(dir->i_sb); + return err; + } +@@ -595,7 +614,7 @@ static int hpfs_rename(struct inode *old_dir, struct dentry *old_dentry, + goto end1; + } + +- end: ++end: + hpfs_i(i)->i_parent_dir = new_dir->i_ino; + if (S_ISDIR(i->i_mode)) { + inc_nlink(new_dir); +@@ -610,6 +629,10 @@ static int hpfs_rename(struct inode *old_dir, struct dentry *old_dentry, + brelse(bh); + } + end1: ++ if (!err) { ++ hpfs_update_directory_times(old_dir); ++ hpfs_update_directory_times(new_dir); ++ } + hpfs_unlock(i->i_sb); + return err; + } +diff --git a/fs/libfs.c b/fs/libfs.c +index 02813592e121..f4641fd27bda 100644 +--- a/fs/libfs.c ++++ b/fs/libfs.c +@@ -1176,7 +1176,7 @@ void make_empty_dir_inode(struct inode *inode) + inode->i_uid = GLOBAL_ROOT_UID; + inode->i_gid = GLOBAL_ROOT_GID; + inode->i_rdev = 0; +- inode->i_size = 2; ++ inode->i_size = 0; + inode->i_blkbits = PAGE_SHIFT; + inode->i_blocks = 0; + +diff --git a/fs/ocfs2/super.c b/fs/ocfs2/super.c +index 403c5660b306..a482e312c7b2 100644 +--- a/fs/ocfs2/super.c ++++ b/fs/ocfs2/super.c +@@ -1550,8 +1550,8 @@ static int ocfs2_show_options(struct seq_file *s, struct dentry *root) + seq_printf(s, ",localflocks,"); + + if (osb->osb_cluster_stack[0]) +- seq_printf(s, ",cluster_stack=%.*s", OCFS2_STACK_LABEL_LEN, +- osb->osb_cluster_stack); ++ seq_show_option_n(s, "cluster_stack", osb->osb_cluster_stack, ++ OCFS2_STACK_LABEL_LEN); + if (opts & OCFS2_MOUNT_USRQUOTA) + seq_printf(s, ",usrquota"); + if (opts & OCFS2_MOUNT_GRPQUOTA) +diff --git a/fs/overlayfs/super.c b/fs/overlayfs/super.c +index bf8537c7f455..155989455a72 100644 +--- a/fs/overlayfs/super.c ++++ b/fs/overlayfs/super.c +@@ -517,10 +517,10 @@ static int ovl_show_options(struct seq_file *m, struct dentry *dentry) + struct super_block *sb = dentry->d_sb; + struct ovl_fs *ufs = sb->s_fs_info; + +- seq_printf(m, ",lowerdir=%s", ufs->config.lowerdir); ++ seq_show_option(m, "lowerdir", ufs->config.lowerdir); + if (ufs->config.upperdir) { +- seq_printf(m, ",upperdir=%s", ufs->config.upperdir); +- seq_printf(m, ",workdir=%s", ufs->config.workdir); ++ seq_show_option(m, "upperdir", ufs->config.upperdir); ++ seq_show_option(m, "workdir", ufs->config.workdir); + } + return 0; + } +diff --git a/fs/reiserfs/super.c b/fs/reiserfs/super.c +index 0111ad0466ed..cf6fa25f884b 100644 +--- a/fs/reiserfs/super.c ++++ b/fs/reiserfs/super.c +@@ -714,18 +714,20 @@ static int reiserfs_show_options(struct seq_file *seq, struct dentry *root) + seq_puts(seq, ",acl"); + + if (REISERFS_SB(s)->s_jdev) +- seq_printf(seq, ",jdev=%s", REISERFS_SB(s)->s_jdev); ++ seq_show_option(seq, "jdev", REISERFS_SB(s)->s_jdev); + + if (journal->j_max_commit_age != journal->j_default_max_commit_age) + seq_printf(seq, ",commit=%d", journal->j_max_commit_age); + + #ifdef CONFIG_QUOTA + if (REISERFS_SB(s)->s_qf_names[USRQUOTA]) +- seq_printf(seq, ",usrjquota=%s", REISERFS_SB(s)->s_qf_names[USRQUOTA]); ++ seq_show_option(seq, "usrjquota", ++ REISERFS_SB(s)->s_qf_names[USRQUOTA]); + else if (opts & (1 << REISERFS_USRQUOTA)) + seq_puts(seq, ",usrquota"); + if (REISERFS_SB(s)->s_qf_names[GRPQUOTA]) +- seq_printf(seq, ",grpjquota=%s", REISERFS_SB(s)->s_qf_names[GRPQUOTA]); ++ seq_show_option(seq, "grpjquota", ++ REISERFS_SB(s)->s_qf_names[GRPQUOTA]); + else if (opts & (1 << REISERFS_GRPQUOTA)) + seq_puts(seq, ",grpquota"); + if (REISERFS_SB(s)->s_jquota_fmt) { +diff --git a/fs/xfs/libxfs/xfs_da_format.h b/fs/xfs/libxfs/xfs_da_format.h +index 74bcbabfa523..b14bbd6bb05f 100644 +--- a/fs/xfs/libxfs/xfs_da_format.h ++++ b/fs/xfs/libxfs/xfs_da_format.h +@@ -680,8 +680,15 @@ typedef struct xfs_attr_leaf_name_remote { + typedef struct xfs_attr_leafblock { + xfs_attr_leaf_hdr_t hdr; /* constant-structure header block */ + xfs_attr_leaf_entry_t entries[1]; /* sorted on key, not name */ +- xfs_attr_leaf_name_local_t namelist; /* grows from bottom of buf */ +- xfs_attr_leaf_name_remote_t valuelist; /* grows from bottom of buf */ ++ /* ++ * The rest of the block contains the following structures after the ++ * leaf entries, growing from the bottom up. The variables are never ++ * referenced and definining them can actually make gcc optimize away ++ * accesses to the 'entries' array above index 0 so don't do that. ++ * ++ * xfs_attr_leaf_name_local_t namelist; ++ * xfs_attr_leaf_name_remote_t valuelist; ++ */ + } xfs_attr_leafblock_t; + + /* +diff --git a/fs/xfs/libxfs/xfs_dir2_data.c b/fs/xfs/libxfs/xfs_dir2_data.c +index de1ea16f5748..534bbf283d6b 100644 +--- a/fs/xfs/libxfs/xfs_dir2_data.c ++++ b/fs/xfs/libxfs/xfs_dir2_data.c +@@ -252,7 +252,8 @@ xfs_dir3_data_reada_verify( + return; + case cpu_to_be32(XFS_DIR2_DATA_MAGIC): + case cpu_to_be32(XFS_DIR3_DATA_MAGIC): +- xfs_dir3_data_verify(bp); ++ bp->b_ops = &xfs_dir3_data_buf_ops; ++ bp->b_ops->verify_read(bp); + return; + default: + xfs_buf_ioerror(bp, -EFSCORRUPTED); +diff --git a/fs/xfs/libxfs/xfs_dir2_node.c b/fs/xfs/libxfs/xfs_dir2_node.c +index 41b80d3d3877..06bb4218b362 100644 +--- a/fs/xfs/libxfs/xfs_dir2_node.c ++++ b/fs/xfs/libxfs/xfs_dir2_node.c +@@ -2132,6 +2132,7 @@ xfs_dir2_node_replace( + int error; /* error return value */ + int i; /* btree level */ + xfs_ino_t inum; /* new inode number */ ++ int ftype; /* new file type */ + xfs_dir2_leaf_t *leaf; /* leaf structure */ + xfs_dir2_leaf_entry_t *lep; /* leaf entry being changed */ + int rval; /* internal return value */ +@@ -2145,7 +2146,14 @@ xfs_dir2_node_replace( + state = xfs_da_state_alloc(); + state->args = args; + state->mp = args->dp->i_mount; ++ ++ /* ++ * We have to save new inode number and ftype since ++ * xfs_da3_node_lookup_int() is going to overwrite them ++ */ + inum = args->inumber; ++ ftype = args->filetype; ++ + /* + * Lookup the entry to change in the btree. + */ +@@ -2183,7 +2191,7 @@ xfs_dir2_node_replace( + * Fill in the new inode number and log the entry. + */ + dep->inumber = cpu_to_be64(inum); +- args->dp->d_ops->data_put_ftype(dep, args->filetype); ++ args->dp->d_ops->data_put_ftype(dep, ftype); + xfs_dir2_data_log_entry(args, state->extrablk.bp, dep); + rval = 0; + } +diff --git a/fs/xfs/xfs_super.c b/fs/xfs/xfs_super.c +index 858e1e62bbaa..65a45372fb1f 100644 +--- a/fs/xfs/xfs_super.c ++++ b/fs/xfs/xfs_super.c +@@ -504,9 +504,9 @@ xfs_showargs( + seq_printf(m, "," MNTOPT_LOGBSIZE "=%dk", mp->m_logbsize >> 10); + + if (mp->m_logname) +- seq_printf(m, "," MNTOPT_LOGDEV "=%s", mp->m_logname); ++ seq_show_option(m, MNTOPT_LOGDEV, mp->m_logname); + if (mp->m_rtname) +- seq_printf(m, "," MNTOPT_RTDEV "=%s", mp->m_rtname); ++ seq_show_option(m, MNTOPT_RTDEV, mp->m_rtname); + + if (mp->m_dalign > 0) + seq_printf(m, "," MNTOPT_SUNIT "=%d", +diff --git a/include/linux/acpi.h b/include/linux/acpi.h +index 4550be3bb63b..808c43afa8ac 100644 +--- a/include/linux/acpi.h ++++ b/include/linux/acpi.h +@@ -198,7 +198,7 @@ struct pci_dev; + + int acpi_pci_irq_enable (struct pci_dev *dev); + void acpi_penalize_isa_irq(int irq, int active); +- ++void acpi_penalize_sci_irq(int irq, int trigger, int polarity); + void acpi_pci_irq_disable (struct pci_dev *dev); + + extern int ec_read(u8 addr, u8 *val); +diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h +index d86b753e9b30..5ed7771ad386 100644 +--- a/include/linux/iio/iio.h ++++ b/include/linux/iio/iio.h +@@ -642,6 +642,15 @@ int iio_str_to_fixpoint(const char *str, int fract_mult, int *integer, + #define IIO_DEGREE_TO_RAD(deg) (((deg) * 314159ULL + 9000000ULL) / 18000000ULL) + + /** ++ * IIO_RAD_TO_DEGREE() - Convert rad to degree ++ * @rad: A value in rad ++ * ++ * Returns the given value converted from rad to degree ++ */ ++#define IIO_RAD_TO_DEGREE(rad) \ ++ (((rad) * 18000000ULL + 314159ULL / 2) / 314159ULL) ++ ++/** + * IIO_G_TO_M_S_2() - Convert g to meter / second**2 + * @g: A value in g + * +@@ -649,4 +658,12 @@ int iio_str_to_fixpoint(const char *str, int fract_mult, int *integer, + */ + #define IIO_G_TO_M_S_2(g) ((g) * 980665ULL / 100000ULL) + ++/** ++ * IIO_M_S_2_TO_G() - Convert meter / second**2 to g ++ * @ms2: A value in meter / second**2 ++ * ++ * Returns the given value converted from meter / second**2 to g ++ */ ++#define IIO_M_S_2_TO_G(ms2) (((ms2) * 100000ULL + 980665ULL / 2) / 980665ULL) ++ + #endif /* _INDUSTRIAL_IO_H_ */ +diff --git a/include/linux/pci.h b/include/linux/pci.h +index 3ef3a52068df..6e935e5eab56 100644 +--- a/include/linux/pci.h ++++ b/include/linux/pci.h +@@ -180,6 +180,8 @@ enum pci_dev_flags { + PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), + /* Do not use PM reset even if device advertises NoSoftRst- */ + PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), ++ /* Get VPD from function 0 VPD */ ++ PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8), + }; + + enum pci_irq_reroute_variant { +diff --git a/include/linux/seq_file.h b/include/linux/seq_file.h +index afbb1fd77c77..7848473a5bc8 100644 +--- a/include/linux/seq_file.h ++++ b/include/linux/seq_file.h +@@ -148,6 +148,41 @@ static inline struct user_namespace *seq_user_ns(struct seq_file *seq) + #endif + } + ++/** ++ * seq_show_options - display mount options with appropriate escapes. ++ * @m: the seq_file handle ++ * @name: the mount option name ++ * @value: the mount option name's value, can be NULL ++ */ ++static inline void seq_show_option(struct seq_file *m, const char *name, ++ const char *value) ++{ ++ seq_putc(m, ','); ++ seq_escape(m, name, ",= \t\n\\"); ++ if (value) { ++ seq_putc(m, '='); ++ seq_escape(m, value, ", \t\n\\"); ++ } ++} ++ ++/** ++ * seq_show_option_n - display mount options with appropriate escapes ++ * where @value must be a specific length. ++ * @m: the seq_file handle ++ * @name: the mount option name ++ * @value: the mount option name's value, cannot be NULL ++ * @length: the length of @value to display ++ * ++ * This is a macro since this uses "length" to define the size of the ++ * stack buffer. ++ */ ++#define seq_show_option_n(m, name, value, length) { \ ++ char val_buf[length + 1]; \ ++ strncpy(val_buf, value, length); \ ++ val_buf[length] = '\0'; \ ++ seq_show_option(m, name, val_buf); \ ++} ++ + #define SEQ_START_TOKEN ((void *)1) + /* + * Helpers for iteration over list_head-s in seq_files +diff --git a/kernel/cgroup.c b/kernel/cgroup.c +index e8a5491be756..4d65b66ae60d 100644 +--- a/kernel/cgroup.c ++++ b/kernel/cgroup.c +@@ -1319,7 +1319,7 @@ static int cgroup_show_options(struct seq_file *seq, + + for_each_subsys(ss, ssid) + if (root->subsys_mask & (1 << ssid)) +- seq_printf(seq, ",%s", ss->name); ++ seq_show_option(seq, ss->name, NULL); + if (root->flags & CGRP_ROOT_NOPREFIX) + seq_puts(seq, ",noprefix"); + if (root->flags & CGRP_ROOT_XATTR) +@@ -1327,13 +1327,14 @@ static int cgroup_show_options(struct seq_file *seq, + + spin_lock(&release_agent_path_lock); + if (strlen(root->release_agent_path)) +- seq_printf(seq, ",release_agent=%s", root->release_agent_path); ++ seq_show_option(seq, "release_agent", ++ root->release_agent_path); + spin_unlock(&release_agent_path_lock); + + if (test_bit(CGRP_CPUSET_CLONE_CHILDREN, &root->cgrp.flags)) + seq_puts(seq, ",clone_children"); + if (strlen(root->name)) +- seq_printf(seq, ",name=%s", root->name); ++ seq_show_option(seq, "name", root->name); + return 0; + } + +diff --git a/kernel/sched/core.c b/kernel/sched/core.c +index 123673291ffb..e6910526c84b 100644 +--- a/kernel/sched/core.c ++++ b/kernel/sched/core.c +@@ -5328,6 +5328,14 @@ static int sched_cpu_active(struct notifier_block *nfb, + case CPU_STARTING: + set_cpu_rq_start_time(); + return NOTIFY_OK; ++ case CPU_ONLINE: ++ /* ++ * At this point a starting CPU has marked itself as online via ++ * set_cpu_online(). But it might not yet have marked itself ++ * as active, which is essential from here on. ++ * ++ * Thus, fall-through and help the starting CPU along. ++ */ + case CPU_DOWN_FAILED: + set_cpu_active((long)hcpu, true); + return NOTIFY_OK; +diff --git a/net/ceph/ceph_common.c b/net/ceph/ceph_common.c +index 79e8f71aef5b..3f76eb84b395 100644 +--- a/net/ceph/ceph_common.c ++++ b/net/ceph/ceph_common.c +@@ -495,8 +495,11 @@ int ceph_print_client_options(struct seq_file *m, struct ceph_client *client) + struct ceph_options *opt = client->options; + size_t pos = m->count; + +- if (opt->name) +- seq_printf(m, "name=%s,", opt->name); ++ if (opt->name) { ++ seq_puts(m, "name="); ++ seq_escape(m, opt->name, ", \t\n\\"); ++ seq_putc(m, ','); ++ } + if (opt->key) + seq_puts(m, "secret=,"); + +diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c +index 7f8d7f19e044..280235cc3a98 100644 +--- a/security/selinux/hooks.c ++++ b/security/selinux/hooks.c +@@ -1095,7 +1095,7 @@ static void selinux_write_opts(struct seq_file *m, + seq_puts(m, prefix); + if (has_comma) + seq_putc(m, '\"'); +- seq_puts(m, opts->mnt_opts[i]); ++ seq_escape(m, opts->mnt_opts[i], "\"\n\\"); + if (has_comma) + seq_putc(m, '\"'); + } +diff --git a/sound/soc/codecs/adav80x.c b/sound/soc/codecs/adav80x.c +index 4373ada95648..3a91a00fb973 100644 +--- a/sound/soc/codecs/adav80x.c ++++ b/sound/soc/codecs/adav80x.c +@@ -864,7 +864,6 @@ const struct regmap_config adav80x_regmap_config = { + .val_bits = 8, + .pad_bits = 1, + .reg_bits = 7, +- .read_flag_mask = 0x01, + + .max_register = ADAV80X_PLL_OUTE, + +diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c +index eff4b4d512b7..ee91edcf3cb0 100644 +--- a/sound/soc/codecs/arizona.c ++++ b/sound/soc/codecs/arizona.c +@@ -1610,17 +1610,6 @@ int arizona_init_dai(struct arizona_priv *priv, int id) + } + EXPORT_SYMBOL_GPL(arizona_init_dai); + +-static irqreturn_t arizona_fll_clock_ok(int irq, void *data) +-{ +- struct arizona_fll *fll = data; +- +- arizona_fll_dbg(fll, "clock OK\n"); +- +- complete(&fll->ok); +- +- return IRQ_HANDLED; +-} +- + static struct { + unsigned int min; + unsigned int max; +@@ -1902,17 +1891,18 @@ static int arizona_is_enabled_fll(struct arizona_fll *fll) + static int arizona_enable_fll(struct arizona_fll *fll) + { + struct arizona *arizona = fll->arizona; +- unsigned long time_left; + bool use_sync = false; + int already_enabled = arizona_is_enabled_fll(fll); + struct arizona_fll_cfg cfg; ++ int i; ++ unsigned int val; + + if (already_enabled < 0) + return already_enabled; + + if (already_enabled) { + /* Facilitate smooth refclk across the transition */ +- regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x7, ++ regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x9, + ARIZONA_FLL1_GAIN_MASK, 0); + regmap_update_bits_async(fll->arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, +@@ -1964,9 +1954,6 @@ static int arizona_enable_fll(struct arizona_fll *fll) + if (!already_enabled) + pm_runtime_get(arizona->dev); + +- /* Clear any pending completions */ +- try_wait_for_completion(&fll->ok); +- + regmap_update_bits_async(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); + if (use_sync) +@@ -1978,10 +1965,24 @@ static int arizona_enable_fll(struct arizona_fll *fll) + regmap_update_bits_async(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, 0); + +- time_left = wait_for_completion_timeout(&fll->ok, +- msecs_to_jiffies(250)); +- if (time_left == 0) ++ arizona_fll_dbg(fll, "Waiting for FLL lock...\n"); ++ val = 0; ++ for (i = 0; i < 15; i++) { ++ if (i < 5) ++ usleep_range(200, 400); ++ else ++ msleep(20); ++ ++ regmap_read(arizona->regmap, ++ ARIZONA_INTERRUPT_RAW_STATUS_5, ++ &val); ++ if (val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1))) ++ break; ++ } ++ if (i == 15) + arizona_fll_warn(fll, "Timed out waiting for lock\n"); ++ else ++ arizona_fll_dbg(fll, "FLL locked (%d polls)\n", i); + + return 0; + } +@@ -2066,11 +2067,8 @@ EXPORT_SYMBOL_GPL(arizona_set_fll); + int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, + int ok_irq, struct arizona_fll *fll) + { +- int ret; + unsigned int val; + +- init_completion(&fll->ok); +- + fll->id = id; + fll->base = base; + fll->arizona = arizona; +@@ -2092,13 +2090,6 @@ int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq, + snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name), + "FLL%d clock OK", id); + +- ret = arizona_request_irq(arizona, ok_irq, fll->clock_ok_name, +- arizona_fll_clock_ok, fll); +- if (ret != 0) { +- dev_err(arizona->dev, "Failed to get FLL%d clock OK IRQ: %d\n", +- id, ret); +- } +- + regmap_update_bits(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, 0); + +diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h +index 11ff899b0272..14e8485b5585 100644 +--- a/sound/soc/codecs/arizona.h ++++ b/sound/soc/codecs/arizona.h +@@ -233,7 +233,6 @@ struct arizona_fll { + int id; + unsigned int base; + unsigned int vco_mult; +- struct completion ok; + + unsigned int fout; + int sync_src; +diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c +index 178e55d4d481..06317f7d945f 100644 +--- a/sound/soc/codecs/rt5640.c ++++ b/sound/soc/codecs/rt5640.c +@@ -985,6 +985,35 @@ static int rt5640_hp_event(struct snd_soc_dapm_widget *w, + return 0; + } + ++static int rt5640_lout_event(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *kcontrol, int event) ++{ ++ struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); ++ ++ switch (event) { ++ case SND_SOC_DAPM_POST_PMU: ++ hp_amp_power_on(codec); ++ snd_soc_update_bits(codec, RT5640_PWR_ANLG1, ++ RT5640_PWR_LM, RT5640_PWR_LM); ++ snd_soc_update_bits(codec, RT5640_OUTPUT, ++ RT5640_L_MUTE | RT5640_R_MUTE, 0); ++ break; ++ ++ case SND_SOC_DAPM_PRE_PMD: ++ snd_soc_update_bits(codec, RT5640_OUTPUT, ++ RT5640_L_MUTE | RT5640_R_MUTE, ++ RT5640_L_MUTE | RT5640_R_MUTE); ++ snd_soc_update_bits(codec, RT5640_PWR_ANLG1, ++ RT5640_PWR_LM, 0); ++ break; ++ ++ default: ++ return 0; ++ } ++ ++ return 0; ++} ++ + static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) + { +@@ -1180,13 +1209,16 @@ static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = { + 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)), + SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, + 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)), +- SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0, ++ SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, + rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)), + SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, + 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, + rt5640_hp_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), ++ SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, ++ rt5640_lout_event, ++ SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1, + RT5640_PWR_HP_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1, +@@ -1501,8 +1533,10 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = { + {"HP R Playback", "Switch", "HP Amp"}, + {"HPOL", NULL, "HP L Playback"}, + {"HPOR", NULL, "HP R Playback"}, +- {"LOUTL", NULL, "LOUT MIX"}, +- {"LOUTR", NULL, "LOUT MIX"}, ++ ++ {"LOUT amp", NULL, "LOUT MIX"}, ++ {"LOUTL", NULL, "LOUT amp"}, ++ {"LOUTR", NULL, "LOUT amp"}, + }; + + static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = { +diff --git a/sound/soc/samsung/arndale_rt5631.c b/sound/soc/samsung/arndale_rt5631.c +index 8bf2e2c4bafb..9e371eb3e4fa 100644 +--- a/sound/soc/samsung/arndale_rt5631.c ++++ b/sound/soc/samsung/arndale_rt5631.c +@@ -116,15 +116,6 @@ static int arndale_audio_probe(struct platform_device *pdev) + return ret; + } + +-static int arndale_audio_remove(struct platform_device *pdev) +-{ +- struct snd_soc_card *card = platform_get_drvdata(pdev); +- +- snd_soc_unregister_card(card); +- +- return 0; +-} +- + static const struct of_device_id samsung_arndale_rt5631_of_match[] __maybe_unused = { + { .compatible = "samsung,arndale-rt5631", }, + { .compatible = "samsung,arndale-alc5631", }, +@@ -139,7 +130,6 @@ static struct platform_driver arndale_audio_driver = { + .of_match_table = of_match_ptr(samsung_arndale_rt5631_of_match), + }, + .probe = arndale_audio_probe, +- .remove = arndale_audio_remove, + }; + + module_platform_driver(arndale_audio_driver);